JP2004193338A - Nitride based compound semiconductor light emitting element and its manufacturing method - Google Patents

Nitride based compound semiconductor light emitting element and its manufacturing method Download PDF

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JP2004193338A
JP2004193338A JP2002359511A JP2002359511A JP2004193338A JP 2004193338 A JP2004193338 A JP 2004193338A JP 2002359511 A JP2002359511 A JP 2002359511A JP 2002359511 A JP2002359511 A JP 2002359511A JP 2004193338 A JP2004193338 A JP 2004193338A
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layer
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substrate
electrode
light emitting
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JP4159865B2 (en
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Mayuko Fudeta
麻祐子 筆田
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Sharp Corp
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Sharp Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a nitride based compound semiconductor element excellent in outputting the light. <P>SOLUTION: In the nitride based compound semiconductor light emitting element, an electrode for a p-type, a p-type semiconductor layer, a light emitting layer, an n-type semiconductor layer and an electrode for an n-type are formed sequentially on a base substrate. The electrode side for an n-type is the main light output surface. The element is characterized by that a current inhibition layer is formed in a part between the p-type semiconductor layer and the electrode for a p-type. The manufacturing method of the element contains a process for forming sequentially the n-type semiconductor layer, a light emitting layer, and the p-type semiconductor layer on the substrate; a process for forming the electrode for a p-type after the current inhibition layer is formed in a part on the p-type semiconductor layer; a process for forming the seating substrate on the electrode for a p-type; and a process for eliminating a part or the whole oh the substrate, and exposing a part or the whole of the n-type semiconductor layer. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

【0001】
【発明の属する技術分野】
この発明は、窒化物系化合物半導体(InXAlYGa1-X-YN:0≦X、0≦Y、X+Y≦1)を用いた半導体発光素子およびその製造方法に関するものである。
【0002】
【従来の技術】
窒化ガリウム(GaN)、窒化アルミニウム(AlN)、窒化インジウム(InN)およびそれらの混晶など、窒素を含有する窒化物系化合物半導体発光素子は、主に青色または青緑色などの短波長の発光をもたらす発光素子として利用されている。かかる窒化物系化合物半導体発光素子の発光強度を高めるために種々の試みがなされている。たとえば、発光に寄与する動作電流の割合を増大させるために、台座電極とコンタクト層との間に、電流阻止層および導電性薄膜電極を介在させる技術がある(特許文献1参照)。
【0003】
この発光素子は、図7に示すように、サファイア基板101上に、n型GaN下部クラッド層102、発光層103、p型上部クラッド層104、p型コンタクト層105を形成し、つづいて電流阻止層108を形成し、その上に導電性薄膜電極109およびパッド電極110を形成している。パッド電極110から発光層103へ直接注入される動作電流による発光は、パッド電極110により遮断されて光の取出しには寄与しない。このため、電流阻止層108を設けて、パッド電極110から発光層103への動作電流の導通を阻止することにより、光の取出しに寄与しない無駄な発光を減らす。また、金属などからなる透光性の導電性薄膜電極109は、動作電流を発光層103の広範囲に亘り拡散させ、発光に寄与する動作電流の割合を増大させることができるとある。
【0004】
【特許文献1】
特開平9−129921号公報(第2頁−第6頁)
【0005】
【発明が解決しようとする課題】
しかし、かかる技術では、不透明なパッド電極の直下には電流が流れないため発光しないが、それ以外の部分から放射された光のうち、発光層よりも下側に放射された光が基板底面で反射して、再びパッド電極に戻ってきた場合、パッド電極で光が吸収されて、光出力の低下につながる。また、p型用電極側に設けた導電性薄膜電極は、透光性があるとはいえ、金属などからなる半透明膜であるため、光の吸収がまだ大きく、光出力の低下につながる。
【0006】
本発明の課題は、光の取出し効率の良好な窒化物系化合物半導体発光素子を提供することにある。
【0007】
【課題を解決するための手段】
本発明の窒化物系化合物半導体発光素子は、p型用電極と、p型半導体層と、発光層と、n型半導体層と、n型用電極とが台座基板上に順次形成され、n型用電極側が主たる光取出し面である発光素子において、p型半導体層とp型用電極との間の一部に電流阻止層が設けられていることを特徴とする。
【0008】
また、本発明の窒化物系化合物半導体発光素子の製造方法は、基板上に、n型半導体層と、発光層と、p型半導体層とを順次形成する工程と、p型半導体層上の一部に電流阻止層を形成した後、p型用電極を形成する工程と、p型用電極上に、台座基板を形成する工程と、基板の一部または全部を除去し、n型半導体層の一部または全部を露出させる工程とを含むことを特徴とする。
【0009】
【発明の実施の形態】
(窒化物系化合物半導体発光素子)
本発明の窒化物系化合物半導体発光素子は、n型用電極側が主たる光取出し面であり、p型半導体層とp型用電極との間の一部に電流阻止層が設けられていることを特徴とする。n型用電極側を光取出し面とすることによって、半透明の金属薄膜による電極を用いる必要がないため、光出力の低下が少なく、また、電流阻止層を設けることによって、無駄な発光をなくし、光取り出し効率を大幅に上げることができる。
【0010】
n型用電極の一部がボンディング用パッド電極として機能するか、またはn型用電極上にボンディング用パッド電極が形成され、ボンディング用パッド電極は、発光層から放射される光に対して不透明であり、かつ、n型用電極の上方から見て、電流阻止層が形成されている領域の内側に納まるように形成されているものが好ましい。不透明なボンディング用パッド電極を電流阻止層の形成領域の内側に納まるように形成することによって、ボンディング用パッド電極の直下では発光しないため、無駄な発光が無く、光取り出し効率を上げることができる。n型用電極がボンディング用パッド電極を兼ね、ボンディング用パッド電極として機能する態様も好ましいが、その場合は、ボンディング用電極は不透明であるため、n型用電極の一部をボンディング用パッド電極として機能させる必要がある。
【0011】
n型用電極は、透明導電膜であるものが好ましい。n型用電極として、透明導電膜を用いることによって、発光層からの光をさえぎることなく、n型層に電流を注入できる。また、台座基板は、発光層から放射される光に対して不透明なものが好ましく、p型用電極は、発光層から放射される光の波長における反射率が60%以上である高反射層を有するものが好ましく、反射率は80%以上がより好ましい。不透明な台座基板をp型半導体層側に設け、p型半導体層と不透明な台座基板との間に高反射層を設けることにより、発光層から発光した光のうち台座基板側に放射された光は、高反射層で反射されて、上部に放出されるため、光取出し効率を向上させることができる。したがって、駆動電圧を低減することができるとともに、長期間使用しても剥れなどがなく、信頼性が高い。
【0012】
電流阻止層は、電流を十分に阻止する点で、比抵抗値が1Ωcm以上の高抵抗層と、n型半導体層と、ショットキー接合層のうち少なくとも1層を有するものが好ましい。また、p型用電極における高反射層は、反射率の高い電極が得られる点で、Agを含むものが好ましい。一方、台座基板は、安価な素子が製造できる点で、金属、合金またはSiからなるものが好適である。たとえば、Ni、Al、Cuなどの金属や、亜鉛合金、Al−Mg、Al−Mg−Siなどのアルミニウム合金などが好ましい。
【0013】
(窒化物系化合物半導体発光素子の製造方法)
本発明の窒化物系化合物半導体発光素子の製造方法は、基板上に、n型半導体層と、発光層と、p型半導体層とを順次形成する工程と、p型半導体層上の一部に電流阻止層を形成した後、p型用電極を形成する工程と、p型用電極上に、台座基板を形成する工程と、基板の一部または全部を除去し、n型半導体層の一部または全部を露出させる工程とを含むことを特徴とする。かかる方法により、無駄な発光が無く、光取出し効率の良好な窒化物系化合物半導体発光素子を製造することができる。
【0014】
p型コンタクト層とp型用電極との良好なオーミック接合を得、密着力を高める点で、p型用電極を形成した後、300℃〜700℃で熱処理を行なうことが好ましい。かかる観点から、500℃〜600℃で、1分間〜5分間の熱処理をするとより好ましい。また、本発明の製造方法において、n型半導体層、発光層およびp型半導体層などを順次形成する基板は、台座基板の形成後、除去されるが、フッ化水素酸と硝酸とを含むエッチング液に溶解し、容易に除去できる点で、Si製の基板が好ましい。一方、かかるフッ化水素酸と硝酸とを含むエッチング液は、AlNなどの窒化物系化合物半導体に対しては強い選択性を示し、エッチングにより、平坦な表面を有するAlNなどのバッファ層を露出することができる。また、エッチングにおいては、GaNなどからなるn型半導体層をエッチングストップ層として機能させることができる。
【0015】
台座基板は、導電性の台座基板が容易に得られる点で、メッキ法により形成するのが好ましい。また、台座基板は、Si基板であり、かかる基板を熱圧着によりp型用電極上に形成すると、十分な接合強度が得られる点で、好ましい。熱圧着は、貼り付け金属としては、AuSn、AuGeなどが好ましく、接合に際しては、貼り付け金属の共晶点より低い温度で行なうのが好ましい。
【0016】
【実施例】
実施例1
図1は、台座基板が厚膜Niである発光素子の断面図で、図1(a)は、製造の途中の段階での断面図であり、図1(b)は、完成した段階での断面図である。Si基板10上に、SiドープAlNからなるバッファ層11、SiドープGaNからなるn型半導体層12を形成し、その上にGaNからなるバリア層と、InGaNからなる井戸層で構成された多重量子井戸の発光層13を形成した。発光層13の上にはp型AlGaNからなるp型クラッド層14を形成し、p型クラッド層14の上にはp型GaNからなるp型コンタクト層15を形成した。つぎに、p型コンタクト層15の表面上に電流阻止層16として厚さ10nmのSiO2層をリフトオフ法により形成した。
【0017】
p型コンタクト層15の表面と電流阻止層16上に、p型用電極17として、厚さ1.5nmのPd密着層17aと、厚さ150nmのAg高反射層17bとを蒸着し、真空中において500℃で3分間熱処理することにより、p型コンタクト層15との合金化処理をした。この熱処理によって、p型コンタクト層15とp型用電極17の良好なオーミック接合が得られ、かつ密着力が増した。つぎに、p型用電極17上に、メッキ下地層18として、厚さ300nmのAuを蒸着し、メッキ下地層18の上に、台座基板19として、厚さ100μmの厚膜Niを電解メッキ法により形成した。メッキ下地層18を形成した状態では、電流阻止層16の形成領域が凸部状になっていたが、電解メッキをすることにより、この凸部がなだらかになるようにNiが形成され、Niが100μm形成された状態では、ほぼ平坦になった。
【0018】
つぎに、Si基板10を除去するために、台座基板19とウェハの側面をエレクトロンワックスで覆い、70%のフッ酸と60%の硝酸と氷酢酸を5:2:2の比で混合したエッチング液により、Si基板10を溶かして除去し、SiドープAlNからなるバッファ層11の表面を露出させた。このようなエッチング液を用いることにより、AlNなどの窒化物系化合物半導体に対してはエッチングレートが小さく、選択的なエッチングが良好に行なわれ、露出したAlNバッファ層の表面は平坦となった。エレクトロンワックスはアセトンなどの有機溶剤で除去した。つぎに、SiドープAlNからなるバッファ層11上に、厚さ200nmのITOからなるn型用電極20をスパッタリングにより形成した。スパッタリング中、250℃で加熱することにより、SiドープAlNからなるバッファ層11とn型用電極20の間で良好なオーミック接合が得られた。
【0019】
つぎに、ボンディング用のパッド電極21として、厚さ10nmのMo密着層21aと、厚さ500nmのAuボンディング層21bを、n型用電極20上に形成した。このとき、n型用電極20の上方から見て、ボンディング用のパッド電極21が電流阻止層16の内側に納まるように、通常のフォトリソグラフィを用いたリフトオフ法により形成した。つぎに、ダイシングする部分のITOを除去するために、ダイシングライン以外の部分をフォトレジストで覆い、塩化鉄系のエッチャントでITOをウェットエッチングで除去した。
【0020】
その後、ダイシングする部分の半導体層をドライエッチング法により除去するために、ダイシングライン以外の部分をフォトレジストで覆った。ドライエッチング法としては、RIE法を用い、フォトレジストで覆われていない部分をp型用電極17が露出するまでエッチングを行なった。最後に、ダイシングにより300μmの大きさに分割した。このようにして製造した発光素子を、n型電極の上方から見た平面図を図2に示す。図2において、p型用電極217上にn型用電極220が形成されており、ボンディング用パッド電極221は、電流阻止層216が形成されている領域の内側に納まるように形成されていた。
【0021】
製造した発光素子は、光を通さない厚膜金属からなるボンディング用パッド電極の直下では発光しないため、無駄な発光を無くすことができた。また、p型用電極が発光層から放射される光に対して高反射率を有するため、光取出し効率が良好であった。このため、低駆動電圧で、長期の通電試験においても剥がれなどが生じず、信頼性が高った。本実施例ではAlNをSiドープしたが、ノンドープAlNをバッファ層に用いてもよく、その場合はSi基板を除去後にドライエッチングによってAlNの一部または全部を除去し、SiドープGaN層を露出させてn型用電極を形成すれば良い。
【0022】
また、本実施例では、台座基板の厚膜Niを電解メッキ法によって形成したが、無電解メッキ法を用いても良く、Ni以外のものでも、メッキ法で形成できるものであれば良く、導電性のものが好ましい。また、本実施例では、n型用電極としてITOをn型半導体層の表面全面に形成したが、ITOを形成せずパッド電極だけでも良い。この場合は、パッド電極は、Hfを厚さ5nm形成してから、Alを厚さ150nm形成するのが好ましい。
【0023】
実施例2
図3は、Si基板330上に、選択的に結晶成長するためのSiO2マスク331を設置したときの平面図である。マスク331は300nmの厚さであり、開口部は200μm角で、300μmピッチで並んでいる。また、図4は、台座基板40が厚膜Niである発光素子を製造するために、Si基板30を用いて形成した発光素子の断面図であり、(a)は台座基板40を形成した段階での断面図であり、(b)は基板を分割する前の段階での断面図であり、(c)は完成した段階での断面図である。
【0024】
図4(a)に示すように、Si基板30上に窒化物系化合物半導体を結晶成長すると、マスク31が存在しない領域、すなわち、Si表面が露出している開口部のみに窒化物系化合物半導体が選択的に成長した。本実施例では、選択成長用マスク31が部分的に形成されたSi基板30上に、AlNからなるバッファ層32、シリコンドープGaNからなるn型半導体層33を形成し、その上にGaNからなるバリア層と、InGaNからなる井戸層とで構成された多重量子井戸の発光層34を形成した。発光層34の上にはp型AlGaNからなるp型クラッド層35を形成し、p型クラッド層35の上にはp型GaNからなるp型コンタクト層36を形成した。つぎに、p型コンタクト層36の表面上に、電流阻止層37として厚さ100nmのSiO2層をリフトオフ法により形成した。
【0025】
p型コンタクト層36の表面と電流阻止層37上に、p型用電極として、厚さ1.5nmのPd密着層38aと、厚さ150nmのAg高反射層38bとを蒸着により形成し、真空中、500℃で3分間熱処理することにより、p型コンタクト層36との合金化処理をした。この熱処理によって、p型コンタクト層36とp型用電極の良好なオーミック接合が得られ、かつ密着力が増した。つぎに、p型用電極上に、メッキ下地層39として、厚さ300nmのAu層を蒸着した。つぎに、メッキ下地層39の上に、台座基板40として厚さ100μmの厚膜Niを電解メッキ法により形成した。図4(a)は、この段階での状態を示している。
【0026】
その後、Si基板30を除去するために、台座基板40とウェハの側面をエレクトロンワックスで覆い、70%のフッ酸と60%の硝酸と氷酢酸とを5:2:2の比で混合したエッチング液により、Si基板30を溶かして除去し、AlNからなるバッファ層32の表面を露出させた。このとき、選択成長用マスク31もこのエッチング液により除去された。選択成長用マスク31が除去された部分はp型用電極38が露出し、一部はエッチングされたが、その下のAuでエッチングはストップした。このようなエッチング液を用いることにより、AlNなどの窒化物系化合物半導体に対してはエッチングレートが小さく、選択的なエッチングが良好に行なわれ、露出したAlNバッファ層の表面は平坦となった。エレクトロンワックスはアセトンなどの有機溶剤で除去し、絶縁性であるAlNからなるバッファ層32をドライエッチングにより除去した後、SiドープGaNからなるn型半導体層33を露出させた。
【0027】
つぎに、SiドープGaNからなるn型半導体層33の表面に、n型用電極41として厚さ200nmのITOをスパッタリングにより形成した。スパッタリング中は250℃に加熱することにより、SiドープGaNからなるn型半導体層33とn型用電極41の間で良好なオーミック接触が得られた。つづいて、ボンディング用パッド電極として、厚さ10nmのMo密着層42aと、厚さ500nmのAuボンディング層42bとを、n型用電極41上に形成した。このとき、n型用電極41の上方から見て、ボンディング用パッド電極42が電流阻止層37の内側に納まるように、通常のフォトリソグラフィを用いたリフトオフ法により形成した。つぎに、ダイシングする部分のITOを除去するために、ダイシングライン以外の部分をフォトレジストで覆い、塩化鉄系のエッチャントでITOをウェットエッチングで除去した。図4(b)は、この段階での状態を示している。
【0028】
最後に、図4(b)の点線に沿ってダイシングすることにより300μm角の大きさに分割した。図4(c)は、このようにして製造した発光素子の断面図である。製造した発光素子は、光を通さない厚膜金属からなるボンディング用パッド電極の直下では発光しないため、無駄な発光を無くすことができた。また、p型用電極が高反射率であるため、光取出し効率が良好であり、低駆動電圧で、長期の通電試験においても剥がれなどが生じず、信頼性が高かった。本実施例では、AlNに不純物ドーピングをしていないが、AlNにSiドープすれば、ドライエッチングでAlNを除去せずにSiドープAlN上にn型用電極を形成すれば良い。また、本実施例では、台座基板の厚膜Niを電解メッキ法によって形成したが、無電解メッキ法を用いても良く、また、Ni以外のものでも、メッキ法で形成できるものであれば良く、導電性のものが好ましい。また、本実施例では、n型用電極としてITOをn型半導体層の表面全面に形成したが、ITOを形成せずパッド電極だけでも良い。この場合は、パッド電極はHfを厚さ5nm形成してから、Alを厚さ150nm形成するのが好ましい。
【0029】
実施例3
図5(a)は、台座基板59上に電極を形成した状態を表す断面図であり、図5(b)は、Si基板50上にn型半導体層52などを形成した状態を示す断面図である。また、図5(c)は、熱圧接後の状態を表す断面図である。図5(b)に示すように、Si基板50上に、SiドープAlNバッファ層51、SiドープGaNからなるn型半導体層52を形成し、その上にGaNバリア層と、InGaNからなる井戸層で構成された多重量子井戸の発光層53を形成した。発光層53の上にはp型AlGaNクラッド層54を形成し、p型クラッド層54の上にp型GaNコンタクト層55を形成した。つぎに、p型コンタクト層55の表面に電流阻止領域56を形成するために、その部分にフォトレジストによるマスクを形成し、その上にp型用電極57として、厚さ1.5nmのPd密着層57aと、厚さ150nmのAg高反射層57bとを蒸着した後、リフトオフ法で電流阻止領域56を形成した。
【0030】
真空中、500℃で3分間熱処理することにより、p型コンタクト層55とp型用電極57との合金化処理をした。この熱処理によって、p型コンタクト層55とp型用電極57の良好なオーミック接合が得られ、かつ密着力が増した。つぎに、p型用電極57上に厚さ300nmのAuSn貼り付け金属層58aを蒸着した。電流阻止領域56には貼り付け金属層58aが直接接するため、オーミック接合とはならず、電流阻止領域になった。一方、図5(a)に示すように、台座基板59としてSi基板を用意し、台座基板59上にオーミック電極60として、厚さ15nmのチタン層60aと、厚さ150nmのアルミ層60bを蒸着により形成した。その上に、厚さ100nmのMoバリア金属層61を蒸着し、その上に厚さ300nmのAuSn貼り付け金属層58bを蒸着した。
【0031】
つぎに、貼り付け金属層58aと貼り付け金属層58bを合わせ、真空中で、200℃に加熱しながら加圧し、400Nの圧力をかけることにより接合した。貼り付け金属のAuSnの共晶点は230℃であり、本実施例では共晶点以下の200℃で熱圧接した。図5(c)は、熱圧接後の状態を示す断面図である。つづいて、Si基板50を除去するために、台座基板59側とウェハの側面をエレクトロンワックスで覆い、70%のフッ酸と60%の硝酸と氷酢酸を5:2:2の比で混合したエッチング液により、Si基板50を溶かして除去し、SiドープAlNからなるバッファ層51の表面を露出させた。このようなエッチング液を用いることにより、AlNなどの窒化物系化合物半導体に対してはエッチングレートが小さく、選択的なエッチングが良好に行なわれ、露出したAlNバッファ層の表面は平坦となった。エレクトロンワックスは、アセトンなどの有機溶剤で除去した。
【0032】
その後、図6(a)に示すように、SiドープAlNからなるバッファ層51上に、厚さ200nmのITOからなるn型用電極62をスパッタリングにより形成した。スパッタリング中は250℃で加熱することにより、SiドープAlNからなるバッファ層51とn型用電極62との間で良好なオーミック接触が得られた。つづいて、ボンディング用のパッド電極63として、厚さ10nmのMo密着層63aと、厚さ500nmのAuボンディング層63bとを、通常のフォトリソグラフィを用いたリフトオフ法によりn型用電極62上に形成した。n型用電極62の上方から見たときの平面図を図6(b)に示す。図6(b)から明らかなとおり、ボンディング用のパッド電極63は、電流阻止層56を形成している領域の内側に納まるように形成されていた。
【0033】
その後、ダイシングする部分のITOを除去するために、ダイシングライン以外の部分をフォトレジストで覆い、塩化鉄系のエッチャントでITOをウェットエッチングで除去した。ITOエッチングのためのフォトレジストをそのままドライエッチング用のマスクとして用いて、ダイシングする部分の半導体層をドライエッチング法により除去した。ドライエッチング法としては、RIE法を用い、フォトレジストで覆われていない部分をp型用電極57が露出するまでエッチングした。最後に、ダイシングにより300μm角に分割した。図6(a)は、製造した発光素子の断面図である。
【0034】
このようにして製造した発光素子は、光を通さない厚膜金属からなるボンディング用パッド電極の直下では発光しないため、無駄な発光を無くすことができた。また、p型用電極が発光層から放射される光に対して高い反射率を有するため、光取出し効率が良好であった。このため、低駆動電圧で、長期の通電試験においても剥がれなどが生じず、信頼性が高いことがわかった。本実施例では、AlNにSiドープしたものを用いたが、ノンドープAlNをバッファ層に用いてもよく、その場合はSi基板を除去後に、ドライエッチングによってAlNの一部または全部を除去し、SiドープGaN層を露出させてn型用電極を形成すれば良い。本実施例では、台座基板にはSi基板を用いたが、その他の基板でも良く、導電性のものが好ましい。また、電流阻止領域にオーミック電極を形成しないことによって電流阻止領域としたが、電流阻止領域とする部分のp型半導体層表面をドライエッチングでわずかにエッチングすることで、p型用電極とオーミック接触が得られなくなるため、ドライエッチングで電流阻止領域を形成してもよい。
【0035】
今回開示された実施の形態および実施例はすべての点で例示であって制限的なものではないと考えられるべきである。本発明の範囲は上記した説明ではなくて特許請求の範囲によって示され、特許請求の範囲と均等の意味および範囲内でのすべての変更が含まれることが意図される。
【0036】
【発明の効果】
n型用電極側を主たる光取り出し面とし、電流阻止領域を設けることにより、光取り出し効率を向上させることができる。
【図面の簡単な説明】
【図1】本発明の実施例1で製造する発光素子の断面図であり、(a)は製造の途中段階での断面図であり、(b)は完成した段階での断面図である。
【図2】本発明の実施例1で製造する発光素子の平面図である。
【図3】本発明の実施例2において、基板上にマスクを設置したときの平面図である。
【図4】本発明の実施例2で製造する発光素子の断面図であり、(a)は台座基板を形成した段階での断面図であり、(b)は基板を分割する前の段階での断面図であり、(c)は完成した段階での断面図である。
【図5】本発明の実施例3で製造する発光素子の断面図であり、(a)は台座基板上に電極を形成した状態を表す断面図であり、(b)は基板上にn型半導体層などを形成した状態を表す断面図であり、(c)は熱圧接後の状態を表す断面図である。
【図6】本発明の実施例3で製造した発光素子を表し、(a)は断面図であり、(b)は平面図である。
【図7】従来の発光素子の断面図である。
【符号の説明】
10 Si基板、11 バッファ層、12 n型半導体層、13 発光層、14 p型クラッド層、15 p型コンタクト層、16 電流阻止層、17 p型用電極、17a 密着層、17b 高反射層、18 メッキ下地層、19 台座基板、20 n型用電極、21 ボンディング用パッド電極。
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor light emitting device using a nitride-based compound semiconductor (In x Al Y Ga 1 -XYN : 0 ≦ X, 0 ≦ Y, X + Y ≦ 1) and a method for manufacturing the same.
[0002]
[Prior art]
A nitride-based compound semiconductor light emitting device containing nitrogen such as gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), and a mixed crystal thereof mainly emits light of a short wavelength such as blue or blue-green. It is used as a light emitting element to bring about. Various attempts have been made to increase the light emission intensity of such a nitride compound semiconductor light emitting device. For example, there is a technique in which a current blocking layer and a conductive thin film electrode are interposed between a pedestal electrode and a contact layer in order to increase the ratio of an operating current that contributes to light emission (see Patent Document 1).
[0003]
In this light-emitting device, as shown in FIG. 7, an n-type GaN lower cladding layer 102, a light-emitting layer 103, a p-type upper cladding layer 104, and a p-type contact layer 105 are formed on a sapphire substrate 101, and then the current is blocked. A layer 108 is formed, and a conductive thin film electrode 109 and a pad electrode 110 are formed thereon. Light emission due to an operating current directly injected from the pad electrode 110 into the light emitting layer 103 is blocked by the pad electrode 110 and does not contribute to light extraction. For this reason, by providing the current blocking layer 108 to block conduction of the operating current from the pad electrode 110 to the light emitting layer 103, unnecessary light emission that does not contribute to light extraction is reduced. Further, the light-transmitting conductive thin film electrode 109 made of a metal or the like can diffuse an operating current over a wide range of the light-emitting layer 103 and increase the proportion of the operating current that contributes to light emission.
[0004]
[Patent Document 1]
JP-A-9-129921 (pages 2 to 6)
[0005]
[Problems to be solved by the invention]
However, in this technique, although no current flows directly under the opaque pad electrode, no light is emitted.However, of the light emitted from other portions, light emitted below the light emitting layer is emitted on the bottom surface of the substrate. When the light is reflected and returns to the pad electrode again, light is absorbed by the pad electrode, leading to a decrease in light output. Further, the conductive thin-film electrode provided on the p-type electrode side is a translucent film made of a metal or the like, though it is translucent, and therefore has a large light absorption, leading to a decrease in light output.
[0006]
An object of the present invention is to provide a nitride-based compound semiconductor light emitting device having good light extraction efficiency.
[0007]
[Means for Solving the Problems]
In the nitride-based compound semiconductor light emitting device of the present invention, a p-type electrode, a p-type semiconductor layer, a light-emitting layer, an n-type semiconductor layer, and an n-type electrode are sequentially formed on a pedestal substrate. In a light emitting element in which the main electrode is the main light extraction surface, a current blocking layer is provided in a part between the p-type semiconductor layer and the p-type electrode.
[0008]
Further, the method for manufacturing a nitride-based compound semiconductor light emitting device of the present invention includes a step of sequentially forming an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer on a substrate; Forming a current blocking layer in the portion, forming a p-type electrode, forming a pedestal substrate on the p-type electrode, removing part or all of the substrate, and forming an n-type semiconductor layer. Exposing a part or the whole thereof.
[0009]
BEST MODE FOR CARRYING OUT THE INVENTION
(Nitride compound semiconductor light emitting device)
In the nitride-based compound semiconductor light emitting device of the present invention, the n-type electrode side is a main light extraction surface, and a current blocking layer is provided in a part between the p-type semiconductor layer and the p-type electrode. Features. By using the electrode for n-type as the light extraction surface, it is not necessary to use an electrode made of a translucent metal thin film, so that there is little decrease in light output, and by providing a current blocking layer, unnecessary light emission is eliminated. The light extraction efficiency can be greatly increased.
[0010]
A part of the n-type electrode functions as a bonding pad electrode, or a bonding pad electrode is formed on the n-type electrode, and the bonding pad electrode is opaque to light emitted from the light emitting layer. It is preferable that the electrode is formed so as to be located inside the region where the current blocking layer is formed when viewed from above the n-type electrode. By forming the opaque bonding pad electrode so as to fit inside the region where the current blocking layer is formed, no light is emitted immediately below the bonding pad electrode, so that there is no unnecessary light emission and light extraction efficiency can be increased. It is also preferable that the n-type electrode also functions as a bonding pad electrode, and in this case, the bonding electrode is opaque. Therefore, a part of the n-type electrode is used as the bonding pad electrode. Need to work.
[0011]
The n-type electrode is preferably a transparent conductive film. By using a transparent conductive film as the n-type electrode, current can be injected into the n-type layer without blocking light from the light-emitting layer. The pedestal substrate is preferably opaque to light emitted from the light-emitting layer, and the p-type electrode is formed of a highly reflective layer having a reflectance of 60% or more at the wavelength of light emitted from the light-emitting layer. And the reflectance is more preferably 80% or more. By providing an opaque pedestal substrate on the p-type semiconductor layer side and providing a highly reflective layer between the p-type semiconductor layer and the opaque pedestal substrate, light emitted from the light emitting layer and emitted to the pedestal substrate side Is reflected by the high reflection layer and emitted to the upper part, so that the light extraction efficiency can be improved. Therefore, the driving voltage can be reduced, and there is no peeling even after long-term use, and the reliability is high.
[0012]
The current blocking layer preferably has at least one of a high-resistance layer having a specific resistance of 1 Ωcm or more, an n-type semiconductor layer, and a Schottky junction layer, from the viewpoint of sufficiently blocking a current. The high reflection layer in the p-type electrode preferably contains Ag from the viewpoint that an electrode having a high reflectance can be obtained. On the other hand, the pedestal substrate is preferably made of a metal, an alloy, or Si because an inexpensive element can be manufactured. For example, metals such as Ni, Al, and Cu, zinc alloys, and aluminum alloys such as Al-Mg and Al-Mg-Si are preferable.
[0013]
(Method of manufacturing nitride compound semiconductor light emitting device)
The method for manufacturing a nitride-based compound semiconductor light-emitting device according to the present invention includes a step of sequentially forming an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer on a substrate; After forming the current blocking layer, forming a p-type electrode, forming a pedestal substrate on the p-type electrode, removing a part or all of the substrate, and forming a part of the n-type semiconductor layer. Or exposing the whole. According to this method, a nitride-based compound semiconductor light-emitting device having no light emission and good light extraction efficiency can be manufactured.
[0014]
From the viewpoint of obtaining a good ohmic junction between the p-type contact layer and the p-type electrode and increasing the adhesion, it is preferable to perform a heat treatment at 300 ° C. to 700 ° C. after forming the p-type electrode. From this viewpoint, it is more preferable to perform the heat treatment at 500 ° C. to 600 ° C. for 1 minute to 5 minutes. Further, in the manufacturing method of the present invention, the substrate on which the n-type semiconductor layer, the light-emitting layer, the p-type semiconductor layer, and the like are sequentially formed is removed after the formation of the pedestal substrate, but the etching includes hydrofluoric acid and nitric acid. A substrate made of Si is preferable because it can be dissolved in a liquid and easily removed. On the other hand, the etching solution containing hydrofluoric acid and nitric acid shows strong selectivity to a nitride-based compound semiconductor such as AlN, and exposes a buffer layer such as AlN having a flat surface by etching. be able to. In the etching, an n-type semiconductor layer made of GaN or the like can function as an etching stop layer.
[0015]
The pedestal substrate is preferably formed by a plating method in that a conductive pedestal substrate can be easily obtained. The pedestal substrate is a Si substrate, and it is preferable to form such a substrate on the p-type electrode by thermocompression bonding, since sufficient bonding strength can be obtained. In the thermocompression bonding, AuSn, AuGe, or the like is preferably used as the metal to be bonded, and it is preferable to perform bonding at a temperature lower than the eutectic point of the metal to be bonded.
[0016]
【Example】
Example 1
FIG. 1 is a cross-sectional view of a light-emitting element in which a pedestal substrate is a thick film Ni. FIG. 1A is a cross-sectional view in the middle of manufacturing, and FIG. It is sectional drawing. A buffer layer 11 made of Si-doped AlN and an n-type semiconductor layer 12 made of Si-doped GaN are formed on a Si substrate 10, and a multi-quantum structure composed of a barrier layer made of GaN and a well layer made of InGaN is formed thereon. A light emitting layer 13 of a well was formed. A p-type cladding layer 14 made of p-type AlGaN was formed on the light emitting layer 13, and a p-type contact layer 15 made of p-type GaN was formed on the p-type cladding layer 14. Next, an SiO 2 layer having a thickness of 10 nm was formed as a current blocking layer 16 on the surface of the p-type contact layer 15 by a lift-off method.
[0017]
On the surface of the p-type contact layer 15 and on the current blocking layer 16, a 1.5-nm-thick Pd adhesion layer 17a and a 150-nm-thick Ag high-reflection layer 17b are deposited as p-type electrodes 17 by vacuum evaporation. At 500 ° C. for 3 minutes to form an alloy with the p-type contact layer 15. By this heat treatment, a good ohmic junction between the p-type contact layer 15 and the p-type electrode 17 was obtained, and the adhesion was increased. Next, 300 nm thick Au is deposited on the p-type electrode 17 as a plating base layer 18, and a 100 μm thick thick film Ni is formed on the plating base layer 18 as a pedestal substrate 19 by an electrolytic plating method. Formed. In the state where the plating base layer 18 is formed, the region where the current blocking layer 16 is formed has a convex shape. However, Ni is formed by electrolytic plating so that the convex portion becomes gentle. In the state formed with 100 μm, it was almost flat.
[0018]
Next, in order to remove the Si substrate 10, the side surfaces of the pedestal substrate 19 and the wafer are covered with electron wax, and etching is performed by mixing 70% hydrofluoric acid, 60% nitric acid and glacial acetic acid at a ratio of 5: 2: 2. The liquid was used to dissolve and remove the Si substrate 10, exposing the surface of the buffer layer 11 made of Si-doped AlN. By using such an etchant, the etching rate was low for a nitride-based compound semiconductor such as AlN, selective etching was performed favorably, and the surface of the exposed AlN buffer layer became flat. The electron wax was removed with an organic solvent such as acetone. Next, an n-type electrode 20 made of ITO having a thickness of 200 nm was formed on the buffer layer 11 made of Si-doped AlN by sputtering. By heating at 250 ° C. during sputtering, a good ohmic junction was obtained between the buffer layer 11 made of Si-doped AlN and the n-type electrode 20.
[0019]
Next, a Mo adhesion layer 21a having a thickness of 10 nm and an Au bonding layer 21b having a thickness of 500 nm were formed on the n-type electrode 20 as the pad electrodes 21 for bonding. At this time, the pad electrode 21 for bonding was formed by a lift-off method using ordinary photolithography so that the pad electrode 21 for bonding was located inside the current blocking layer 16 when viewed from above the n-type electrode 20. Next, in order to remove ITO in a portion to be diced, portions other than the dicing line were covered with a photoresist, and the ITO was removed by wet etching with an iron chloride-based etchant.
[0020]
After that, portions other than the dicing lines were covered with a photoresist in order to remove a portion of the semiconductor layer to be diced by dry etching. As a dry etching method, a portion not covered with the photoresist was etched until the p-type electrode 17 was exposed. Finally, the wafer was divided into 300 μm pieces by dicing. FIG. 2 is a plan view of the light-emitting device manufactured as described above, as viewed from above the n-type electrode. In FIG. 2, the n-type electrode 220 is formed on the p-type electrode 217, and the bonding pad electrode 221 is formed to fit inside the region where the current blocking layer 216 is formed.
[0021]
Since the manufactured light emitting element does not emit light immediately below the bonding pad electrode made of a thick metal that does not transmit light, useless light emission can be eliminated. In addition, since the p-type electrode has a high reflectance with respect to light emitted from the light emitting layer, light extraction efficiency was good. For this reason, peeling did not occur even in a long drive test at a low drive voltage, and the reliability was improved. In this embodiment, AlN is doped with Si, but non-doped AlN may be used for the buffer layer. In this case, after removing the Si substrate, part or all of the AlN is removed by dry etching to expose the Si-doped GaN layer. In this case, an n-type electrode may be formed.
[0022]
Further, in the present embodiment, the thick film Ni of the pedestal substrate is formed by the electrolytic plating method. However, an electroless plating method may be used, and any material other than Ni may be used as long as it can be formed by the plating method. Are preferred. Further, in this embodiment, ITO is formed on the entire surface of the n-type semiconductor layer as the n-type electrode, but the pad electrode may be formed without forming the ITO. In this case, the pad electrode is preferably formed by forming Hf to a thickness of 5 nm and then forming Al to a thickness of 150 nm.
[0023]
Example 2
FIG. 3 is a plan view when an SiO 2 mask 331 for selectively growing a crystal is provided on a Si substrate 330. The mask 331 has a thickness of 300 nm, and the openings are 200 μm square and arranged at a pitch of 300 μm. FIGS. 4A and 4B are cross-sectional views of a light emitting device formed using a Si substrate 30 in order to manufacture a light emitting device in which the pedestal substrate 40 is a thick film Ni. FIG. (B) is a cross-sectional view before a substrate is divided, and (c) is a cross-sectional view at a completed stage.
[0024]
As shown in FIG. 4A, when the nitride-based compound semiconductor is grown on the Si substrate 30, the nitride-based compound semiconductor is formed only in the region where the mask 31 does not exist, that is, only in the opening where the Si surface is exposed. Grew selectively. In this embodiment, a buffer layer 32 made of AlN and an n-type semiconductor layer 33 made of silicon-doped GaN are formed on an Si substrate 30 on which a selective growth mask 31 is partially formed, and GaN is formed thereon. A multiple quantum well light emitting layer 34 composed of a barrier layer and a well layer made of InGaN was formed. A p-type cladding layer 35 made of p-type AlGaN was formed on the light emitting layer 34, and a p-type contact layer 36 made of p-type GaN was formed on the p-type cladding layer 35. Next, an SiO 2 layer having a thickness of 100 nm was formed as a current blocking layer 37 on the surface of the p-type contact layer 36 by a lift-off method.
[0025]
On the surface of the p-type contact layer 36 and the current blocking layer 37, a 1.5-nm-thick Pd adhesion layer 38a and a 150-nm-thick Ag high-reflection layer 38b are formed by vapor deposition as p-type electrodes. By performing a heat treatment at 500 ° C. for 3 minutes, alloying with the p-type contact layer 36 was performed. By this heat treatment, a good ohmic junction between the p-type contact layer 36 and the p-type electrode was obtained, and the adhesion was increased. Next, an Au layer having a thickness of 300 nm was deposited as a plating base layer 39 on the p-type electrode. Next, a thick film Ni having a thickness of 100 μm was formed as a pedestal substrate 40 on the plating base layer 39 by an electrolytic plating method. FIG. 4A shows a state at this stage.
[0026]
Thereafter, in order to remove the Si substrate 30, the side surfaces of the pedestal substrate 40 and the wafer are covered with electron wax, and etching is performed by mixing 70% hydrofluoric acid, 60% nitric acid, and glacial acetic acid at a ratio of 5: 2: 2. The liquid was used to dissolve and remove the Si substrate 30, exposing the surface of the buffer layer 32 made of AlN. At this time, the selective growth mask 31 was also removed by the etchant. The p-type electrode 38 was exposed in the portion where the selective growth mask 31 was removed, and a portion was etched, but the etching was stopped by Au therebelow. By using such an etchant, the etching rate was low for a nitride-based compound semiconductor such as AlN, selective etching was performed favorably, and the surface of the exposed AlN buffer layer became flat. The electron wax was removed with an organic solvent such as acetone, and after removing the insulating buffer layer 32 made of AlN by dry etching, the n-type semiconductor layer 33 made of Si-doped GaN was exposed.
[0027]
Next, 200 nm thick ITO was formed as the n-type electrode 41 on the surface of the n-type semiconductor layer 33 made of Si-doped GaN by sputtering. By heating to 250 ° C. during the sputtering, good ohmic contact was obtained between the n-type semiconductor layer 33 made of Si-doped GaN and the n-type electrode 41. Subsequently, a 10-nm-thick Mo adhesion layer 42a and a 500-nm-thick Au bonding layer 42b were formed on the n-type electrode 41 as bonding pad electrodes. At this time, the bonding pad electrode 42 was formed by a lift-off method using ordinary photolithography so that the pad electrode 42 for bonding was located inside the current blocking layer 37 when viewed from above the n-type electrode 41. Next, in order to remove ITO in a portion to be diced, portions other than the dicing line were covered with a photoresist, and the ITO was removed by wet etching with an iron chloride-based etchant. FIG. 4B shows a state at this stage.
[0028]
Finally, dicing was performed along the dotted line in FIG. FIG. 4C is a cross-sectional view of the light emitting device manufactured as described above. Since the manufactured light emitting element does not emit light immediately below the bonding pad electrode made of a thick metal that does not transmit light, useless light emission can be eliminated. In addition, since the p-type electrode had a high reflectance, the light extraction efficiency was good, the driving voltage was low, the peeling did not occur even in a long-term energizing test, and the reliability was high. In this embodiment, AlN is not doped with impurities. However, if AlN is doped with Si, an n-type electrode may be formed on Si-doped AlN without removing AlN by dry etching. Further, in the present embodiment, the thick film Ni of the pedestal substrate is formed by the electrolytic plating method. However, an electroless plating method may be used, and other materials other than Ni may be used as long as they can be formed by the plating method. It is preferable to use a conductive material. Further, in this embodiment, ITO is formed on the entire surface of the n-type semiconductor layer as the n-type electrode, but the pad electrode may be formed without forming the ITO. In this case, it is preferable that the pad electrode is formed by forming Hf to a thickness of 5 nm and then forming Al to a thickness of 150 nm.
[0029]
Example 3
FIG. 5A is a cross-sectional view illustrating a state in which electrodes are formed on a pedestal substrate 59, and FIG. 5B is a cross-sectional view illustrating a state in which an n-type semiconductor layer 52 and the like are formed on a Si substrate 50. It is. FIG. 5C is a cross-sectional view illustrating a state after the thermal pressing. As shown in FIG. 5B, a Si-doped AlN buffer layer 51 and an n-type semiconductor layer 52 made of Si-doped GaN are formed on a Si substrate 50, and a GaN barrier layer and a well layer made of InGaN are formed thereon. The light emitting layer 53 of the multiple quantum well composed of was formed. A p-type AlGaN cladding layer 54 was formed on the light emitting layer 53, and a p-type GaN contact layer 55 was formed on the p-type cladding layer 54. Next, in order to form a current blocking region 56 on the surface of the p-type contact layer 55, a mask made of a photoresist is formed at that portion, and a 1.5 nm-thick Pd-contact electrode 57 is formed thereon as a p-type electrode 57. After depositing the layer 57a and the Ag high reflection layer 57b having a thickness of 150 nm, a current blocking region 56 was formed by a lift-off method.
[0030]
By performing a heat treatment at 500 ° C. for 3 minutes in a vacuum, the p-type contact layer 55 and the p-type electrode 57 were alloyed. By this heat treatment, a good ohmic junction between the p-type contact layer 55 and the p-type electrode 57 was obtained, and the adhesion was increased. Next, a 300-nm-thick AuSn-bonded metal layer 58a was deposited on the p-type electrode 57. Since the adhered metal layer 58a is in direct contact with the current blocking region 56, the current blocking region 56 does not form an ohmic junction but serves as a current blocking region. On the other hand, as shown in FIG. 5A, a Si substrate is prepared as the pedestal substrate 59, and a titanium layer 60a having a thickness of 15 nm and an aluminum layer 60b having a thickness of 150 nm are deposited on the pedestal substrate 59 as the ohmic electrodes 60. Formed. A 100 nm-thick Mo barrier metal layer 61 was deposited thereon, and a 300 nm-thick AuSn sticking metal layer 58b was deposited thereon.
[0031]
Next, the pasted metal layer 58a and the pasted metal layer 58b were joined, and they were joined by applying a pressure of 400 N while heating to 200 ° C. in a vacuum. The eutectic point of AuSn of the adhered metal is 230 ° C., and in this embodiment, the eutectic point was heat-welded at 200 ° C. which is lower than the eutectic point. FIG. 5C is a cross-sectional view illustrating a state after the thermal pressing. Subsequently, in order to remove the Si substrate 50, the pedestal substrate 59 side and the side surfaces of the wafer were covered with electron wax, and 70% hydrofluoric acid, 60% nitric acid and glacial acetic acid were mixed at a ratio of 5: 2: 2. The Si substrate 50 was dissolved and removed with an etchant to expose the surface of the buffer layer 51 made of Si-doped AlN. By using such an etchant, the etching rate was low for a nitride-based compound semiconductor such as AlN, selective etching was performed favorably, and the surface of the exposed AlN buffer layer became flat. The electron wax was removed with an organic solvent such as acetone.
[0032]
Thereafter, as shown in FIG. 6A, an n-type electrode 62 made of ITO having a thickness of 200 nm was formed on the buffer layer 51 made of Si-doped AlN by sputtering. By heating at 250 ° C. during the sputtering, a good ohmic contact was obtained between the buffer layer 51 made of Si-doped AlN and the n-type electrode 62. Subsequently, a Mo adhesion layer 63a having a thickness of 10 nm and an Au bonding layer 63b having a thickness of 500 nm are formed on the n-type electrode 62 as a bonding pad electrode 63 by a lift-off method using ordinary photolithography. did. FIG. 6B is a plan view when viewed from above the n-type electrode 62. As is clear from FIG. 6B, the pad electrode 63 for bonding is formed so as to fit inside the region where the current blocking layer 56 is formed.
[0033]
Thereafter, in order to remove the ITO at the portion to be diced, portions other than the dicing line were covered with a photoresist, and the ITO was removed by wet etching with an iron chloride-based etchant. Using the photoresist for the ITO etching as it is as the mask for the dry etching, the semiconductor layer in the portion to be diced was removed by the dry etching method. As a dry etching method, a portion not covered with the photoresist was etched by RIE until the p-type electrode 57 was exposed. Finally, it was divided into 300 μm squares by dicing. FIG. 6A is a cross-sectional view of the manufactured light emitting device.
[0034]
The light emitting device manufactured in this manner does not emit light immediately below the bonding pad electrode made of a thick metal that does not allow light to pass therethrough, so that unnecessary light emission can be eliminated. Further, since the p-type electrode has a high reflectance with respect to the light emitted from the light emitting layer, the light extraction efficiency was good. For this reason, it was found that peeling did not occur even at a low driving voltage even in a long-term energization test, and the reliability was high. In this embodiment, AlN doped with Si is used. However, non-doped AlN may be used for the buffer layer. In this case, after removing the Si substrate, part or all of the AlN is removed by dry etching, and SiN is removed. The n-type electrode may be formed by exposing the doped GaN layer. In this embodiment, a Si substrate is used as the base substrate, but other substrates may be used, and a conductive substrate is preferable. Further, the current blocking region was formed by not forming an ohmic electrode in the current blocking region. However, the surface of the p-type semiconductor layer in the portion serving as the current blocking region was slightly etched by dry etching to form an ohmic contact with the p-type electrode. Therefore, the current blocking region may be formed by dry etching.
[0035]
The embodiments and examples disclosed this time are to be considered in all respects as illustrative and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.
[0036]
【The invention's effect】
By providing the n-type electrode side as a main light extraction surface and providing a current blocking region, light extraction efficiency can be improved.
[Brief description of the drawings]
FIGS. 1A and 1B are cross-sectional views of a light-emitting element manufactured in Example 1 of the present invention, in which FIG. 1A is a cross-sectional view in the middle of manufacturing, and FIG. 1B is a cross-sectional view in a completed state.
FIG. 2 is a plan view of a light emitting device manufactured in Example 1 of the present invention.
FIG. 3 is a plan view when a mask is provided on a substrate in Embodiment 2 of the present invention.
4A and 4B are cross-sectional views of a light-emitting element manufactured in Example 2 of the present invention, in which FIG. 4A is a cross-sectional view when a pedestal substrate is formed, and FIG. 4B is a cross-sectional view before a substrate is divided. (C) is a cross-sectional view at the stage of completion.
5A and 5B are cross-sectional views of a light-emitting element manufactured in Example 3 of the present invention, in which FIG. 5A is a cross-sectional view illustrating a state in which electrodes are formed on a pedestal substrate, and FIG. It is sectional drawing showing the state in which the semiconductor layer etc. were formed, and (c) is sectional drawing showing the state after heat-pressure welding.
6A and 6B show a light emitting device manufactured in Example 3 of the present invention, wherein FIG. 6A is a sectional view and FIG. 6B is a plan view.
FIG. 7 is a cross-sectional view of a conventional light emitting device.
[Explanation of symbols]
10 Si substrate, 11 buffer layer, 12 n-type semiconductor layer, 13 light emitting layer, 14 p-type cladding layer, 15 p-type contact layer, 16 current blocking layer, 17 p-type electrode, 17 a adhesion layer, 17 b high reflection layer, 18 plating base layer, 19 pedestal substrate, 20 n-type electrode, 21 bonding pad electrode.

Claims (15)

p型用電極と、p型半導体層と、発光層と、n型半導体層と、n型用電極とが台座基板上に順次形成され、n型用電極側が主たる光取出し面である発光素子において、前記p型半導体層と前記p型用電極との間の一部に電流阻止層が設けられていることを特徴とする窒化物系化合物半導体発光素子。In a light-emitting element in which a p-type electrode, a p-type semiconductor layer, a light-emitting layer, an n-type semiconductor layer, and an n-type electrode are sequentially formed on a pedestal substrate, and the n-type electrode side is a main light extraction surface. A nitride-based compound semiconductor light emitting device, wherein a current blocking layer is provided in a part between the p-type semiconductor layer and the p-type electrode. 前記n型用電極の一部がボンディング用パッド電極として機能するか、または前記n型用電極上にボンディング用パッド電極が形成され、該ボンディング用パッド電極は、発光層から放射される光に対して不透明であり、かつ、ボンディング用パッド電極は、n型用電極の上方から見て、前記電流阻止層が形成されている領域の内側に納まるように形成されていることを特徴とする請求項1に記載の窒化物系化合物半導体発光素子。A part of the n-type electrode functions as a bonding pad electrode, or a bonding pad electrode is formed on the n-type electrode, and the bonding pad electrode receives light emitted from the light emitting layer. The bonding pad electrode is formed so as to be located inside a region where the current blocking layer is formed, as viewed from above the n-type electrode. 2. The nitride-based compound semiconductor light-emitting device according to 1. 前記n型用電極が、透明導電膜であることを特徴とする請求項1または2に記載の窒化物系化合物半導体発光素子。The nitride-based compound semiconductor light-emitting device according to claim 1, wherein the n-type electrode is a transparent conductive film. 前記台座基板は、発光層から放射される光に対して不透明であることを特徴とする請求項1〜3のいずれかに記載の窒化物系化合物半導体発光素子。The nitride-based compound semiconductor light emitting device according to claim 1, wherein the pedestal substrate is opaque to light emitted from the light emitting layer. 前記p型用電極は、発光層から放射される光の波長における反射率が60%以上である高反射層を有することを特徴とする請求項1〜4のいずれかに記載の窒化物系化合物半導体発光素子。The nitride compound according to any one of claims 1 to 4, wherein the p-type electrode has a highly reflective layer having a reflectance of 60% or more at a wavelength of light emitted from the light emitting layer. Semiconductor light emitting device. 前記電流阻止層は、比抵抗値が1Ωcm以上の高抵抗層と、n型半導体層と、ショットキー接合層のうち少なくとも1層を有することを特徴とする請求項1〜5のいずれかに記載の窒化物系化合物半導体発光素子。6. The current blocking layer according to claim 1, wherein the current blocking layer has at least one of a high resistance layer having a specific resistance of 1 Ωcm or more, an n-type semiconductor layer, and a Schottky junction layer. Nitride semiconductor light emitting device. 前記p型用電極における高反射層は、Agを含むことを特徴とする請求項1〜6のいずれかに記載の窒化物系化合物半導体発光素子。The nitride-based compound semiconductor light emitting device according to claim 1, wherein the highly reflective layer in the p-type electrode contains Ag. 前記台座基板は、金属または合金からなることを特徴とする請求項1〜7のいずれかに記載の窒化物系化合物半導体発光素子。The nitride-based compound semiconductor light emitting device according to claim 1, wherein the pedestal substrate is made of a metal or an alloy. 前記台座基板は、Si基板であることを特徴とする請求項1〜8のいずれかに記載の窒化物系化合物半導体発光素子。9. The nitride-based compound semiconductor light emitting device according to claim 1, wherein said pedestal substrate is a Si substrate. 基板上に、n型半導体層と、発光層と、p型半導体層とを順次形成する工程と、
前記p型半導体層上の一部に電流阻止層を形成した後、p型用電極を形成する工程と、
前記p型用電極上に、台座基板を形成する工程と、
前記基板の一部または全部を除去し、前記n型半導体層の一部または全部を露出させる工程と
を含むことを特徴とする窒化物系化合物半導体発光素子の製造方法。
Sequentially forming an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer on a substrate;
Forming a current blocking layer on a part of the p-type semiconductor layer, and then forming a p-type electrode;
Forming a pedestal substrate on the p-type electrode;
Removing a part or the whole of the substrate to expose a part or the whole of the n-type semiconductor layer.
前記p型用電極を形成した後、300℃〜700℃で熱処理を行なう工程を含むことを特徴とする請求項10に記載の窒化物系化合物半導体発光素子の製造方法。The method of manufacturing a nitride-based compound semiconductor light emitting device according to claim 10, further comprising a step of performing a heat treatment at 300 ° C. to 700 ° C. after forming the p-type electrode. 前記基板は、Si基板であることを特徴とする請求項10または11に記載の窒化物系化合物半導体発光素子の製造方法。The method according to claim 10, wherein the substrate is a Si substrate. 前記Si基板の一部または全部を、フッ化水素酸と硝酸とを含むエッチング液により除去し、前記Si基板上に形成された前記n型半導体層がエッチングストップ層として機能することを特徴とする請求項10〜12のいずれかに記載の窒化物系化合物半導体発光素子の製造方法。A part or the whole of the Si substrate is removed by an etching solution containing hydrofluoric acid and nitric acid, and the n-type semiconductor layer formed on the Si substrate functions as an etching stop layer. A method for manufacturing a nitride-based compound semiconductor light-emitting device according to claim 10. 前記台座基板は、メッキ法によりp型用電極上に形成することを特徴とする請求項10〜13のいずれかに記載の窒化物系化合物半導体発光素子の製造方法。14. The method according to claim 10, wherein the pedestal substrate is formed on the p-type electrode by a plating method. 前記台座基板は、Si基板であり、熱圧着によりp型用電極上に形成することを特徴とする請求項10〜13のいずれかに記載の窒化物系化合物半導体発光素子の製造方法。The method according to claim 10, wherein the pedestal substrate is a Si substrate, and is formed on the p-type electrode by thermocompression bonding.
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