JP2004193174A - Semiconductor device and its manufacturing method - Google Patents

Semiconductor device and its manufacturing method Download PDF

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Publication number
JP2004193174A
JP2004193174A JP2002355900A JP2002355900A JP2004193174A JP 2004193174 A JP2004193174 A JP 2004193174A JP 2002355900 A JP2002355900 A JP 2002355900A JP 2002355900 A JP2002355900 A JP 2002355900A JP 2004193174 A JP2004193174 A JP 2004193174A
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Japan
Prior art keywords
semiconductor element
terminal group
wiring board
sealing resin
semiconductor device
Prior art date
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JP2002355900A
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Japanese (ja)
Inventor
Yoshiaki Takeoka
嘉昭 竹岡
Takashi Yui
油井　　隆
Koichi Yamauchi
浩一 山内
Tetsuya Tokunaga
哲也 徳永
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2002355900A priority Critical patent/JP2004193174A/en
Publication of JP2004193174A publication Critical patent/JP2004193174A/en
Withdrawn legal-status Critical Current

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  • Engineering & Computer Science (AREA)
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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device in which a terminal group for wire bonding on a wiring board can be disposed near a semiconductor element side and which is reduced in size, and to provide a method for manufacturing the same. <P>SOLUTION: This semiconductor device includes the wiring board 1 having a first terminal group 2 disposed at a substantially center on the surface of the board and a second terminal group 3 disposed on the surface of the board around the first terminal group 2, the first semiconductor element 5 flip-chip mounted on the wiring board 1 via the first terminal group 2, and the second semiconductor element 7 placed on the first semiconductor element 5. A sealing resin 6a is filled between the first semiconductor element 5 and the wiring board 1. The second semiconductor element 7 is electrically connected to the second terminal group 3 via a bonding wire 8. A protrusion-like dam 11 is provided on the wiring board 1 between the first semiconductor element 5 and the second terminal group 3, and the sealing resin 6a is adhered to the position of the protrusion-like dam 11. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

【０００１】
【発明の属する技術分野】
本発明は半導体装置及びその製造方法に関する。
【０００２】
【従来の技術】
近年の携帯情報機器の小型化と軽量化に伴い、半導体装置の高密度化、小型化、及び薄型化が要求されている。この要望に応えるため、半導体素子が多段に重ねて搭載された積層型の半導体装置が開発されている。携帯情報機器の小型化のためにはフリップチップ方式とワイヤーボンディング方式による実装を利用した半導体装置が有利となるが、この場合、フリップチップ方式による半導体素子の搭載後、素子の保護等のため、樹脂による封止が必要となる。
【０００３】
図１１に、特許文献１に開示された、従来例の半導体装置を示す。第１の半導体素子５が配線基板１上にフリップチップボンディングにより搭載されている。第１の半導体素子５の電極端子に形成されたバンプ４が配線基板１上の第１の接続端子群２と接合されている。第１の半導体素子５は、それと配線基板１の間に第１の封止樹脂６が注入されて配線基板１に固定されている。第２の半導体素子７が第１の半導体素子５の裏面に搭載されており、第２の半導体素子７に設けられた電極端子群７ａと配線基板１上の第２の接続端子群３とがボンディングワイヤー８により電気的に接続されている。第１の半導体素子５と第２の半導体素子７は第２の封止樹脂９により覆われてモールドされている。
【０００４】
図１２に、従来例の半導体装置の製造工程を示す。以下、図１２を参照しながらこの半導体装置の製造方法について説明する。
【０００５】
まず、図１２（ａ）に示した配線基板１を用意し、図１２（ｂ）に示すように、第１の半導体素子５を、その電極端子に形成されたバンプ４と第１の接続端子群２を接合することでフリップチップボンディングにより配線基板１上に搭載する。
【０００６】
次に、図１２（ｃ）に示すように、第１の半導体素子５と配線基板１の間に、第１の封止樹脂６を注入して硬化させる。
【０００７】
次いで、図１２（ｄ）に示すように、第２の半導体素子７を第１の半導体素子５の裏面に搭載し、図１２（ｅ）に示すように、第２の半導体素子７の電極端子群７ａと配線基板１上の第２の接続端子群３をボンディングワイヤー８を用いて電気的に接続する。
【０００８】
続いて、図１２（ｆ）に示すように、第２の封止樹脂９を用い、第１の半導体素子５と第２の半導体素子７の全体を覆ってモールドし、積層型の半導体装置が完成する。
【０００９】
このような半導体装置では、第１の封止樹脂６を注入した後に、第１の封止樹脂６が配線基板１上を伝って第２の接続端子群３に付着し、第２の半導体素子７と第２の接続端子群３のボンディングワイヤー８による接続が不安定となることがあった。そのため、第１の封止樹脂６が到達する範囲を考慮して、第１の半導体素子５から十分離間させて第２の接続端子群３を配置することが必要となり、その結果、配線基板１のサイズが大きくなって半導体装置の小型化の妨げとなっていた。
【００１０】
これに対して、特許文献２に、配線基板上に樹脂周壁を設け、半導体素子が実装される領域を規制することで、配線基板上のワイヤーボンディング用の端子群を半導体素子側に接近して配置することを可能とし、半導体装置の小型化を実現した技術が開示されている。
【００１１】
【特許文献１】
特開平１１−２１９９８４号公報（第１図）
【００１２】
【特許文献２】
特開２００２−２２２９１４号公報（第１図）
【００１３】
【発明が解決しようとする課題】
しかし、上記した特許文献２に記載の半導体装置では、樹脂周壁が半導体装置に近接して配置されているため、注入する第１の封止樹脂６の量を高精度に調節する必要があり、半導体装置の製造工程が複雑化して生産性が低下していた。
【００１４】
本発明は、前記した従来技術における問題点を解決し、配線基板上のワイヤーボンディング用の端子群を半導体素子側に接近して配置することを可能とし、小型化が実現した半導体装置及びその製造方法を提供することを目的とする。
【００１５】
【課題を解決するための手段】
上記目的を達成するため、本発明の半導体装置は次の構成を有する。即ち、基板面の略中央部に配置された第１の端子群と、第１の端子群の周囲の基板面に配置された第２の端子群とを備える配線基板と、第１の端子群を介して配線基板にフリップチップ実装された第１の半導体素子と、第１の半導体素子上に搭載された第２の半導体素子とを備える。第１の半導体素子と配線基板との間に封止樹脂が充填されている。第２の半導体素子は第２の端子群とボンディングワイヤーにより電気的に接続されている。凸状のダムが第１の半導体素子と第２の端子群の間の配線基板上に設けられており、凸状のダムの位置まで封止樹脂が付着している。
【００１６】
この構成によれば、第２の接続端子群を配線基板上で第１の半導体素子側に接近して配置されて小型化が実現した半導体装置となる。
【００１７】
上記目的を達成するため、本発明の半導体装置の製造方法は次の構成を有する。即ち、基板面の略中央部に配置された第１の端子群と、前記第１の端子群の周囲の基板面に配置された第２の端子群とを備え、前記第１の端子群と前記第２の端子群との間に凸状のダムを形成した配線基板を準備する工程と、第１の端子群を介して配線基板に第１の半導体素子をフリップチップ実装する工程と、第１の半導体素子と配線基板との間に封止樹脂を注入して、凸状のダムにより封止樹脂の流れを止めるとともに、配線基板上において封止樹脂を硬化させる工程と、第１の半導体素子上に第２の半導体素子を搭載し、第２の半導体素子と第２の端子群をボンディングワイヤーを用いて接続する工程とを備える。
【００１８】
この構成によれば、第２の接続端子群が配線基板上で第１の半導体素子側に接近して配置されて小型化した半導体装置が歩留まり良く製造できるようになる。
【００１９】
上記目的を達成するため、本発明の半導体装置は次の構成を有する。即ち、基板面の略中央部に配置された第１の端子群と、第１の端子群の周囲の基板面に配置された第２の端子群とを備える配線基板と、第１の端子群を介して配線基板にフリップチップ実装された第１の半導体素子と、第１の半導体素子上に搭載された第２の半導体素子とを備える。第１の半導体素子と配線基板との間に封止樹脂が充填されている。第２の半導体素子は第２の端子群とボンディングワイヤーにより電気的に接続されている。溝が第１の半導体素子と第２の端子群の間の配線基板に設けられており、溝の位置まで封止樹脂が付着している。
【００２０】
この構成によれば、第２の接続端子群を配線基板上で第１の半導体素子側に接近して配置されて小型化が実現した半導体装置となる。
【００２１】
上記目的を達成するため、本発明の半導体装置の製造方法は次の構成を有する。即ち、基板面の略中央部に配置された第１の端子群と、前記第１の端子群の周囲の基板面に配置された第２の端子群とを備え、前記第１の端子群と前記第２の端子群との間に溝を形成した配線基板を準備する工程と、第１の端子群を介して配線基板に第１の半導体素子をフリップチップ実装する工程と、第１の半導体素子と配線基板との間に封止樹脂を注入して、溝により封止樹脂の流れを止めるとともに、配線基板上において封止樹脂を硬化させる工程と、第１の半導体素子上に第２の半導体素子を搭載し、第２の半導体素子と第２の端子群をボンディングワイヤーを用いて接続する工程とを備える。
【００２２】
この構成によれば、第２の接続端子群が配線基板上で第１の半導体素子側に接近して配置されて小型化した半導体装置が歩留まり良く製造できるようになる。
【００２３】
【発明の実施の形態】
本発明の半導体装置においては、基板面の略中央部に配置された第１の端子群と、第１の端子群の周囲の基板面に配置された第２の端子群とを備える配線基板と、第１の端子群を介して配線基板にフリップチップ実装された第１の半導体素子と、第１の半導体素子上に搭載された第２の半導体素子とを備える。第１の半導体素子と配線基板との間に封止樹脂が充填されている。第２の半導体素子は第２の端子群とボンディングワイヤーにより電気的に接続されている。凸状のダムが第１の半導体素子と第２の端子群の間の配線基板上に設けられており、凸状のダムの位置まで封止樹脂が付着している。
【００２４】
この構成によれば、第２の接続端子群を配線基板上で第１の半導体素子側に接近して配置されて小型化が実現した半導体装置となる。
【００２５】
ここで、凸状のダムは、封止樹脂を注入するためにその一部が欠けていることが好ましい。
【００２６】
この構成によれば、第１の半導体素子と配線基板との間へ第１の封止樹脂が容易に充填され、より信頼性の向上した半導体装置となる。
【００２７】
本発明の半導体装置においては、基板面の略中央部に配置された第１の端子群と、前記第１の端子群の周囲の基板面に配置された第２の端子群とを備え、前記第１の端子群と前記第２の端子群との間に凸状のダムを形成した配線基板を準備する工程と、第１の端子群を介して配線基板に第１の半導体素子をフリップチップ実装する工程と、第１の半導体素子と配線基板との間に封止樹脂を注入して、凸状のダムにより封止樹脂の流れを止めるとともに、配線基板上において封止樹脂を硬化させる工程と、第１の半導体素子上に第２の半導体素子を搭載し、第２の半導体素子と第２の端子群をボンディングワイヤーを用いて接続する工程とを備える。
【００２８】
この構成によれば、第２の接続端子群が配線基板上で第１の半導体素子側に接近して配置されて小型化した半導体装置が歩留まり良く製造できるようになる。
【００２９】
ここで、第１の半導体素子に形成された突起電極に導電性接着剤を転写する工程と、突起電極を第１の端子群と接合することで配線基板に第１の半導体素子をフリップチップ実装する工程を含むことが好ましい。
【００３０】
この構成によれば、第１の半導体素子と第１の端子群との接続が容易かつ確実となり、得られる半導体装置の信頼性を高めることができる。
【００３１】
本発明の半導体装置においては、基板面の略中央部に配置された第１の端子群と、第１の端子群の周囲の基板面に配置された第２の端子群とを備える配線基板と、第１の端子群を介して配線基板にフリップチップ実装された第１の半導体素子と、第１の半導体素子上に搭載された第２の半導体素子とを備える。第１の半導体素子と配線基板との間に封止樹脂が充填されている。第２の半導体素子は第２の端子群とボンディングワイヤーにより電気的に接続されている。溝が第１の半導体素子と第２の端子群の間の配線基板に設けられており、溝の位置まで封止樹脂が付着している。
【００３２】
この構成によれば、第２の接続端子群を配線基板上で第１の半導体素子側に接近して配置されて小型化が実現した半導体装置となる。
【００３３】
ここで、溝は、第１の端子群の周囲を囲んで配置されていることが好ましい。
【００３４】
この構成によれば、第２の接続端子群への封止樹脂の付着がさらに確実に防止され、より信頼性の向上した半導体装置となる。
【００３５】
本発明の半導体装置の製造方法においては、基板面の略中央部に配置された第１の端子群と、前記第１の端子群の周囲の基板面に配置された第２の端子群とを備え、前記第１の端子群と前記第２の端子群との間に溝を形成した配線基板を作製する工程と、第１の端子群を介して配線基板に第１の半導体素子をフリップチップ実装する工程と、第１の半導体素子と配線基板との間に封止樹脂を注入して、溝により封止樹脂の流れを止めるとともに、配線基板上において封止樹脂を硬化させる工程と、第１の半導体素子上に第２の半導体素子を搭載し、第２の半導体素子と第２の端子群をボンディングワイヤーを用いて接続する工程とを備える。
【００３６】
この構成によれば、第２の接続端子群が配線基板上で第１の半導体素子側に接近して配置されて小型化した半導体装置が歩留まり良く製造できるようになる。
【００３７】
以下、本発明の実施の形態について、図面を参照しながら説明する。
【００３８】
（実施の形態１）
図１に、本実施の形態における半導体装置の断面図を示す。第１の半導体素子５が配線基板１上にフリップチップボンディングにより搭載されている。第１の半導体素子５の電極端子に形成されたバンプ４が配線基板１上の第１の接続端子群２と接合されている。第１の半導体素子５は、それと配線基板１の間に第１の封止樹脂６ａが注入されて配線基板１に固定されている。第２の半導体素子７が第１の半導体素子５の裏面に搭載され、第２の半導体素子７に設けられた電極端子群７ａと配線基板１上の第２の接続端子群３とがボンディングワイヤー８により電気的に接続されている。配線基板１上に、ダム１１が設けられており、第１の封止樹脂６ａはダム１１の位置まで付着している。第１の半導体素子５と第２の半導体素子７は第２の封止樹脂９により覆われてモールドされている。
【００３９】
図２に、図１に示す配線基板１の平面図を示す。第１の接続端子群２は配線基板１の中央部に正方形状に配置されている。ダム１１が第１の接続端子群２の周囲に正方形の一辺を欠いた状態で設けられている。このようにダム１１が正方形の一辺を欠いた状態であるのは、第１の半導体素子５と配線基板１の間隙が約５０μｍと狭いことから、第１の封止樹脂６ａを注入する際に樹脂注入用ノズルを挿入する位置を確保するためである。第２の接続端子群３が、ダム１１の周囲を囲むように配置されている。
【００４０】
図３に、図２に示す配線基板１におけるＡ−Ａ‘部の矢視断面図を示す。このようにダム１１は、配線基板１の基板面から凸の状態で設けられている。
【００４１】
図４に、図１に示す半導体装置の部分拡大図を示す。第１の接続端子群２と第１の半導体素子５のバンプ４が接合した部分が導電性接着剤２１で覆われている。第１の封止樹脂６ａは、ダム１１によって流れが止められ、第２の接続端子群３への付着が防止されている。
【００４２】
図５に、本実施の形態における半導体装置の製造工程の一例を示す。以下、図５を参照しながらこの半導体装置の製造方法について説明する。
【００４３】
まず、図５（ａ）に示すように、基板面の中央部に配置された第１の電極端子群２と、その周囲の基板面上に第２の電極端子群３が配置された配線基板１を用意し、第１の電極端子群２と第２の電極端子群３の間にダム１１を形成する。ダム１１は、例えば、配線基板１上に絶縁性の樹脂を塗布して熱硬化させることで形成することができる。ダム１１の高さｔ（ｍｍ）は、第１の封止樹脂６ａの流れが止められるように、かつ、第２の接続端子群３へのボンディングワイヤー８による接続の障害とならないように、０．０５〜０．２０ｍｍの範囲とすることが好ましい。ダム１１の高さｔ（ｍｍ）は、チクソ性の高い樹脂を使用したり、また、配線基板１がセラミック製の場合は、配線基板１上にガラスコートを施したりすることによって容易に調節することができる。
【００４４】
次に、図５（ｂ）に示すように、第１の半導体素子５を、その電極端子に形成されたバンプ４を第１の接続端子群２と接合することでフリップチップボンディングにより配線基板１上に搭載する。ここで、予めバンプ４に導電性接着剤を転写しておき、バンプ４を第１の接続端子群２と接合することが好ましい。これにより、接合部分における抵抗が低くなり、得られる半導体装置の信頼性を高めることができる。
【００４５】
次いで、図５（ｃ）に示すように、ダム１１が欠けた方向から、第１の半導体素子５と配線基板１の間に、その間隙が充填される量以上であり、ダム１１から外に溢れる量以下の第１の封止樹脂６ａを注入する。その後、第１の封止樹脂６ａはダム１１によって流れが止められ、第２の接続端子群３への付着が防止された状態で硬化する。
【００４６】
続いて、図５（ｄ）に示すように、第２の半導体素子７を第１の半導体素子５の裏面に搭載し、図５（ｅ）に示すように、第２の半導体素子７の電極端子群７ａと配線基板１上の第２の接続端子群３をボンディングワイヤー８を用いて電気的に接続する。
【００４７】
その後、図５（ｆ）に示すように、第２の封止樹脂９を用い、第１の半導体素子５と第２の半導体素子７の全体を覆ってモールドし、積層型の半導体装置が完成する。
【００４８】
本実施の形態によれば、配線基板１上にダム１１を設けることにより、第１の封止樹脂６ａの量を高精度に調節することなく、第１の半導体素子５と配線基板１の間隙に注入された第１の封止樹脂６ａの流れが確実に止められ、第２の接続端子群３への第１の封止樹脂６ａの付着が防止される。これにより、第１の半導体素子５上の第２の半導体素子７に設けられた電極端子群７ａと第２の接続端子群３をボンディングワイヤー８によって安定して接続することができる。この結果、第２の接続端子群３を配線基板１上で第１の半導体素子５側に接近して配置することができるようになり、小型化が実現した半導体装置が得られる。
【００４９】
（実施の形態２）
図６に、本実施の形態における半導体装置の断面図を示す。第１の半導体素子５が配線基板１上にフリップチップボンディングにより搭載されている。第１の半導体素子５の電極端子に形成されたバンプ４が配線基板１上の第１の接続端子群２と接合されている。第１の半導体素子５は、それと配線基板１の間に第１の封止樹脂６ｂが注入されて配線基板１に固定されている。第２の半導体素子７が第１の半導体素子５の裏面に搭載され、第２の半導体素子７に設けられた電極端子群７ａと配線基板１上の第２の接続端子群３とがボンディングワイヤー８により電気的に接続されている。配線基板１上に、溝１２が設けられており、第１の封止樹脂６ｂは溝１２の位置まで付着している。第１の半導体素子５と第２の半導体素子７は第２の封止樹脂９により覆われてモールドされている。
【００５０】
図７に、図６に示す配線基板１の平面図を示す。第１の接続端子群２が配線基板１の中央部に正方形状に配置されている。溝１２が第１の接続端子群２の周囲を囲むように正方形状に設けられている。第２の接続端子群３が、溝１２の周囲を囲むように配置されている。
【００５１】
図８に、図７に示す配線基板１におけるＡ−Ａ‘部の矢視断面図を示す。このように溝１２は、配線基板１の基板面から凹んだ状態で設けられている。
【００５２】
図９に、図６に示す半導体装置の部分拡大図を示す。第１の接続端子群２と第１の半導体素子５のバンプ４が接合した部分が導電性接着剤２１で覆われている。第１の封止樹脂６ｂは、溝１２によって流れが止められ、第２の接続端子群３への付着が防止されている。
【００５３】
図１０に、本実施の形態における半導体装置の製造工程の一例を示す。以下、図１０を参照しながらこの半導体装置の製造方法について説明する。
【００５４】
まず、図１０（ａ）に示すように、基板面の中央部に配置された第１の電極端子群２と、その周囲の基板面上に第２の電極端子群３が配置された配線基板１を用意し、第１の電極端子群２と第２の電極端子群３の間に溝１２を形成する。溝１２は、例えば、配線基板１をブレードでハーフカットすることで形成することができる。又は、溝１２は、配線基板１が樹脂製の場合は、配線基板１上に半田レジストコートを施して最上層１層分の厚みの段差を設けることで形成することもできる。又は、溝１２は、配線基板１がセラミックス製の場合は、セラミックスの焼成前に、金型を用いて配線基板１に所定の幅・厚みの切り込みを設けることで形成することもできる。溝１２の深さｄ（ｍｍ）は、第１の封止樹脂６ｂの流れが止められるように、０．０５〜０．２０ｍｍの範囲とすることが好ましい。
【００５５】
次に、図１０（ｂ）に示すように、第１の半導体素子５を、その電極端子に形成されたバンプ４と第１の接続端子群２を接合することでフリップチップボンディングにより配線基板１上に搭載する。ここで、予めバンプ４に導電性接着剤を転写しておき、バンプ４と第１の接続端子群２とを接合することが好ましい。これにより、接合部分における抵抗が低くなり、得られる半導体装置の信頼性を高めることができる。
【００５６】
次いで、図１０（ｃ）に示すように、第１の半導体素子５と配線基板１の間に、その間隙が充填される量以上であり、溝１２から外に溢れる量以下の第１の封止樹脂６ｂを注入する。その後、第１の封止樹脂６ａは溝１２によって流れが止められ、第２の接続端子群３への付着が防止された状態で硬化する。
【００５７】
続いて、図１０（ｄ）に示すように、第２の半導体素子７を第１の半導体素子５の裏面に搭載し、図１０（ｅ）に示すように、第２の半導体素子７の電極端子群７ａと配線基板１上の第２の接続端子群３をボンディングワイヤー８を用いて電気的に接続する。
【００５８】
その後、図１０（ｆ）に示すように、第２の封止樹脂９を用い、第１の半導体素子５と第２の半導体素子７の全体を覆ってモールドし、積層型の半導体装置が完成する。
【００５９】
本実施の形態によれば、配線基板１に溝１２を設けることにより、第１の封止樹脂６ｂの量を高精度に調節することなく、第１の半導体素子５と配線基板１の間隙に注入された第１の封止樹脂６ｂの流れが確実に止められ、第２の接続端子群３への第１の封止樹脂６ｂの付着が防止される。これにより、実施の形態１と同様の効果が得られる。
【００６０】
【発明の効果】
本発明によれば、配線基板上のワイヤーボンディング用の端子群を半導体素子側に接近して配置することが可能となり、小型化が実現した半導体装置が得られる。
【図面の簡単な説明】
【図１】実施の形態１における半導体装置の断面図
【図２】実施の形態１における半導体装置に用いる配線基板の平面図
【図３】図２に示す配線基板の断面図
【図４】実施の形態１における半導体装置の部分拡大図
【図５】実施の形態１における半導体装置の製造工程図
【図６】実施の形態２における半導体装置の断面図
【図７】実施の形態２における半導体装置に用いる配線基板の平面図
【図８】図７に示す配線基板の断面図
【図９】実施の形態２における半導体装置の部分拡大図
【図１０】実施の形態２における半導体装置の製造工程図
【図１１】従来例の半導体装置の断面図
【図１２】従来例の半導体装置の製造工程図
【符号の説明】
１ 配線基板
２ 第１の接続端子群
３ 第２の接続端子群
４ バンプ
５ 第１の半導体素子
６、６ａ、６ｂ 第１の封止樹脂
７ 第２の半導体素子
７ａ 第２の半導体素子７の電極端子群
８ ボンディングワイヤー
９ 第２の封止樹脂
１１ ダム
１２ 溝
２１ 導電性接着剤[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor device and a method for manufacturing the same.
[0002]
[Prior art]
2. Description of the Related Art As portable information devices have become smaller and lighter in recent years, there is a demand for higher density, smaller size, and thinner semiconductor devices. In order to meet this demand, a stacked semiconductor device in which semiconductor elements are mounted in multiple stages has been developed. For miniaturization of portable information equipment, a semiconductor device using mounting by a flip chip method and a wire bonding method is advantageous.In this case, after mounting the semiconductor element by the flip chip method, for protection of the element, etc. Sealing with resin is required.
[0003]
FIG. 11 shows a conventional semiconductor device disclosed in Patent Document 1. The first semiconductor element 5 is mounted on the wiring board 1 by flip chip bonding. The bumps 4 formed on the electrode terminals of the first semiconductor element 5 are joined to the first connection terminal group 2 on the wiring board 1. The first sealing element 6 is injected between the first semiconductor element 5 and the wiring board 1 and is fixed to the wiring board 1. The second semiconductor element 7 is mounted on the back surface of the first semiconductor element 5, and the electrode terminal group 7 a provided on the second semiconductor element 7 and the second connection terminal group 3 on the wiring board 1 are connected to each other. They are electrically connected by bonding wires 8. The first semiconductor element 5 and the second semiconductor element 7 are covered with the second sealing resin 9 and molded.
[0004]
FIG. 12 shows a manufacturing process of a conventional semiconductor device. Hereinafter, a method for manufacturing the semiconductor device will be described with reference to FIG.
[0005]
First, the wiring board 1 shown in FIG. 12A is prepared, and as shown in FIG. 12B, the first semiconductor element 5 is connected to the bumps 4 formed on the electrode terminals and the first connection terminals. The group 2 is mounted on the wiring board 1 by flip chip bonding by bonding.
[0006]
Next, as shown in FIG. 12C, a first sealing resin 6 is injected and cured between the first semiconductor element 5 and the wiring board 1.
[0007]
Next, as shown in FIG. 12 (d), the second semiconductor element 7 is mounted on the back surface of the first semiconductor element 5, and as shown in FIG. 12 (e), the electrode terminals of the second semiconductor element 7 are formed. The group 7a and the second connection terminal group 3 on the wiring board 1 are electrically connected using the bonding wires 8.
[0008]
Subsequently, as shown in FIG. 12F, the entirety of the first semiconductor element 5 and the second semiconductor element 7 is molded using the second sealing resin 9 to form a stacked semiconductor device. Complete.
[0009]
In such a semiconductor device, after the first sealing resin 6 has been injected, the first sealing resin 6 adheres to the second connection terminal group 3 along the wiring board 1 and the second semiconductor element In some cases, the connection between the bonding terminal 7 and the second connection terminal group 3 by the bonding wire 8 became unstable. For this reason, it is necessary to dispose the second connection terminal group 3 far enough from the first semiconductor element 5 in consideration of the range that the first sealing resin 6 reaches, and as a result, the wiring board 1 Has become an obstacle to miniaturization of semiconductor devices.
[0010]
On the other hand, in Patent Literature 2, a resin peripheral wall is provided on a wiring board to regulate a region where a semiconductor element is mounted, so that a terminal group for wire bonding on the wiring board approaches a semiconductor element side. There is disclosed a technology that enables the arrangement and realizes miniaturization of a semiconductor device.
[0011]
[Patent Document 1]
JP-A-11-219984 (FIG. 1)
[0012]
[Patent Document 2]
JP 2002-222914 A (FIG. 1)
[0013]
[Problems to be solved by the invention]
However, in the semiconductor device described in Patent Document 2 described above, since the resin peripheral wall is arranged close to the semiconductor device, it is necessary to adjust the amount of the first sealing resin 6 to be injected with high precision. The manufacturing process of the semiconductor device has become complicated and productivity has been reduced.
[0014]
SUMMARY OF THE INVENTION The present invention solves the above-mentioned problems in the prior art, and enables a terminal group for wire bonding on a wiring board to be arranged close to a semiconductor element side, thereby realizing a miniaturized semiconductor device and its manufacture. The aim is to provide a method.
[0015]
[Means for Solving the Problems]
In order to achieve the above object, a semiconductor device of the present invention has the following configuration. That is, a wiring board including a first terminal group disposed substantially at the center of the substrate surface and a second terminal group disposed on the substrate surface around the first terminal group; And a second semiconductor element mounted on the first semiconductor element by flip-chip mounting on the wiring board via the first semiconductor element. A sealing resin is filled between the first semiconductor element and the wiring board. The second semiconductor element is electrically connected to the second group of terminals by a bonding wire. A convex dam is provided on the wiring board between the first semiconductor element and the second terminal group, and a sealing resin is attached to the position of the convex dam.
[0016]
According to this configuration, the second connection terminal group is arranged close to the first semiconductor element side on the wiring board, and the semiconductor device can be reduced in size.
[0017]
In order to achieve the above object, a method for manufacturing a semiconductor device according to the present invention has the following configuration. In other words, the first terminal group includes a first terminal group disposed substantially at the center of the substrate surface, and a second terminal group disposed on the substrate surface around the first terminal group. A step of preparing a wiring board on which a convex dam is formed between the second terminal group and the second terminal group; a step of flip-chip mounting the first semiconductor element on the wiring board via the first terminal group; Injecting a sealing resin between the first semiconductor element and the wiring substrate, stopping the flow of the sealing resin by the convex dam, and curing the sealing resin on the wiring substrate; Mounting a second semiconductor element on the element, and connecting the second semiconductor element and the second terminal group using a bonding wire.
[0018]
According to this configuration, the second connection terminal group is arranged close to the first semiconductor element side on the wiring board, so that a miniaturized semiconductor device can be manufactured with high yield.
[0019]
In order to achieve the above object, a semiconductor device of the present invention has the following configuration. That is, a wiring board including a first terminal group disposed substantially at the center of the substrate surface and a second terminal group disposed on the substrate surface around the first terminal group; And a second semiconductor element mounted on the first semiconductor element by flip-chip mounting on the wiring board via the first semiconductor element. A sealing resin is filled between the first semiconductor element and the wiring board. The second semiconductor element is electrically connected to the second group of terminals by a bonding wire. A groove is provided in the wiring board between the first semiconductor element and the second terminal group, and the sealing resin is attached to the position of the groove.
[0020]
According to this configuration, the second connection terminal group is arranged close to the first semiconductor element side on the wiring board, and the semiconductor device can be reduced in size.
[0021]
In order to achieve the above object, a method for manufacturing a semiconductor device according to the present invention has the following configuration. In other words, the first terminal group includes a first terminal group disposed substantially at the center of the substrate surface, and a second terminal group disposed on the substrate surface around the first terminal group. A step of preparing a wiring board having a groove formed with the second terminal group; a step of flip-chip mounting a first semiconductor element on the wiring board via the first terminal group; A step of injecting a sealing resin between the element and the wiring board, stopping the flow of the sealing resin by the groove, and curing the sealing resin on the wiring board; Mounting the semiconductor element and connecting the second semiconductor element and the second terminal group using a bonding wire.
[0022]
According to this configuration, the second connection terminal group is arranged close to the first semiconductor element side on the wiring board, so that a miniaturized semiconductor device can be manufactured with high yield.
[0023]
BEST MODE FOR CARRYING OUT THE INVENTION
In a semiconductor device according to the present invention, there is provided a wiring board including a first terminal group disposed at a substantially central portion of a substrate surface, and a second terminal group disposed on the substrate surface around the first terminal group. A first semiconductor element flip-chip mounted on a wiring board via a first terminal group, and a second semiconductor element mounted on the first semiconductor element. A sealing resin is filled between the first semiconductor element and the wiring board. The second semiconductor element is electrically connected to the second group of terminals by a bonding wire. A convex dam is provided on the wiring board between the first semiconductor element and the second terminal group, and a sealing resin is attached to the position of the convex dam.
[0024]
According to this configuration, the second connection terminal group is arranged close to the first semiconductor element side on the wiring board, and the semiconductor device can be reduced in size.
[0025]
Here, it is preferable that a part of the convex dam is missing in order to inject the sealing resin.
[0026]
According to this configuration, the space between the first semiconductor element and the wiring board is easily filled with the first sealing resin, and the semiconductor device has higher reliability.
[0027]
In a semiconductor device according to the present invention, the semiconductor device includes: a first terminal group disposed substantially at a center of a substrate surface; and a second terminal group disposed on the substrate surface around the first terminal group. A step of preparing a wiring board in which a convex dam is formed between the first terminal group and the second terminal group; and flip-chip attaching the first semiconductor element to the wiring board via the first terminal group. A mounting step, a step of injecting a sealing resin between the first semiconductor element and the wiring board, stopping the flow of the sealing resin by the convex dam, and curing the sealing resin on the wiring board And mounting the second semiconductor element on the first semiconductor element, and connecting the second semiconductor element and the second terminal group using a bonding wire.
[0028]
According to this configuration, the second connection terminal group is arranged close to the first semiconductor element side on the wiring board, so that a miniaturized semiconductor device can be manufactured with high yield.
[0029]
Here, a step of transferring a conductive adhesive to the protruding electrode formed on the first semiconductor element, and bonding the protruding electrode to the first terminal group to mount the first semiconductor element on the wiring board in a flip-chip manner It is preferable to include a step of performing
[0030]
According to this configuration, the connection between the first semiconductor element and the first terminal group is easy and reliable, and the reliability of the obtained semiconductor device can be improved.
[0031]
In a semiconductor device according to the present invention, there is provided a wiring board including a first terminal group disposed at a substantially central portion of a substrate surface, and a second terminal group disposed on the substrate surface around the first terminal group. A first semiconductor element flip-chip mounted on a wiring board via a first terminal group, and a second semiconductor element mounted on the first semiconductor element. A sealing resin is filled between the first semiconductor element and the wiring board. The second semiconductor element is electrically connected to the second group of terminals by a bonding wire. A groove is provided in the wiring board between the first semiconductor element and the second terminal group, and the sealing resin is attached to the position of the groove.
[0032]
According to this configuration, the second connection terminal group is arranged close to the first semiconductor element side on the wiring board, and the semiconductor device can be reduced in size.
[0033]
Here, it is preferable that the groove is arranged so as to surround the periphery of the first terminal group.
[0034]
According to this configuration, the adhesion of the sealing resin to the second connection terminal group is more reliably prevented, and a semiconductor device with higher reliability is obtained.
[0035]
In the method of manufacturing a semiconductor device according to the present invention, the first terminal group disposed substantially at the center of the substrate surface and the second terminal group disposed on the substrate surface around the first terminal group Forming a wiring board having a groove formed between the first terminal group and the second terminal group, and flip-chip attaching the first semiconductor element to the wiring board via the first terminal group. Mounting a sealing resin between the first semiconductor element and the wiring board, stopping the flow of the sealing resin by the groove, and curing the sealing resin on the wiring board; Mounting the second semiconductor element on the one semiconductor element, and connecting the second semiconductor element and the second terminal group using a bonding wire.
[0036]
According to this configuration, the second connection terminal group is arranged close to the first semiconductor element side on the wiring board, so that a miniaturized semiconductor device can be manufactured with high yield.
[0037]
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0038]
(Embodiment 1)
FIG. 1 is a cross-sectional view of the semiconductor device according to the present embodiment. The first semiconductor element 5 is mounted on the wiring board 1 by flip chip bonding. The bumps 4 formed on the electrode terminals of the first semiconductor element 5 are joined to the first connection terminal group 2 on the wiring board 1. The first semiconductor element 5 is fixed to the wiring board 1 by injecting a first sealing resin 6 a between the first semiconductor element 5 and the wiring board 1. The second semiconductor element 7 is mounted on the back surface of the first semiconductor element 5, and the electrode terminal group 7 a provided on the second semiconductor element 7 and the second connection terminal group 3 on the wiring board 1 are bonded with bonding wires. 8 are electrically connected. A dam 11 is provided on the wiring board 1, and the first sealing resin 6 a is attached to the position of the dam 11. The first semiconductor element 5 and the second semiconductor element 7 are covered with the second sealing resin 9 and molded.
[0039]
FIG. 2 shows a plan view of the wiring board 1 shown in FIG. The first connection terminal group 2 is arranged in a square shape at the center of the wiring board 1. A dam 11 is provided around the first connection terminal group 2 with one side of a square missing. The reason that the dam 11 lacks one side of the square is that the gap between the first semiconductor element 5 and the wiring board 1 is as small as about 50 μm, and thus the dam 11 is not filled with the first sealing resin 6a. This is for securing a position for inserting the resin injection nozzle. The second connection terminal group 3 is arranged so as to surround the periphery of the dam 11.
[0040]
FIG. 3 is a cross-sectional view taken along the line AA ′ in the wiring board 1 shown in FIG. As described above, the dam 11 is provided so as to protrude from the board surface of the wiring board 1.
[0041]
FIG. 4 shows a partially enlarged view of the semiconductor device shown in FIG. A portion where the first connection terminal group 2 and the bump 4 of the first semiconductor element 5 are joined is covered with the conductive adhesive 21. The flow of the first sealing resin 6 a is stopped by the dam 11, and the adhesion to the second connection terminal group 3 is prevented.
[0042]
FIG. 5 shows an example of a manufacturing process of the semiconductor device according to the present embodiment. Hereinafter, a method of manufacturing the semiconductor device will be described with reference to FIG.
[0043]
First, as shown in FIG. 5A, a first electrode terminal group 2 disposed at the center of the substrate surface and a wiring substrate having the second electrode terminal group 3 disposed on the surrounding substrate surface 1 is prepared, and a dam 11 is formed between the first electrode terminal group 2 and the second electrode terminal group 3. The dam 11 can be formed, for example, by applying an insulating resin on the wiring board 1 and thermally curing the resin. The height t (mm) of the dam 11 is set to 0 so that the flow of the first sealing resin 6 a is stopped and the height t (mm) does not hinder the connection of the bonding wire 8 to the second connection terminal group 3. It is preferable to set it in the range of 0.05 to 0.20 mm. The height t (mm) of the dam 11 is easily adjusted by using a resin having a high thixotropy, or when the wiring board 1 is made of ceramic, by applying a glass coat on the wiring board 1. be able to.
[0044]
Next, as shown in FIG. 5B, the first semiconductor element 5 is connected to the first connection terminal group 2 with the bumps 4 formed on the electrode terminals of the first semiconductor element 5, and the wiring board 1 is flip-chip bonded. Mount on top. Here, it is preferable that a conductive adhesive is transferred to the bump 4 in advance, and the bump 4 is bonded to the first connection terminal group 2. Thereby, the resistance at the junction is reduced, and the reliability of the obtained semiconductor device can be increased.
[0045]
Next, as shown in FIG. 5C, the gap between the first semiconductor element 5 and the wiring board 1 is equal to or more than the amount to be filled from the direction in which the dam 11 is chipped, and Inject the first sealing resin 6a less than the overflow amount. Thereafter, the flow of the first sealing resin 6 a is stopped by the dam 11, and the first sealing resin 6 a is cured in a state where the first sealing resin 6 a is prevented from adhering to the second connection terminal group 3.
[0046]
Subsequently, as shown in FIG. 5D, the second semiconductor element 7 is mounted on the back surface of the first semiconductor element 5, and as shown in FIG. The terminal group 7 a is electrically connected to the second connection terminal group 3 on the wiring board 1 by using the bonding wire 8.
[0047]
Thereafter, as shown in FIG. 5F, the entirety of the first semiconductor element 5 and the second semiconductor element 7 is molded using the second sealing resin 9 to complete a stacked semiconductor device. I do.
[0048]
According to the present embodiment, by providing the dam 11 on the wiring board 1, the gap between the first semiconductor element 5 and the wiring board 1 can be adjusted without adjusting the amount of the first sealing resin 6a with high accuracy. The flow of the first sealing resin 6a injected into the first sealing resin 6a is reliably stopped, and the adhesion of the first sealing resin 6a to the second connection terminal group 3 is prevented. Thereby, the electrode terminal group 7 a provided on the second semiconductor element 7 on the first semiconductor element 5 and the second connection terminal group 3 can be stably connected by the bonding wires 8. As a result, the second connection terminal group 3 can be arranged on the wiring board 1 close to the first semiconductor element 5 side, and a semiconductor device with reduced size can be obtained.
[0049]
(Embodiment 2)
FIG. 6 shows a cross-sectional view of the semiconductor device according to the present embodiment. The first semiconductor element 5 is mounted on the wiring board 1 by flip chip bonding. The bumps 4 formed on the electrode terminals of the first semiconductor element 5 are joined to the first connection terminal group 2 on the wiring board 1. The first semiconductor element 5 is fixed to the wiring board 1 by injecting a first sealing resin 6 b between the first semiconductor element 5 and the wiring board 1. The second semiconductor element 7 is mounted on the back surface of the first semiconductor element 5, and the electrode terminal group 7 a provided on the second semiconductor element 7 and the second connection terminal group 3 on the wiring board 1 are bonded with bonding wires. 8 are electrically connected. A groove 12 is provided on the wiring board 1, and the first sealing resin 6 b adheres to the position of the groove 12. The first semiconductor element 5 and the second semiconductor element 7 are covered with the second sealing resin 9 and molded.
[0050]
FIG. 7 shows a plan view of the wiring board 1 shown in FIG. The first connection terminal group 2 is arranged in a square shape at the center of the wiring board 1. The groove 12 is provided in a square shape so as to surround the periphery of the first connection terminal group 2. The second connection terminal group 3 is arranged so as to surround the periphery of the groove 12.
[0051]
FIG. 8 is a cross-sectional view taken along the line AA ′ in the wiring board 1 shown in FIG. Thus, the groove 12 is provided in a state recessed from the substrate surface of the wiring substrate 1.
[0052]
FIG. 9 shows a partially enlarged view of the semiconductor device shown in FIG. A portion where the first connection terminal group 2 and the bump 4 of the first semiconductor element 5 are joined is covered with the conductive adhesive 21. The flow of the first sealing resin 6b is stopped by the groove 12, and the adhesion to the second connection terminal group 3 is prevented.
[0053]
FIG. 10 shows an example of a manufacturing process of the semiconductor device according to the present embodiment. Hereinafter, a method for manufacturing the semiconductor device will be described with reference to FIG.
[0054]
First, as shown in FIG. 10 (a), a first electrode terminal group 2 disposed at the center of the substrate surface and a wiring substrate having a second electrode terminal group 3 disposed on the surrounding substrate surface 1 is prepared, and a groove 12 is formed between the first electrode terminal group 2 and the second electrode terminal group 3. The groove 12 can be formed, for example, by half-cutting the wiring board 1 with a blade. Alternatively, when the wiring board 1 is made of resin, the groove 12 can be formed by applying a solder resist coat on the wiring board 1 and providing a step having a thickness of one uppermost layer. Alternatively, when the wiring substrate 1 is made of ceramics, the grooves 12 can be formed by providing cuts of a predetermined width and thickness in the wiring substrate 1 using a mold before firing the ceramics. The depth d (mm) of the groove 12 is preferably in the range of 0.05 to 0.20 mm so that the flow of the first sealing resin 6b is stopped.
[0055]
Next, as shown in FIG. 10 (b), the first semiconductor element 5 is connected to the bumps 4 formed on the electrode terminals thereof and the first connection terminal group 2 so that the wiring board 1 is flip-chip bonded. Mount on top. Here, it is preferable that the conductive adhesive is transferred to the bump 4 in advance, and the bump 4 and the first connection terminal group 2 are joined. Thereby, the resistance at the junction is reduced, and the reliability of the obtained semiconductor device can be increased.
[0056]
Next, as shown in FIG. 10C, the first sealing between the first semiconductor element 5 and the wiring board 1 is not less than the amount that fills the gap and not more than the amount that overflows out of the groove 12. The stop resin 6b is injected. Thereafter, the flow of the first sealing resin 6 a is stopped by the groove 12, and the first sealing resin 6 a is cured in a state where the first sealing resin 6 a is prevented from adhering to the second connection terminal group 3.
[0057]
Subsequently, as shown in FIG. 10D, the second semiconductor element 7 is mounted on the back surface of the first semiconductor element 5, and as shown in FIG. The terminal group 7 a is electrically connected to the second connection terminal group 3 on the wiring board 1 by using the bonding wire 8.
[0058]
Thereafter, as shown in FIG. 10F, the entirety of the first semiconductor element 5 and the second semiconductor element 7 is molded using the second sealing resin 9 to complete a stacked semiconductor device. I do.
[0059]
According to the present embodiment, by providing groove 12 in wiring substrate 1, the gap between first semiconductor element 5 and wiring substrate 1 can be formed without adjusting the amount of first sealing resin 6b with high precision. The flow of the injected first sealing resin 6b is reliably stopped, and the adhesion of the first sealing resin 6b to the second connection terminal group 3 is prevented. Thereby, the same effect as in the first embodiment can be obtained.
[0060]
【The invention's effect】
According to the present invention, it is possible to arrange a terminal group for wire bonding on a wiring board close to a semiconductor element side, and to obtain a miniaturized semiconductor device.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of a semiconductor device according to a first embodiment; FIG. 2 is a plan view of a wiring substrate used in the semiconductor device according to the first embodiment; FIG. 3 is a cross-sectional view of the wiring substrate shown in FIG. FIG. 5 is a partially enlarged view of the semiconductor device according to the first embodiment. FIG. 5 is a manufacturing process diagram of the semiconductor device according to the first embodiment. FIG. 6 is a cross-sectional view of the semiconductor device according to the second embodiment. FIG. 8 is a cross-sectional view of the wiring board shown in FIG. 7; FIG. 9 is a partially enlarged view of the semiconductor device in the second embodiment; FIG. 10 is a manufacturing process diagram of the semiconductor device in the second embodiment. FIG. 11 is a cross-sectional view of a conventional semiconductor device. FIG. 12 is a manufacturing process diagram of a conventional semiconductor device.
DESCRIPTION OF SYMBOLS 1 Wiring board 2 1st connection terminal group 3 2nd connection terminal group 4 Bump 5 1st semiconductor element 6, 6a, 6b 1st sealing resin 7 2nd semiconductor element 7a 2nd semiconductor element 7 Electrode terminal group 8 Bonding wire 9 Second sealing resin 11 Dam 12 Groove 21 Conductive adhesive

Claims (10)

基板面の略中央部に配置された第１の端子群と、前記第１の端子群の周囲の前記基板面に配置された第２の端子群とを備える配線基板と、前記第１の端子群を介して前記配線基板にフリップチップ実装された第１の半導体素子と、前記第１の半導体素子上に搭載された第２の半導体素子とを備え、
前記第１の半導体素子と前記配線基板との間に封止樹脂が充填されており、
前記第２の半導体素子は前記第２の端子群とボンディングワイヤーにより電気的に接続された半導体装置において、
凸状のダムが前記第１の半導体素子と前記第２の端子群の間の前記配線基板上に設けられており、前記凸状のダムの位置まで前記封止樹脂が付着していることを特徴とする半導体装置。A wiring board comprising: a first terminal group disposed substantially at the center of a substrate surface; and a second terminal group disposed on the substrate surface around the first terminal group; and the first terminal. A first semiconductor element flip-chip mounted on the wiring board via a group, and a second semiconductor element mounted on the first semiconductor element,
A sealing resin is filled between the first semiconductor element and the wiring board,
In the semiconductor device, wherein the second semiconductor element is electrically connected to the second terminal group by a bonding wire,
A convex dam is provided on the wiring substrate between the first semiconductor element and the second terminal group, and the sealing resin adheres to the position of the convex dam. Characteristic semiconductor device. 前記凸状のダムは、前記封止樹脂を注入するためにその一部が欠けている請求項１に記載の半導体装置。The semiconductor device according to claim 1, wherein a part of the convex dam is missing for injecting the sealing resin. 前記第１の半導体素子は、突起電極を介して前記第１の端子群と電気的に接続されている請求項１に記載の半導体装置。The semiconductor device according to claim 1, wherein the first semiconductor element is electrically connected to the first terminal group via a protruding electrode. 基板面の略中央部に配置された第１の端子群と、前記第１の端子群の周囲の前記基板面に配置された第２の端子群とを備え、前記第１の端子群と前記第２の端子群との間に凸状のダムを形成した配線基板を準備する工程と、
前記第１の端子群を介して前記配線基板に第１の半導体素子をフリップチップ実装する工程と、
前記第１の半導体素子と前記配線基板との間に封止樹脂を注入して、前記凸状のダムにより前記封止樹脂の流れを止めるとともに、前記配線基板上において前記封止樹脂を硬化させる工程と、
前記第１の半導体素子上に第２の半導体素子を搭載し、前記第２の半導体素子と前記第２の端子群をボンディングワイヤーを用いて接続する工程とを備えた半導体装置の製造方法。A first terminal group disposed substantially at the center of the substrate surface; and a second terminal group disposed on the substrate surface around the first terminal group. Preparing a wiring board having a convex dam formed between the second terminal group and the second terminal group;
Flip-chip mounting a first semiconductor element on the wiring board via the first terminal group;
Injecting a sealing resin between the first semiconductor element and the wiring substrate, stopping the flow of the sealing resin by the convex dam, and curing the sealing resin on the wiring substrate. Process and
Mounting a second semiconductor element on the first semiconductor element, and connecting the second semiconductor element and the second terminal group using a bonding wire. 前記第１の半導体素子に形成された突起電極に導電性接着剤を転写する工程と、
前記突起電極を前記第１の端子群と接合することで前記配線基板に第１の半導体素子をフリップチップ実装する工程を含む請求項４に記載の半導体装置の製造方法。Transferring a conductive adhesive to the protruding electrodes formed on the first semiconductor element;
The method of manufacturing a semiconductor device according to claim 4, comprising a step of flip-chip mounting a first semiconductor element on the wiring board by joining the protruding electrode to the first terminal group. 基板面の略中央部に配置された第１の端子群と、前記第１の端子群の周囲の前記基板面に配置された第２の端子群とを備える配線基板と、前記第１の端子群を介して前記配線基板にフリップチップ実装された第１の半導体素子と、前記第１の半導体素子上に搭載された第２の半導体素子とを備え、
前記第１の半導体素子と前記配線基板との間に封止樹脂が充填されており、
前記第２の半導体素子は前記第２の端子群とボンディングワイヤーにより電気的に接続された半導体装置において、
溝が前記第１の半導体素子と前記第２の端子群の間の前記配線基板に設けられており、前記溝の位置まで前記封止樹脂が付着していることを特徴とする半導体装置。A wiring board comprising: a first terminal group disposed substantially at the center of a substrate surface; and a second terminal group disposed on the substrate surface around the first terminal group; and the first terminal. A first semiconductor element flip-chip mounted on the wiring board via a group, and a second semiconductor element mounted on the first semiconductor element,
A sealing resin is filled between the first semiconductor element and the wiring board,
In the semiconductor device, wherein the second semiconductor element is electrically connected to the second terminal group by a bonding wire,
A semiconductor device, wherein a groove is provided in the wiring board between the first semiconductor element and the second terminal group, and the sealing resin is attached to a position of the groove. 前記溝は、前記第１の端子群の周囲を囲んで配置されている請求項６に記載の半導体装置。The semiconductor device according to claim 6, wherein the groove is arranged so as to surround a periphery of the first terminal group. 前記第１の半導体素子は、前記第１の端子群と突起電極を介して電気的に接続されている請求項６又は７に記載の半導体装置。The semiconductor device according to claim 6, wherein the first semiconductor element is electrically connected to the first terminal group via a protruding electrode. 基板面の略中央部に配置された第１の端子群と、前記第１の端子群の周囲の基板面に配置された第２の端子群とを備え、前記第１の端子群と前記第２の端子群との間に溝を形成した配線基板を準備する工程と、
前記第１の端子群を介して前記配線基板に第１の半導体素子をフリップチップ実装する工程と、
前記第１の半導体素子と前記配線基板との間に封止樹脂を注入して、前記溝により前記封止樹脂の流れを止めるとともに、前記配線基板上において前記封止樹脂を硬化させる工程と、
前記第１の半導体素子上に第２の半導体素子を搭載し、前記第２の半導体素子と前記第２の端子群をボンディングワイヤーを用いて接続する工程とを備えた半導体装置の製造方法。A first terminal group disposed substantially at the center of the substrate surface; and a second terminal group disposed on the substrate surface around the first terminal group. Preparing a wiring board having a groove formed between the wiring board and the second terminal group;
Flip-chip mounting a first semiconductor element on the wiring board via the first terminal group;
Injecting a sealing resin between the first semiconductor element and the wiring board, stopping the flow of the sealing resin by the groove, and curing the sealing resin on the wiring board;
Mounting a second semiconductor element on the first semiconductor element, and connecting the second semiconductor element and the second terminal group using a bonding wire. 前記第１の半導体素子に形成された突起電極に導電性接着剤を転写する工程と、
前記突起電極を前記第１の端子群と接合することで前記配線基板に第１の半導体素子をフリップチップ実装する工程を含む請求項９に記載の半導体装置の製造方法。Transferring a conductive adhesive to the protruding electrodes formed on the first semiconductor element;
The method of manufacturing a semiconductor device according to claim 9, further comprising a step of flip-chip mounting a first semiconductor element on the wiring board by joining the protruding electrode to the first terminal group.
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