JP2004179171A - Wiring board - Google Patents

Wiring board Download PDF

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Publication number
JP2004179171A
JP2004179171A JP2002312875A JP2002312875A JP2004179171A JP 2004179171 A JP2004179171 A JP 2004179171A JP 2002312875 A JP2002312875 A JP 2002312875A JP 2002312875 A JP2002312875 A JP 2002312875A JP 2004179171 A JP2004179171 A JP 2004179171A
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JP
Japan
Prior art keywords
insulating layer
wiring board
glass cloth
wiring
warp
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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JP2002312875A
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Japanese (ja)
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JP4070193B2 (en
Inventor
Masaaki Hori
正明 堀
Masaru Shimonosono
賢 下之薗
Isamu Kirikihira
勇 桐木平
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Kyocera Corp
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Kyocera Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring board which is hardly warped when semiconductor elements are mounted on it and superior in rigidity, wherein through-holes uniform in diameter can be formed by fine laser processing, and solder bumps are hardly damaged when semiconductor elements are mounted on the board. <P>SOLUTION: The wiring board is formed through such a manner that warp threads 1a and weft threads 1b are woven into a glass cloth 1, a plurality of glass cloths 1 are stacked up into the laminated glass cloths 1, the laminated glass cloths 1 are impregnated with thermosetting resin 2 for the formation of an insulating layer 3, a wiring conductor 4 is provided on the top surface and undersurface of the insulating layer 3, and the wiring conductors 4 sandwiching the insulating layer 3 between them are electrically connected together through the through-hole 6 bored in the insulating layer 3 for the formation of the wiring board. In the glass cloth 1, the total area of the openings 7b of gaps 7a surrounded with the warp threads 1a and the weft threads 1b amounts to 0.10 to 2% of the area of the glass cloth 1, and the glass cloths 1 are stacked up so as not to make the openings 7b overlap each other in the vertical direction. <P>COPYRIGHT: (C)2004,JPO

Description

【0001】
【発明の属する技術分野】
本発明は、半導体素子や抵抗器等の電子部品を搭載するための配線基板に関する。
【0002】
【従来の技術】
従来、半導体素子や抵抗器等の電子部品を搭載するために用いられる配線基板として、撚糸である縦糸および横糸を両者の軸方向のなす角度が直角方向となるように織って成るガラスクロスに熱硬化性樹脂を含浸させて成る絶縁層と銅箔から成る配線導体とを交互に複数積層して成るプリント基板が知られている。このようなプリント基板は、まず絶縁層表面に被着した銅箔をエッチングして所定パターンの配線導体を形成し、次に配線導体が形成された絶縁層を熱硬化性樹脂から成る接着材を間に挟んで複数枚積層圧着して積層基板を製作し、次にドリルで積層基板の表裏を貫通するスルーホールを形成し、しかる後、スルーホールの内面に銅めっきを被着して上下に位置する配線導体間を電気的に接続するスルーホール導体を形成することによって製作される。
【0003】
なお通常、各絶縁層は、1枚のガラスクロスに熱硬化性樹脂を含浸させて成り、種々の径の撚糸を選択することにより所望の厚みのガラスクロスを得るとともにこれに熱硬化性樹脂を含浸させることにより、所望の厚みとなる。
【0004】
近年、電子機器は、その高密度化に伴って半導体素子も年々高集積化されてきており、半導体素子を搭載する配線基板の配線導体に対する密度向上の要求も益々高まってきている。しかしながら、上述のプリント基板は、積層基板を表裏を貫通するスルーホール構造をとるため、配線導体の密度を向上させることが困難であるという問題点を有していた。
【0005】
このような問題点を解決するために、スルーホール構造に代えて、各絶縁層毎に貫通孔を形成し、この貫通孔に導体を充填して上下の各配線導体間を接続したインナービアホール構造が実用化されている。このようなインナービアホール構造では貫通孔の径が200μm以下と微細加工が要求され、ドリルでは200μm以下の小径の穿孔は難しいことから、レーザで貫通孔を穿孔することが一般的に行なわれている。
【0006】
しかしながら、絶縁層を構成するガラスクロスは、撚糸を縦・横に織った構造となっており、ガラスクロスを上面視したときに、縦・横の撚糸が重なっている部分と、どちらか一方の撚糸が存在している部分と、撚糸が存在しない部分、すなわち縦・横の撚糸により囲まれた隙間の3種類の部分が混在しているとともに、その隙間の開口の全面積がガラスクロスの面積の5〜12%となっており、このようなガラスクロスに熱硬化性樹脂を含浸させて成る絶縁層にレーザを用いて貫通孔を穿孔した場合、縦・横の撚糸が重なっている撚糸の密な部分では貫通孔の内部径や出射径が小さくなり、撚糸の存在しない隙間部分では貫通孔の内部径や出射径が大きくなり、均一な内部径や出射径を有する貫通孔を穿孔できないという問題点があった。
【0007】
このような問題点を解決するために、複数の絶縁層を積層して基板を製作する際に、上下に位置する各絶縁層に含まれるガラスクロスの織り目位置が互いに異なるように、絶縁層を積層することが提案されている(特許文献1参照)。
【0008】
【特許文献1】
特開2002−76548号公報
【0009】
【発明が解決しようとする課題】
しかしながら、従来のガラスクロスは、その隙間の開口の全面積がガラスクロスの面積の5〜12%と開口の全面積の割合が大きいことから、上下に位置する各絶縁層に含まれるガラスクロスの織り目位置が互いに異なるように積層したとしても、依然として撚糸の密な部分と疎な部分が存在してしまい、基板にレーザを用いて貫通孔を穿孔する場合、均一な内部径や出射径を有する貫通孔を穿孔することが困難であり、貫通孔に導電性材料を充填して貫通導体を形成した場合に、貫通導体の抵抗が部分的に高くなったり、断線してしまうという問題点があった。
【0010】
また、各絶縁層が1枚のガラスクロスに熱硬化性樹脂を含浸させて成ることから、絶縁層の厚みが厚い場合、ガラスクロスを構成する撚糸の径も大きなものとなり、開口の全面積が大きくなるとともに撚糸の密な部分と疎な部分との疎密差がより大きなものとなってしまうという問題点もあった。さらに、絶縁層の厚みが薄い場合、ガラスクロス1枚のみではその剛性が低下して、大型のLSI等の半導体素子を配線基板に実装した際に、半導体素子の動作時に半導体素子と配線基板との熱膨張係数の相違に起因して大きな応力が発生し、この応力によって半導体素子が配線基板から剥がれてしまう、あるいは半導体素子が破壊されてしまうという問題点もあった。
【0011】
本発明はかかる従来技術の問題点に鑑み完成されたものであり、その目的は、微細な貫通導体を有する高密度な配線基板において、レーザ加工で径が均一な貫通孔が形成でき貫通導体の電気的接続信頼性に優れるとともに、半導体素子を良好に実装できる配線基板を提供するものである。
【0012】
【課題を解決するための手段】
本発明の配線基板は、縦糸および横糸を織って成るガラスクロスを複数積層するとともにこの積層したガラスクロスに熱硬化性樹脂を含浸させて成る絶縁層の上下面に配線導体を形成し、絶縁層を挟んで上下に位置する配線導体同士を絶縁層に設けた貫通導体を介して電気的に接続して成り、ガラスクロスは、縦糸および横糸に囲まれた隙間の開口の全面積がガラスクロスの面積の0.01〜2%であり、かつ開口が上下に重ならないように積層されていることを特徴とするものである。
【0013】
本発明の配線基板によれば、ガラスクロスを複数積層するとともにこの積層したガラスクロスに熱硬化性樹脂を含浸させて成る絶縁層の上下面に配線導体を形成し、絶縁層を挟んで上下に位置する配線導体同士を絶縁層に設けた貫通導体を介して電気的に接続して成ることから、絶縁層の厚みが厚い場合においてもガラスクロスを構成する撚糸の径を大きなものとする必要はなく、その結果、ガラスクロスの隙間の開口の全面積が大きくなることはなく、撚糸の密な部分と疎な部分との疎密差が大きなものとなることはない。
【0014】
また、ガラスクロスは、その隙間の開口の全面積がガラスクロスの面積の0.01〜2%であり、かつ開口が上下に重ならないように積層されていることから、撚糸の密な部分と疎な部分との疎密差がより小さなものとなり、配線基板にレーザを用いて貫通孔を穿孔する際、均一な内部径や出射径を有する貫通孔を穿孔することができ、貫通孔に導電性材料を充填して貫通導体を形成した場合に、貫通導体の抵抗が部分的に高くなったり、断線してしまうということはない。
【0015】
さらに、絶縁層はガラスクロスを複数積層するとともにこの積層したガラスクロスに熱硬化性樹脂を含浸させて成ることから、絶縁層が薄い場合でも複数のガラスクロスを積層したほうが絶縁層の剛性の低下を減少させることができ、その結果、大型のLSI等の半導体素子を配線基板に実装した際、半導体素子の動作時に半導体素子と配線基板との熱膨張係数の相違に起因して大きな応力が発生しても、半導体素子が配線基板から剥がれてしまう、あるいは半導体素子が破壊されてしまうことはない。
【0016】
また、本発明の配線基板は、上記構成において、前記積層したガラスクロスのうち上下に接するものは、上側の前記縦糸の軸方向と下側の前記縦糸の軸方向とのなす角度が15〜75度となるように積層されていることを特徴とするものである。
【0017】
本発明の配線基板によれば、ガラスクロスの縦糸および横糸の軸方向の弾性率と、縦糸および横糸の交点間を結ぶ方向の弾性率との差が大きいが、積層したガラスクロスのうち上下に接するものは、上側の縦糸の軸方向と下側の縦糸の軸方向とのなす角度を15〜75度となるように積層した場合には、絶縁層の方向毎の弾性率の差異を小さくすることでき、その結果、配線基板に大型のLSI等の半導体素子を実装した時に発生する応力による配線基板の変形を抑制でき、半導体素子が配線基板から剥がれてしまう、あるいは半導体素子が破壊されてしまうということをより有効に防止することができる。
【0018】
【発明の実施の形態】
次に、本発明の配線基板を添付の図面に基づいて詳細に説明する。
図1は、本発明の配線基板の実施の形態の一例を示す断面図、図2は図1に示す配線基板を構成するガラスクロスの平面図であり、上側のガラスクロスと下側のガラスクロスとの位置関係が明確となるように、下側のガラスクロスの輪郭を実線で示してある。これらの図において、1はガラスクロス、2は熱硬化性樹脂、3は絶縁層、4は配線導体、5は貫通孔、6は貫通導体、7aは隙間、7bは開口である。
【0019】
本発明の配線基板は、縦糸1aおよび横糸1bを両者の軸方向が略垂直となるように織って成るガラスクロス1を複数積層するとともにこの積層したガラスクロス1に熱硬化性樹脂2を含浸させて成る絶縁層3の上下面に配線導体4を形成し、絶縁層3を挟んで上下に位置する配線導体4同士を絶縁層3に設けた貫通導体6を介して電気的に接続して成るものであり、図1にはこのような配線基板を4層積層して成る積層配線基板の例を示している。
【0020】
絶縁層3は、その厚みが50〜150μmであり、配線導体4を支持するとともに上下に位置する配線導体4間の絶縁を保持する機能を有し、複数枚のガラスクロス1にエポキシ樹脂やビスマレイミドトリアジン樹脂・変性ポリフェニレンエーテル樹脂等の熱硬化性樹脂2を含浸させて成る。なお、絶縁層3の厚みが50μm未満であると配線基板の剛性が低下して、配線基板が撓みやすくなる傾向があり、150μmを超えると絶縁層3の厚みが不要に厚いものとなり配線基板の軽量化が困難となる傾向がある。従って、絶縁層3は、その厚みを50〜150μmとすることが好ましい。
【0021】
ガラスクロス1は、その織り方により平織、綾織、朱子織等の種類があり、図2には、縦・横糸1a・1bが1本毎に上下に交差して成る平織の平面図を示している。ガラスクロス1は、その厚みが10〜50μmであり、厚みが10μmより薄くなると縦糸1aおよび横糸1bが非常に細くなり均等に織ることが難しくなるので硬化後に絶縁層3が反ってしまう傾向にあり、50μmより厚いと絶縁層3が不要に厚くなり配線基板の軽量化が困難となる傾向がある。従って、ガラスクロス1の厚みは10〜50μmであることが好ましい。
【0022】
そして本発明の配線基板は、ガラスクロス1を複数積層するとともにこの積層したガラスクロス1に熱硬化性樹脂2を含浸させて成る絶縁層3の上下面に配線導体4を形成し、絶縁層3を挟んで上下に位置する配線導体4同士を絶縁層3に設けた貫通導体6を介して電気的に接続して成り、ガラスクロス1は、縦糸1aおよび横糸に囲まれた隙間7aの開口7bの全面積がガラスクロス1の面積の0.01〜2%であり、かつ開口7bが上下に重ならないように積層されている。そして、本発明においては、ガラスクロス1の隙間7aの開口7bの全面積がガラスクロス1の面積の0.01〜2%であり、かつこの開口7bが上下に重ならないように積層されていることが重要である。
【0023】
本発明の配線基板によれば、ガラスクロス1を複数積層するとともにこの積層したガラスクロス1に熱硬化性樹脂2を含浸させて成る絶縁層3の上下面に配線導体4を形成し、絶縁層3を挟んで上下に位置する配線導体4同士を絶縁層1に設けた貫通導体6を介して電気的に接続して成ることから、絶縁層3の厚みが厚い場合においてもガラスクロス1を構成する撚糸の縦糸1aや横糸1bの径を大きなものとする必要はなく、その結果、ガラスクロス1の隙間7aの開口7bの全面積が大きくなることはなく、撚糸の密な部分と疎な部分との疎密差が大きなものとなることはない。
【0024】
また、ガラスクロス1の隙間7aの開口7bの全面積がガラスクロス1の面積の0.01〜2%であり、かつ開口7bが上下に重ならないように積層されていることから、撚糸の密な部分と疎な部分との疎密差がより小さなものとなり、配線基板にレーザを用いて貫通孔5を穿孔する際、均一な内部径や出射径を有する貫通孔5を穿孔することができ、貫通孔5に導電性材料を充填して貫通導体6を形成した場合に、貫通導体6の抵抗が部分的に高くなったり、断線してしまうということはない。
【0025】
さらに、絶縁層3はガラスクロス1を複数積層するとともにこの積層したガラスクロス1に熱硬化性樹脂2を含浸させたて成ることから、絶縁層3が薄い場合でも複数のガラスクロス1を積層したほうが絶縁層3の剛性の低下を減少させることができ、その結果、大型のLSI等の半導体素子(図示せず)を配線基板に実装した際、半導体素子の動作時に半導体素子と配線基板との熱膨張係数の相違に起因して大きな応力が発生しても、半導体素子が配線基板から剥がれてしまう、あるいは半導体素子が破壊されてしまうことはない。
【0026】
なお、ガラスクロス1における隙間7aの開口7bの全面積がガラスクロス1の面積の0.01%より小さいとガラスクロス1に熱硬化性樹脂2を良好に含浸できず、絶縁層3の絶縁性が低下してしまう傾向にあり、2%を超えると隙間7aに貫通孔5を穿孔する確率が高くなり、均一な径の貫通孔5を穿孔できなくなる傾向にある。従って、ガラスクロス1の隙間7aの開口7bの全面積をガラスクロス1の面積の0.01〜2%とすることが重要である。
【0027】
このような開口7bの全面積は、ガラスクロス1を高圧水流処理やロールによる加圧処理等により扁平加工することにより、ガラスクロス1における隙間7aの開口7bの全面積がガラスクロス1の面積の0.01〜2%となるように調製される。
【0028】
なお、ガラスクロス1の表面には、熱硬化性樹脂2との密着性を向上するために、シランカップリング処理がなされている。また、これらのガラスクロス1は通常Eガラスと呼ばれるガラスが使用されているが、DガラスやSガラス・高誘電率ガラスなどを用いて良い。
【0029】
また、本発明の配線基板においては、ガラスクロス1を上側の縦糸の軸方向と下側の縦糸の軸方向とのなす角度が15〜75度となるように積層することが好ましい。
【0030】
本発明の配線基板によれば、ガラスクロス1の縦糸1aおよび横糸1bの軸方向の弾性率と、縦糸1aおよび横糸1bの交点間を結ぶ方向の弾性率との差が大きいが、ガラスクロス1を上側の縦糸1aの軸方向と下側の縦糸1aの軸方向とのなす角度が15〜75度となるように積層していることから、絶縁層3の方向における弾性率の差異を小さくすることでき、その結果、配線基板に大型のLSI等の半導体素子を実装した時に発生する応力による配線基板の変形を抑制でき、半導体素子が配線基板から剥がれてしまう、あるいは半導体素子が破壊されてしまうということを有効に防止することができる。
【0031】
なお、上側の縦糸1aの軸方向と下側の縦糸1aの軸方向とのなす角度が15度未満あるいは75度を超えると、ガラスクロス1の縦糸1aおよび横糸1bの軸方向とその斜め方向との弾性率の差が大きなものとなり、配線基板に大型のLSI等の半導体素子を実装した時に発生する応力により配線基板が変形し、半導体素子が配線基板から剥がれてしまう、あるいは半導体素子が破壊されてしまう危険性が大きなものとなる傾向がある。従って、上側の縦糸の軸方向と下側の縦糸の軸方向とのなす角度を15〜75度の範囲とすることが好ましい。
【0032】
また、絶縁層3を構成する熱硬化性樹脂2としては、150〜200℃の温度で硬化するエポキシ樹脂やビスマレイミドトリアジン樹脂・変性ポリフェニレンエーテル樹脂等の熱硬化性樹脂2が用いられる。なお、熱硬化性樹脂2をガラスクロス1に良好に含浸するために、界面活性剤や無機フィラー等を添加しても良い。
【0033】
さらに、絶縁層3の表面には配線導体4が埋入されている。配線導体4は、配線基板に搭載される半導体素子等の電子部品の各電極を外部電気回路基板(図示せず)に電気的に接続する導電路の一部としての機能を有し、幅が20〜200μm、厚みが5〜50μmで、銅やアルミニウム・ニッケル・銀・金等の金属箔から成り、特に加工性および安価という観点からは銅箔から成ることが好ましい。配線導体4の幅が20μm未満となると配線導体4の変形や断線が発生しやすくなる傾向があり、200μmを超えると高密度配線が形成できなくなる傾向がある。また、配線導体4の厚みが5μm未満になると配線導体4の強度が低下し変形や断線が発生しやすくなる傾向があり、50μmを超えると絶縁層3への埋入が困難となる傾向がある。従って、配線導体4は、その幅を20〜200μm、厚みを5〜50μmとすることが好ましい。
【0034】
また、絶縁層3には、その上面から下面にかけて貫通導体6が複数個配設されている。貫通導体6は、絶縁層1の上下に位置する配線導体2間を電気的に接続する機能を有し、その直径が30〜100μmであり、絶縁層3に設けた貫通孔5に錫を主成分とする金属粉末とトリアジン系熱硬化性樹脂等とから成る導電性材料を埋め込み熱硬化することにより形成されている。なお、貫通導体5の直径が30μm未満になるとその加工が困難となる傾向があり、100μmを超えると高密度配線が形成できなくなる傾向がある。従って、貫通導体4は、その直径を30〜100μmとすることが好ましい。
【0035】
なお、本発明の配線基板においては、ガラスクロス1の隙間7aの開口7bの全面積がガラスクロス1の面積の0.01〜2%であり、かつ開口7bが上下に重ならないように積層されていることから、直径が30〜100μmの範囲で、均一な直径の貫通孔5を形成することができる。
【0036】
また、導電性材料の金属粉末5の含有量は80〜95重量%が好ましい。金属粉末5の含有量が80重量%より少ないと、トリアジン系熱硬化性樹脂により金属粉末5同士の接続が妨げられ導通抵抗が上昇してしまう傾向があり、95重量%を超えると導電性材料の粘度が上がり過ぎて良好に埋め込みできない傾向がある。従って、導電性材料の金属粉末の含有量は80〜95重量%が好ましい。
【0037】
さらに、絶縁層3の一方の最外層表面に形成された配線導体4の一部は、電子部品(図示せず)の各電極に半田バンプ(図示せず)を介して接合される電子部品接続用の実装用電極11aを形成し、絶縁層3の他方の最外層表面に形成された配線導体2の一部は、外部電気回路基板(図示せず)の各電極に導体バンプ(図示せず)を介して接続される外部接続用の実装用電極11bを形成している。
【0038】
なお、実装用電極11a・11bの表面には、その酸化腐蝕を防止するとともに半田バンプ(図示せず)との接続を良好とするために、半田との濡れ性が良好で耐腐蝕性に優れたニッケル−金等のめっき層が被着されている。
【0039】
また、最外層の絶縁層3および実装用電極11a・11bには、必要に応じて実装用電極11a・11bの中央部を露出させる開口を有する耐半田樹脂層12が被着されている。耐半田樹脂層12は、その厚みが10〜50μmであり、例えばアクリル変性エポキシ樹脂等の感光性樹脂と光開始剤等とから成る混合物に30〜70重量%のシリカやタルク等の無機粉末フィラーを含有させた絶縁材料から成り、隣接する実装用電極11a・11b同士が半田バンプ(図示せず)により電気的に短絡することを防止するとともに、実装用電極11a・11bと絶縁層3との接合強度を向上させる機能を有する。
【0040】
このような耐半田樹脂層12は、感光性樹脂と光開始剤と無機粉末フィラーとから成る未硬化樹脂フィルムを最外層の絶縁層3表面に被着させる、あるいは、熱硬化性樹脂と無機粉末フィラーとから成る未硬化樹脂ワニスを最外層の絶縁層3表面に塗布するとともに乾燥し、しかる後、露光・現像により開口部を形成し、これをUV硬化および熱硬化させることにより形成される。
【0041】
なお、配線基板は、以下に述べる方法により製作される。まず、例えば、厚みが50μmのガラスクロス1にエポキシ樹脂や変性ポリフェニレン樹脂等から成る熱硬化樹脂2前駆体を含浸させたプリプレグを、ガラスクロス1の開口7bが上下に重ならないように2枚貼り合わせてプレス平坦化することにより絶縁層3となる絶縁シートを製作し、次に、絶縁シートの所定の位置に炭酸ガスレーザやYAGレーザ等の従来周知の方法を採用して直径が30〜100μmの貫通孔5を穿設する。
【0042】
そして、貫通孔5に従来周知のスクリーン印刷法を採用して、錫を主成分とする金属粉およびトリアジン系樹脂等の熱硬化性樹脂前駆体を含む導電性材料をスクリーン印刷法(圧入)で充填することによって貫通導体6を形成する。その後、別途準備した、表面に銅箔から成る配線導体4を絶縁シート上に所定のパターンに被着形成した、ポリエチレンテレフタレート(PET)樹脂等の耐熱性樹脂から成るる転写シートを絶縁シートに、所定の貫通導体5と配線導体4とが接続するように位置合わせして重ね合わせ、これらを熱プレス機を用いて100〜150℃の温度で数分間プレスすることにより転写シートを絶縁シートに圧接して、配線導体4を絶縁シートに転写埋入し、最後に150〜200℃の温度で数時間加熱することにより製作される。
【0043】
あるいは必要に応じて、転写シートを剥離した絶縁シートを複数枚上下に重ね合わせ、熱プレス機を用いて150〜200℃の温度で数時間加熱プレスすることにより積層配線基板が製作される。
【0044】
かくして、本発明の配線基板によれば、ガラスクロス1の縦糸1aおよび横糸1bに囲まれた隙間7aの開口7bの全面積がガラスクロス1の面積の0.01〜2%であり、かつ開口7bが上下に重ならないように複数枚積層したことから、隙間7aの開口7bに貫通孔5を穿孔する確率が小さくできるとともに上下に連続することがないので、レーザ加工で均一な貫通孔5径が形成でき貫通導体6の抵抗が高くなることがない、また、薄いガラスクロス1を複数枚積層して絶縁層3を形成したので配線基板の剛性が向上し、半導体素子を配線基板に実装する際に薄い配線基板でも、反りや半田バンプの破壊のない接続信頼性に優れた配線基板とすることができる。
【0045】
なお、本発明は上述の実施例に限定されるものではなく、本発明の要旨を逸脱しない範囲であれば種々の変更は可能であり、例えば上述の実施例では本発明の配線基板を4層積層して成る積層配線基板の例を示したが、5層以上の配線基板を積層してもよい。
【0046】
【実施例】
本発明の配線基板の評価するために次に説明する配線基板を製作し、その絶縁層の絶縁抵抗および貫通導体の導通抵抗を評価した。
【0047】
まず、開口7bの全面積がガラスクロスの面積の0.008〜3%であり、厚みが50μmのガラスクロス1にエポキシ樹脂や変性ポリフェニレン樹脂等から成る熱硬化樹脂組成物2を含浸させたプリプレグを、ガラスクロス1の開口7bが上下に重ならないように2枚貼り合わせてプレス平坦化することにより絶縁シートを製作した。
【0048】
次に、絶縁シートの所定の位置に炭酸ガスレーザやYAGレーザ等の従来周知の方法を採用して直径が30〜100μmの貫通孔5を穿設した。そして、貫通孔5に従来周知のスクリーン印刷法を採用して、錫を主成分とする金属粉およびトリアジン系樹脂等の熱硬化性樹脂前駆体を含む導電性材料をスクリーン印刷法(圧入)で充填することによって貫通導体6を形成した。その後、別途準備した、表面に銅箔から成る配線導体4を絶縁シート上に所定のパターンに被着形成した、ポリエチレンテレフタレート(PET)樹脂等の耐熱性樹脂から成る転写シートを絶縁シートに、所定の貫通導体5と配線導体4とが接続するように位置合わせして重ね合わせ、これらを熱プレス機を用いて100〜150℃の温度で数分間プレスすることにより転写シートを絶縁シートに圧接して、配線導体4を絶縁シートに転写埋入した。
【0049】
しかる後、転写シートを絶縁シートから剥離するとともに転写シートを剥離した絶縁シートを複数枚上下に重ね合わせ、熱プレス機を用いて150〜200℃の温度で数時間加熱プレスして配線基板を製作した。絶縁層3の絶縁抵抗値および貫通導体5の導通抵抗値は、4端子測定で測定した。結果を表1に示す。
【0050】
【表1】

Figure 2004179171
【0051】
表1に示すように、ガラスクロス1の開口7bの全面積の比率が0.01%未満の場合(試料No.1)、絶縁層3の絶縁抵抗値が1013Ω未満となり絶縁性が低下することがわかった。また、2%より大きい場合(試料No.6)、均一な径の貫通孔が形成できず、貫通導体5の導通抵抗が10mΩ以上と高くなることがわかった。それに対して、ガラスクロス1の開口7bの全面積の比率を0.01〜2%の場合(試料No.2〜5)、絶縁層3の絶縁抵抗値が1013Ω以上、貫通導体5の導通抵抗が10mΩ未満となり絶縁抵抗性に優れ、導通抵抗が低い配線基板となることがわかった。
【0052】
また、ガラスクロス1を上側の縦糸1aの軸方向と下側の縦糸1aの軸方向とのなす角度が0〜90度となるように積層して、上記と同様にして試料を製作した。次に、配線基板の実装電極11a上に半田バンプを形成し、その半田バンプを介して上面に半導体素子を実装した。実装後の半導体素子と配線基板との剥れの有無を超音波探傷機で測定した。また別途、絶縁層3のみを加熱プレスして絶縁層3の縦糸1aの軸方向とこれと45度をなす方向の弾性率を測定した。その結果を表2に示す。
【0053】
【表2】
Figure 2004179171
【0054】
表2に示すように、上側の縦糸1aの軸方向と下側の縦糸1aの軸方向とのなす角度が15度未満および75度を超えた場合(試料No.7、8、14、15)、絶縁層3の縦糸方向とその45度方向の弾性率の差が20%以上と大きな値となることがわかった。それに対して、上側の縦糸1aの軸方向と下側の縦糸1aの軸方向とのなす角度が15〜75度の場合(試料No.9〜13)、絶縁層3の縦糸方向1aとその45度方向の弾性率の差が10%以下と小さな値となることがわかった。
【0055】
【発明の効果】
本発明の配線基板によれば、ガラスクロスを複数積層するとともにこの積層したガラスクロスに熱硬化性樹脂を含浸させて成る絶縁層の上下面に配線導体を形成し、絶縁層を挟んで上下に位置する配線導体同士を絶縁層に設けた貫通導体を介して電気的に接続して成ることから、絶縁層の厚みが厚い場合においてもガラスクロスを構成する撚糸の径を大きなものとする必要はなく、その結果、ガラスクロスの隙間の開口の全面積が大きくなることはなく、撚糸の密な部分と疎な部分との疎密差が大きなものとなることはない。
【0056】
また、ガラスクロスの隙間の開口の全面積がガラスクロスの面積の0.01〜2%であり、かつ開口が上下に重ならないように積層されていることから、撚糸の密な部分と疎な部分との疎密差がより小さなものとなり、配線基板にレーザを用いて貫通孔を穿孔する際、均一な内部径や出射径を有する貫通孔を穿孔することができ、貫通孔に導電性材料を充填して貫通導体を形成した場合に、貫通導体の抵抗が部分的に高くなったり、断線してしまうということはない。
【0057】
さらに、絶縁層はガラスクロスを複数積層するとともにこの積層したガラスクロスに熱硬化性樹脂を含浸させたて成ることから、絶縁層が薄い場合でも複数のガラスクロスを積層したほうが絶縁層の剛性の低下を減少させることができ、その結果、大型のLSI等の半導体素子を配線基板に実装した際、半導体素子の動作時に半導体素子と配線基板との熱膨張係数の相違に起因して大きな応力が発生しても、半導体素子が配線基板から剥がれてしまう、あるいは半導体素子が破壊されてしまうことはない。
【0058】
本発明の配線基板によれば、ガラスクロスの縦糸および横糸の軸方向の弾性率と、縦糸および横糸の交点間を結ぶ方向の弾性率との差が大きいが、積層したガラスクロスのうち上下に接するものは、上側の縦糸の軸方向と下側の縦糸の軸方向とのなす角度を15〜75度となるように積層した場合には、絶縁層の方向毎の弾性率の差異を小さくすることでき、その結果、配線基板に大型のLSI等の半導体素子を実装した時に発生する応力による配線基板の変形を抑制でき、半導体素子が配線基板から剥がれてしまう、あるいは半導体素子が破壊されてしまうということを有効に防止することができる。
【図面の簡単な説明】
【図1】本発明の配線基板の実施の形態の一例を示す断面図である。
【図2】図1に示すガラスクロスの平面図である。
【符号の説明】
1・・・・・・・ガラスクロス
1a・・・・・縦糸
1b・・・・・横糸
2・・・・・・・熱硬化性樹脂
3・・・・・・・絶縁層
4・・・・・・・配線導体
5・・・・・・・貫通孔
6・・・・・・・貫通導体
7a・・・・・・隙間
7b・・・・・・開口[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a wiring board for mounting electronic components such as a semiconductor element and a resistor.
[0002]
[Prior art]
Conventionally, as a wiring board used to mount electronic components such as semiconductor elements and resistors, a glass cloth formed by weaving a warp yarn and a weft yarn, which are twisted yarns, in such a manner that the angle between both the axial directions is a right angle direction. 2. Description of the Related Art There is known a printed circuit board formed by alternately laminating a plurality of insulating layers impregnated with a curable resin and wiring conductors formed of a copper foil. In such a printed circuit board, first, a copper foil adhered on the surface of the insulating layer is etched to form a wiring conductor of a predetermined pattern, and then the insulating layer on which the wiring conductor is formed is coated with an adhesive made of a thermosetting resin. A multilayer board is manufactured by laminating and pressing multiple sheets in between, and then a drill is used to form a through hole that penetrates the front and back of the multilayer board, and then copper plating is applied to the inner surface of the through hole and vertically It is manufactured by forming through-hole conductors that electrically connect the wiring conductors located.
[0003]
Normally, each insulating layer is formed by impregnating a thermosetting resin into one glass cloth, and by selecting twisted yarns of various diameters, a glass cloth having a desired thickness is obtained and the thermosetting resin is added thereto. Impregnation results in a desired thickness.
[0004]
2. Description of the Related Art In recent years, in electronic devices, semiconductor elements have been highly integrated year by year with the increase in density, and the demand for higher density of wiring conductors on a wiring board on which the semiconductor elements are mounted has been increasing. However, the above-described printed circuit board has a problem that it is difficult to improve the density of wiring conductors because the printed circuit board has a through-hole structure that penetrates the front and back sides of the laminated board.
[0005]
In order to solve such a problem, an inner via hole structure in which a through hole is formed in each insulating layer instead of a through hole structure, and a conductor is filled in the through hole and the upper and lower wiring conductors are connected to each other. Has been put to practical use. In such an inner via hole structure, the diameter of the through hole is required to be fine processing of 200 μm or less, and it is difficult to drill a small diameter of 200 μm or less with a drill. Therefore, it is generally performed to drill the through hole with a laser. .
[0006]
However, the glass cloth constituting the insulating layer has a structure in which twisted yarns are woven vertically and horizontally, and when the glass cloth is viewed from above, the portion where the vertical and horizontal twisted yarns overlap, and either one of them A portion where a twisted yarn exists and a portion where no twisted yarn exists, that is, three types of gaps surrounded by vertical and horizontal twisted yarns are mixed, and the entire area of the opening of the gap is the area of the glass cloth. When a laser is used to penetrate through holes in an insulating layer formed by impregnating such a glass cloth with a thermosetting resin, vertical and horizontal twisted yarns are overlapped. It is said that the inner diameter and the emission diameter of the through-hole are small in the dense part, and the inner diameter and the emission diameter of the through-hole are large in the gap where there is no twisted yarn, so that the through-hole having a uniform inner diameter and the emission diameter cannot be drilled. There was a problem.
[0007]
In order to solve such a problem, when manufacturing a substrate by laminating a plurality of insulating layers, the insulating layers are arranged so that the weave positions of the glass cloth included in each of the insulating layers located above and below are different from each other. Lamination has been proposed (see Patent Document 1).
[0008]
[Patent Document 1]
JP 2002-76548 A
[0009]
[Problems to be solved by the invention]
However, in the conventional glass cloth, the total area of the openings in the gap is 5 to 12% of the area of the glass cloth, which is a large ratio of the total area of the openings. Even if the weave positions are laminated so as to be different from each other, there are still dense parts and sparse parts of the twisted yarn, and when drilling through holes using a laser on the substrate, it has a uniform internal diameter and emission diameter It is difficult to form the through-hole, and when the through-hole is filled with a conductive material to form the through-conductor, there is a problem that the resistance of the through-hole conductor is partially increased or the through-hole is disconnected. Was.
[0010]
In addition, since each insulating layer is formed by impregnating one glass cloth with a thermosetting resin, when the thickness of the insulating layer is large, the diameter of the twisted yarn constituting the glass cloth becomes large, and the entire area of the opening is reduced. There is also a problem that as the size increases, the difference in density between the dense portion and the sparse portion of the twisted yarn becomes larger. Further, when the thickness of the insulating layer is thin, the rigidity of only one glass cloth is reduced, and when a semiconductor element such as a large-sized LSI is mounted on a wiring board, the semiconductor element and the wiring board are not connected during operation of the semiconductor element. There is also a problem that a large stress is generated due to the difference in thermal expansion coefficient of the semiconductor element, and the semiconductor element is peeled off from the wiring board or the semiconductor element is destroyed by the stress.
[0011]
The present invention has been completed in view of the problems of the prior art described above, and an object of the present invention is to form a through hole having a uniform diameter by laser processing on a high-density wiring board having fine through conductors. An object of the present invention is to provide a wiring board which is excellent in electrical connection reliability and in which a semiconductor element can be favorably mounted.
[0012]
[Means for Solving the Problems]
The wiring board according to the present invention is characterized in that a plurality of glass cloths woven by warp and weft are laminated, and the laminated glass cloths are impregnated with a thermosetting resin. The glass cloth is formed by electrically connecting wiring conductors located above and below each other through a through conductor provided in an insulating layer, and the entire area of the opening of the gap surrounded by the warp and the weft is equal to that of the glass cloth. The area is 0.01 to 2% of the area, and the openings are stacked so that the openings do not overlap vertically.
[0013]
According to the wiring board of the present invention, a plurality of glass cloths are laminated, and a wiring conductor is formed on the upper and lower surfaces of the insulating layer formed by impregnating the laminated glass cloth with a thermosetting resin, and the wiring conductors are vertically arranged with the insulating layer interposed therebetween. Since the located wiring conductors are electrically connected via the through conductor provided on the insulating layer, it is not necessary to increase the diameter of the twisted yarn constituting the glass cloth even when the thickness of the insulating layer is large. As a result, the entire area of the opening of the gap of the glass cloth does not increase, and the difference in density between the dense portion and the sparse portion of the twisted yarn does not increase.
[0014]
Further, the glass cloth has a total area of the opening of the gap of 0.01 to 2% of the area of the glass cloth, and is laminated so that the opening does not overlap with the upper and lower sides. The difference in density from the part becomes smaller, and when drilling a through hole using a laser on the wiring board, it is possible to drill a through hole having a uniform internal diameter and emission diameter, and to use a conductive material in the through hole. In the case where the through conductor is formed by filling, the resistance of the through conductor does not partially increase or break.
[0015]
Furthermore, since the insulating layer is formed by laminating a plurality of glass cloths and impregnating the laminated glass cloth with a thermosetting resin, even if the insulating layer is thin, the lamination of a plurality of glass cloths reduces the rigidity of the insulating layer. As a result, when a semiconductor device such as a large LSI is mounted on a wiring board, a large stress is generated due to a difference in thermal expansion coefficient between the semiconductor element and the wiring board during operation of the semiconductor element. However, the semiconductor element does not peel off from the wiring board or the semiconductor element is not destroyed.
[0016]
Further, in the wiring board of the present invention, in the above-mentioned configuration, an angle between an axial direction of the upper warp and an axial direction of the lower warp is 15 to 75, of the laminated glass cloths, which are vertically in contact with each other. It is characterized in that it is laminated so as to have different degrees.
[0017]
According to the wiring board of the present invention, the difference between the elastic modulus in the axial direction of the warp and the weft of the glass cloth and the elastic modulus in the direction connecting the intersections of the warp and the weft are large, In contact with, when laminated so that the angle between the axial direction of the upper warp and the axial direction of the lower warp is 15 to 75 degrees, the difference in elastic modulus for each direction of the insulating layer is reduced. As a result, the deformation of the wiring board due to the stress generated when a large-sized LSI or other semiconductor element is mounted on the wiring board can be suppressed, and the semiconductor element peels off from the wiring board or the semiconductor element is destroyed. This can be more effectively prevented.
[0018]
BEST MODE FOR CARRYING OUT THE INVENTION
Next, the wiring board of the present invention will be described in detail with reference to the accompanying drawings.
FIG. 1 is a cross-sectional view showing an example of an embodiment of a wiring board of the present invention. FIG. 2 is a plan view of a glass cloth constituting the wiring board shown in FIG. The outline of the lower glass cloth is shown by a solid line so that the positional relationship with the above is clear. In these figures, 1 is a glass cloth, 2 is a thermosetting resin, 3 is an insulating layer, 4 is a wiring conductor, 5 is a through hole, 6 is a through conductor, 7a is a gap, and 7b is an opening.
[0019]
In the wiring board of the present invention, a plurality of glass cloths 1 made by weaving the warp yarns 1a and the weft yarns 1b so that their axial directions are substantially perpendicular to each other are laminated, and the laminated glass cloths 1 are impregnated with a thermosetting resin 2. A wiring conductor 4 is formed on the upper and lower surfaces of the insulating layer 3 made of, and the wiring conductors 4 positioned above and below the insulating layer 3 are electrically connected to each other via a through conductor 6 provided on the insulating layer 3. FIG. 1 shows an example of a laminated wiring board formed by laminating four such wiring boards.
[0020]
The insulating layer 3 has a thickness of 50 to 150 μm, and has a function of supporting the wiring conductors 4 and maintaining insulation between the wiring conductors 4 located above and below. It is formed by impregnating a thermosetting resin 2 such as a maleimide triazine resin or a modified polyphenylene ether resin. If the thickness of the insulating layer 3 is less than 50 μm, the rigidity of the wiring board is reduced, and the wiring board tends to be easily bent. If the thickness is more than 150 μm, the thickness of the insulating layer 3 becomes unnecessarily thick, and Lightening tends to be difficult. Therefore, the insulating layer 3 preferably has a thickness of 50 to 150 μm.
[0021]
The glass cloth 1 has a plain weave, a twill weave, a satin weave, and the like depending on the weaving method. FIG. 2 shows a plan view of a plain weave in which the warp and weft yarns 1a and 1b cross each other up and down. I have. The glass cloth 1 has a thickness of 10 to 50 μm, and if the thickness is less than 10 μm, the warp yarns 1a and the weft yarns 1b become extremely thin and it is difficult to weave them uniformly, so that the insulating layer 3 tends to warp after curing. If the thickness is more than 50 μm, the insulating layer 3 becomes unnecessarily thick, and it tends to be difficult to reduce the weight of the wiring board. Therefore, the thickness of the glass cloth 1 is preferably 10 to 50 μm.
[0022]
In the wiring board of the present invention, a plurality of glass cloths 1 are laminated, and a wiring conductor 4 is formed on the upper and lower surfaces of an insulating layer 3 obtained by impregnating the laminated glass cloth 1 with a thermosetting resin 2. The glass cloth 1 is formed by electrically connecting wiring conductors 4 positioned above and below each other via a through conductor 6 provided on the insulating layer 3, and the glass cloth 1 has an opening 7 b of a gap 7 a surrounded by the warp 1 a and the weft. Of the glass cloth 1 is 0.01 to 2% of the area of the glass cloth 1, and the openings 7b are stacked so that they do not overlap each other. In the present invention, the entire area of the opening 7b of the gap 7a of the glass cloth 1 is 0.01 to 2% of the area of the glass cloth 1, and the openings 7b are stacked so that they do not overlap vertically. is important.
[0023]
According to the wiring board of the present invention, a plurality of glass cloths 1 are laminated, and a wiring conductor 4 is formed on upper and lower surfaces of an insulating layer 3 formed by impregnating the laminated glass cloth 1 with a thermosetting resin 2. Since the wiring conductors 4 positioned above and below the insulating layer 3 are electrically connected to each other via the through conductors 6 provided on the insulating layer 1, the glass cloth 1 is formed even when the insulating layer 3 is thick. It is not necessary to increase the diameter of the warp yarn 1a or the weft yarn 1b of the twisted yarn to be formed. As a result, the entire area of the opening 7b of the gap 7a of the glass cloth 1 does not increase, and the dense portion and the sparse portion of the twisted yarn are not increased. The difference between density and density does not become large.
[0024]
In addition, since the entire area of the opening 7b of the gap 7a of the glass cloth 1 is 0.01 to 2% of the area of the glass cloth 1 and the openings 7b are stacked so as not to overlap vertically, the dense portion of the twisted yarn The difference in density between the sparse portion and the sparse portion becomes smaller, and when the through hole 5 is drilled using a laser on the wiring board, the through hole 5 having a uniform inner diameter or emission diameter can be drilled. When the through-conductor 6 is formed by filling the conductive material 5 with the conductive material, there is no possibility that the resistance of the through-conductor 6 is partially increased or the wire is disconnected.
[0025]
Furthermore, since the insulating layer 3 is formed by laminating a plurality of glass cloths 1 and impregnating the laminated glass cloth 1 with a thermosetting resin 2, even when the insulating layer 3 is thin, the plurality of glass cloths 1 are laminated. When the semiconductor element (not shown) such as a large-sized LSI is mounted on the wiring board, the rigidity of the insulating layer 3 can be reduced. Even if a large stress is generated due to the difference in the thermal expansion coefficient, the semiconductor element does not peel off from the wiring board or the semiconductor element is not broken.
[0026]
If the entire area of the opening 7b of the gap 7a in the glass cloth 1 is smaller than 0.01% of the area of the glass cloth 1, the glass cloth 1 cannot be impregnated with the thermosetting resin 2 satisfactorily, and the insulating property of the insulating layer 3 decreases. If it exceeds 2%, the probability of piercing the through hole 5 in the gap 7a increases, and it tends to be difficult to pierce the through hole 5 having a uniform diameter. Therefore, it is important that the entire area of the opening 7b of the gap 7a of the glass cloth 1 be 0.01 to 2% of the area of the glass cloth 1.
[0027]
The entire area of the opening 7b is reduced by flattening the glass cloth 1 by a high-pressure water flow treatment, a pressure treatment with a roll, or the like, so that the entire area of the opening 7b of the gap 7a in the glass cloth 1 is equal to the area of the glass cloth 1. It is adjusted to be 0.01 to 2%.
[0028]
The surface of the glass cloth 1 has been subjected to a silane coupling treatment in order to improve the adhesion to the thermosetting resin 2. Further, these glass cloths 1 are usually made of glass called E glass, but may be made of D glass, S glass or high dielectric constant glass.
[0029]
Further, in the wiring board of the present invention, it is preferable that the glass cloths 1 are laminated so that the angle between the axial direction of the upper warp and the axial direction of the lower warp is 15 to 75 degrees.
[0030]
According to the wiring board of the present invention, the difference between the elastic modulus in the axial direction of the warp 1a and the weft 1b of the glass cloth 1 and the elastic modulus in the direction connecting the intersections of the warp 1a and the weft 1b is large. Are laminated so that the angle between the axial direction of the upper warp 1a and the axial direction of the lower warp 1a is 15 to 75 degrees, so that the difference in the elastic modulus in the direction of the insulating layer 3 is reduced. As a result, the deformation of the wiring board due to the stress generated when a large-sized LSI or other semiconductor element is mounted on the wiring board can be suppressed, and the semiconductor element peels off from the wiring board or the semiconductor element is destroyed. This can be effectively prevented.
[0031]
If the angle between the axial direction of the upper warp 1a and the axial direction of the lower warp 1a is less than 15 degrees or more than 75 degrees, the axial direction of the warp 1a and the weft 1b of the glass cloth 1 and the oblique direction thereof The difference in elastic modulus of the wiring board becomes large, and the wiring board is deformed by the stress generated when a large-sized LSI or other semiconductor element is mounted on the wiring board, and the semiconductor element is peeled off from the wiring board or the semiconductor element is broken. There is a tendency for the danger of becoming large. Therefore, it is preferable that the angle between the axial direction of the upper warp and the axial direction of the lower warp be in the range of 15 to 75 degrees.
[0032]
In addition, as the thermosetting resin 2 forming the insulating layer 3, a thermosetting resin 2 such as an epoxy resin, a bismaleimide triazine resin, and a modified polyphenylene ether resin that cures at a temperature of 150 to 200 ° C. is used. In order to favorably impregnate the thermosetting resin 2 into the glass cloth 1, a surfactant or an inorganic filler may be added.
[0033]
Further, a wiring conductor 4 is embedded in the surface of the insulating layer 3. The wiring conductor 4 has a function as a part of a conductive path for electrically connecting each electrode of an electronic component such as a semiconductor element mounted on the wiring board to an external electric circuit board (not shown), and has a width. It has a thickness of 20 to 200 μm and a thickness of 5 to 50 μm, and is made of a metal foil such as copper, aluminum, nickel, silver, or gold, and is preferably made of a copper foil from the viewpoint of workability and low cost. If the width of the wiring conductor 4 is less than 20 μm, deformation and disconnection of the wiring conductor 4 tend to occur, and if it exceeds 200 μm, high-density wiring tends not to be formed. Further, when the thickness of the wiring conductor 4 is less than 5 μm, the strength of the wiring conductor 4 tends to decrease and deformation or disconnection tends to occur, and when it exceeds 50 μm, it tends to be difficult to embed the insulating layer 3. . Therefore, the wiring conductor 4 preferably has a width of 20 to 200 μm and a thickness of 5 to 50 μm.
[0034]
The insulating layer 3 is provided with a plurality of through conductors 6 from the upper surface to the lower surface. The through conductor 6 has a function of electrically connecting the wiring conductors 2 located above and below the insulating layer 1, has a diameter of 30 to 100 μm, and mainly includes tin in the through hole 5 provided in the insulating layer 3. It is formed by embedding and thermosetting a conductive material composed of a metal powder as a component and a triazine-based thermosetting resin or the like. If the diameter of the through conductor 5 is less than 30 μm, the processing tends to be difficult, and if it exceeds 100 μm, high-density wiring tends not to be formed. Therefore, it is preferable that the diameter of the through conductor 4 be 30 to 100 μm.
[0035]
In the wiring board of the present invention, the entire area of the opening 7b of the gap 7a of the glass cloth 1 is 0.01 to 2% of the area of the glass cloth 1, and the openings 7b are stacked so that they do not vertically overlap. Therefore, the through holes 5 having a uniform diameter can be formed in a range of 30 to 100 μm in diameter.
[0036]
Further, the content of the metal powder 5 of the conductive material is preferably 80 to 95% by weight. When the content of the metal powder 5 is less than 80% by weight, the triazine-based thermosetting resin tends to hinder the connection between the metal powders 5 and increase the conduction resistance. Tends to be too high to be satisfactorily embedded. Therefore, the content of the metal powder of the conductive material is preferably 80 to 95% by weight.
[0037]
Further, a part of the wiring conductor 4 formed on one outermost layer surface of the insulating layer 3 is connected to each electrode of the electronic component (not shown) via a solder bump (not shown). Of the wiring conductor 2 formed on the surface of the other outermost layer of the insulating layer 3 is connected to a conductor bump (not shown) on each electrode of an external electric circuit board (not shown). ) To form an external connection mounting electrode 11b.
[0038]
The surfaces of the mounting electrodes 11a and 11b have good wettability with solder and excellent corrosion resistance in order to prevent their oxidative corrosion and improve the connection with solder bumps (not shown). And a plating layer of nickel-gold or the like.
[0039]
The outermost insulating layer 3 and the mounting electrodes 11a and 11b are coated with a solder-resistant resin layer 12 having an opening for exposing the central portion of the mounting electrodes 11a and 11b as necessary. The solder-resistant resin layer 12 has a thickness of 10 to 50 μm. For example, 30 to 70% by weight of an inorganic powder filler such as silica or talc is added to a mixture of a photosensitive resin such as an acrylic-modified epoxy resin and a photoinitiator. To prevent the adjacent mounting electrodes 11a and 11b from being electrically short-circuited by solder bumps (not shown), and to prevent the mounting electrodes 11a and 11b from being in contact with the insulating layer 3. It has the function of improving the bonding strength.
[0040]
Such a solder-resistant resin layer 12 is formed by applying an uncured resin film composed of a photosensitive resin, a photoinitiator, and an inorganic powder filler on the surface of the outermost insulating layer 3 or by forming a thermosetting resin and an inorganic powder. An uncured resin varnish comprising a filler is applied to the surface of the outermost insulating layer 3 and dried, and thereafter, an opening is formed by exposure and development, and the opening is formed by UV curing and heat curing.
[0041]
The wiring board is manufactured by the method described below. First, for example, two prepregs in which a 50 μm-thick glass cloth 1 is impregnated with a thermosetting resin 2 precursor made of an epoxy resin, a modified polyphenylene resin, or the like are attached so that the openings 7 b of the glass cloth 1 do not overlap vertically. An insulating sheet to be the insulating layer 3 is manufactured by press-flattening the insulating sheet, and then a conventionally known method such as a carbon dioxide gas laser or a YAG laser is used at a predetermined position of the insulating sheet to have a diameter of 30 to 100 μm. A through hole 5 is formed.
[0042]
A conventionally known screen printing method is used for the through-holes 5, and a conductive material containing a metal powder containing tin as a main component and a thermosetting resin precursor such as a triazine-based resin is screen-printed (press-fitted). The through conductor 6 is formed by filling. Thereafter, a transfer sheet made of a heat-resistant resin such as polyethylene terephthalate (PET) resin, in which a separately prepared wiring conductor 4 made of copper foil on the surface is applied in a predetermined pattern on the insulating sheet, is used as an insulating sheet. A predetermined through conductor 5 and a wiring conductor 4 are aligned so that they are connected to each other, and are overlapped. These are pressed by a hot press at a temperature of 100 to 150 ° C. for several minutes to press the transfer sheet against the insulating sheet. Then, the wiring conductor 4 is transferred and embedded in an insulating sheet, and finally manufactured by heating at a temperature of 150 to 200 ° C. for several hours.
[0043]
Alternatively, if necessary, a plurality of insulating sheets from which the transfer sheet has been peeled off may be stacked one above the other, and heated and pressed at a temperature of 150 to 200 ° C. for several hours using a hot press to produce a laminated wiring board.
[0044]
Thus, according to the wiring board of the present invention, the entire area of the opening 7b of the gap 7a surrounded by the warp 1a and the weft 1b of the glass cloth 1 is 0.01 to 2% of the area of the glass cloth 1, and the opening 7b is Since a plurality of sheets are stacked so that they do not overlap one another, the probability that the through holes 5 are formed in the openings 7b of the gaps 7a can be reduced, and the through holes 5 do not continue up and down. As a result, the resistance of the through conductor 6 does not increase, and the rigidity of the wiring board is improved because the insulating layer 3 is formed by laminating a plurality of thin glass cloths 1. Even with a thin wiring board, a wiring board with excellent connection reliability without warpage or breakage of solder bumps can be obtained.
[0045]
Note that the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the gist of the present invention. For example, in the above-described embodiment, the wiring board of the present invention has four layers. Although an example of a laminated wiring board formed by lamination has been described, a wiring board of five or more layers may be laminated.
[0046]
【Example】
In order to evaluate the wiring board of the present invention, a wiring board described below was manufactured, and the insulation resistance of the insulating layer and the conduction resistance of the through conductor were evaluated.
[0047]
First, a prepreg obtained by impregnating a glass cloth 1 having a total area of the openings 7b of 0.008 to 3% of the area of the glass cloth and a thickness of 50 μm with a thermosetting resin composition 2 made of an epoxy resin, a modified polyphenylene resin, or the like, An insulating sheet was manufactured by bonding two sheets and flattening them by pressing such that the openings 7b of the glass cloth 1 do not overlap vertically.
[0048]
Next, through holes 5 having a diameter of 30 to 100 μm were formed at predetermined positions of the insulating sheet by using a conventionally known method such as a carbon dioxide gas laser or a YAG laser. A conventionally known screen printing method is adopted for the through-holes 5, and a conductive material containing a metal powder containing tin as a main component and a thermosetting resin precursor such as a triazine-based resin is screen-printed (press-fitted). The through conductor 6 was formed by filling. Then, a separately prepared transfer sheet made of a heat-resistant resin such as polyethylene terephthalate (PET) resin, in which a wiring conductor 4 made of copper foil on the surface is formed in a predetermined pattern on the insulating sheet, is added to the insulating sheet. The transfer sheet is pressed against the insulating sheet by pressing them at a temperature of 100 to 150 ° C. for several minutes using a hot press machine so that the through conductor 5 and the wiring conductor 4 are aligned and connected so as to be connected. Then, the wiring conductor 4 was transferred and embedded in the insulating sheet.
[0049]
After that, the transfer sheet is peeled off from the insulating sheet, and the insulating sheets from which the transfer sheet is peeled are stacked one on top of the other and heated and pressed at 150-200 ° C for several hours using a hot press machine to produce a wiring board did. The insulation resistance value of the insulating layer 3 and the conduction resistance value of the through conductor 5 were measured by four-terminal measurement. Table 1 shows the results.
[0050]
[Table 1]
Figure 2004179171
[0051]
As shown in Table 1, when the ratio of the total area of the openings 7b of the glass cloth 1 was less than 0.01% (Sample No. 1), the insulation resistance of the insulating layer 3 was 10%. 13 It turned out that it was less than Ω, and the insulating property was lowered. In addition, when it was more than 2% (Sample No. 6), it was found that a through hole having a uniform diameter could not be formed, and the conduction resistance of the through conductor 5 was as high as 10 mΩ or more. On the other hand, when the ratio of the total area of the openings 7b of the glass cloth 1 is 0.01 to 2% (Sample Nos. 2 to 5), the insulation resistance of the insulating layer 3 is 10%. 13 Ω or more, the conduction resistance of the through conductor 5 was less than 10 mΩ, and the wiring substrate was found to be excellent in insulation resistance and low in conduction resistance.
[0052]
Further, the glass cloth 1 was laminated so that the angle between the axial direction of the upper warp 1a and the axial direction of the lower warp 1a was 0 to 90 degrees, and a sample was produced in the same manner as described above. Next, solder bumps were formed on the mounting electrodes 11a of the wiring board, and a semiconductor element was mounted on the upper surface via the solder bumps. The presence or absence of peeling between the mounted semiconductor element and the wiring board was measured by an ultrasonic flaw detector. Separately, only the insulating layer 3 was heated and pressed to measure the elastic modulus of the warp 1a of the insulating layer 3 in the axial direction and the direction at an angle of 45 degrees with the axial direction. Table 2 shows the results.
[0053]
[Table 2]
Figure 2004179171
[0054]
As shown in Table 2, when the angle between the axial direction of the upper warp yarn 1a and the axial direction of the lower warp yarn 1a is less than 15 degrees and exceeds 75 degrees (samples No. 7, 8, 14, 15). It was found that the difference between the elastic modulus of the insulating layer 3 in the warp direction and that in the 45-degree direction was as large as 20% or more. On the other hand, when the angle between the axial direction of the upper warp 1a and the axial direction of the lower warp 1a is 15 to 75 degrees (sample Nos. 9 to 13), the warp direction 1a of the insulating layer 3 and its 45 It was found that the difference in elastic modulus in the degree direction was a small value of 10% or less.
[0055]
【The invention's effect】
According to the wiring board of the present invention, a plurality of glass cloths are laminated, and a wiring conductor is formed on the upper and lower surfaces of the insulating layer formed by impregnating the laminated glass cloth with a thermosetting resin, and the wiring conductors are vertically arranged with the insulating layer interposed therebetween. Since the located wiring conductors are electrically connected via the through conductor provided on the insulating layer, it is not necessary to increase the diameter of the twisted yarn constituting the glass cloth even when the thickness of the insulating layer is large. As a result, the entire area of the opening of the gap of the glass cloth does not increase, and the difference in density between the dense portion and the sparse portion of the twisted yarn does not increase.
[0056]
Further, since the entire area of the opening of the gap of the glass cloth is 0.01 to 2% of the area of the glass cloth, and the openings are laminated so as not to overlap vertically, the dense portion and the sparse portion of the twisted yarn are used. When the through hole is drilled using a laser on the wiring board, a through hole having a uniform inner diameter and an emission diameter can be drilled, and the through hole is filled with a conductive material. When the through conductor is formed in this manner, there is no possibility that the resistance of the through conductor is partially increased or the wire is disconnected.
[0057]
Furthermore, since the insulating layer is formed by laminating a plurality of glass cloths and impregnating the laminated glass cloth with a thermosetting resin, the rigidity of the insulating layer is better when the plurality of glass cloths are laminated even when the insulating layer is thin. As a result, when a semiconductor device such as a large LSI is mounted on a wiring board, a large stress due to a difference in the thermal expansion coefficient between the semiconductor element and the wiring board during operation of the semiconductor element is obtained. Even if it occurs, the semiconductor element does not peel off from the wiring board or the semiconductor element is not destroyed.
[0058]
According to the wiring board of the present invention, the difference between the elastic modulus in the axial direction of the warp and the weft of the glass cloth and the elastic modulus in the direction connecting the intersections of the warp and the weft are large, In contact with, when laminated so that the angle between the axial direction of the upper warp and the axial direction of the lower warp is 15 to 75 degrees, the difference in elastic modulus for each direction of the insulating layer is reduced. As a result, the deformation of the wiring board due to the stress generated when a large-sized LSI or other semiconductor element is mounted on the wiring board can be suppressed, and the semiconductor element peels off from the wiring board or the semiconductor element is destroyed. This can be effectively prevented.
[Brief description of the drawings]
FIG. 1 is a sectional view showing an example of an embodiment of a wiring board of the present invention.
FIG. 2 is a plan view of the glass cloth shown in FIG.
[Explanation of symbols]
1 ... Glass cloth
1a ····· Warp
1b ... weft
2 ···· Thermosetting resin
3 ... Insulating layer
4 .... Wiring conductor
5 ... Through-hole
6 ····· Through conductor
7a ... gap
7b Opening

Claims (2)

縦糸および横糸を織って成るガラスクロスを複数積層するとともに該積層したガラスクロスに熱硬化性樹脂を含浸させて成る絶縁層の上下面に配線導体を形成し、前記絶縁層を挟んで上下に位置する前記配線導体同士を前記絶縁層に設けた貫通導体を介して電気的に接続して成り、前記ガラスクロスは、前記縦糸および横糸に囲まれた隙間の開口の全面積が前記ガラスクロスの面積の0.01〜2%であり、かつ前記開口が上下に重ならないように積層されていることを特徴とする配線基板。A plurality of glass cloths formed by weaving warp yarns and weft yarns are laminated, and the laminated glass cloths are impregnated with a thermosetting resin. Wiring conductors are formed on upper and lower surfaces of an insulating layer. The wiring conductors are electrically connected to each other via a through conductor provided on the insulating layer, and the glass cloth has an area corresponding to the entire area of the opening of the gap surrounded by the warp and the weft. Wherein the openings are stacked so that the openings do not overlap vertically. 前記積層したガラスクロスのうち上下に接するものは、上側の前記縦糸の軸方向と下側の前記縦糸の軸方向とのなす角度が15〜75度となるように積層されていることを特徴とする請求項1記載の配線基板。Among the laminated glass cloths, those that are in contact with the upper and lower sides are laminated such that the angle between the axial direction of the upper warp and the axial direction of the lower warp is 15 to 75 degrees. The wiring board according to claim 1, wherein
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JP2008109073A (en) * 2006-03-30 2008-05-08 Kyocera Corp Wiring board, and mounting structure
WO2008126640A1 (en) * 2007-04-09 2008-10-23 Hitachi Chemical Company, Ltd. Printed wiring board and electronic device
JP2008283167A (en) * 2007-04-09 2008-11-20 Hitachi Chem Co Ltd Printed wiring board and electronic apparatus
JP2012004440A (en) * 2010-06-18 2012-01-05 Shinko Electric Ind Co Ltd Wiring board
US8446734B2 (en) 2006-03-30 2013-05-21 Kyocera Corporation Circuit board and mounting structure
JP2013127812A (en) * 2008-01-31 2013-06-27 Semiconductor Energy Lab Co Ltd Semiconductor device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008109073A (en) * 2006-03-30 2008-05-08 Kyocera Corp Wiring board, and mounting structure
US8446734B2 (en) 2006-03-30 2013-05-21 Kyocera Corporation Circuit board and mounting structure
WO2008126640A1 (en) * 2007-04-09 2008-10-23 Hitachi Chemical Company, Ltd. Printed wiring board and electronic device
JP2008283167A (en) * 2007-04-09 2008-11-20 Hitachi Chem Co Ltd Printed wiring board and electronic apparatus
JP2013127812A (en) * 2008-01-31 2013-06-27 Semiconductor Energy Lab Co Ltd Semiconductor device
JP2012004440A (en) * 2010-06-18 2012-01-05 Shinko Electric Ind Co Ltd Wiring board

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