JP2004119897A5 - - Google Patents

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Publication number
JP2004119897A5
JP2004119897A5 JP2002284447A JP2002284447A JP2004119897A5 JP 2004119897 A5 JP2004119897 A5 JP 2004119897A5 JP 2002284447 A JP2002284447 A JP 2002284447A JP 2002284447 A JP2002284447 A JP 2002284447A JP 2004119897 A5 JP2004119897 A5 JP 2004119897A5
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JP
Japan
Prior art keywords
word line
line
power supply
memory cell
lines
Prior art date
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Pending
Application number
JP2002284447A
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English (en)
Japanese (ja)
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JP2004119897A (ja
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Publication date
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Priority to JP2002284447A priority Critical patent/JP2004119897A/ja
Priority claimed from JP2002284447A external-priority patent/JP2004119897A/ja
Publication of JP2004119897A publication Critical patent/JP2004119897A/ja
Publication of JP2004119897A5 publication Critical patent/JP2004119897A5/ja
Pending legal-status Critical Current

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JP2002284447A 2002-09-27 2002-09-27 半導体記憶装置 Pending JP2004119897A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002284447A JP2004119897A (ja) 2002-09-27 2002-09-27 半導体記憶装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002284447A JP2004119897A (ja) 2002-09-27 2002-09-27 半導体記憶装置

Publications (2)

Publication Number Publication Date
JP2004119897A JP2004119897A (ja) 2004-04-15
JP2004119897A5 true JP2004119897A5 (https=) 2005-09-29

Family

ID=32278009

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002284447A Pending JP2004119897A (ja) 2002-09-27 2002-09-27 半導体記憶装置

Country Status (1)

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JP (1) JP2004119897A (https=)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100527536B1 (ko) * 2003-12-24 2005-11-09 주식회사 하이닉스반도체 마그네틱 램
JP2007311488A (ja) * 2006-05-17 2007-11-29 Toshiba Corp 磁気記憶装置
US8208290B2 (en) * 2009-08-26 2012-06-26 Qualcomm Incorporated System and method to manufacture magnetic random access memory
JP5870634B2 (ja) * 2011-11-09 2016-03-01 凸版印刷株式会社 不揮発性メモリ
US11030372B2 (en) * 2018-10-31 2021-06-08 Taiwan Semiconductor Manufacturing Company Ltd. Method for generating layout diagram including cell having pin patterns and semiconductor device based on same
US11093684B2 (en) 2018-10-31 2021-08-17 Taiwan Semiconductor Manufacturing Company, Ltd. Power rail with non-linear edge
TWI811517B (zh) 2020-01-16 2023-08-11 聯華電子股份有限公司 磁阻式隨機存取記憶體之佈局圖案

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