JP2004088083A - Semiconductor light emitting device, its manufacturing method, and its packaging method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To make heat dissipation good, enhance electrostatic breakdown voltage, and contrive an improvement in emission efficiency and a reduction in series resistance with respect to a semiconductor light emitting device comprising a compound semiconductor, especially a GaN base semiconductor. <P>SOLUTION: A light emitting diode device 10 has a device structure 11 including at least two layers of semiconductor layers possessing different conductive types from each other. On the device structure 11, a p-side electrode 15 comprising an ITO and having translucency is formed, and a bonding pad 16 is formed in a part of region on the p-side electrode 15. On the opposite surface of the p-side electrode 15 in the device structure 11, a n-side electrode 17 comprising Ti/Au is formed. On the other hand, a metal film 18 by gilding of about 50μm in thickness is formed having the Au layer of the n-side electrode 17 as an underlying layer. <P>COPYRIGHT: (C)2004,JPO

Description

【００６９】
［表１］において、公知のように、基板２０上に形成するＧａＮからなるバッファ層は、基板温度を比較的に低温の例えば５５０℃として、基板２０とバッファ層の上に成長するｎ型コンタクト層等のエピタキシャル層との格子不整合を緩和する。なお、ｎ型半導体層１２等のエピタキシャル層の成長時には、基板温度を１０２０℃程度に設定する。また、ｎ型ドーパントには、例えばシラン（ＳｉＨ_４　）を原料とするシリコン（Ｓｉ）を用い、ｐ型ドーパントには、例えばビスシクロペンタジエニルマグネシウム（Ｃｐ_２　Ｍｇ）を原料とするマグネシウム（Ｍｇ）を用いる。
【００７０】
続いて、素子構造体１１の上に、例えばＲＦスパッタ法によりＩＴＯ膜を堆積し、堆積したＩＴＯ膜をパターニングしてｐ側電極１５を形成する。さらに、形成したｐ側電極１５の上に、例えば電子ビーム蒸着法により、Ａｕからなる電極形成膜を蒸着し、蒸着した電極形成膜に対してｐ側電極１５の一部分を覆うようにパターニングを行なって電極形成膜からボンディングパッド１６を形成する。なお、ここでは、電極形成膜の膜厚は５００ｎｍ以上とすることが好ましい。また、ＩＴＯ膜と電極形成膜とのパターニングは同時に行なってもよい。
【００７１】
次に、図２（ｂ）に示すように、ｐ側電極１５及びボンディングパッド１６を含む素子構造体１１の上に、可塑性に優れる膜状の保持部材、例えば厚さが約１００μｍの高分子フィルムからなる保持膜４１を接着する。ここで、保持膜４１には、その保持面に加熱により発泡して接着力が低下する接着剤層を設けた、例えばポリエステルからなる高分子フィルムを用いる。このような保持膜４１を用いることにより、後工程において、保持膜４１を剥離する際に、素子構造体１１上に接着剤層が残ってしまい、電気的な接触不良等が発生するという不具合を防止することができる。続いて、基板２０に対して素子構造体１１の反対側の面から、パルス状に発振する波長が３５５ｎｍであるＹＡＧ（イットリウム、アルミニウム、ガーネット）レーザの第３高調波光を基板２０をスキャンするように照射する。照射されたレーザ光は、基板２０では吸収されず、素子構造体１１、すなわちｎ型半導体層１２で吸収される。このレーザ光の吸収により、ｎ型半導体層１２は局所的に発熱し、該ｎ型半導体層１２はその基板２０との界面において原子同士の結合が切断されて、基板２０とｎ型半導体層１２との間に金属ガリウム（Ｇａ）を含む熱分解層（図示せず）が形成される。すなわち、レーザ光をｎ型半導体層１２に照射することにより、基板２０の上に成長したｎ型半導体層１２は、基板２０との間で原子間の結合が切断されながらも、熱分解層により基板２０と接着された状態となる。なお、照射するレーザ光の光源は、ＹＡＧレーザの第３高調波光に限られず、波長が２４８ｎｍであるＫｒＦエキシマレーザ光を用いてもよい。ここで、ＫｒＦは、エキシマレーザ装置に含まれるクリプトンとフッ素との混合ガスである。さらに、レーザ光源に代えて、波長が３６５ｎｍである水銀ランプの輝線を用いてもよい。水銀ランプの輝線を用いた場合には、光の出力パワーではレーザ光に劣るものの、スポットサイズをレーザ光よりも大きくできるため、基板２０の分離工程における照射時間を短縮することができる。
【００７２】
次に、図２（ｃ）に示すように、塩酸（ＨＣｌ）等を用いたウエットエッチングによって熱分解層を溶融することにより、素子構造体１１から基板２０を分離して除去する。基板２０の分離方法には、光照射による熱分解層を形成しその熱分解層を溶融して行なう方法以外にも、基板２０を化学的機械研磨法により基板を除去する方法がある。
【００７３】
続いて、基板２０を除去された素子構造体１１におけるｎ型半導体層１２の活性層１３の反対側の面上に、例えば電子ビーム蒸着法により、Ｔｉ／Ａｕからなるｎ側電極１７を形成する。続いて、金めっき法により、ｎ側電極１７の上に、該ｎ側電極１７のＡｕ層を下地層として厚さが約５０μｍの金属膜１８を成膜する。
【００７４】
次に、図２（ｄ）に示すように、金属膜１８及びｎ側電極１７における素子構造体１１のチップ分割領域と対応する部分を選択的にエッチングして、ｎ型半導体層１２におけるチップ分割領域を露出する。第１の実施形態においては、基板２０の分離工程、ｎ側電極１７及び金属膜１８の各成膜工程、及び該ｎ側電極１７及び金属膜１８に対するエッチング工程は、素子構造体１１の基板２０の反対側の面上に保持膜４１を設けた状態で行なうため、素子構造体１１の膜厚が例えば５μｍ程度と極めて薄い構成であっても、何ら不具合を生じることなく実施することができる。
【００７５】
次に、図３（ａ）に示すように、保持膜４１に保持された素子構造体１１における金属膜１８からの露出領域（ダイシング領域）をダイシングブレード５０を用いて切断する。このとき、保持膜４１をも同時に切断する。これにより、図３（ｂ）に示すように、ウエハ状態の素子構造体１１から、ｎ側電極１７には比較的厚膜の金属膜１８が設けられ、ｐ側電極１５には保持膜４１が接着された、例えば３００μｍ角の発光ダイオードチップを得る。
【００７６】
次に、図３（ｃ）に示すように、チップ状に分割された保持膜４１の上面をコレット５１により吸着し、鉛（Ｐｂ）及び錫（Ｓｎ）からなる半田材２１によりパッケージ２２の実装位置にボンディングする。
【００７７】
次に、図３（ｄ）に示すように、ボンディングの際にチップを例えば２００℃程度に加熱する。これにより、保持膜４１には加熱されて発泡する接着剤が塗布されており、加熱により保持膜４１の接着剤の接着力が弱まるため、コレット５１によって保持膜４１は素子構造体１１から容易に剥がすことができる。
【００７８】
このように、第１の実施形態においては、加熱により剥離が容易となる保持膜４１を接着した状態でダイスボンディングを行なうため、素子構造体１１の厚さが約５０μｍ程度のチップであっても、ダイスボンディングを容易に且つ確実に行なうことができる。
【００７９】
なお、金属膜１８の少なくとも下部に、例えば融点が約２８０℃の金（Ａｕ）及び錫（Ｓｎ）からなる合金をめっきにより形成すると、半田材２１を用いる必要がなくなる。
【００８０】
以上説明したように、第１の実施形態に係る製造方法によると、高輝度で、放熱性及び静電耐圧に優れ且つ直列抵抗が小さい発光ダイオード素子１０を得ることができる。
【００８１】
（製造方法の一変形例）
第１の実施形態においては、素子構造体１１を作製した後に、レーザ光を照射して基板２０と素子構造体１１との間に金属ガリウムを含む熱分解層を形成したが、これに限られず、以下のような製造方法を用いてもよい。
【００８２】
具体的には、基板２０上にＧａＮ系半導体からなる下地層を成長した後に光照射を行なって、基板２０と下地層との間に熱分解層を形成する。続いて、熱分解層が形成された下地層の上に素子構造体１１を再成長して形成する。
【００８３】
このようにすると、素子構造体１１は、下地層の上に該下地層と基板２０との間に結晶構造を持たない熱分解層が介在した状態で成長するため、ＧａＮ系半導体からなる下地層及び素子構造体１１は、基板２０との熱膨張係数の差の影響を受けにくくなる。その結果、素子構造体１１における結晶性が向上すると共に、クラック及び結晶欠陥等の発生が低減する。
【００８４】
なお、基板２０を下地層から分離して除去するには、下地層に対して再度レーザ光等を照射するか、又は熱分解層を例えばＨＣｌ等によりエッチングしてもよい。
【００８５】
（第２の実施形態）
以下、本発明の第２の実施形態について図面を参照しながら説明する。
【００８６】
図４は本発明の第２の実施形態に係る半導体発光素子であって、青色又は緑色等の短波長発光が可能な発光ダイオード素子の断面構成を示している。図４において、図１に示す構成部材と同一の構成部材には同一の符号を付すことにより説明を省略する。
【００８７】
図４に示すように、第２の実施形態に係る発光ダイオード素子１０は、素子構造体１１を構成するｎ型半導体層１２における活性層１３の反対側（上側）の面上に、チタン（Ｔｉ）とアルミニウム（Ａｌ）との積層体からなり、ボンディングパッドを兼ねるｎ側電極１７Ａが選択的に形成されている。ｐ型半導体層１４における活性層１３の反対側（下側）には、白金（Ｐｔ）と金（Ａｕ）との積層体からなり、活性層１３からの発光光に対する反射率が９０％以上となるように設けられたｐ側電極１５Ａが形成されている。また、ｐ側電極１５Ａにおける外側のＡｕ層を下地層として、厚さが約５０μｍの金めっきされた金属膜１８が形成されている。
【００８８】
第２の実施形態の特徴として、素子構造体１１の周縁部におけるｐ型半導体層１４とｐ側電極１５Ａとの間には、例えば酸化シリコン（ＳｉＯ_２　）からなる電流狭窄膜２３を設けている。これにより、素子構造体１１の側端面を通ってリークするリーク電流を低減できるため、発光素子の発光効率が向上する。
【００８９】
このように、第２の実施形態によると、発光ダイオード素子１０を構成する素子構造体１１の下側に、活性層１３からの発光光に対する反射率が９０％以上となるように設けられた金属からなるｐ側電極１５Ａが形成されている。これにより、活性層１３から出射される発光光はｐ側電極１５Ａにより反射され、ｎ型半導体層１２におけるｎ側電極１７Ａが設けられていない部分を通して取り出されるため、光の取り出し効率を大幅に向上することができる。
【００９０】
その上、ｐ側電極１５Ａにおける素子構造体１１の反対側（下側）の面上には、単結晶からなる基板に代えて金属膜１８を設けているため、活性層１３で生じた熱は金属膜１８を介して外部に放熱される。このように、ＧａＮ系半導体からなる素子構造体１１を成長させる単結晶基板に代えて金属膜１８を設けていることにより、放熱性が格段に向上するため、本実施形態に係る発光ダイオード素子１０の高出力動作が可能となる。また、サファイアのような絶縁性基板を有さないため、静電耐圧性も向上する。
【００９１】
なお、金属膜１８と接するｐ側電極１５Ａは、白金（Ｐｔ）と金（Ａｕ）との積層構造に限られず、金（Ａｕ）、白金（Ｐｔ）、銅（Ｃｕ）、銀（Ａｇ）及びロジウム（Ｒｈ）のうちの少なくとも１つからなる単層膜、又はこれらのうちの２つ以上を含む積層構造としても良い。
【００９２】
以下、前記のように構成された発光ダイオード素子１０の製造方法について図面を参照しながら説明する。
【００９３】
図５（ａ）〜図５（ｃ）乃至図７（ａ）〜図７（ｃ）は本発明の第２の実施形態に係る発光ダイオード素子の製造方法の工程順の断面構成を示している。
【００９４】
まず、図５（ａ）に示すように、第１の実施形態と同様に、ＭＯＣＶＤ法により、ウエハ状のサファイアからなる基板２０の主面上に、ｎ型ＡｌＧａＮからなるｎ型半導体層１２、ＩｎＧａＮからなる活性層１３及びｐ型ＡｌＧａＮからなるｐ型半導体層１４を順次成長することにより、ｎ型半導体層１２、活性層１３及びｐ型半導体層１４を含む素子構造体１１を形成する。
【００９５】
続いて、素子構造体１１、すなわちｐ型半導体層１４の上に、例えば気相堆積（ＣＶＤ）法により、膜厚が約３００ｎｍの酸化シリコンからなる電流狭窄形成膜を堆積する。続いて、堆積した電流狭窄形成膜に対して例えばフッ化水素酸（ＨＦ）を用いたウエットエッチングを行なって、電流狭窄形成膜から素子構造体１１の発光領域を露出する開口部を持つ複数の電流狭窄膜２３を形成する。その後、電子ビーム蒸着法により、各電流狭窄膜２３及びｐ型半導体層１４における電流狭窄膜２３からの露出領域を含む全面にわたって、厚さが約５０ｎｍのＰｔ層と厚さが約２００ｎｍのＡｕ層とからなるｐ側電極１５Ａを形成する。
【００９６】
次に、図５（ｂ）に示すように、金めっき法により、ｐ側電極１５Ａの上に、該ｐ側電極１５ＡのＡｕ層を下地層として厚さが約５０μｍの金属膜１８を成膜する。
【００９７】
次に、図５（ｃ）に示すように、金属膜１８の上に、可塑性に優れる膜状の保持部材、例えば厚さが約１００μｍの高分子フィルムからなる第１の保持膜４２を接着する。ここで、第１の保持膜４２には、その保持面に約１２０℃の加熱により発泡して接着力が低下する接着剤層を設けた、例えばポリエステルからなる高分子フィルムを用いる。続いて、基板２０に対して素子構造体１１の反対側の面から、パルス状に発振する波長が３５５ｎｍであるＹＡＧレーザの第３高調波光を基板２０をスキャンするように照射する。前述したように、照射されたレーザ光は、基板２０では吸収されず、素子構造体１１、すなわちｎ型半導体層１２で吸収される。このレーザ光の吸収により、ｎ型半導体層１２は局所的に発熱し、該ｎ型半導体層１２はその基板２０との界面において原子同士の結合が切断されて、基板２０とｎ型半導体層１２との間に金属ガリウムを含む熱分解層（図示せず）が形成される。なお、照射するレーザ光の光源には、ＹＡＧレーザの第３高調波光に代えて、波長が２４８ｎｍであるＫｒＦエキシマレーザ光を用いてもよい。さらには、レーザ光源に代えて、波長が３６５ｎｍである水銀ランプの輝線を用いてもよい。
【００９８】
次に、図６（ａ）に示すように、塩酸等を用いたウエットエッチングによって熱分解層を溶融することにより、素子構造体１１から基板２０を分離して除去する。続いて、基板２０を除去された素子構造体１１におけるｎ型半導体層１２の活性層１３の反対側の面上に、例えば電子ビーム蒸着法により、膜厚が約５０ｎｍのＴｉと膜厚が約８００ｎｍのＡｌとの積層膜を蒸着し、蒸着した積層膜に対して、素子構造体１１の発光領域を部分的に覆うようにパターニングを行なって、積層膜からボンディングパッドとしても機能するｎ側電極１７Ａを形成する。
【００９９】
次に、図６（ｂ）に示すように、ｎ側電極１７Ａを含めｎ型半導体層１２の上に、例えば厚さが約１００μｍの高分子フィルムからなる第２の保持膜４３を接着する。第２の保持膜４３には、その保持面に約１７０℃の加熱により発泡して接着力が低下する接着剤層を設けた、例えばポリエステルからなる高分子フィルムを用いる。
【０１００】
次に、第１の保持膜４２及び第２の保持膜４３により保持された素子構造体１１を約１２０℃に加熱する。この約１２０℃の加熱により、第１の保持膜４２に設けられた接着剤層が発泡して金属膜１８との間の接着力が低下するため、図６（ｃ）に示すように、第１の保持膜４２は金属膜１８から容易に分離される。このとき、金属膜１８の表面には第１の保持膜４２の接着剤が残るおそれはない。
【０１０１】
次に、図７（ａ）に示すように、金属膜１８における素子構造体１１のチップ分割領域と対応する部分、すなわち電流狭窄膜２３の上側部分を選択的にエッチングして、ｐ側電極１５Ａにおけるチップ分割領域を露出する。第２の実施形態においても、基板２０の分離工程、ｎ側電極１７Ａの各成膜工程は素子構造体１１に第１の保持膜４２を設けた状態で行ない、金属膜１８に対するエッチング工程は、素子構造体１１に第２の保持膜４３を設けた状態で行なうため、素子構造体１１の膜厚が例えば５μｍ程度と極めて薄い構造であっても、何ら不具合を生じることなく実施することができる。
【０１０２】
次に、図７（ｂ）に示すように、第２の保持膜４３に保持されたｐ側電極１５Ａにおける金属膜１８からの露出領域（ダイシング領域）及びその下方をダイシングブレード５０を用いて切断する。これにより、各素子構造体１１は、平面サイズが例えば３００μｍ角の発光ダイオードチップを得る。このとき、第２の保持膜４３に対してはその途中までを切断する。
【０１０３】
次に、図７（ｃ）に示すように、第２の保持膜４３を約１７０℃に加熱することにより、第２の保持膜４３に設けられた接着剤層が発泡して各チップとの間の接着力が低下するため、第２の保持膜４３から各チップが容易に剥離する。その後は、後工程であるダイスボンディング等の組み立て工程で実装される。
【０１０４】
以上説明したように、第２の実施形態に係る製造方法によると、高輝度で、放熱性及び静電耐圧に優れ且つ直列抵抗が小さい発光ダイオード素子１０を得ることができる。
【０１０５】
（第２の実施形態の一変形例）
以下、本発明の第２の実施形態の一変形例について図面を参照しながら説明する。
【０１０６】
図８（ａ）〜図８（ｃ）は本発明の第２の実施形態の一変形例に係る発光ダイオード素子であって、図８（ａ）は断面構成を示し、図８（ｂ）はチップ表面の走査型電子顕微鏡（Ｓｃａｎｎｉｎｇ　Ｅｌｅｃｔｒｏｎ　Ｍｉｃｒｏｓｃｐｅ：ＳＥＭ）による顕微鏡写真を示し、図８（ｃ）は発光状態にあるチップ表面の写真を示している。また、図８（ａ）において、図４に示す構成部材と同一の構成部材には同一の符号を付すことにより説明を省略する。
【０１０７】
本変形例は試作例であって、図８（ａ）に示すように、素子構造体１１のｎ型半導体層１２Ａにはｎ型ＧａＮを用い、活性層１３ＡにはＩｎＧａＮからなる多重量子井戸構造を用い、ｐ型半導体層１４Ａにはｐ型ＧａＮを用いている。ここで、チップの平面サイズは３００μｍ角である。
【０１０８】
ｎ型半導体層１２Ａの上には、発光領域の中央部分にＴｉ／Ａｕの積層体からなるｎ側電極１７が設けられている。ｐ側電極１５ＢにはＰｔを用い、該ｐ側電極１５Ｂの素子構造体１１の反対側の面上には、Ｔｉ／Ａｕからなるめっき下地層２４を設けている。
【０１０９】
図９に本変形例に係る発光ダイオード素子１０の発光スペクトルの測定結果を示す。図９のグラフに示すように、動作電流を増加させるにつれて、活性層１３Ａに対して垂直な方向に共振するいわゆる垂直共振器作用による複数のピークが現われる。
【０１１０】
（第３の実施形態）
以下、本発明の第３の実施形態について図面を参照しながら説明する。
【０１１１】
図１０は本発明の第３の実施形態に係る半導体発光素子であって、青色又は緑色等の短波長発光が可能な発光ダイオード素子の断面構成を示している。図１０において、図４に示す構成部材と同一の構成部材には同一の符号を付すことにより説明を省略する。
【０１１２】
第３の実施形態に係る発光ダイオード素子を構成する素子構造体１１は、ｎ型半導体層１２における活性層１３の反対側の面上に、例えばＩＴＯからなり透光性を有するｎ側電極１７Ｂが設けられ、該ｎ側電極１７Ｂ上の一部の領域にはＡｕからなるボンディングパッド１６が形成されている。
【０１１３】
ここで、活性層１３は例えば量子井戸構造を有していても良い。活性層１３において生成された例えば波長が４７０ｎｍの青色発光光は、Ｐｔ／Ａｕからなるｐ側電極１５Ａにより反射され、ＩＴＯからなるｎ側電極１７Ｂを透過して外部に取り出される。
【０１１４】
このように、第３の実施形態によると、発光ダイオード素子１０を構成する素子構造体１１の下側に、活性層１３からの発光光に対する反射率が９０％以上となるように設けられた金属からなるｐ側電極１５Ａが形成されている。これにより、活性層１３から出射される発光光はｐ側電極１５Ａにより反射され、ｎ型半導体層１２に設けられた透光性を持つｎ側電極１７Ｂを通して取り出されるため、光の取り出し効率を大幅に向上することができる。
【０１１５】
その上、ｐ側電極１５Ａにおける素子構造体１１の反対側（下側）の面上には、単結晶からなる基板に代えて金属膜１８を設けているため、活性層１３で生じた熱は金属膜１８を介して外部に放熱される。このように、ＧａＮ系半導体からなる素子構造体１１を成長させる単結晶基板に代えて金属膜１８を設けていることにより、放熱性が格段に向上するため、本実施形態に係る発光ダイオード素子１０の高出力動作が可能となる。また、サファイアのような絶縁性基板を有さないため、静電耐圧性も向上する。
【０１１６】
以下、前記のように構成された発光ダイオード素子１０の製造方法について図面を参照しながら説明する。
【０１１７】
図１１（ａ）〜図１１（ｃ）乃至図１３（ａ）〜図１３（ｃ）は本発明の第３の実施形態に係る発光ダイオード素子の製造方法の工程順の断面構成を示している。
【０１１８】
まず、図１１（ａ）に示すように、ＭＯＣＶＤ法により、ウエハ状のサファイアからなる基板２０の主面上に、ｎ型ＡｌＧａＮからなるｎ型半導体層１２、ＩｎＧａＮからなる活性層１３及びｐ型ＡｌＧａＮからなるｐ型半導体層１４を順次成長することにより、ｎ型半導体層１２、活性層１３及びｐ型半導体層１４を含む素子構造体１１を形成する。
【０１１９】
次に、図１１（ｂ）に示すように、素子構造体の１１のｐ型半導体層１４の上に、例えば厚さが約１００μｍの高分子フィルムからなる第１の保持膜４２を接着する。ここで、第１の保持膜４２には、その保持面に約１２０℃の加熱により発泡して接着力が低下する接着剤層を設けた、例えばポリエステルからなる高分子フィルムを用いる。続いて、基板２０に対して素子構造体１１の反対側の面から、パルス状に発振する波長が３５５ｎｍであるＹＡＧレーザの第３高調波光を基板２０をスキャンするように照射する。前述したように、照射されたレーザ光は、基板２０では吸収されず、素子構造体１１、すなわちｎ型半導体層１２で吸収される。このレーザ光の吸収により、ｎ型半導体層１２は局所的に発熱し、該ｎ型半導体層１２はその基板２０との界面において原子同士の結合が切断されて、基板２０とｎ型半導体層１２との間に金属ガリウムを含む熱分解層（図示せず）が形成される。なお、照射するレーザ光の光源には、ＹＡＧレーザの第３高調波光に代えて、波長が２４８ｎｍであるＫｒＦエキシマレーザ光を用いてもよい。さらには、レーザ光源に代えて、波長が３６５ｎｍである水銀ランプの輝線を用いてもよい。
【０１２０】
次に、図１１（ｃ）に示すように、塩酸等を用いたウエットエッチングによって熱分解層を溶融することにより、素子構造体１１から基板２０を分離して除去する。続いて、基板２０を除去された素子構造体１１におけるｎ型半導体層１２の活性層１３の反対側の面上に、例えばＲＦスパッタ法によりＩＴＯ膜を堆積し、堆積したＩＴＯ膜をパターニングしてｎ側電極１７Ｂを形成する。さらに、形成したｎ側電極１７Ｂの上に、例えば電子ビーム蒸着法により、Ａｕからなる電極形成膜を蒸着し、蒸着した電極形成膜に対してｎ側電極１７Ｂ上の一部分を覆うようにパターニングを行なって、電極形成膜からボンディングパッド１６を形成する。なお、電極形成膜の膜厚は５００ｎｍ以上とすることが好ましい。また、ＩＴＯ膜と電極形成膜とのパターニングは同時に行なってもよい。
【０１２１】
次に、図１２（ａ）に示すように、ボンディングパッド１６及びｎ側電極１７Ｂを含むｎ型半導体層１２の上に、例えば厚さが約１００μｍの高分子フィルムからなる第２の保持膜４３を接着する。第２の保持膜４３には、その保持面に約１７０℃の加熱により発泡して接着力が低下する接着剤層を設けた、例えばポリエステルからなる高分子フィルムを用いる。
【０１２２】
次に、第１の保持膜４２及び第２の保持膜４３により保持された素子構造体１１を約１２０℃に加熱する。この約１２０℃の加熱により、第１の保持膜４２に設けられた接着剤層が発泡して素子構造体１１のｐ型半導体層１４との間の接着力が低下するため、図１２（ｂ）に示すように、第１の保持膜４２はｐ型半導体層１４から容易に分離される。このとき、ｐ型半導体層１４の表面には第１の保持膜４２の接着剤が残るおそれはない。
【０１２３】
次に、図１２（ｃ）に示すように、電子ビーム蒸着法により、ｐ型半導体層１４の上に全面にわたって、厚さが約５０ｎｍのＰｔ層と厚さが約２００ｎｍのＡｕ層とからなるｐ側電極１５Ａを形成する。続いて、金めっき法により、ｐ側電極１５Ａの上に、該ｐ側電極１５ＡのＡｕ層を下地層として厚さが約５０μｍの金属膜１８を成膜する。
【０１２４】
次に、図１３（ａ）に示すように、金属膜１８における素子構造体１１のチップ分割領域と対応する部分を選択的にエッチングして、ｐ側電極１５Ａにおけるチップ分割領域を露出する。第３の実施形態においても、基板２０の分離工程、ｎ側電極１７Ｂ及びボンディングパッド１６の各成膜工程は素子構造体１１に第１の保持膜４２を設けた状態で行ない、ｐ側電極１５Ａ、金属膜１８の各成膜工程及び金属膜１８に対するエッチング工程は、素子構造体１１に第２の保持膜４３を設けた状態で行なうため、素子構造体１１の膜厚が例えば５μｍ程度と極めて薄い構造であっても、何ら不具合を生じることなく実施することができる。
【０１２５】
次に、図１３（ｂ）に示すように、第２の保持膜４３に保持されたｐ側電極１５Ａにおける金属膜１８からの露出領域（ダイシング領域）及びその下方をダイシングブレード５０を用いて切断する。これにより、各素子構造体１１は、平面サイズが例えば３００μｍ角の発光ダイオードチップを得る。このとき、第２の保持膜４３に対してはその途中までを切断する。
【０１２６】
次に、図１３（ｃ）に示すように、第２の保持膜４３を約１７０℃に加熱することにより、第２の保持膜４３に設けられた接着剤層が発泡して各チップとの間の接着力が低下するため、第２の保持膜４３から各チップが容易に剥離する。その後は、後工程であるダイスボンディング等の組み立て工程で実装される。
【０１２７】
以上説明したように、第３の実施形態に係る製造方法によると、高輝度で、放熱性及び静電耐圧に優れ且つ直列抵抗が小さい発光ダイオード素子１０を得ることができる。
【０１２８】
（第４の実施形態）
以下、本発明の第４の実施形態について図面を参照しながら説明する。
【０１２９】
図１４は本発明の第４の実施形態に係る半導体発光素子であって、青色又は緑色等の短波長発光が可能な発光ダイオード素子の断面構成を示している。図１４において、図１０に示す構成部材と同一の構成部材には同一の符号を付すことにより説明を省略する。
【０１３０】
図１４に示すように、第４の実施形態は、素子構造体１１におけるｐ型半導体層１４とｐ側電極１５Ａとの間に、それぞれが、例えば酸化シリコン（ＳｉＯ_２　）からなる第１誘電体層と酸化シリコンよりも屈折率が大きい酸化タンタル（Ｔａ_２Ｏ_５）からなる第２誘電体層とが交互に積層されてなる複数のミラー構造体２５が互いに間隔をおいて形成されていることを特徴とする。
【０１３１】
各ミラー構造体２５は、第１誘電体層の厚さを８０ｎｍとし、第２誘電体層の厚さを５３ｎｍとし、これら第１誘電体層及び第２誘電体層を１周期としてその１０周期分が積層されている。ここで、各誘電体層の厚さは、発光波長を４７０ｎｍとし、光学波長をλとしたときに、そのλ／４が反射率の最大となるように設計されている。
【０１３２】
ここで、活性層１３は例えば量子井戸構造を有していても良い。活性層１３において生成された例えば波長が４７０ｎｍの青色発光光は、Ｐｔ／Ａｕからなるｐ側電極１５Ａ及び各ミラー構造体２５により反射され、ＩＴＯからなるｎ側電極１７Ｂを透過して外部に取り出される。
【０１３３】
このように、第４の実施形態によると、発光ダイオード素子１０を構成する素子構造体１１の下側に、活性層１３からの発光光に対する反射率が９０％以上となるように設けられた金属からなるｐ側電極１５Ａと、該発光光に対する反射率が９０％以上の高反射率を有する誘電体からなるミラー構造体２５が形成されている。これにより、活性層１３から出射される発光光はｐ側電極１５Ａ及びミラー構造体２５により反射され、ｎ型半導体層１２に設けられた透光性を持つｎ側電極１７Ｂを通して取り出されるため、光の取り出し効率を大幅に向上することができる。
【０１３４】
その上、ｐ側電極１５Ａにおける素子構造体１１の反対側（下側）の面上には、単結晶からなる基板に代えて金属膜１８を設けているため、活性層１３で生じた熱は金属膜１８を介して外部に放熱される。このように、ＧａＮ系半導体からなる素子構造体１１を成長させる単結晶基板に代えて金属膜１８を設けていることにより、放熱性が格段に向上するため、本実施形態に係る発光ダイオード素子１０の高出力動作が可能となる。また、サファイアのような絶縁性基板を有さないため、静電耐圧性も向上する。
【０１３５】
なお、第４の実施形態においては、ミラー構造体２５に積層した誘電体膜を用いたが、これに限られず、例えばエピタキシャル成長したＧａＮ系半導体からなる積層膜を用い、互いに隣接する膜同士のアルミニウム（Ａｌ）やインジウム（Ｉｎ）の組成を変えて、互いに屈折率差を生じさせることにより、活性層１３からの発光光を高い反射率で反射する構成としても良い。
【０１３６】
以下、前記のように構成された発光ダイオード素子１０の製造方法について図面を参照しながら説明する。
【０１３７】
図１５（ａ）〜図１５（ｃ）乃至図１７（ａ）〜図１７（ｃ）は本発明の第４の実施形態に係る発光ダイオード素子の製造方法の工程順の断面構成を示している。
【０１３８】
まず、図１５（ａ）に示すように、ＭＯＣＶＤ法により、ウエハ状のサファイアからなる基板２０の主面上に、ｎ型ＡｌＧａＮからなるｎ型半導体層１２、ＩｎＧａＮからなる活性層１３及びｐ型ＡｌＧａＮからなるｐ型半導体層１４を順次成長することにより、ｎ型半導体層１２、活性層１３及びｐ型半導体層１４を含む素子構造体１１を形成する。
【０１３９】
続いて、素子構造体１１、すなわちｐ型半導体層１４の上に、例えばＲＦスパッタ法により、厚さが８０ｎｍのＳｉＯ_２　からなる第１誘電体層と厚さが５３ｎｍのＴａ_２Ｏ_５からなる第２誘電体層とを１周期とし、その１０周期分からなる誘電体積層膜を堆積する。続いて、堆積した誘電体積層膜に対して例えばフッ化水素酸（ＨＦ）を用いたウエットエッチングを行なうことにより、誘電体積層膜から互いに間隔をおいた複数のミラー構造体２５を形成する。その後、電子ビーム蒸着法により、各ミラー構造体２５及びｐ型半導体層１４におけるミラー構造体２５からの露出領域を含む全面にわたって、厚さが約５０ｎｍのＰｔ層と厚さが約２００ｎｍのＡｕ層とからなるｐ側電極１５Ａを形成する。
【０１４０】
次に、図１５（ｂ）に示すように、金めっき法により、ｐ側電極１５Ａの上に、該ｐ側電極１５ＡのＡｕ層を下地層として厚さが約５０μｍの金属膜１８を成膜する。
【０１４１】
次に、図１５（ｃ）に示すように、金属膜１８の上に、例えば厚さが約１００μｍの高分子フィルムからなる第１の保持膜４２を接着する。ここで、第１の保持膜４２には、その保持面に約１２０℃の加熱により発泡して接着力が低下する接着剤層を設けた、例えばポリエステルからなる高分子フィルムを用いる。続いて、基板２０に対して素子構造体１１の反対側の面から、パルス状に発振する波長が３５５ｎｍであるＹＡＧレーザの第３高調波光を基板２０をスキャンするように照射する。前述したように、照射されたレーザ光は、基板２０では吸収されず、素子構造体１１、すなわちｎ型半導体層１２で吸収される。このレーザ光の吸収により、ｎ型半導体層１２は局所的に発熱し、該ｎ型半導体層１２はその基板２０との界面において原子同士の結合が切断されて、基板２０とｎ型半導体層１２との間に金属ガリウムを含む熱分解層（図示せず）が形成される。なお、照射するレーザ光の光源には、ＹＡＧレーザの第３高調波光に代えて、波長が２４８ｎｍであるＫｒＦエキシマレーザ光を用いてもよい。さらには、レーザ光源に代えて、波長が３６５ｎｍである水銀ランプの輝線を用いてもよい。
【０１４２】
次に、図１６（ａ）に示すように、塩酸等を用いたウエットエッチングによって熱分解層を溶融することにより、素子構造体１１から基板２０を分離して除去する。続いて、基板２０を除去された素子構造体１１におけるｎ型半導体層１２の活性層１３の反対側の面上に、例えばＲＦスパッタ法によりＩＴＯ膜を堆積し、堆積したＩＴＯ膜をパターニングしてｎ側電極１７Ｂを形成する。さらに、形成したｎ側電極１７Ｂの上に、例えば電子ビーム蒸着法により、Ａｕからなる電極形成膜を蒸着し、蒸着した電極形成膜に対してｎ側電極１７Ｂ上の一部分を覆うようにパターニングを行なって、電極形成膜からボンディングパッド１６を形成する。なお、電極形成膜の膜厚は５００ｎｍ以上、例えば約８００ｎｍとすることにより、ボンディングパッド１６にワイヤボンディングが確実に実施されるようにする。また、ＩＴＯ膜と電極形成膜とのパターニングは同時に行なってもよい。
【０１４３】
次に、図１６（ｂ）に示すように、ボンディングパッド１６及びｎ側電極１７Ｂを含めｎ型半導体層１２の上に、例えば厚さが約１００μｍの高分子フィルムからなる第２の保持膜４３を接着する。第２の保持膜４３には、その保持面に約１７０℃の加熱により発泡して接着力が低下する接着剤層を設けた、例えばポリエステルからなる高分子フィルムを用いる。
【０１４４】
次に、第１の保持膜４２及び第２の保持膜４３により保持された素子構造体１１を約１２０℃に加熱する。この約１２０℃の加熱により、第１の保持膜４２に設けられた接着剤層が発泡して金属膜１８との間の接着力が低下するため、図１６（ｃ）に示すように、第１の保持膜４２は金属層１８から容易に分離される。このとき、金属層１８の表面には第１の保持膜４２の接着剤が残るおそれはない。
【０１４５】
次に、図１７（ａ）に示すように、金属膜１８における素子構造体１１のチップ分割領域と対応する部分を選択的にエッチングして、ｐ側電極１５Ａにおけるチップ分割領域を露出する。第４の実施形態においても、基板２０の分離工程、ｎ側電極１７Ｂ及びボンディングパッド１６の各成膜工程は素子構造体１１に第１の保持膜４２を設けた状態で行ない、ｐ側電極１５Ａ、金属膜１８の各成膜工程及び金属膜１８に対するエッチング工程は、素子構造体１１に第２の保持膜４３を設けた状態で行なうため、素子構造体１１の膜厚が例えば５μｍ程度と極めて薄い構造であっても、何ら不具合を生じることなく実施することができる。
【０１４６】
次に、図１７（ｂ）に示すように、第２の保持膜４３に保持されたｐ側電極１５Ａにおける金属膜１８からの露出領域（ダイシング領域）及びその下方をダイシングブレード５０を用いて切断する。これにより、各素子構造体１１は、平面サイズが例えば３００μｍ角の発光ダイオードチップを得る。このとき、第２の保持膜４３に対してはその途中までを切断する。
【０１４７】
次に、図１７（ｃ）に示すように、第２の保持膜４３を約１７０℃に加熱することにより、第２の保持膜４３に設けられた接着剤層が発泡して各チップとの間の接着力が低下するため、第２の保持膜４３から各チップが容易に剥離する。その後は、後工程であるダイスボンディング等の組み立て工程で実装される。
【０１４８】
以上説明したように、第４の実施形態に係る製造方法によると、高輝度で、放熱性及び静電耐圧に優れ且つ直列抵抗が小さい発光ダイオード素子１０を得ることができる。
【０１４９】
なお、ミラー構造体２５は、酸化シリコン（ＳｉＯ_２　）と酸化タンタル（Ｔａ_２Ｏ_５）との積層構造に限られず、第２誘電体層を構成する高屈折率材料である酸化タンタルに代えて、酸化チタン（ＴｉＯ_２　）、酸化ニオブ（Ｎｂ_２Ｏ_５）又は酸化ハフニウム（ＨｆＯ_２　）を用いてもよい。
【０１５０】
また、誘電体からなる積層膜に代えて、窒化アルミニウムガリウムインジウム（Ａｌ_ｘＧａ_ｙＩｎ_{１−ｘ−ｙ}　Ｎ）（但し、０≦ｘ、ｙ≦１、０≦ｘ＋ｙ≦１である。）の組成を代えることにより高反射率を有するミラー構造を形成する場合には、図１５（ａ）に示す素子構造体１１の結晶成長に連続してエピタキシャル成長により成膜できるため、誘電体を成膜する成膜装置を用いる必要がなくなる。なお、成膜した半導体膜から複数のミラー構造体２５を得るパターニング工程には、例えば塩素（Ｃｌ_２　）ガスを用いた反応性イオンエッチング（Ｒｅａｃｔｉｖｅ　Ｉｏｎ　Ｅｔｃｈｉｎｇ：ＲＩＥ）法を用いれば良い。
【０１５１】
なお、第１〜第４の実施形態において、基板２０の主面の面方位は特に限定されず、例えばサファイアの場合には、典型的な（０００１）面や、さらには典型的な面からわずかにずれた面方位（オフオリエンテーション）を持たせてもよい。
【０１５２】
また、基板２０上に成長する素子構造体１１の結晶成長法は、ＭＯＣＶＤ法に限られず、例えば、分子線エピタキシャル成長（ＭＢＥ）法又はハイドライド気相成長（ＨＶＰＥ）法でもよい。また、これらの３つの成長法を各半導体層に応じて適宜使い分けてもよい。
【０１５３】
また、ＧａＮ系半導体からなる素子構造体１１は、照射光を吸収する層が素子構造体１１に含まれていれば良く、必ずしも照射光を吸収する層が基板２０と接している必要はない。また、照射光を吸収する半導体層の組成は、例えばＡｌＧａＮ又はＩｎＧａＮ等の任意の組成を持つＩＩＩ−Ｖ族窒化物半導体であればよい。
【０１５４】
また、基板２０と素子構造体１１との間に、ＩｎＧａＮ又はＺｎＯのように、ＧａＮよりも禁制帯幅が小さい光吸収層を設けてもよい。このようにすると、照射光の吸収が光吸収層により促進されるため、低出力の照射光でも光吸収層が分解される。
【０１５５】
また、レーザ光等は、基板２０を保持膜４１等の接着力が低下しない程度に加熱しながら照射してもよい。このようにすると、基板２０と素子構造体１１との間の熱膨張係数の差によるストレスを緩和しながら素子構造体１１の半導体層を熱分解できるため、素子構造体１１に発生するクラックを防止することができる。
【０１５６】
さらには、光照射工程の前か後に、素子構造体１１の上に基板２０及び素子構造体１１との扱いを容易とするように、高分子材料フィルムに代えて、例えばシリコン（Ｓｉ）、ヒ化ガリウム（ＧａＡｓ）、リン化インジウム（ＩｎＰ）、リン化ガリウム（ＧａＰ）等の半導体からなる保持基板、又は銅（Ｃｕ）等の金属からなる保持基板を貼り合わせ、さらには除去してもよい。
【０１５７】
また、第２〜第４の実施形態においても、第１の実施形態の一変形例と同様に、基板２０と下地層との間に熱分解層を形成した後に、素子構造体１１を再成長してもよい。
【０１５８】
また、第１、第３及び第４の実施形態においても、第２の実施形態と同様に、チップの周縁部に電流狭窄膜を設けても良い。
【０１５９】
【発明の効果】
本発明に係る半導体発光素子及びその製造方法によると、素子構造を含む半導体積層膜が成長した基板を除去し、代わりに、比較的に厚膜の金属膜を設けるため、基板が残された状態と比べて該基板による発光光の吸収を抑制できる。その結果、半導体積層膜における金属膜の反対側の面からより多くの発光光を取り出すことが可能となる。また、基板を除去して金属膜を設けるため、直列抵抗を低減できる上に、放熱性が大幅に改善され且つ静電耐圧が大きくなる。
【０１６０】
本発明に係る半導体発光素子の実装方法によると、半導体積層膜の膜厚が例えば数μｍ以下と極めて小さい場合でも、膜状の保持部材を半導体積層膜に貼った状態でダイスボンディングを行なえるため、極めて薄い半導体発光素子を実装することが可能となる。
【図面の簡単な説明】
【図１】本発明の第１の実施形態に係る半導体発光素子を示す構成断面図である。
【図２】（ａ）〜（ｄ）は本発明の第１の実施形態に係る半導体発光素子の製造方法を示す工程順の構成断面図である。
【図３】（ａ）〜（ｄ）は本発明の第１の実施形態に係る半導体発光素子の製造方法を示す工程順の構成断面図である。
【図４】本発明の第２の実施形態に係る半導体発光素子を示す構成断面図である。
【図５】（ａ）〜（ｃ）は本発明の第２の実施形態に係る半導体発光素子の製造方法を示す工程順の構成断面図である。
【図６】（ａ）〜（ｃ）は本発明の第２の実施形態に係る半導体発光素子の製造方法を示す工程順の構成断面図である。
【図７】（ａ）〜（ｃ）は本発明の第２の実施形態に係る半導体発光素子の製造方法を示す工程順の構成断面図である。
【図８】（ａ）〜（ｃ）は本発明の第２の実施形態の一変形例に係る半導体発光素子を示し、（ａ）は構成断面図であり、（ｂ）はＳＥＭによるチップ表面の顕微鏡写真であり、（ｃ）は発光状態にあるチップ表面の写真である。
【図９】本発明の第２の実施形態の一変形例に係る半導体発光素子の発光スペクトルを示すグラフである。
【図１０】本発明の第３の実施形態に係る半導体発光素子を示す構成断面図である。
【図１１】（ａ）〜（ｃ）は本発明の第３の実施形態に係る半導体発光素子の製造方法を示す工程順の構成断面図である。
【図１２】（ａ）〜（ｃ）は本発明の第３の実施形態に係る半導体発光素子の製造方法を示す工程順の構成断面図である。
【図１３】（ａ）〜（ｃ）は本発明の第３の実施形態に係る半導体発光素子の製造方法を示す工程順の構成断面図である。
【図１４】本発明の第４の実施形態に係る半導体発光素子を示す構成断面図である。
【図１５】（ａ）〜（ｃ）は本発明の第４の実施形態に係る半導体発光素子の製造方法を示す工程順の構成断面図である。
【図１６】（ａ）〜（ｃ）は本発明の第４の実施形態に係る半導体発光素子の製造方法を示す工程順の構成断面図である。
【図１７】（ａ）〜（ｃ）は本発明の第４の実施形態に係る半導体発光素子の製造方法を示す工程順の構成断面図である。
【図１８】第１の従来例に係る発光ダイオード素子を示す構成断面図である。
【図１９】第２の従来例に係る発光ダイオード素子を示す構成断面図である。
【符号の説明】
１０　　　発光ダイオード素子
１１　　　素子構造体（半導体積層膜）
１２　　　ｎ型半導体層
１２Ａ　　ｎ型半導体層
１３　　　活性層
１３Ａ　　活性層
１４　　　ｐ型半導体層
１４Ａ　　ｐ型半導体層
１５　　　ｐ側電極（ＩＴＯ）
１５Ａ　　ｐ側電極（Ｐｔ／Ａｕ）
１５Ｂ　　ｐ側電極（Ｐｔ）
１６　　　ボンディングパッド
１７　　　ｎ側電極（Ｔｉ／Ａｕ）
１７Ａ　　ｎ側電極（Ｔｉ／Ａｌ）
１７Ｂ　　ｎ側電極（ＩＴＯ）
１８　　　金属膜
２０　　　基板
２１　　　半田材
２２　　　パッケージ
２３　　　電流狭窄膜
２４　　　めっき下地層
２５　　　ミラー構造体
４１　　　保持膜
４２　　　第１の保持膜
４３　　　第３の保持膜
５０　　　ダイシングブレード
５１　　　コレット[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor light emitting device such as a short wavelength light emitting diode device, a method for manufacturing the same, and a method for mounting the same.
[0002]
[Prior art]
General formula is B _z Al _x Ga _1-xyz In _y N _1-vw As _v P _w (Where x, y, z, v, w are 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, 0 ≦ x + y + z ≦ 1, 0 ≦ v ≦ 1, 0 ≦ w ≦ 1, A group III-V nitride semiconductor (generally represented by BAlGaInNAsP, hereinafter referred to as a GaN-based semiconductor) represented by 0 ≦ v + w ≦ 1 is, for example, gallium nitride (GaN) at room temperature. Since the forbidden band has a relatively wide forbidden band of 3.4 eV, the light emitting device such as a visible light emitting diode element or a short wavelength semiconductor laser element for outputting blue light or green light, or under a high temperature. A wide variety of applications are expected, such as transistors that can operate at high speeds and large power transistors that can operate at high speed. As the light emitting device, a light emitting diode element and a semiconductor laser element have been commercialized. Above all, light emitting diode elements have been put to practical use in various display devices that output blue light or green light, large display devices, and traffic signals. Research and development of white light-emitting diode elements, which emit light when a fluorescent material is excited, are being actively pursued to increase the luminance and improve the luminous efficiency in order to realize so-called semiconductor lighting, which replaces existing fluorescent and incandescent lamps. It is being advanced.
[0003]
Heretofore, GaN-based semiconductors have been difficult to grow by the crystal growth method, like other wide-gap semiconductors. Recently, however, metal-organic chemical vapor deposition (MOCVD) methods have been used mainly for metal organic chemical vapor deposition (MOCVD). Since the crystal growth technology has greatly advanced, the above-mentioned light emitting diode element has been put to practical use.
[0004]
By the way, it is not easy to manufacture a substrate made of gallium nitride (GaN) as a substrate for growing a crystal growth layer (epitaxial layer). Therefore, a substrate such as silicon (Si) or gallium arsenide (GaAs) is used. In general, heteroepitaxial growth using a material different from that of the epitaxial layer for the substrate is performed because the manufacturing process itself cannot be performed and the epitaxial layer on the substrate cannot be grown on the substrate made of the same material.
[0005]
A GaN-based semiconductor grown on sapphire as a substrate has been most widely used and has exhibited the best device characteristics. Sapphire has the same hexagonal crystal structure as a GaN-based semiconductor and is extremely thermally stable, and thus is suitable for crystal growth of a GaN-based semiconductor requiring a high temperature of 1000 ° C. or higher. Therefore, conventionally, for a GaN-based semiconductor layer grown on a substrate mainly composed of sapphire, an attempt has been made to increase the luminance of the light-emitting diode element and to improve the luminous efficiency. For example, in order to achieve high brightness, two points are to improve internal quantum efficiency by improving crystallinity of a GaN-based semiconductor and suppressing non-radiative recombination, and to improve light extraction efficiency. is important.
[0006]
As described above, as a result of the recent remarkable progress of crystal growth technology, the improvement of internal quantum efficiency is approaching its limit. Therefore, improvement of light extraction efficiency has recently become an important issue.
[0007]
Hereinafter, two conventional techniques for improving the light extraction efficiency will be described with reference to the drawings.
[0008]
(First conventional example)
As shown in FIG. 18, a light emitting diode element according to a first conventional example is configured such that an n-type semiconductor layer 102 made of n-type AlGaN and an active layer 103 and a p-type semiconductor layer 104 made of p-type AlGaN are sequentially grown. Subsequently, a part of the n-type semiconductor layer 102 is selectively exposed by dry etching, and an n-side electrode 106 made of Ti / Al is formed on the exposed n-type semiconductor layer 102. A transparent p-side electrode 107 made of Ni / Au having a thickness of about 10 nm or less is formed on the p-type semiconductor layer 104, and a part of the transparent p-side electrode 107 is made of Al. A bonding pad 108 is formed (see Patent Document 1).
[0009]
As described above, the light emitting diode element according to the first conventional example uses the transparent p-side electrode 107, so that most of blue light having a wavelength of 470 nm emitted from the active layer 103 is mostly transparent p-side. Since the light passes through the electrode 107 and is extracted to the outside, high-luminance light emission is possible. Even so, light emitted to the substrate 101 side is not sufficiently extracted, and there is a limit in improving the light emission efficiency.
[0010]
(Second conventional example)
As shown in FIG. 19, the light-emitting diode element according to the second conventional example is so-called flip-chip mounting in which the p-type semiconductor layer 104 is mounted on the upper surface of a submount 113 with a protection diode so as to face the sapphire. The emitted light is extracted through a substrate 101 made of (see Patent Document 2). Here, a p-side electrode 110 made of Ni is formed on a surface of the p-type semiconductor layer 104 facing the submount 113, and between the p-side electrode 110 and the submount 113, and between the n-side electrode 106. A bump 111 made of Ag is formed between the submount 113 and the submount 113. Here, since the substrate 101 made of sapphire is an insulating material, the electrostatic breakdown voltage is small. Therefore, a submount 113 with a protection diode is used so that a surge current does not flow through the chip when a surge voltage is applied.
[0011]
Further, since the Ag forming the bump 111 has a high reflectivity to blue light, the electrode structure having the high reflectivity and the flip-chip mounting allow the blue light emitted from the active layer 103 to have a wavelength of, for example, 470 nm. After most of the light is reflected by the bumps 111, the light is transmitted through the substrate 101 and taken out. Therefore, high-luminance light emission is possible. Further, since the submount 113 with the protection diode is used, the electrostatic withstand voltage is large.
[0012]
[Patent Document 1]
JP-A-07-94782
[Patent Document 2]
JP-A-11-191641
[Patent Document 3]
JP 2001-274507 A
[Patent Document 4]
JP 2001-313422 A
[0013]
[Problems to be solved by the invention]
However, the light emitting diode elements according to the first conventional example and the second conventional example are both formed on a substrate 101 made of sapphire, and sapphire has relatively low thermal conductivity and low heat dissipation. Inferior, there is a problem that the limit point of the high output operation is low.
[0014]
In addition, since sapphire is insulative and has a low electrostatic withstand voltage, there is a problem that mounting cost is increased, for example, it is necessary to provide a protection diode element for surge suppression as in the second conventional example.
[0015]
Further, since the substrate 101 has no conductivity, only the configuration in which the n-side electrode and the p-side electrode are formed on the same surface (upper surface) side with respect to the substrate 101 can be adopted. They cannot be provided so as to face each other. As a result, there is a problem in that the series resistance increases as a diode element, and the operating voltage increases.
[0016]
In view of the above-mentioned conventional problems, the present invention provides a semiconductor light emitting device made of a compound semiconductor, particularly a GaN-based semiconductor, which has improved heat dissipation and an increased electrostatic withstand voltage, further improved luminous efficiency and improved series resistance. It is intended to reduce the amount.
[0017]
[Means for Solving the Problems]
In order to achieve the above object, the present invention provides a semiconductor light emitting device, in which a counter electrode facing each other is formed on a front surface and a back surface of a semiconductor laminated film made of a compound semiconductor including an active layer, and a comparative electrode is formed on one of the counter electrodes. A structure in which a thick metal film is provided is adopted. Further, a material having a high reflectance for light emitted from the active layer is selected as one electrode material in contact with the metal film of the counter electrode, and a translucent material is selected as the other electrode material or a planar material thereof is selected. Keep dimensions as small as possible.
[0018]
Specifically, the semiconductor light emitting device according to the present invention includes a semiconductor laminated film including at least two semiconductor layers having different conductivity types, a first electrode formed on one surface of the semiconductor laminated film, A second electrode formed on a surface facing the one surface of the semiconductor multilayer film and a second electrode formed to be in contact with the first electrode or the second electrode, and having a thickness greater than or equal to the thickness of the semiconductor multilayer film; A metal film having a thickness.
[0019]
According to the semiconductor light emitting device of the present invention, the substrate on which the semiconductor laminated film including at least two semiconductor layers having different conductivity types is grown is removed, and instead, a film thickness larger or equal to the film thickness of the semiconductor laminated film is removed. By providing the metal film having the structure, absorption of emitted light by the substrate when the substrate is left can be suppressed. As a result, more emitted light can be extracted from the surface of the semiconductor laminated film opposite to the metal film. In addition, since a relatively thick metal film is provided by removing the substrate, series resistance can be reduced, heat dissipation is significantly improved, and electrostatic withstand voltage is increased. In addition, when a highly reflective material is used for the electrode in contact with the metal film, the luminous efficiency can be increased.
[0020]
In the semiconductor light emitting device of the present invention, the semiconductor laminated film is preferably made of a group III-V compound semiconductor containing nitrogen as a group V element. In this case, since a group III-V compound semiconductor containing nitrogen as a group V element, that is, a group III-V nitride semiconductor, often uses a different substrate such as sapphire, the effect of removing the different substrate is extremely large. large.
[0021]
In the semiconductor light emitting device of the present invention, the thickness of the metal film is preferably 10 μm or more.
[0022]
In the semiconductor light emitting device of the present invention, the metal film is preferably made of gold, copper or silver. In this case, since gold, copper, and silver all have high thermal conductivity, heat dissipation is further improved, so that a higher output operation can be reliably performed.
[0023]
In the semiconductor light emitting device of the present invention, the metal film is preferably formed by plating. By doing so, the metal film can be formed in a short time and with good reproducibility, so that a semiconductor light emitting device capable of high-output operation can be realized at low cost.
[0024]
In the semiconductor light emitting device of the present invention, it is preferable that the metal film includes a metal layer having a melting point of 300 ° C. or less at a portion opposite to the semiconductor laminated film. With this configuration, when the semiconductor light emitting device is die-bonded to a package or a lead frame, the metal layer having a melting point of 300 ° C. or less functions as a solder material, so that it is not necessary to use a solder material. Die bonding of the light emitting element can be performed at low cost.
[0025]
In this case, the metal layer preferably contains tin.
[0026]
In the semiconductor light emitting device of the present invention, an electrode formed to be in contact with the metal film among the first electrode and the second electrode has a reflectance of 90% or more with respect to light emitted from the semiconductor laminated film. Preferably. In this case, since the light extraction efficiency is improved, high luminance of the light emitting element can be realized.
[0027]
In the semiconductor light emitting device of the present invention, the electrode formed so as to be in contact with the metal film among the first electrode and the second electrode is a single layer made of at least one of gold, platinum, copper, silver and rhodium. It is preferable to use a film or a laminated film including two or more of them. This makes it possible to reliably form an electrode having a reflectance of 90% or more with respect to light emitted from the semiconductor laminated film.
[0028]
The semiconductor light emitting device of the present invention further includes a mirror structure formed between the semiconductor laminated film and the metal film and made of a dielectric or a semiconductor, and the mirror structure is provided for light emitted from the semiconductor laminated film. Preferably, it has a reflectance of 90% or more. With this configuration, the mirror structure has a higher light extraction efficiency than an electrode made of a single material having a high reflectivity, so that a higher luminance of the light emitting element can be realized.
[0029]
In this case, the mirror structure is made of any one of silicon oxide, titanium oxide, niobium oxide, tantalum oxide, and hafnium oxide, or aluminum gallium indium nitride (Al _x Ga _y In _1-xy N) (where 0 ≦ x, y ≦ 1, 0 ≦ x + y ≦ 1), and is preferably formed such that the refractive index with respect to the wavelength of light emitted from the semiconductor laminated film changes periodically. . By doing so, the difference in the refractive index of each layer constituting the mirror structure increases, so that a mirror structure having a high reflectance can be obtained even if the number of layers is reduced.
[0030]
In the semiconductor light emitting device of the present invention, it is preferable that an electrode provided on the opposite side of the metal film with respect to the semiconductor laminated film among the first electrode and the second electrode has a light transmitting property. With this configuration, the emitted light emitted from the semiconductor laminated film is extracted through the translucent electrode, so that the light extraction efficiency is improved.
[0031]
Further, in the semiconductor light emitting device of the present invention, the electrode provided on the side opposite to the metal film with respect to the semiconductor laminated film among the first electrode and the second electrode is made of indium tin oxide or has a thickness of Is preferably made of a metal containing nickel of 20 nm or less. In this case, a light-transmitting electrode can be reliably formed.
[0032]
It is preferable that the semiconductor light emitting device of the present invention further includes a current confinement film formed of a dielectric and formed between the semiconductor laminated film and the metal film and on a side portion thereof.
[0033]
The method of manufacturing a semiconductor light emitting device according to the present invention includes the steps of: (a) forming a semiconductor laminated film including at least two semiconductor layers having different conductivity types on a substrate made of single crystal; (B) separating a first electrode on one surface of the semiconductor multilayer film and forming a second electrode on a surface facing the one surface of the semiconductor multilayer film (c). ) And a step (d) of forming a metal film on one of the first electrode and the second electrode.
[0034]
According to the method for manufacturing a semiconductor light emitting device of the present invention, a semiconductor laminated film including at least two semiconductor layers having different conductivity types is formed on a substrate, and subsequently, the substrate is separated from the semiconductor laminated film. A first electrode is formed on one surface of the semiconductor laminated film, a second electrode is formed on a surface facing the one surface of the semiconductor laminated film, and one of the first electrode and the second electrode is further formed. A metal film on the substrate. As described above, since the substrate on which the semiconductor laminated film is formed is separated from the semiconductor laminated film, absorption of emitted light by the substrate can be suppressed, so that more emitted light is emitted from the surface of the semiconductor laminated film opposite to the metal film. You will be able to take it out. In addition, since the metal film is provided on the semiconductor laminated film with an electrode interposed in place of the substrate, the series resistance in the semiconductor laminated film can be reduced, the heat dissipation can be significantly improved, and the electrostatic breakdown voltage increases. .
[0035]
In the method for manufacturing a semiconductor light emitting device of the present invention, the semiconductor laminated film is preferably made of a III-V compound semiconductor containing nitrogen as a group V element.
[0036]
In the method for manufacturing a semiconductor light emitting device of the present invention, in the step (b), irradiation light having a wavelength that transmits through the substrate and is absorbed by a part of the semiconductor laminated film is applied from a surface of the substrate opposite to the semiconductor laminated film. It is preferable that the substrate be separated from the semiconductor laminated film by irradiating to form a decomposition layer in which a part of the semiconductor laminated film is decomposed inside the semiconductor laminated film. In this case, even when the area of the substrate is relatively large, the substrate and the semiconductor multilayer film can be separated with good reproducibility.
[0037]
In the method for manufacturing a semiconductor light emitting device of the present invention, it is preferable that the substrate is separated from the semiconductor laminated film by removing the substrate by polishing in the step (b). In this case, even when the area of the substrate is relatively large, the semiconductor stacked film can be separated at low cost.
[0038]
In the method for manufacturing a semiconductor light emitting device of the present invention, in the step (a), after forming a part of the semiconductor laminated film, the semiconductor light is transmitted through the substrate and absorbed by the semiconductor laminated film from a surface of the substrate opposite to the semiconductor laminated film. Forming a decomposed layer formed by decomposing the semiconductor laminated film inside a part of the semiconductor laminated film by irradiating irradiation light having a predetermined wavelength; and forming one of the semiconductor laminated films after forming the decomposed layer. Forming a remaining portion of the semiconductor laminated film on the portion. With this configuration, the semiconductor laminated film and the substrate are loosely coupled to each other through the decomposition layer formed by decomposing a part of the semiconductor laminated film. Therefore, when the remaining portion of the semiconductor laminated film is formed on a part of the semiconductor laminated film after the formation of the decomposition layer, when the remaining portion of the semiconductor laminated film includes, for example, a device structure (active layer), the substrate and the semiconductor Since it is less likely to be affected by the difference in thermal expansion coefficient between the laminated film and the lattice mismatch, the crystallinity of the device structure is improved, and a high-luminance semiconductor light emitting device can be obtained.
[0039]
It is preferable that the irradiation light applied to the substrate be laser light which oscillates in a pulse shape. The irradiation light is preferably a bright line of a mercury lamp. In this case, when a pulsed laser beam is used as the light source, the output power of the light can be significantly increased, so that the semiconductor stacked film can be easily separated. In addition, when a bright line of a mercury lamp is used as a light source, although the output power of light is inferior to that of laser light, the spot size can be made larger than in the case of laser light, so that the throughput in the irradiation step is improved.
[0040]
It is preferable that the irradiation light is irradiated so as to scan the surface of the substrate. With this configuration, even if the substrate has a relatively large area, the substrate can be separated from the semiconductor multilayer film without being affected by the beam size of the light source.
[0041]
Further, it is preferable that the irradiation light is irradiated while heating the substrate. By doing so, the difference in the thermal expansion coefficient between the semiconductor laminated film and the substrate that occurs during cooling after crystal growth and the stress that occurs in the semiconductor laminated film due to lattice mismatch between the two are alleviated. Cracks that occur in the semiconductor laminated film can be prevented.
[0042]
In the method for manufacturing a semiconductor light emitting device of the present invention, a laminated film made of a dielectric or a semiconductor is formed on a semiconductor laminated film between steps (a) and (b), and the formed laminated film is patterned. Further comprising the step of: (e) forming one of the first electrode and the second electrode on the patterned laminated film in the step (c); The film is preferably formed on an electrode formed on the patterned laminated film. This makes it possible to form a mirror structure that reflects light emitted from the semiconductor laminated film with high efficiency. In addition, in order to pattern a mirror structure composed of a laminated film made of a dielectric or a semiconductor, which is generally difficult to lower the resistance, an electrode and a metal film are formed in gaps between the patterned mirror structures. Thus, a sufficient operating current can be reliably injected from the gap.
[0043]
In this case, in the step (c), after separating the substrate from the semiconductor laminated film, the other of the first electrode and the second electrode is formed on a surface of the semiconductor laminated film opposite to the laminated film. Is preferred.
[0044]
In the method for manufacturing a semiconductor light emitting device according to the present invention, a first film-shaped film holding the semiconductor laminated film is formed between the step (a) and the step (b), the material being different from the material constituting the semiconductor laminated film. It is preferable that the method further includes a step (f) of attaching the holding member to the semiconductor multilayer film, and a step (g) of peeling the first holding member from the semiconductor multilayer film after the step (b). With this configuration, cracks generated in the semiconductor multilayer film in the process of relieving stress in the film when forming the decomposition layer in a part of the semiconductor multilayer film can be suppressed. As a result, even when the area of the substrate is relatively large, the substrate can be separated without generating cracks in the semiconductor stacked film.
[0045]
In this case, in the method for manufacturing a semiconductor light emitting device of the present invention, before the step (g), the film-like second holding member having a characteristic different from that of the first holding member is replaced with the first holding member in the semiconductor laminated film. It is preferable that the method further includes a step (h) of attaching the second holding member to the surface opposite to the holding member, and a step (i) of peeling the second holding member from the semiconductor multilayer film after the step (g). . This makes it possible to form an electrode on an arbitrary surface of the semiconductor multilayer film and pattern the metal film even after the substrate is separated from the semiconductor multilayer film.
[0046]
In this case, the first holding member or the second holding member is preferably a polymer material film, a single crystal substrate made of a semiconductor, or a metal plate. In this case, the polymer film or the metal plate is excellent in plasticity, and the single crystal substrate made of a semiconductor is excellent in cleavage, so that the substrate can be more easily separated.
[0047]
In this case, the polymer material film is preferably provided with an adhesive layer which can be peeled off by heating on the bonding surface. This eliminates the problem that the adhesive layer remains on the semiconductor laminated film when the polymer material film is peeled off, so that the polymer material film can be easily and reliably peeled from the semiconductor laminated film. Become so.
[0048]
The method for manufacturing a semiconductor light emitting device of the present invention may further include, before the step (c), a step (j) of selectively forming a current confinement film made of a dielectric on the semiconductor laminated film. preferable.
[0049]
The method for mounting a semiconductor light emitting device according to the present invention comprises the steps of: (a) forming a semiconductor laminated film including at least two semiconductor layers having different conductivity types on a single crystal substrate; (B) attaching a film-shaped holding member made of a material different from the material to be formed and holding the semiconductor laminated film to the semiconductor laminated film, and dicing the semiconductor laminated film together with the holding member to separate each side. A step (c) of producing a plurality of chips held by the holding member, and a step (d) of performing die bonding on each chip held by the holding member and then separating the holding member from each chip. And
[0050]
According to the method for mounting a semiconductor light emitting element of the present invention, even when the thickness of the semiconductor laminated film is extremely small, for example, several μm or less, the die bonding can be performed in a state where the film-shaped holding member is adhered to the semiconductor laminated film. An extremely thin semiconductor light emitting element can be mounted.
[0051]
In the method for mounting a semiconductor light emitting device of the present invention, the holding member is preferably a polymer material film.
[0052]
In the method for mounting a semiconductor light-emitting element of the present invention, it is preferable that the polymer material film is provided with an adhesive layer which can be peeled off by heating on its bonding surface.
[0053]
BEST MODE FOR CARRYING OUT THE INVENTION
(1st Embodiment)
A first embodiment of the present invention will be described with reference to the drawings.
[0054]
FIG. 1 shows a cross-sectional structure of a semiconductor light emitting device according to a first embodiment of the present invention, which is a light emitting diode device capable of emitting short wavelength light such as blue or green light.
[0055]
As shown in FIG. 1, the light emitting diode element 10 according to the first embodiment has an element structure 11 including a plurality of semiconductor layers.
[0056]
On the element structure 11, a light-transmitting p-side electrode 15 made of an oxide (ITO) containing indium (In) and tin (Sn) is formed. A bonding pad 16 made of gold (Au) is formed in a region of the element structure 11, and a layered body of titanium (Ti) and gold (Au) is formed on the surface of the element structure 11 opposite to the p-side electrode 15. The n-side electrode 17 is formed.
[0057]
The element structure 11 includes an n-type semiconductor layer 12 made of n-type aluminum gallium nitride (AlGaN), an active layer 13 made of indium gallium nitride (InGaN) formed on the n-type semiconductor layer 12, And a p-type semiconductor layer 14 made of p-type aluminum gallium nitride (AlGaN) formed on the active layer 13. Here, the active layer 13 may have, for example, a quantum well structure. The blue light having a wavelength of, for example, 470 nm generated in the active layer 13 is reflected by the n-side electrode 17 made of Ti / Au, transmitted through the p-side electrode 15 made of ITO, and extracted to the outside.
[0058]
As a feature of the first embodiment, a metal film 18 is formed by gold plating with a thickness of about 50 μm using an Au layer on the opposite side (lower side) of the n-type semiconductor layer 12 in the n-side electrode 17 as a base layer. I have.
[0059]
As described above, according to the first embodiment, the n-type semiconductor layer 12 of the element structure 11 constituting the light emitting diode element 10 is provided so that the reflectance with respect to the light emitted from the active layer 13 is 90% or more. An n-side electrode 17 made of a metal is formed. As a result, the emitted light emitted from the active layer 13 is reflected by the n-side electrode 17 and is extracted through the translucent p-side electrode 15, so that the light extraction efficiency can be greatly improved.
[0060]
In addition, the metal film 18 made of Au is provided on the surface of the n-side electrode 17 on the side opposite to the element structure 11 instead of the substrate made of single crystal. The heat is radiated to the outside through the film 18. As described above, since the metal film 18 is provided instead of the single crystal substrate on which the element structure 11 made of a GaN-based semiconductor is grown, the heat dissipation of the element structure 11 is significantly improved. Such a light emitting diode element 10 can reliably perform a high output operation. In addition, since there is no insulating substrate such as sapphire, electrostatic withstand voltage is improved.
[0061]
The thickness of the metal film 18 may be 10 μm or more, and the material is not limited to gold (Au). For example, any material having a high thermal conductivity such as copper (Cu) or silver (Ag) may be used, or an alloy thereof may be used.
[0062]
Further, the n-side electrode 17 in contact with the metal film 18 is not limited to a laminated structure of titanium (Ti) and gold (Au), but may be gold (Au), platinum (Pt), copper (Cu), silver (Ag), It may be a single-layer film made of at least one of rhodium (Rh) or a laminated structure containing two or more of these.
[0063]
Further, the light-transmitting p-side electrode 15 is not limited to ITO, and may be a stacked body made of nickel (Ni) and gold (Au) and having a total thickness of 20 nm or less.
[0064]
Hereinafter, a method for manufacturing the light emitting diode element 10 configured as described above will be described with reference to the drawings.
[0065]
FIGS. 2A to 2D and FIGS. 3A to 3D show cross-sectional configurations in the order of steps of a method for manufacturing a light-emitting diode element according to the first embodiment of the present invention. .
[0066]
First, as shown in FIG. 2A, a wafer-like sapphire (single crystal Al) is formed, for example, by a metal organic chemical vapor deposition (MOCVD) method. ₂ O ₃ ), The n-type semiconductor layer 12 made of n-type AlGaN, the active layer 13 made of InGaN, and the p-type semiconductor layer 14 made of p-type AlGaN are sequentially grown on the main surface of the substrate 20. 12, an element structure 11 including an active layer 13 and a p-type semiconductor layer 14 is formed.
[0067]
Here, as shown in [Table 1], in the element structure 11, a buffer layer and an n-type contact layer are provided between the substrate 20 and the n-type semiconductor layer (n-type cladding layer) 12, and the active layer 13 is formed. It is preferable to have a quantum well structure and provide a p-type contact layer on the p-type semiconductor layer (p-type cladding layer) 14.
[0068]
[Table 1]

[0069]
As shown in Table 1, as is well known, the buffer layer made of GaN formed on the substrate 20 has a relatively low substrate temperature of, for example, 550 ° C., and has an n-type contact grown on the substrate 20 and the buffer layer. Alleviates lattice mismatch with epitaxial layers such as layers. During the growth of the epitaxial layer such as the n-type semiconductor layer 12, the substrate temperature is set to about 1020 ° C. The n-type dopant includes, for example, silane (SiH ₄ ) As a raw material, and as a p-type dopant, for example, biscyclopentadienyl magnesium (Cp ₂ Magnesium (Mg) using Mg) as a raw material is used.
[0070]
Subsequently, an ITO film is deposited on the element structure 11 by, for example, the RF sputtering method, and the deposited ITO film is patterned to form the p-side electrode 15. Further, an electrode forming film made of Au is deposited on the formed p-side electrode 15 by, for example, an electron beam evaporation method, and patterning is performed on the deposited electrode forming film so as to cover a part of the p-side electrode 15. Then, a bonding pad 16 is formed from the electrode forming film. Note that here, the thickness of the electrode formation film is preferably 500 nm or more. The patterning of the ITO film and the electrode forming film may be performed simultaneously.
[0071]
Next, as shown in FIG. 2B, a film-like holding member having excellent plasticity, for example, a polymer film having a thickness of about 100 μm is formed on the element structure 11 including the p-side electrode 15 and the bonding pad 16. Is adhered. Here, as the holding film 41, a polymer film made of, for example, polyester, having an adhesive layer that is foamed by heating to reduce the adhesive strength on the holding surface is used. By using such a holding film 41, when the holding film 41 is peeled in a later step, an adhesive layer remains on the element structure 11 and an electric contact failure or the like occurs. Can be prevented. Subsequently, the substrate 20 is scanned with third harmonic light of a YAG (yttrium, aluminum, garnet) laser having a wavelength of 355 nm that oscillates in a pulse form from the surface opposite to the element structure 11 with respect to the substrate 20. Irradiation. The irradiated laser light is not absorbed by the substrate 20, but is absorbed by the element structure 11, that is, the n-type semiconductor layer 12. Due to the absorption of the laser light, the n-type semiconductor layer 12 locally generates heat, the bonds between atoms of the n-type semiconductor layer 12 are cut off at the interface with the substrate 20, and the n-type semiconductor layer 12 And a thermal decomposition layer (not shown) containing metallic gallium (Ga). That is, by irradiating the n-type semiconductor layer 12 with the laser light, the n-type semiconductor layer 12 grown on the substrate 20 is cut by the thermal decomposition layer while the bonds between the atoms with the substrate 20 are cut. It is in a state of being bonded to the substrate 20. Note that the light source of the laser light to be applied is not limited to the third harmonic light of the YAG laser, and KrF excimer laser light having a wavelength of 248 nm may be used. Here, KrF is a mixed gas of krypton and fluorine contained in the excimer laser device. Furthermore, a bright line of a mercury lamp having a wavelength of 365 nm may be used instead of the laser light source. When the emission line of a mercury lamp is used, although the output power of light is inferior to that of laser light, the spot size can be made larger than that of laser light, so that the irradiation time in the step of separating the substrate 20 can be shortened.
[0072]
Next, as shown in FIG. 2C, the substrate 20 is separated from the element structure 11 and removed by melting the thermal decomposition layer by wet etching using hydrochloric acid (HCl) or the like. As a method of separating the substrate 20, there is a method of removing the substrate by a chemical mechanical polishing method, other than a method of forming a thermal decomposition layer by light irradiation and melting the thermal decomposition layer.
[0073]
Subsequently, an n-side electrode 17 made of Ti / Au is formed on the surface of the n-type semiconductor layer 12 opposite to the active layer 13 in the element structure 11 from which the substrate 20 has been removed, for example, by an electron beam evaporation method. . Subsequently, a metal film 18 having a thickness of about 50 μm is formed on the n-side electrode 17 by gold plating using the Au layer of the n-side electrode 17 as a base layer.
[0074]
Next, as shown in FIG. 2D, portions of the metal film 18 and the n-side electrode 17 corresponding to the chip division regions of the element structure 11 are selectively etched to form chip divisions in the n-type semiconductor layer 12. Expose the area. In the first embodiment, the step of separating the substrate 20, the step of forming the n-side electrode 17 and the metal film 18, and the step of etching the n-side electrode 17 and the metal film 18 are performed on the substrate 20 of the element structure 11. This is performed in a state where the holding film 41 is provided on the surface on the opposite side of the above, so that even if the element structure 11 has an extremely thin film thickness of, for example, about 5 μm, it can be carried out without any problem.
[0075]
Next, as shown in FIG. 3A, a region (dicing region) exposed from the metal film 18 in the element structure 11 held by the holding film 41 is cut using a dicing blade 50. At this time, the holding film 41 is also cut at the same time. Thereby, as shown in FIG. 3B, a relatively thick metal film 18 is provided on the n-side electrode 17 and a holding film 41 is provided on the p-side electrode 15 from the element structure 11 in a wafer state. A light emitting diode chip having a size of, for example, 300 μm square is obtained.
[0076]
Next, as shown in FIG. 3C, the upper surface of the holding film 41 divided into chips is adsorbed by the collet 51, and the package 22 is mounted by the solder material 21 made of lead (Pb) and tin (Sn). Bond in position.
[0077]
Next, as shown in FIG. 3D, the chip is heated to, for example, about 200 ° C. during bonding. Thereby, the adhesive which is heated and foamed is applied to the holding film 41, and the adhesive force of the adhesive of the holding film 41 is weakened by the heating. Therefore, the holding film 41 is easily separated from the element structure 11 by the collet 51. Can be peeled off.
[0078]
As described above, in the first embodiment, since the die bonding is performed in a state where the holding film 41, which is easily peeled off by heating, is bonded, the chip having the element structure 11 with a thickness of about 50 μm is used. In addition, die bonding can be easily and reliably performed.
[0079]
If an alloy made of, for example, gold (Au) and tin (Sn) having a melting point of about 280 ° C. is formed on at least a lower portion of the metal film 18 by plating, it is not necessary to use the solder material 21.
[0080]
As described above, according to the manufacturing method according to the first embodiment, it is possible to obtain the light emitting diode element 10 having high luminance, excellent heat dissipation, excellent electrostatic withstand voltage, and low series resistance.
[0081]
(Modification of manufacturing method)
In the first embodiment, after the element structure 11 is manufactured, the thermal decomposition layer containing the metal gallium is formed between the substrate 20 and the element structure 11 by irradiating a laser beam, but is not limited thereto. The following manufacturing method may be used.
[0082]
Specifically, after a base layer made of a GaN-based semiconductor is grown on the substrate 20, light irradiation is performed to form a thermal decomposition layer between the substrate 20 and the base layer. Subsequently, the element structure 11 is formed on the underlayer on which the thermal decomposition layer is formed by regrowth.
[0083]
In this way, the element structure 11 grows on the underlayer with the thermal decomposition layer having no crystal structure interposed between the underlayer and the substrate 20, so that the underlayer made of a GaN-based semiconductor is formed. In addition, the element structure 11 is less susceptible to a difference in thermal expansion coefficient from the substrate 20. As a result, the crystallinity of the element structure 11 is improved, and the occurrence of cracks and crystal defects is reduced.
[0084]
In order to separate and remove the substrate 20 from the underlayer, the underlayer may be irradiated with laser light or the like again, or the thermal decomposition layer may be etched with, for example, HCl.
[0085]
(Second embodiment)
Hereinafter, a second embodiment of the present invention will be described with reference to the drawings.
[0086]
FIG. 4 shows a cross-sectional configuration of a semiconductor light emitting device according to a second embodiment of the present invention, which is capable of emitting light of a short wavelength such as blue or green. In FIG. 4, the same components as those shown in FIG.
[0087]
As shown in FIG. 4, the light emitting diode element 10 according to the second embodiment includes titanium (Ti) on the surface of the n-type semiconductor layer 12 constituting the element structure 11 on the side opposite (upper side) to the active layer 13. ) And aluminum (Al), and an n-side electrode 17A also serving as a bonding pad is selectively formed. The opposite side (lower side) of the active layer 13 in the p-type semiconductor layer 14 is made of a laminate of platinum (Pt) and gold (Au), and has a reflectance of 90% or more with respect to light emitted from the active layer 13. Thus, a p-side electrode 15A is formed. Further, a gold-plated metal film 18 having a thickness of about 50 μm is formed using the outer Au layer of the p-side electrode 15A as a base layer.
[0088]
As a feature of the second embodiment, for example, silicon oxide (SiO 2) is provided between the p-type semiconductor layer 14 and the p-side electrode 15A at the peripheral portion of the element structure 11. ₂ ) Is provided. Thereby, the leak current leaking through the side end surface of the element structure 11 can be reduced, so that the luminous efficiency of the light emitting element is improved.
[0089]
As described above, according to the second embodiment, the metal provided below the element structure 11 constituting the light emitting diode element 10 so that the reflectance with respect to the light emitted from the active layer 13 is 90% or more. Is formed. Thereby, the emitted light emitted from the active layer 13 is reflected by the p-side electrode 15A and is extracted through the portion of the n-type semiconductor layer 12 where the n-side electrode 17A is not provided, so that the light extraction efficiency is greatly improved. can do.
[0090]
In addition, since the metal film 18 is provided on the surface of the p-side electrode 15A on the opposite side (lower side) of the element structure 11 instead of the substrate made of single crystal, the heat generated in the active layer 13 The heat is radiated to the outside via the metal film 18. As described above, since the metal film 18 is provided instead of the single crystal substrate on which the element structure 11 made of the GaN-based semiconductor is grown, the heat dissipation is remarkably improved. High output operation. In addition, since there is no insulating substrate such as sapphire, electrostatic withstand voltage is improved.
[0091]
Note that the p-side electrode 15A in contact with the metal film 18 is not limited to a laminated structure of platinum (Pt) and gold (Au), but may be gold (Au), platinum (Pt), copper (Cu), silver (Ag), It may be a single-layer film made of at least one of rhodium (Rh) or a laminated structure containing two or more of these.
[0092]
Hereinafter, a method for manufacturing the light emitting diode element 10 configured as described above will be described with reference to the drawings.
[0093]
5 (a) to 5 (c) to 7 (a) to 7 (c) show cross-sectional configurations in the order of steps of a method for manufacturing a light emitting diode element according to the second embodiment of the present invention. .
[0094]
First, as shown in FIG. 5A, similarly to the first embodiment, an n-type semiconductor layer 12 made of n-type AlGaN is formed on a main surface of a substrate 20 made of sapphire wafer by MOCVD. By sequentially growing an active layer 13 made of InGaN and a p-type semiconductor layer 14 made of p-type AlGaN, an element structure 11 including the n-type semiconductor layer 12, the active layer 13 and the p-type semiconductor layer 14 is formed.
[0095]
Subsequently, a current constriction forming film made of silicon oxide having a thickness of about 300 nm is deposited on the element structure 11, that is, the p-type semiconductor layer 14 by, for example, a vapor deposition (CVD) method. Subsequently, the deposited current constriction forming film is subjected to wet etching using, for example, hydrofluoric acid (HF) to form a plurality of openings each having an opening for exposing the light emitting region of the element structure 11 from the current constriction forming film. A current confinement film 23 is formed. Thereafter, a Pt layer having a thickness of about 50 nm and an Au layer having a thickness of about 200 nm are formed by electron beam evaporation over the entire surface of the current confinement film 23 and the p-type semiconductor layer 14 including the region exposed from the current confinement film 23. Is formed.
[0096]
Next, as shown in FIG. 5B, a metal film 18 having a thickness of about 50 μm is formed on the p-side electrode 15A by gold plating using the Au layer of the p-side electrode 15A as a base layer. I do.
[0097]
Next, as shown in FIG. 5C, a film-like holding member having excellent plasticity, for example, a first holding film 42 made of a polymer film having a thickness of about 100 μm is bonded onto the metal film 18. . Here, as the first holding film 42, a polymer film made of, for example, polyester, having an adhesive layer that is foamed by heating at about 120 ° C. and has a reduced adhesive strength on its holding surface is used. Subsequently, the substrate 20 is irradiated with third harmonic light of a YAG laser having a wavelength of 355 nm that oscillates in a pulsed manner from the surface on the opposite side of the element structure 11 so as to scan the substrate 20. As described above, the irradiated laser light is not absorbed by the substrate 20, but is absorbed by the element structure 11, that is, the n-type semiconductor layer 12. Due to the absorption of the laser light, the n-type semiconductor layer 12 locally generates heat, the bonds between atoms of the n-type semiconductor layer 12 are cut off at the interface with the substrate 20, and the n-type semiconductor layer 12 A thermal decomposition layer (not shown) containing metallic gallium is formed between the layers. Note that a KrF excimer laser light having a wavelength of 248 nm may be used as a light source of the laser light to be irradiated, instead of the third harmonic light of the YAG laser. Further, a bright line of a mercury lamp having a wavelength of 365 nm may be used instead of the laser light source.
[0098]
Next, as shown in FIG. 6A, the substrate 20 is separated and removed from the element structure 11 by melting the thermal decomposition layer by wet etching using hydrochloric acid or the like. Subsequently, on the surface of the element structure 11 from which the substrate 20 has been removed on the side opposite to the active layer 13 of the n-type semiconductor layer 12, for example, about 50 nm-thick Ti and about 50 nm-thick are formed by electron beam evaporation. An n-side electrode which also functions as a bonding pad from the laminated film by depositing a laminated film of 800 nm of Al and performing patterning on the deposited laminated film so as to partially cover the light emitting region of the element structure 11. 17A is formed.
[0099]
Next, as shown in FIG. 6B, a second holding film 43 made of, for example, a polymer film having a thickness of about 100 μm is adhered on the n-type semiconductor layer 12 including the n-side electrode 17A. As the second holding film 43, a polymer film made of, for example, polyester, having an adhesive layer which is foamed by heating at about 170 ° C. to reduce the adhesive strength on its holding surface is used.
[0100]
Next, the element structure 11 held by the first holding film 42 and the second holding film 43 is heated to about 120 ° C. Due to the heating at about 120 ° C., the adhesive layer provided on the first holding film 42 foams, and the adhesive force between the first holding film 42 and the metal film 18 is reduced. As shown in FIG. The one holding film 42 is easily separated from the metal film 18. At this time, there is no possibility that the adhesive of the first holding film 42 remains on the surface of the metal film 18.
[0101]
Next, as shown in FIG. 7A, a portion of the metal film 18 corresponding to the chip division region of the element structure 11, that is, an upper portion of the current confinement film 23 is selectively etched to form the p-side electrode 15A. Is exposed. Also in the second embodiment, the step of separating the substrate 20 and the step of forming each of the n-side electrodes 17A are performed in a state where the first holding film 42 is provided on the element structure 11, and the etching step for the metal film 18 includes Since the process is performed in a state where the second holding film 43 is provided on the element structure 11, even if the element structure 11 has an extremely thin film thickness of, for example, about 5 μm, the operation can be performed without any problem. .
[0102]
Next, as shown in FIG. 7B, the exposed region (dicing region) of the p-side electrode 15A held by the second holding film 43 from the metal film 18 and the lower portion thereof are cut using a dicing blade 50. I do. Thereby, as each element structure 11, a light emitting diode chip having a plane size of, for example, 300 μm square is obtained. At this time, the second holding film 43 is cut halfway.
[0103]
Next, as shown in FIG. 7 (c), by heating the second holding film 43 to about 170 ° C., the adhesive layer provided on the second holding film 43 foams, and the Since the adhesive strength between them decreases, each chip is easily peeled off from the second holding film 43. Thereafter, it is mounted in an assembling process such as die bonding, which is a later process.
[0104]
As described above, according to the manufacturing method according to the second embodiment, it is possible to obtain the light-emitting diode element 10 having high luminance, excellent heat dissipation, excellent electrostatic withstand voltage, and low series resistance.
[0105]
(Modification of Second Embodiment)
Hereinafter, a modified example of the second embodiment of the present invention will be described with reference to the drawings.
[0106]
8A to 8C show a light-emitting diode element according to a modification of the second embodiment of the present invention. FIG. 8A shows a cross-sectional configuration, and FIG. FIG. 8C shows a micrograph of the chip surface by a scanning electron microscope (SEM), and FIG. 8C shows a photograph of the chip surface in a light emitting state. In FIG. 8A, the same components as those shown in FIG. 4 are denoted by the same reference numerals, and description thereof will be omitted.
[0107]
This modification is a prototype example, and as shown in FIG. 8A, a multiple quantum well structure in which n-type GaN is used for the n-type semiconductor layer 12A of the element structure 11 and InGaN is used for the active layer 13A. And p-type GaN is used for the p-type semiconductor layer 14A. Here, the plane size of the chip is 300 μm square.
[0108]
On the n-type semiconductor layer 12A, an n-side electrode 17 made of a laminate of Ti / Au is provided at the center of the light emitting region. Pt is used for the p-side electrode 15B, and a plating base layer 24 made of Ti / Au is provided on the surface of the p-side electrode 15B opposite to the element structure 11.
[0109]
FIG. 9 shows a measurement result of an emission spectrum of the light emitting diode element 10 according to the present modification. As shown in the graph of FIG. 9, as the operating current increases, a plurality of peaks due to a so-called vertical resonator effect that resonate in a direction perpendicular to the active layer 13A appear.
[0110]
(Third embodiment)
Hereinafter, a third embodiment of the present invention will be described with reference to the drawings.
[0111]
FIG. 10 shows a cross-sectional configuration of a semiconductor light emitting device according to a third embodiment of the present invention, which is a light emitting diode device capable of emitting light of a short wavelength such as blue or green. In FIG. 10, the same components as those shown in FIG. 4 are denoted by the same reference numerals, and description thereof will be omitted.
[0112]
In the element structure 11 constituting the light emitting diode element according to the third embodiment, an n-side electrode 17B made of, for example, ITO and having a light-transmitting property is formed on a surface of the n-type semiconductor layer 12 opposite to the active layer 13. A bonding pad 16 made of Au is formed in a partial area on the n-side electrode 17B.
[0113]
Here, the active layer 13 may have, for example, a quantum well structure. The blue light having a wavelength of, for example, 470 nm generated in the active layer 13 is reflected by the p-side electrode 15A made of Pt / Au, passes through the n-side electrode 17B made of ITO, and is extracted to the outside.
[0114]
As described above, according to the third embodiment, the metal provided below the element structure 11 constituting the light emitting diode element 10 so that the reflectance with respect to the light emitted from the active layer 13 is 90% or more. Is formed. Thereby, the emitted light emitted from the active layer 13 is reflected by the p-side electrode 15A and is extracted through the translucent n-side electrode 17B provided on the n-type semiconductor layer 12, so that the light extraction efficiency is greatly increased. Can be improved.
[0115]
In addition, since the metal film 18 is provided on the surface of the p-side electrode 15A on the opposite side (lower side) of the element structure 11 instead of the substrate made of single crystal, the heat generated in the active layer 13 The heat is radiated to the outside via the metal film 18. As described above, since the metal film 18 is provided instead of the single crystal substrate on which the element structure 11 made of the GaN-based semiconductor is grown, the heat dissipation is remarkably improved. High output operation. In addition, since there is no insulating substrate such as sapphire, electrostatic withstand voltage is improved.
[0116]
Hereinafter, a method for manufacturing the light emitting diode element 10 configured as described above will be described with reference to the drawings.
[0117]
11 (a) to 11 (c) to 13 (a) to 13 (c) show cross-sectional configurations in the order of steps of a method for manufacturing a light emitting diode element according to the third embodiment of the present invention. .
[0118]
First, as shown in FIG. 11A, an n-type semiconductor layer 12 made of n-type AlGaN, an active layer 13 made of InGaN, and a p-type The element structure 11 including the n-type semiconductor layer 12, the active layer 13, and the p-type semiconductor layer 14 is formed by sequentially growing the p-type semiconductor layer 14 made of AlGaN.
[0119]
Next, as shown in FIG. 11B, a first holding film 42 made of, for example, a polymer film having a thickness of about 100 μm is bonded onto the p-type semiconductor layer 14 of the element structure 11. Here, as the first holding film 42, a polymer film made of, for example, polyester, having an adhesive layer that is foamed by heating at about 120 ° C. and has a reduced adhesive strength on its holding surface is used. Subsequently, the substrate 20 is irradiated with third harmonic light of a YAG laser having a wavelength of 355 nm that oscillates in a pulsed manner from the surface on the opposite side of the element structure 11 so as to scan the substrate 20. As described above, the irradiated laser light is not absorbed by the substrate 20, but is absorbed by the element structure 11, that is, the n-type semiconductor layer 12. Due to the absorption of the laser light, the n-type semiconductor layer 12 locally generates heat, the bonds between atoms of the n-type semiconductor layer 12 are cut off at the interface with the substrate 20, and the n-type semiconductor layer 12 A thermal decomposition layer (not shown) containing metallic gallium is formed between the layers. Note that a KrF excimer laser light having a wavelength of 248 nm may be used as a light source of the laser light to be irradiated, instead of the third harmonic light of the YAG laser. Further, a bright line of a mercury lamp having a wavelength of 365 nm may be used instead of the laser light source.
[0120]
Next, as shown in FIG. 11C, the substrate 20 is separated and removed from the element structure 11 by melting the thermal decomposition layer by wet etching using hydrochloric acid or the like. Subsequently, an ITO film is deposited on the surface of the n-type semiconductor layer 12 opposite to the active layer 13 in the element structure 11 from which the substrate 20 has been removed, for example, by RF sputtering, and the deposited ITO film is patterned. An n-side electrode 17B is formed. Further, an electrode forming film made of Au is deposited on the formed n-side electrode 17B by, for example, an electron beam evaporation method, and patterning is performed on the deposited electrode forming film so as to cover a part of the n-side electrode 17B. Then, a bonding pad 16 is formed from the electrode forming film. Note that the thickness of the electrode formation film is preferably 500 nm or more. The patterning of the ITO film and the electrode forming film may be performed simultaneously.
[0121]
Next, as shown in FIG. 12A, a second holding film 43 made of, for example, a polymer film having a thickness of about 100 μm is formed on the n-type semiconductor layer 12 including the bonding pad 16 and the n-side electrode 17B. Glue. As the second holding film 43, a polymer film made of, for example, polyester, having an adhesive layer which is foamed by heating at about 170 ° C. to reduce the adhesive strength on its holding surface is used.
[0122]
Next, the element structure 11 held by the first holding film 42 and the second holding film 43 is heated to about 120 ° C. By the heating at about 120 ° C., the adhesive layer provided on the first holding film 42 foams and the adhesive strength between the element structure 11 and the p-type semiconductor layer 14 is reduced. As shown in (), the first holding film 42 is easily separated from the p-type semiconductor layer 14. At this time, there is no possibility that the adhesive of the first holding film 42 remains on the surface of the p-type semiconductor layer 14.
[0123]
Next, as shown in FIG. 12C, a Pt layer having a thickness of about 50 nm and an Au layer having a thickness of about 200 nm are formed on the entire surface of the p-type semiconductor layer 14 by electron beam evaporation. The p-side electrode 15A is formed. Subsequently, a metal film 18 having a thickness of about 50 μm is formed on the p-side electrode 15A by gold plating using the Au layer of the p-side electrode 15A as a base layer.
[0124]
Next, as shown in FIG. 13A, a portion of the metal film 18 corresponding to the chip division region of the element structure 11 is selectively etched to expose the chip division region of the p-side electrode 15A. Also in the third embodiment, the step of separating the substrate 20 and the step of forming the n-side electrode 17B and the bonding pad 16 are performed with the first holding film 42 provided on the element structure 11, and the p-side electrode 15A is formed. Since the film formation process of the metal film 18 and the etching process for the metal film 18 are performed in a state where the second holding film 43 is provided on the element structure 11, the thickness of the element structure 11 is extremely small, for example, about 5 μm. Even with a thin structure, the present invention can be implemented without any trouble.
[0125]
Next, as shown in FIG. 13B, the exposed region (dicing region) of the p-side electrode 15A held by the second holding film 43 from the metal film 18 and the lower portion thereof are cut using a dicing blade 50. I do. Thereby, as each element structure 11, a light emitting diode chip having a plane size of, for example, 300 μm square is obtained. At this time, the second holding film 43 is cut halfway.
[0126]
Next, as shown in FIG. 13 (c), by heating the second holding film 43 to about 170 ° C., the adhesive layer provided on the second holding film 43 foams, and the Since the adhesive strength between them decreases, each chip is easily peeled off from the second holding film 43. Thereafter, it is mounted in an assembling process such as die bonding, which is a later process.
[0127]
As described above, according to the manufacturing method according to the third embodiment, it is possible to obtain the light emitting diode element 10 having high luminance, excellent heat dissipation, excellent electrostatic withstand voltage, and low series resistance.
[0128]
(Fourth embodiment)
Hereinafter, a fourth embodiment of the present invention will be described with reference to the drawings.
[0129]
FIG. 14 shows a cross-sectional structure of a semiconductor light-emitting device according to a fourth embodiment of the present invention, which is a light-emitting diode device capable of emitting light of a short wavelength such as blue or green. 14, the same components as those shown in FIG. 10 are denoted by the same reference numerals, and description thereof will be omitted.
[0130]
As shown in FIG. 14, in the fourth embodiment, between the p-type semiconductor layer 14 and the p-side electrode 15A in the element structure 11, each is made of, for example, silicon oxide (SiO 2). ₂ ) And a tantalum oxide (Ta) having a higher refractive index than silicon oxide. ₂ O ₅ A plurality of mirror structures 25, which are alternately stacked with second dielectric layers made of a), are formed at an interval from each other.
[0131]
Each mirror structure 25 has a first dielectric layer having a thickness of 80 nm, a second dielectric layer having a thickness of 53 nm, and the first dielectric layer and the second dielectric layer each having one cycle. Minutes are stacked. Here, the thickness of each dielectric layer is designed such that, when the emission wavelength is 470 nm and the optical wavelength is λ, λ / 4 has the maximum reflectance.
[0132]
Here, the active layer 13 may have, for example, a quantum well structure. The blue light having a wavelength of, for example, 470 nm generated in the active layer 13 is reflected by the p-side electrode 15A made of Pt / Au and each mirror structure 25, passes through the n-side electrode 17B made of ITO, and is extracted outside. It is.
[0133]
As described above, according to the fourth embodiment, the metal provided below the element structure 11 constituting the light emitting diode element 10 so that the reflectance with respect to the light emitted from the active layer 13 is 90% or more. And a mirror structure 25 made of a dielectric having a high reflectivity of 90% or more for the emitted light. Thus, the emitted light emitted from the active layer 13 is reflected by the p-side electrode 15A and the mirror structure 25 and is extracted through the light-transmitting n-side electrode 17B provided on the n-type semiconductor layer 12, so that the light is emitted. The takeout efficiency can be greatly improved.
[0134]
In addition, since the metal film 18 is provided on the surface of the p-side electrode 15A on the opposite side (lower side) of the element structure 11 instead of the substrate made of single crystal, the heat generated in the active layer 13 The heat is radiated to the outside via the metal film 18. As described above, since the metal film 18 is provided instead of the single crystal substrate on which the element structure 11 made of the GaN-based semiconductor is grown, the heat dissipation is remarkably improved. High output operation. In addition, since there is no insulating substrate such as sapphire, electrostatic withstand voltage is improved.
[0135]
In the fourth embodiment, the dielectric film laminated on the mirror structure 25 is used. However, the present invention is not limited to this. For example, a laminated film made of an epitaxially grown GaN-based semiconductor is used, and the aluminum film between the adjacent films is used. The composition of (Al) or indium (In) may be changed to cause a difference in refractive index between each other, so that light emitted from the active layer 13 may be reflected at a high reflectance.
[0136]
Hereinafter, a method for manufacturing the light emitting diode element 10 configured as described above will be described with reference to the drawings.
[0137]
FIGS. 15 (a) to 15 (c) to 17 (a) to 17 (c) show cross-sectional configurations in the order of steps of a method for manufacturing a light emitting diode element according to the fourth embodiment of the present invention. .
[0138]
First, as shown in FIG. 15A, an n-type semiconductor layer 12 made of n-type AlGaN, an active layer 13 made of InGaN, and a p-type semiconductor layer 12 are formed on a main surface of a substrate 20 made of wafer-like sapphire by MOCVD. The element structure 11 including the n-type semiconductor layer 12, the active layer 13, and the p-type semiconductor layer 14 is formed by sequentially growing the p-type semiconductor layer 14 made of AlGaN.
[0139]
Subsequently, on the element structure 11, that is, on the p-type semiconductor layer 14, SiO 80 having a thickness of 80 nm is formed by, for example, RF sputtering. ₂ First dielectric layer made of Ta and having a thickness of 53 nm ₂ O ₅ The second dielectric layer made of the above is defined as one cycle, and a dielectric laminated film consisting of the ten cycles is deposited. Subsequently, a plurality of mirror structures 25 spaced from each other are formed from the dielectric laminated film by performing wet etching using, for example, hydrofluoric acid (HF) on the deposited dielectric laminated film. Thereafter, a Pt layer having a thickness of about 50 nm and an Au layer having a thickness of about 200 nm are formed by electron beam evaporation over the entire mirror structure 25 and the entire surface of the p-type semiconductor layer 14 including the region exposed from the mirror structure 25. Is formed.
[0140]
Next, as shown in FIG. 15B, a metal film 18 having a thickness of about 50 μm is formed on the p-side electrode 15A by gold plating using the Au layer of the p-side electrode 15A as a base layer. I do.
[0141]
Next, as shown in FIG. 15C, a first holding film 42 made of, for example, a polymer film having a thickness of about 100 μm is adhered on the metal film 18. Here, as the first holding film 42, a polymer film made of, for example, polyester, having an adhesive layer that is foamed by heating at about 120 ° C. and has a reduced adhesive strength on its holding surface is used. Subsequently, the substrate 20 is irradiated with third harmonic light of a YAG laser having a wavelength of 355 nm that oscillates in a pulsed manner from the surface on the opposite side of the element structure 11 so as to scan the substrate 20. As described above, the irradiated laser light is not absorbed by the substrate 20, but is absorbed by the element structure 11, that is, the n-type semiconductor layer 12. Due to the absorption of the laser light, the n-type semiconductor layer 12 locally generates heat, the bonds between atoms of the n-type semiconductor layer 12 are cut off at the interface with the substrate 20, and the n-type semiconductor layer 12 A thermal decomposition layer (not shown) containing metallic gallium is formed between the layers. Note that a KrF excimer laser light having a wavelength of 248 nm may be used as a light source of the laser light to be irradiated, instead of the third harmonic light of the YAG laser. Further, a bright line of a mercury lamp having a wavelength of 365 nm may be used instead of the laser light source.
[0142]
Next, as shown in FIG. 16A, the substrate 20 is separated from the element structure 11 and removed by melting the thermal decomposition layer by wet etching using hydrochloric acid or the like. Subsequently, an ITO film is deposited by, for example, an RF sputtering method on the surface of the element structure 11 from which the substrate 20 has been removed, opposite to the active layer 13 of the n-type semiconductor layer 12, and the deposited ITO film is patterned. An n-side electrode 17B is formed. Further, an electrode forming film made of Au is deposited on the formed n-side electrode 17B by, for example, an electron beam evaporation method, and patterning is performed on the deposited electrode forming film so as to cover a part of the n-side electrode 17B. Then, a bonding pad 16 is formed from the electrode forming film. The thickness of the electrode forming film is set to 500 nm or more, for example, about 800 nm, so that the wire bonding to the bonding pad 16 is reliably performed. The patterning of the ITO film and the electrode forming film may be performed simultaneously.
[0143]
Next, as shown in FIG. 16B, a second holding film 43 made of, for example, a polymer film having a thickness of about 100 μm is formed on the n-type semiconductor layer 12 including the bonding pad 16 and the n-side electrode 17B. Glue. As the second holding film 43, a polymer film made of, for example, polyester, having an adhesive layer which is foamed by heating at about 170 ° C. to reduce the adhesive strength on its holding surface is used.
[0144]
Next, the element structure 11 held by the first holding film 42 and the second holding film 43 is heated to about 120 ° C. By the heating at about 120 ° C., the adhesive layer provided on the first holding film 42 foams, and the adhesive strength between the first holding film 42 and the metal film 18 is reduced. As shown in FIG. The one holding film 42 is easily separated from the metal layer 18. At this time, there is no possibility that the adhesive of the first holding film 42 remains on the surface of the metal layer 18.
[0145]
Next, as shown in FIG. 17A, a portion of the metal film 18 corresponding to the chip division region of the element structure 11 is selectively etched to expose the chip division region of the p-side electrode 15A. Also in the fourth embodiment, the step of separating the substrate 20 and the steps of forming each of the n-side electrode 17B and the bonding pad 16 are performed with the first holding film 42 provided on the element structure 11, and the p-side electrode 15A Since the film formation process of the metal film 18 and the etching process for the metal film 18 are performed in a state where the second holding film 43 is provided on the element structure 11, the thickness of the element structure 11 is extremely small, for example, about 5 μm. Even with a thin structure, the present invention can be implemented without any trouble.
[0146]
Next, as shown in FIG. 17B, the exposed region (dicing region) of the p-side electrode 15A held by the second holding film 43 from the metal film 18 and the lower portion thereof are cut using a dicing blade 50. I do. Thereby, as each element structure 11, a light emitting diode chip having a plane size of, for example, 300 μm square is obtained. At this time, the second holding film 43 is cut halfway.
[0147]
Next, as shown in FIG. 17C, by heating the second holding film 43 to about 170 ° C., the adhesive layer provided on the second holding film 43 foams, and the bonding between each chip and each chip is performed. Since the adhesive strength between them decreases, each chip is easily peeled off from the second holding film 43. Thereafter, it is mounted in an assembling process such as die bonding, which is a later process.
[0148]
As described above, according to the manufacturing method according to the fourth embodiment, it is possible to obtain the light-emitting diode element 10 having high luminance, excellent heat dissipation, excellent electrostatic withstand voltage, and low series resistance.
[0149]
The mirror structure 25 is made of silicon oxide (SiO 2). ₂ ) And tantalum oxide (Ta) ₂ O ₅ ), Titanium dioxide (TiO 2) is used instead of tantalum oxide which is a high refractive index material constituting the second dielectric layer. ₂ ), Niobium oxide (Nb ₂ O ₅ ) Or hafnium oxide (HfO ₂ ) May be used.
[0150]
Further, instead of the laminated film made of a dielectric, aluminum gallium indium nitride (Al _x Ga _y In _1-xy N) (where 0 ≦ x, y ≦ 1, 0 ≦ x + y ≦ 1) is used to form a mirror structure having a high reflectance by changing the composition, the element shown in FIG. Since the film can be formed by epitaxial growth following the crystal growth of the structure 11, it is not necessary to use a film forming apparatus for forming a dielectric. In the patterning step of obtaining the plurality of mirror structures 25 from the formed semiconductor film, for example, chlorine (Cl ₂ ) A reactive ion etching (RIE) method using a gas may be used.
[0151]
In the first to fourth embodiments, the plane orientation of the main surface of the substrate 20 is not particularly limited. For example, in the case of sapphire, a typical (0001) plane or even a slight plane from the typical plane is used. Plane orientation (off-orientation).
[0152]
The crystal growth method of the element structure 11 grown on the substrate 20 is not limited to the MOCVD method, and may be, for example, a molecular beam epitaxial growth (MBE) method or a hydride vapor phase epitaxy (HVPE) method. Further, these three growth methods may be appropriately used depending on each semiconductor layer.
[0153]
The element structure 11 made of a GaN-based semiconductor only needs to include a layer that absorbs irradiation light in the element structure 11, and the layer that absorbs irradiation light does not necessarily need to be in contact with the substrate 20. The composition of the semiconductor layer that absorbs the irradiation light may be any group III-V nitride semiconductor having an arbitrary composition such as AlGaN or InGaN.
[0154]
Further, between the substrate 20 and the element structure 11, a light absorption layer having a smaller band gap than GaN, such as InGaN or ZnO, may be provided. In this case, since the absorption of the irradiation light is promoted by the light absorption layer, the light absorption layer is decomposed even by the low-output irradiation light.
[0155]
Further, the laser beam or the like may be irradiated while heating the substrate 20 to such an extent that the adhesive strength of the holding film 41 or the like does not decrease. By doing so, the semiconductor layer of the element structure 11 can be thermally decomposed while alleviating the stress caused by the difference in the coefficient of thermal expansion between the substrate 20 and the element structure 11, so that cracks generated in the element structure 11 can be prevented. can do.
[0156]
Further, before or after the light irradiation step, instead of the polymer material film, for example, silicon (Si) or silicon (Si) may be used on the element structure 11 so that the substrate 20 and the element structure 11 can be easily handled. A holding substrate made of a semiconductor such as gallium phosphide (GaAs), indium phosphide (InP), or gallium phosphide (GaP), or a holding substrate made of a metal such as copper (Cu) may be attached and further removed. .
[0157]
Also in the second to fourth embodiments, similarly to the modification of the first embodiment, after forming a thermal decomposition layer between the substrate 20 and the underlayer, the element structure 11 is regrown. May be.
[0158]
Also, in the first, third and fourth embodiments, similarly to the second embodiment, a current confinement film may be provided on the periphery of the chip.
[0159]
【The invention's effect】
According to the semiconductor light emitting device and the method of manufacturing the same according to the present invention, the substrate on which the semiconductor laminated film including the element structure has been grown is removed, and instead, a relatively thick metal film is provided. The absorption of emitted light by the substrate can be suppressed as compared with the case. As a result, more emitted light can be extracted from the surface of the semiconductor laminated film opposite to the metal film. Further, since the metal film is provided by removing the substrate, the series resistance can be reduced, and the heat dissipation is greatly improved and the electrostatic withstand voltage is increased.
[0160]
According to the method for mounting a semiconductor light emitting device according to the present invention, even when the thickness of the semiconductor laminated film is extremely small, for example, several μm or less, the die bonding can be performed with the film-shaped holding member adhered to the semiconductor laminated film. It is possible to mount an extremely thin semiconductor light emitting element.
[Brief description of the drawings]
FIG. 1 is a configuration sectional view showing a semiconductor light emitting device according to a first embodiment of the present invention.
FIGS. 2A to 2D are cross-sectional views illustrating a method of manufacturing the semiconductor light emitting device according to the first embodiment of the present invention in the order of steps.
FIGS. 3A to 3D are cross-sectional views illustrating a method of manufacturing the semiconductor light emitting device according to the first embodiment of the present invention in a process order.
FIG. 4 is a sectional view showing a configuration of a semiconductor light emitting device according to a second embodiment of the present invention.
FIGS. 5A to 5C are cross-sectional views in the order of steps showing a method for manufacturing a semiconductor light emitting device according to a second embodiment of the present invention.
FIGS. 6A to 6C are cross-sectional views in the order of steps showing a method for manufacturing a semiconductor light emitting device according to a second embodiment of the present invention.
FIGS. 7A to 7C are sectional views in the order of steps showing a method for manufacturing a semiconductor light emitting device according to a second embodiment of the present invention.
8 (a) to 8 (c) show a semiconductor light emitting device according to a modification of the second embodiment of the present invention, FIG. 8 (a) is a configuration sectional view, and FIG. 8 (b) is a chip surface by SEM (C) is a photograph of the surface of the chip in a light emitting state.
FIG. 9 is a graph showing an emission spectrum of a semiconductor light emitting device according to a modification of the second embodiment of the present invention.
FIG. 10 is a sectional view showing a configuration of a semiconductor light emitting device according to a third embodiment of the present invention.
FIGS. 11A to 11C are cross-sectional views illustrating a method of manufacturing a semiconductor light emitting device according to a third embodiment of the present invention in the order of steps.
FIGS. 12A to 12C are cross-sectional views illustrating a method of manufacturing a semiconductor light emitting device according to a third embodiment of the present invention in the order of steps.
FIGS. 13A to 13C are cross-sectional views in the order of steps showing a method for manufacturing a semiconductor light emitting device according to a third embodiment of the present invention.
FIG. 14 is a configuration sectional view showing a semiconductor light emitting device according to a fourth embodiment of the present invention.
FIGS. 15A to 15C are cross-sectional views illustrating a method of manufacturing a semiconductor light emitting device according to a fourth embodiment of the present invention in the order of steps.
FIGS. 16A to 16C are cross-sectional views illustrating a method of manufacturing a semiconductor light emitting device according to a fourth embodiment of the present invention in the order of steps.
FIGS. 17A to 17C are cross-sectional views illustrating a method of manufacturing a semiconductor light emitting device according to a fourth embodiment of the present invention in the order of steps.
FIG. 18 is a configuration sectional view showing a light emitting diode element according to a first conventional example.
FIG. 19 is a configuration sectional view showing a light emitting diode element according to a second conventional example.
[Explanation of symbols]
10. Light emitting diode element
11 Element structure (semiconductor laminated film)
12 n-type semiconductor layer
12A n-type semiconductor layer
13 Active layer
13A Active layer
14 p-type semiconductor layer
14A p-type semiconductor layer
15 p-side electrode (ITO)
15A p-side electrode (Pt / Au)
15B p-side electrode (Pt)
16 Bonding pad
17 n-side electrode (Ti / Au)
17A n-side electrode (Ti / Al)
17B n-side electrode (ITO)
18 Metal film
20 substrates
21 Solder material
22 packages
23 Current constriction film
24 Plating underlayer
25 Mirror structure
41 Retention film
42 First Retaining Film
43 Third holding film
50 dicing blade
51 collet

Claims (33)

A semiconductor laminated film including at least two semiconductor layers having different conductivity types from each other;
A first electrode formed on one surface of the semiconductor laminated film;
A second electrode formed on a surface facing the one surface of the semiconductor laminated film;
A semiconductor film formed so as to be in contact with the first electrode or the second electrode and having a thickness greater than or equal to the thickness of the semiconductor laminated film. 2. The semiconductor light emitting device according to claim 1, wherein the semiconductor laminated film is made of a III-V compound semiconductor containing nitrogen as a group V element. 3. The semiconductor light emitting device according to claim 1, wherein the thickness of the metal film is 10 μm or more. The device according to claim 1, wherein the metal film is made of gold, copper, or silver. The semiconductor light emitting device according to claim 1, wherein the metal film is formed by plating. 3. The semiconductor light emitting device according to claim 1, wherein the metal film includes a metal layer having a melting point of 300 ° C. or less at a portion opposite to the semiconductor laminated film. 4. The semiconductor light emitting device according to claim 6, wherein the metal layer includes tin. Among the first electrode and the second electrode, an electrode formed in contact with the metal film has a reflectance of 90% or more with respect to light emitted from the semiconductor laminated film. The semiconductor light emitting device according to claim 1, wherein: Of the first electrode and the second electrode, the electrode formed to be in contact with the metal film is a single-layer film made of at least one of gold, platinum, copper, silver, and rhodium, or a single-layer film made of these. The semiconductor light emitting device according to claim 1, wherein the semiconductor light emitting device is made of a laminated film including two or more of the above. Further comprising a mirror structure formed between the semiconductor laminated film and the metal film and made of a dielectric or a semiconductor,
9. The semiconductor according to claim 1, wherein the mirror structure has a reflectance of 90% or more with respect to light emitted from the semiconductor multilayer film. 10. Light emitting element. The mirror structure include silicon oxide, titanium oxide, niobium oxide, any of the tantalum oxide and hafnium oxide, or aluminum nitride gallium indium _{(Al x Ga y In 1-} x-y N) ( where, 0 ≦ x , Y ≦ 1, 0 ≦ x + y ≦ 1), and the refractive index with respect to the wavelength of light emitted from the semiconductor laminated film is formed to change periodically. Semiconductor light emitting device. 2. The electrode according to claim 1, wherein, of the first electrode and the second electrode, an electrode provided on a side opposite to the metal film with respect to the semiconductor stacked film has a light transmitting property. 3. The semiconductor light-emitting device according to claim 1. Of the first electrode and the second electrode, an electrode provided on the side opposite to the metal film with respect to the semiconductor stacked film is made of indium tin oxide or nickel having a thickness of 20 nm or less. The semiconductor light emitting device according to claim 1, wherein the semiconductor light emitting device is made of a metal containing. 2. The semiconductor light emitting device according to claim 1, further comprising a current confinement film formed of a dielectric, formed between and on the side of the semiconductor laminated film and the metal film. (A) forming a semiconductor laminated film including at least two semiconductor layers having different conductivity types on a single crystal substrate;
(B) separating the substrate from the semiconductor multilayer film;
(C) forming a first electrode on one surface of the semiconductor laminated film and forming a second electrode on a surface facing the one surface of the semiconductor laminated film;
Forming a metal film on one of the first electrode and the second electrode (d). The method according to claim 15, wherein the semiconductor laminated film is made of a III-V compound semiconductor containing nitrogen as a group V element. In the step (b),
By irradiating the substrate with irradiation light having a wavelength that passes through the substrate and is absorbed by a part of the semiconductor laminated film from a surface of the substrate opposite to the semiconductor laminated film, the semiconductor is formed inside the semiconductor laminated film. 17. The method according to claim 15, wherein the substrate is separated from the semiconductor laminated film by forming a decomposition layer in which a part of the laminated film is decomposed. In the step (b),
The method according to claim 15, wherein the substrate is separated from the semiconductor stacked film by removing the substrate by polishing. The step (a) comprises:
After forming a part of the semiconductor laminated film, by irradiating the substrate with irradiation light having a wavelength that transmits through the substrate and is absorbed by the semiconductor laminated film from a surface of the substrate opposite to the semiconductor laminated film. Forming a decomposition layer formed by decomposing the semiconductor laminated film inside a part of the semiconductor laminated film;
17. The method according to claim 15, further comprising, after forming the decomposition layer, forming a remaining portion of the semiconductor laminated film on a part of the semiconductor laminated film. Method. 20. The method according to claim 17, wherein the irradiation light is laser light oscillated in a pulsed manner. 20. The method according to claim 17, wherein the irradiation light is a bright line of a mercury lamp. 20. The method according to claim 17, wherein the irradiation light is applied so as to scan the surface of the substrate. 20. The method according to claim 17, wherein the irradiation light is irradiated while heating the substrate. Between the step (a) and the step (b),
After forming a laminated film made of a dielectric or a semiconductor on the semiconductor laminated film, the method further comprises a step (e) of patterning the formed laminated film,
In the step (c), one of the first electrode and the second electrode is formed on the patterned laminated film,
17. The method according to claim 15, wherein in the step (d), the metal film is formed on an electrode formed on the patterned laminated film. In the step (c), after the substrate is separated from the semiconductor laminated film, the other of the first electrode and the second electrode is placed on a surface of the semiconductor laminated film opposite to the laminated film. The method for manufacturing a semiconductor light emitting device according to claim 24, wherein the method is performed. Between the step (a) and the step (b),
(F) attaching a film-shaped first holding member made of a material different from the material constituting the semiconductor laminated film and retaining the semiconductor laminated film to the semiconductor laminated film;
17. The semiconductor light emitting device according to claim 15, further comprising, after the step (b), a step (g) of peeling the first holding member from the semiconductor laminated film. Production method. Before the step (g), a film-shaped second holding member having a characteristic different from that of the first holding member is attached to a surface of the semiconductor laminated film opposite to the first holding member. Step (h),
27. The method according to claim 26, further comprising a step (i) of peeling the second holding member from the semiconductor multilayer film after the step (g). . 28. The method according to claim 26, wherein the first holding member or the second holding member is a polymer material film, a single crystal substrate made of a semiconductor, or a metal plate. . The method for manufacturing a semiconductor light emitting device according to claim 28, wherein the polymer material film is provided with an adhesive layer that can be peeled off by heating on a bonding surface thereof. 17. The method according to claim 15, further comprising, before the step (c), a step (j) of selectively forming a current confinement film made of a dielectric on the semiconductor laminated film. The manufacturing method of the semiconductor light-emitting device according to the above. (A) forming a semiconductor laminated film including at least two semiconductor layers having different conductivity types on a single crystal substrate;
A step (b) of bonding a film-shaped holding member made of a material different from the material constituting the semiconductor laminated film and retaining the semiconductor laminated film to the semiconductor laminated film;
(C) dicing the semiconductor laminated film together with the holding member to produce a plurality of chips held by the individualized holding members;
(D) removing the holding member from each of the chips after performing die bonding on each of the chips held by the holding member. . 32. The method according to claim 31, wherein the holding member is a polymer material film. 33. The method according to claim 32, wherein the polymer material film is provided with an adhesive layer that can be peeled off by heating on a bonding surface thereof.

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