JP2004087697A - Method for manufacturing wiring board - Google Patents

Method for manufacturing wiring board Download PDF

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Publication number
JP2004087697A
JP2004087697A JP2002245403A JP2002245403A JP2004087697A JP 2004087697 A JP2004087697 A JP 2004087697A JP 2002245403 A JP2002245403 A JP 2002245403A JP 2002245403 A JP2002245403 A JP 2002245403A JP 2004087697 A JP2004087697 A JP 2004087697A
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JP
Japan
Prior art keywords
copper
copper foil
carrier
plating
foil
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
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JP2002245403A
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Japanese (ja)
Inventor
Katsuya Fukase
深瀬 克哉
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2002245403A priority Critical patent/JP2004087697A/en
Publication of JP2004087697A publication Critical patent/JP2004087697A/en
Pending legal-status Critical Current

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Abstract

<P>PROBLEM TO BE SOLVED: To enable a wiring board having high reliability to be easily manufactured by accurately forming a fine wiring pattern. <P>SOLUTION: A method for manufacturing the wiring board includes the steps of covering the surface of a base material 12 having an electric insulation with a copper foil 30 with a copper carrier with which the carrier 30b at the base material side is releasably covered with a copper foil 30a, perforating holes at the material 12 covered with the foil 30 with the carrier, plating the material 12 and the foil 30, forming a plating film 18 on an inner surface of a through hole 16 and the surface of the foil 30 with the carrier, then releasing the carrier 30b together with the film 18 with which the foil 30 is covered from the foil 30a, etching the foil 30a with which the surface of the material 12 is covered in a predetermined pattern, and forming a wiring pattern 20 on the surface of the material. <P>COPYRIGHT: (C)2004,JPO

Description

【0001】
【発明の属する技術分野】
本発明は配線基板の製造方法に関し、より詳細には銅キャリア付き銅箔を利用した配線基板の製造方法に関する。
【0002】
【従来の技術】
半導体素子を搭載して半導体装置を構成する配線基板には、樹脂基板の両面に配線層を形成した2層の配線基板、電気的絶縁性を有する絶縁層を介して配線層を多層に形成した製品がある。
図5は、樹脂基板の両面に形成する配線パターンをスルーホールを介して電気的に接続し、配線パターンをサブトラクト法によって形成する場合の配線基板の製造方法として一般的に行われている方法を示す。この製造方法では、図5(a)に示すように、樹脂からなるコア材12の両面に銅箔14が被着された両面銅張り基板10を使用して配線基板を形成する。
【0003】
図5(b)は、両面銅張り基板10にドリル加工あるいはレーザ加工によって貫通孔16を形成した状態を示し、図5(c)は、この貫通孔16を形成した基板に無電解銅めっきを施し、電解銅めっき(パネルめっき)を施した状態を示す。銅によるパネルめっきを施すことにより、貫通孔16の内面とコア材12の表面に被着された銅箔14の表面に銅層18が形成される。図5(d)は、銅層18および銅箔14をサブトラクト法によりエッチングして配線パターン20を形成し、2層の配線基板を得た状態を示す。基板の両面の配線パターン20は貫通孔16の内面に形成された銅層18によって電気的に接続されている。
【0004】
【発明が解決しようとする課題】
上述した配線基板の製造方法においては、銅によるパネルめっきによって銅箔14の表面に銅層18が形成された導体層に対してエッチングを施して配線パターン20を形成するから、エッチングの対象である導体層の厚さが厚くなり、配線パターン20を微細なパターンに形成することが難しくなる。また、基板にパネルめっきを施した際に、貫通孔16の開口部の周縁部でめっきが薄く形成される傾向があり、この部分から貫通孔16の内面に設けた銅層18にクラックが発生することがある。また、パネルめっきの際にめっき層の表面に微小な突起が形成されることがあり、このような突起がワイヤボンディング部に生じるとボンディング強度を低下させることがあり、また配線パターンの断線の原因になるといった課題がある。
【0005】
このような課題を解消する方法として、図5(e)に示すように、基板にパネルめっきを施した後(図5(c))、貫通孔16に樹脂22を充填し、貫通孔16の内部の樹脂22を残すように基板の表面を研磨した後(図5(f))、コア材12の表面の銅箔14をエッチングして配線パターンを形成する方法がある。この方法によれば、樹脂22を研磨する際に銅層18を研磨して除去することによりエッチング対象である導体層の厚さが薄くなるから、配線パターンを微細に形成することが可能となり、貫通孔16の内部の樹脂22を残すことにより貫通孔16の内部の銅層18が保護されて、基板の両面に形成された配線パターンが貫通孔16内の銅層18によって確実に電気的に接続されるようになる。
【0006】
しかしながら、貫通孔16に樹脂22を充填し、基板の両面を研磨するといった加工は、配線基板の製造工程において通常行われているめっきやエッチングといった作業とはまったく別個の作業となるから、配線基板を製造するための工数が増え、工程が煩雑になって製造コストがかかるといった課題がある。また、基板を研磨加工した際は、基板の収縮、変形の原因となり加工精度を低下させるという課題がある。
【0007】
そこで、本発明はこれらの課題を解決すべくなされたものであり、その目的とするところは、樹脂充填や研磨といった煩雑な処理作業を不要とし、容易に配線基板を製造することを可能にするとともに、微細な配線パターンであっても高精度に形成することができ、信頼性の高い配線基板を提供することができる配線基板の製造方法を提供するにある。
【0008】
【課題を解決するための手段】
本発明は、上記目的を達成するため次の構成を備える。
すなわち、電気的絶縁性を有する基材の表面に、銅キャリアに剥離可能に銅箔を被着した銅キャリア付き銅箔を、前記銅箔を基材側として被着し、前記銅キャリア付き銅箔が被着された基材に孔あけ加工を施し、前記基材および銅キャリア付き銅箔にめっきを施して、前記孔あけ加工によって形成した孔の内面および前記銅キャリア付き銅箔の表面にめっき皮膜を形成した後、前記銅キャリア付き銅箔に被着しているめっき皮膜とともに前記銅キャリアを、前記銅箔から剥離し、前記基材の表面に被着している銅箔を所定パターンにエッチングして基材の表面に配線パターンを形成することを特徴とする。
【0009】
前記銅キャリア付き銅箔が被着された基材に施す孔あけ加工として、下層の配線層に形成された配線パターンが底面に露出するビア穴を形成し、前記基材および銅キャリア付き銅箔にめっきを施す際に、前記ビア穴の内面および前記銅キャリア付き銅箔の表面にめっき皮膜を形成することを特徴とする。
また、前記基材および銅キャリア付き銅箔にめっきを施す際に、前記孔あけ加工によって形成された孔の内部を、めっき金属によって充填することを特徴とする。
また、前記銅箔をエッチングして基材の表面に配線パターンを形成する際に、前記基材の表面に被着している銅箔の表面に配線パターンとして残す部位を被覆したレジストパターンを形成し、該レジストパターンをマスクとして銅箔をエッチングすることにより配線パターンを形成することを特徴とする。
【0010】
【発明の実施の形態】
以下、本発明の好適な実施の形態について添付図面にしたがって詳細に説明する。
本発明に係る配線基板の製造方法においては、配線パターンを形成する導体材として銅キャリア付き銅箔を利用して、配線層間で配線パターンを電気的に接続して配線基板を形成することを特徴とする。図1は基板の両面に配線パターンを形成した2層の配線基板を形成する例を示す。図1(a)は、基材としてガラス・エポキシ等の樹脂からなるコア材12の両面に銅キャリア付き銅箔30を被着した状態を示す。基板の両面に配線パターンを形成した配線基板を製造する従来方法では、図5に示すようにコア材12の両面に銅箔14を被着した両面銅張り基板10を使用している。本実施形態では銅箔14にかえて銅キャリア付き銅箔30を被着することが特徴的である。
【0011】
銅キャリア付き銅箔30は、きわめて薄く形成された銅箔30aを銅キャリア30bによって支持したもので、銅箔30aと銅キャリア30bとは剥離層を介して剥離可能に接着されている。銅キャリア付き銅箔30の銅箔30aの厚さは数μm〜10数μm程度であるのに対して、銅キャリア30bは18μm〜35μm程度の厚さに形成される。銅箔30aと銅キャリア30bとは剥離層を介して接着されているから、銅箔30aをコア材12に向けて銅キャリア付き銅箔30をコア材12に熱圧着等によって被着した後、銅キャリア付き銅箔30から銅キャリア30bのみを剥離してコア材12の表面に銅箔30aのみを残すようにすることができる。
【0012】
図1(b)は、銅キャリア付き銅箔30をコア材12の両面に被着した基板にドリルあるいはレーザ加工等によって孔あけ加工を施し、貫通孔16を形成した状態を示す。孔あけ加工後は、デスミア処理を施して、貫通孔16の内面の汚れを除去する。
図1(c)は、次に、貫通孔16の内面にめっき給電層を形成するため無電解銅めっきを施し、電解銅めっき(パネルめっき)を施して、貫通孔16の内面および銅キャリア付き銅箔30の銅キャリア30bの外面にめっき皮膜として銅層18を形成した状態である。
【0013】
図1(d)は、本実施形態の製造工程において特徴的な工程で、銅キャリア付き銅箔30から銅キャリア30bを剥離して除去し、コア材12の表面に銅箔30aを残した状態を示す。前述したように、銅キャリア30bは銅箔30aから剥離するようにして簡単に除去することができる。本工程では、銅キャリア付き銅箔30から銅キャリア30bを除去することによって、同時に銅キャリア30bの外面に被着している銅層18をも除去し、コア材12の表面に銅箔30aのみが残るようにしたものである。なお、この操作の際に、貫通孔16の内面に被着している銅層18は銅キャリア30bに接続する端部で破断され、そのまま貫通孔16の内面に被着した状態で残り、貫通孔16の内面の銅層18とコア材12の表面に被着している銅箔30aとの電気的導通が確保される。
【0014】
図1(e)、(f)は、コア材12の表面に被着して残留している銅箔30aを所定のパターンにエッチングして配線パターン20を形成する工程である。図1(e)は、基板の両面を感光性レジスト(感光性の樹脂皮膜)により被覆し、感光性レジストを露光および現像して、配線パターン20として残す部位を被覆するレジストパターン32を形成した状態、図1(f)は、レジストパターン32をマスクとして銅箔30aをエッチングして配線パターン20を形成した状態を示す。
【0015】
こうして、基板の両面に配線パターン20が形成され、基板を厚さ方向に貫通する貫通孔16の内面に被着した銅層18によって基板の両面の配線パターン20が電気的に接続された配線基板が得られる。基板の両面に形成された配線パターン20は、貫通孔16の内壁面を被覆する銅層18とその端面でのみ接続する形態となっている。
【0016】
本実施形態の配線基板の製造方法によれば、銅キャリア付き銅箔30の銅キャリア30bを銅箔20aから剥離して除去することにより、貫通孔16の内面が銅層18によって被覆された状態で、コア材12の表面に銅箔30aのみを残すことができるから、コア材12の表面に残した銅箔30aをエッチングすることによって容易に配線パターン20を形成することができる。銅キャリア付き銅箔30の銅箔30aはきわめて薄く、かつ均一な厚さに形成されているから、きわめて高精度に微細な配線パターンを形成することができる。配線パターンを微細なパターンで高精度に形成する際に、このように導体層の厚さが均一に形成されていることはきわめて有効である。研磨加工によって導体層の厚さを制御する場合は、導体層の厚さが部分的にばらついたりすることから、配線パターンの形成精度が低下する。
【0017】
また、銅箔30aはキャリア付き銅箔30として形成された状態のままコア材12の表面に被着されるから、配線パターンを形成する導体層として必要な厚さにあらかじめ銅箔30aを設計しておくことで、形成すべき配線パターンに最適な厚さの導体層が形成でき、これによって製品に合わせた配線パターンを形成することが可能になる。
【0018】
また、本実施形態の配線基板の製造方法では、研磨加工といった煩雑な加工を行う必要がなく、複雑な製造工程によらずに配線基板を製造することができるという利点がある。また、研磨加工といった基板の収縮等の変形が生じやすい加工工程がないことから、基板の変形を抑えることができ、配線パターンを高精度に形成する際に問題となるスルーホールの位置ずれ等を抑えてより微細な配線パターンを高精度に形成することが可能になる。
【0019】
図2は、図1に示す配線基板の製造工程において、銅によるパネルめっきを施す際に、基板に設けた貫通孔16を銅によって充填するようにする例を示す。図2(a)、(b)はコア材12の両面に銅キャリア付き銅箔30を被着した基板に貫通孔16を形成した状態を示す。
図2(c)は、銅によるパネルめっきを施して貫通孔16の内部をめっき金属である銅めっき18aによって充填し、銅キャリア付き銅箔30の表面にめっき皮膜である銅層18を形成した状態を示す。図2(d)は、上述した実施形態と同様に、銅キャリア付き銅箔30の銅キャリア30bを銅箔30aから剥離して除去し、コア材12の表面に銅箔30aのみを残した状態を示す。
【0020】
本実施形態においては、貫通孔16の内部が銅めっき18aによって充填されているから、銅キャリア付き銅箔30から銅キャリア30bを剥離して除去する際に、貫通孔16に充填されている銅めっき18aについては、鋭利な刃、ウォーターカッター、エアカッター等で開口部側を部分的に事前に除去してから、銅キャリア30bを剥離するようにするとよい。
また、銅キャリア30bを銅箔30aから剥離する際には、銅キャリア30bを剥離するためのきっかけ部を形成する必要があるが、きっかけ部は基板の端縁で最終製品とならない部位に沿って銅キャリア付き銅箔30をエッチングし、あるいはカットして形成し、銅キャリア30bの切り離し端をきっかけ部として剥離すればよい。
【0021】
図2(e)、(f)は、コア材12に被着している銅箔30aの表面にレジストパターン32を形成し、レジストパターン32をマスクとして銅箔30aをエッチングして基板の両面に配線パターン20を形成した状態を示す。基板の両面に形成された配線パターン20は貫通孔16に充填された銅めっき18aを介して電気的に接続される。
なお、本実施形態のように貫通孔16が銅めっき18aによって充填されている場合は、基板の両面にラミネートして形成する感光性レジスト(感光性の樹脂皮膜)は、貫通孔16が透孔に形成されている場合に使用する樹脂皮膜よりも薄いものが使用できるから、露光および現像によって微細なパターニングが可能であり、微細な配線パターンであっても高精度に形成することが可能になる。
【0022】
本実施形態の製造方法によって得られた配線基板は、基板に形成された貫通孔16が銅めっき18aによって充填され、基板の両面に形成された配線パターン20は、貫通孔16に充填された銅めっき18aとその端面でのみ接続する形態となる。
本実施形態の場合も、前述した図1に示す配線基板の製造方法と同様に、製造工程を簡素化して、かつ高精度に配線パターンを形成することができる。
【0023】
銅キャリア付き銅箔を利用して層間で配線パターンを電気的に接続して配線基板を形成する方法は、上述した2層の配線基板を形成する方法に限られるものではない。図3は、銅キャリア付き銅箔を利用して多層に配線基板を形成する例を示す。
図3(a)は、配線パターン34が形成された下層の配線層の上に基材として絶縁層36を形成した状態を示す。絶縁層36は配線層の上にガラス・エポキシ等のプリプレグを積層したり、ポリイミドフィルム等の電気的絶縁性を有する絶縁性フィルムをラミネートしたりすることによって形成することができる。図3(b)は、絶縁層36の表面に銅キャリア付き銅箔30を銅箔30aを絶縁層36に向けて、熱圧着等により被着した状態を示す。
【0024】
図3(c)は、配線パターンを層間で電気的に接続するビアを形成するためのビア穴38を絶縁層36に孔あけ加工を施して形成した状態を示す。ビア穴38はレーザ加工等によって底面に下層の配線パターン34が露出するように形成することができる。
図3(d)は、無電解銅めっきあるいはスパッタリング等によりビア穴38の内面にめっき給電層を形成した後、電解銅めっき(パネルめっき)を施して、ビア穴38を銅めっき40aによって充填し、銅キャリア付き銅箔30の表面をめっき皮膜である銅層40によって被覆した状態である。
この状態で、銅キャリア付き銅箔30の銅キャリア30bを銅箔30aから剥離することにより、ビア穴38が銅めっき40aによって充填された状態で絶縁層36の表面に銅箔30aを残すことができる(図3(e))。
【0025】
図3(f)は、絶縁層36の表面に被着している銅箔30aをサブトラクト法によりエッチングして配線パターン20を形成した状態である。配線パターン20はビア穴38に充填された銅めっき40aによって、下層の配線パターン34と電気的に接続する。すなわち、銅めっき40aが層間で配線パターンを電気的に接続するビアとなっている。
本実施形態においても、銅キャリア付き銅箔30の銅キャリア30bを銅箔30aから剥離し、銅箔30aを絶縁層36の表面に残し、銅箔30aをエッチングすることによって、微細な配線パターンであっても高精度に形成することが可能になる。
【0026】
以上の操作を繰り返し行うことにより、銅キャリア付き銅箔30を利用して、層間で配線パターンが電気的に接続された多層配線基板を得ることができる。なお、本実施形態ではビア穴38が銅めっき40aによって完全に充填されるように電解銅めっきを施したが、ビア穴38の内底面および側面に銅層を形成するようにし、銅層を介して層間で配線パターンが電気的に接続されるようにすることも可能である。
【0027】
図4は、銅キャリア付き銅箔を利用して配線基板を形成するさらに他の実施形態を示すもので、内層に配線パターンを備えた多層の配線基板について、基板の最外面に銅キャリア付き銅箔を利用して配線パターンを形成する方法を示す。
図4(a)は、配線パターン42、ビア44を内層に形成し、絶縁層36a、36b、36cを積層した状態の基板を示す。
図4(b)は、この基板の両面に銅キャリア付き銅箔30を熱圧着等により被着し、基板に孔あけ加工を施して基板を厚さ方向に貫通する貫通孔46を形成した状態を示す。
図4(c)は、基板に無電解銅めっきおよび電解銅めっき(パネルめっき)を施して、貫通孔46の内面に銅層48を形成するとともに、銅キャリア付き銅箔30の表面に銅層48を形成した状態である。
【0028】
図4(d)は、銅キャリア付き銅箔30の銅キャリア30bを銅箔30aから剥離し、貫通孔46の内面に銅層48を被着した状態で、基板の両面に銅箔30aを残すようにした状態である。図4(e)は、銅箔30aをサブトラクト法によりエッチングして基板の最外面に配線パターン20を形成した状態を示す。
このように、内層に配線パターン42を形成した多層の配線基板についても銅キャリア付き銅箔30を利用することによって、容易にかつ高精度に配線パターンを形成することができる。
以上、各実施形態において銅キャリア付き銅箔30を利用して配線基板を形成する方法について説明したが、銅キャリア付き銅箔30は上記実施形態での使用例に限らず、種々の配線基板の製造に利用することが可能である。
【0029】
【発明の効果】
本発明に係る配線基板の製造方法によれば、上述したように、基材に銅キャリア付き銅箔を被着した後、銅キャリアを銅箔から剥離することによって、基材表面に所定の厚さの銅箔を、均一な厚さに形成することができ、この銅箔をエッチングすることによって、微細な配線パターンであっても高精度に形成することが可能になる。また、基材に銅キャリア付き銅箔を被着した状態で孔あけ加工を施し、めっきを施すことによって、層間で配線パターンを確実に電気的に導通させることができる。また、本製造方法によれば、工数を短縮して、簡易な方法によって信頼性の高い配線基板を製造することができる等の著効を奏する。
【図面の簡単な説明】
【図1】本発明に係る配線基板の製造方法により2層の配線基板を形成する方法を示す説明図である。
【図2】本発明に係る配線基板の製造方法により2層の配線基板を形成する他の方法を示す説明図である。
【図3】本発明に係る配線基板の製造方法により、多層の配線基板を形成する方法を示す説明図である。
【図4】本発明に係る配線基板の製造方法により、内層に配線パターンを有する配線基板を形成する方法を示す説明図である。
【図5】2層の配線基板を形成する従来方法を示す説明図である。
【符号の説明】
10 基板
12 コア材
14 銅箔
16 貫通孔
18 銅層
18a 銅めっき
20 配線パターン
20a 銅箔
22 樹脂
30 銅キャリア付き銅箔
30a 銅箔
30b 銅キャリア
32 レジストパターン
34 配線パターン
36、36a、36b、36c 絶縁層
38 ビア穴
40 銅層
40a 銅めっき
42 配線パターン
46 貫通孔
48 銅層
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for manufacturing a wiring board, and more particularly, to a method for manufacturing a wiring board using a copper foil with a copper carrier.
[0002]
[Prior art]
On a wiring board on which a semiconductor element is mounted to form a semiconductor device, a multi-layered wiring layer is formed via a two-layer wiring board in which wiring layers are formed on both surfaces of a resin substrate and an insulating layer having electrical insulation properties. There are products.
FIG. 5 shows a method generally used as a method of manufacturing a wiring board in a case where wiring patterns formed on both surfaces of a resin substrate are electrically connected through through holes and the wiring pattern is formed by a subtractive method. Show. In this manufacturing method, as shown in FIG. 5A, a wiring board is formed using a double-sided copper-clad board 10 in which copper foil 14 is adhered to both sides of a core material 12 made of resin.
[0003]
FIG. 5B shows a state in which a through hole 16 is formed in the double-sided copper-clad substrate 10 by drilling or laser processing. FIG. 5C shows a state in which the substrate in which the through hole 16 is formed is formed by electroless copper plating. This shows a state in which electrolytic copper plating (panel plating) has been performed. By performing panel plating with copper, a copper layer 18 is formed on the inner surface of the through hole 16 and the surface of the copper foil 14 attached to the surface of the core material 12. FIG. 5D shows a state in which the copper layer 18 and the copper foil 14 are etched by a subtraction method to form a wiring pattern 20, and a two-layer wiring board is obtained. The wiring patterns 20 on both surfaces of the substrate are electrically connected by a copper layer 18 formed on the inner surface of the through hole 16.
[0004]
[Problems to be solved by the invention]
In the above-described method of manufacturing a wiring board, since the conductor pattern in which the copper layer 18 is formed on the surface of the copper foil 14 is etched by panel plating with copper to form the wiring pattern 20, it is an object to be etched. The thickness of the conductor layer increases, and it becomes difficult to form the wiring pattern 20 in a fine pattern. Further, when the substrate is subjected to panel plating, the plating tends to be thinner at the periphery of the opening of the through hole 16, and cracks occur in the copper layer 18 provided on the inner surface of the through hole 16 from this portion. Sometimes. In addition, fine projections may be formed on the surface of the plating layer during panel plating, and if such projections are formed in the wire bonding portion, the bonding strength may be reduced, and the cause of disconnection of the wiring pattern may be caused. There is a problem that becomes.
[0005]
As a method for solving such a problem, as shown in FIG. 5E, after the substrate is subjected to panel plating (FIG. 5C), the through-hole 16 is filled with a resin 22, and the through-hole 16 is formed. There is a method in which the surface of the substrate is polished so as to leave the internal resin 22 (FIG. 5F), and then the copper foil 14 on the surface of the core material 12 is etched to form a wiring pattern. According to this method, when the resin layer 22 is polished and the copper layer 18 is polished and removed, the thickness of the conductor layer to be etched is reduced, so that a fine wiring pattern can be formed. By leaving the resin 22 inside the through-hole 16, the copper layer 18 inside the through-hole 16 is protected, and the wiring patterns formed on both sides of the substrate are reliably electrically connected by the copper layers 18 in the through-hole 16. Be connected.
[0006]
However, the process of filling the through holes 16 with the resin 22 and polishing both sides of the substrate is completely different from the operations such as plating and etching that are usually performed in the production process of the wiring substrate. There is a problem that the number of man-hours for manufacturing the device increases, the process becomes complicated, and the manufacturing cost increases. In addition, when the substrate is polished, there is a problem that the substrate is shrunk and deformed and the processing accuracy is reduced.
[0007]
Therefore, the present invention has been made to solve these problems, and an object of the present invention is to eliminate the need for complicated processing operations such as resin filling and polishing, and to easily manufacture a wiring board. In addition, another object of the present invention is to provide a method of manufacturing a wiring board capable of forming a fine wiring pattern with high accuracy and providing a highly reliable wiring board.
[0008]
[Means for Solving the Problems]
The present invention has the following configuration to achieve the above object.
That is, on the surface of a substrate having electrical insulation, a copper foil with a copper carrier that is removably coated with a copper foil on a copper carrier, the copper foil is applied with the copper foil as the base material side, and the copper with the copper carrier is coated. Drilling is performed on the base material on which the foil is adhered, plating is performed on the base material and the copper foil with the copper carrier, and the inner surface of the hole formed by the drilling process and the surface of the copper foil with the copper carrier are formed. After forming the plating film, the copper carrier is peeled off from the copper foil together with the plating film adhered to the copper foil with the copper carrier, and the copper foil adhered to the surface of the base material has a predetermined pattern. To form a wiring pattern on the surface of the substrate.
[0009]
As a drilling process to be performed on the base material on which the copper foil with the copper carrier is adhered, a via hole in which a wiring pattern formed on a lower wiring layer is exposed at the bottom is formed, and the base material and the copper foil with the copper carrier are formed. When plating is performed, a plating film is formed on the inner surface of the via hole and the surface of the copper foil with a copper carrier.
Further, when plating the base material and the copper foil with a copper carrier, the inside of the hole formed by the drilling is filled with a plating metal.
Further, when etching the copper foil to form a wiring pattern on the surface of the base material, forming a resist pattern covering a portion left as a wiring pattern on the surface of the copper foil adhered to the surface of the base material. The wiring pattern is formed by etching the copper foil using the resist pattern as a mask.
[0010]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.
The method for manufacturing a wiring board according to the present invention is characterized in that a wiring board is formed by using a copper foil with a copper carrier as a conductor material for forming a wiring pattern and electrically connecting the wiring patterns between wiring layers. And FIG. 1 shows an example of forming a two-layer wiring board in which wiring patterns are formed on both surfaces of a substrate. FIG. 1A shows a state in which a copper foil 30 with a copper carrier is applied to both surfaces of a core material 12 made of a resin such as glass or epoxy as a base material. In the conventional method of manufacturing a wiring board having a wiring pattern formed on both sides of the board, a double-sided copper-clad board 10 having copper foils 14 adhered to both sides of a core material 12 as shown in FIG. 5 is used. The present embodiment is characterized in that a copper foil 30 with a copper carrier is applied instead of the copper foil 14.
[0011]
The copper foil 30 with a copper carrier is obtained by supporting an extremely thin copper foil 30a with a copper carrier 30b, and the copper foil 30a and the copper carrier 30b are releasably bonded via a release layer. The thickness of the copper foil 30a of the copper foil 30 with a copper carrier is about several μm to about several tens μm, whereas the thickness of the copper carrier 30b is about 18 μm to 35 μm. Since the copper foil 30a and the copper carrier 30b are bonded via a release layer, the copper foil 30a is applied to the core material 12 by thermocompression bonding or the like with the copper foil 30a facing the core material 12, Only the copper carrier 30b can be peeled off from the copper foil 30 with a copper carrier, leaving only the copper foil 30a on the surface of the core material 12.
[0012]
FIG. 1B shows a state in which a through-hole 16 is formed in a substrate in which a copper foil 30 with a copper carrier is applied to both surfaces of the core material 12 by drilling or laser processing. After the drilling, a desmear process is performed to remove stains on the inner surface of the through hole 16.
FIG. 1 (c) shows that the inner surface of the through hole 16 is plated with electroless copper to form a plating power supply layer, and the inner surface of the through hole 16 with copper carrier is formed by electrolytic copper plating (panel plating). The copper layer 18 is formed as a plating film on the outer surface of the copper carrier 30b of the copper foil 30.
[0013]
FIG. 1D shows a characteristic process in the manufacturing process of the present embodiment, in which the copper carrier 30 b is peeled off and removed from the copper foil 30 with a copper carrier, leaving the copper foil 30 a on the surface of the core material 12. Is shown. As described above, the copper carrier 30b can be easily removed by peeling from the copper foil 30a. In this step, by removing the copper carrier 30b from the copper foil 30 with the copper carrier, the copper layer 18 attached to the outer surface of the copper carrier 30b is also removed at the same time, and only the copper foil 30a is formed on the surface of the core material 12. Is to remain. In this operation, the copper layer 18 adhered to the inner surface of the through hole 16 is broken at the end connected to the copper carrier 30b, and remains as it is adhered to the inner surface of the through hole 16; Electrical conduction between the copper layer 18 on the inner surface of the hole 16 and the copper foil 30a attached to the surface of the core material 12 is ensured.
[0014]
FIGS. 1E and 1F show a step of forming a wiring pattern 20 by etching a copper foil 30a remaining on the surface of the core material 12 into a predetermined pattern. In FIG. 1E, both surfaces of the substrate are covered with a photosensitive resist (photosensitive resin film), and the photosensitive resist is exposed and developed to form a resist pattern 32 covering a portion left as the wiring pattern 20. FIG. 1F shows a state in which the wiring pattern 20 is formed by etching the copper foil 30a using the resist pattern 32 as a mask.
[0015]
Thus, the wiring pattern 20 is formed on both surfaces of the substrate, and the wiring pattern 20 on both surfaces of the substrate is electrically connected by the copper layer 18 adhered to the inner surface of the through hole 16 penetrating the substrate in the thickness direction. Is obtained. The wiring patterns 20 formed on both sides of the substrate are configured to be connected only to the copper layer 18 covering the inner wall surface of the through hole 16 at the end face.
[0016]
According to the method for manufacturing a wiring board of the present embodiment, the inner surface of the through hole 16 is covered with the copper layer 18 by removing and removing the copper carrier 30b of the copper foil 30 with the copper carrier from the copper foil 20a. Accordingly, since only the copper foil 30a can be left on the surface of the core material 12, the wiring pattern 20 can be easily formed by etching the copper foil 30a left on the surface of the core material 12. Since the copper foil 30a of the copper foil 30 with a copper carrier is formed to be extremely thin and has a uniform thickness, a fine wiring pattern can be formed with extremely high precision. When the wiring pattern is formed with high precision with a fine pattern, it is extremely effective that the conductor layer is formed in such a uniform thickness. When the thickness of the conductor layer is controlled by polishing, the thickness of the conductor layer partially varies, so that the accuracy of forming the wiring pattern is reduced.
[0017]
Further, since the copper foil 30a is adhered to the surface of the core material 12 while being formed as the copper foil 30 with a carrier, the copper foil 30a is designed in advance to have a thickness required as a conductor layer for forming a wiring pattern. By doing so, a conductor layer having an optimum thickness for the wiring pattern to be formed can be formed, thereby making it possible to form a wiring pattern suitable for a product.
[0018]
In addition, the method for manufacturing a wiring board according to the present embodiment has an advantage that it is not necessary to perform complicated processing such as polishing, and the wiring board can be manufactured without using a complicated manufacturing process. In addition, since there is no processing step such as polishing that easily causes deformation such as shrinkage of the substrate, deformation of the substrate can be suppressed, and positional deviation of a through hole, which is a problem in forming a wiring pattern with high accuracy, can be reduced. Thus, a finer wiring pattern can be formed with high precision.
[0019]
FIG. 2 shows an example in which the through holes 16 provided in the substrate are filled with copper when performing panel plating with copper in the manufacturing process of the wiring substrate shown in FIG. FIGS. 2A and 2B show a state in which a through-hole 16 is formed in a substrate in which a copper foil 30 with a copper carrier is applied to both surfaces of a core material 12.
FIG. 2C shows that the inside of the through-hole 16 is filled with copper plating 18a as a plating metal by performing panel plating with copper, and the copper layer 18 as a plating film is formed on the surface of the copper foil 30 with a copper carrier. Indicates the status. FIG. 2D shows a state in which the copper carrier 30b of the copper foil 30 with a copper carrier is peeled off from the copper foil 30a and removed, leaving only the copper foil 30a on the surface of the core material 12, as in the above-described embodiment. Is shown.
[0020]
In the present embodiment, since the inside of the through hole 16 is filled with the copper plating 18a, when the copper carrier 30b is peeled off and removed from the copper foil 30 with a copper carrier, the copper filled in the through hole 16 is removed. Regarding the plating 18a, it is preferable that the copper carrier 30b be peeled off after partially removing the opening side in advance with a sharp blade, a water cutter, an air cutter, or the like.
When the copper carrier 30b is peeled off from the copper foil 30a, it is necessary to form a trigger for peeling the copper carrier 30b. However, the trigger is formed along an edge of the substrate that is not a final product. The copper foil 30 with a copper carrier may be formed by etching or cutting, and peeled off using the cut end of the copper carrier 30b as a trigger.
[0021]
2E and 2F, a resist pattern 32 is formed on the surface of the copper foil 30a adhered to the core material 12, and the copper foil 30a is etched by using the resist pattern 32 as a mask to form a resist pattern on both surfaces of the substrate. The state where the wiring pattern 20 is formed is shown. The wiring patterns 20 formed on both sides of the substrate are electrically connected via the copper plating 18a filled in the through holes 16.
When the through-hole 16 is filled with the copper plating 18a as in the present embodiment, the photosensitive resist (photosensitive resin film) formed by laminating on both surfaces of the substrate is formed such that the through-hole 16 is a through-hole. Since it is possible to use a thinner film than the resin film used when formed, fine patterning is possible by exposure and development, and even a fine wiring pattern can be formed with high precision. .
[0022]
In the wiring board obtained by the manufacturing method of the present embodiment, the through holes 16 formed in the board are filled with copper plating 18a, and the wiring patterns 20 formed on both sides of the board are formed of copper filled in the through holes 16. The connection is made only at the plating 18a and at its end face.
Also in the case of the present embodiment, the manufacturing process can be simplified and the wiring pattern can be formed with high accuracy, similarly to the method of manufacturing the wiring board shown in FIG. 1 described above.
[0023]
The method of forming a wiring board by electrically connecting wiring patterns between layers using a copper foil with a copper carrier is not limited to the above-described method of forming a two-layer wiring board. FIG. 3 shows an example in which a wiring board is formed in multiple layers using a copper foil with a copper carrier.
FIG. 3A shows a state in which an insulating layer 36 is formed as a base material on the lower wiring layer on which the wiring pattern 34 is formed. The insulating layer 36 can be formed by laminating a prepreg such as glass or epoxy on the wiring layer, or laminating an insulating film having electrical insulation such as a polyimide film. FIG. 3B shows a state in which the copper foil 30 with a copper carrier is attached to the surface of the insulating layer 36 by thermocompression bonding or the like with the copper foil 30a facing the insulating layer 36.
[0024]
FIG. 3C shows a state in which a via hole 38 for forming a via for electrically connecting a wiring pattern between layers is formed by punching the insulating layer 36. The via hole 38 can be formed by laser processing or the like so that the lower wiring pattern 34 is exposed on the bottom surface.
FIG. 3D shows that after forming a plating power supply layer on the inner surface of the via hole 38 by electroless copper plating or sputtering, electrolytic via plating (panel plating) is performed to fill the via hole 38 with copper plating 40a. In this state, the surface of the copper foil 30 with a copper carrier is covered with a copper layer 40 as a plating film.
In this state, by peeling the copper carrier 30b of the copper foil 30 with copper carrier from the copper foil 30a, the copper foil 30a can be left on the surface of the insulating layer 36 with the via holes 38 filled with the copper plating 40a. (FIG. 3E).
[0025]
FIG. 3F shows a state in which the wiring pattern 20 is formed by etching the copper foil 30a adhered to the surface of the insulating layer 36 by the subtraction method. The wiring pattern 20 is electrically connected to the lower wiring pattern 34 by the copper plating 40 a filled in the via hole 38. That is, the copper plating 40a serves as a via for electrically connecting the wiring pattern between the layers.
Also in the present embodiment, the copper carrier 30b of the copper foil 30 with a copper carrier is peeled off from the copper foil 30a, the copper foil 30a is left on the surface of the insulating layer 36, and the copper foil 30a is etched to form a fine wiring pattern. Even if there is, it can be formed with high precision.
[0026]
By repeating the above operation, it is possible to obtain a multilayer wiring board in which wiring patterns are electrically connected between layers by using the copper foil 30 with a copper carrier. In this embodiment, the electrolytic copper plating is performed so that the via hole 38 is completely filled with the copper plating 40a. However, a copper layer is formed on the inner bottom surface and the side surface of the via hole 38, and the copper layer is interposed. It is also possible that the wiring patterns are electrically connected between the layers.
[0027]
FIG. 4 shows still another embodiment in which a wiring board is formed using a copper foil with a copper carrier. For a multilayer wiring board having a wiring pattern in an inner layer, a copper carrier with a copper carrier is formed on the outermost surface of the board. A method for forming a wiring pattern using a foil will be described.
FIG. 4A shows a substrate in which a wiring pattern 42 and a via 44 are formed in an inner layer, and insulating layers 36a, 36b and 36c are stacked.
FIG. 4B shows a state in which copper foil 30 with a copper carrier is applied to both surfaces of the substrate by thermocompression bonding or the like, and a hole is formed in the substrate to form a through hole 46 penetrating the substrate in the thickness direction. Is shown.
FIG. 4C shows that the substrate is subjected to electroless copper plating and electrolytic copper plating (panel plating) to form a copper layer 48 on the inner surface of the through-hole 46 and a copper layer on the surface of the copper foil 30 with a copper carrier. 48 are formed.
[0028]
FIG. 4D shows a state in which the copper carrier 30b of the copper foil 30 with a copper carrier is peeled off from the copper foil 30a, and the copper layer 48 is applied to the inner surface of the through hole 46, and the copper foil 30a is left on both surfaces of the substrate. It is in the state as described above. FIG. 4E shows a state in which the copper foil 30a is etched by the subtraction method to form the wiring pattern 20 on the outermost surface of the substrate.
As described above, the wiring pattern can be easily and accurately formed by using the copper foil 30 with the copper carrier also for the multilayer wiring board in which the wiring pattern 42 is formed in the inner layer.
As described above, the method of forming the wiring board using the copper foil 30 with the copper carrier in each embodiment has been described. However, the copper foil 30 with the copper carrier is not limited to the usage example in the above embodiment, and may be used for various wiring boards. It can be used for manufacturing.
[0029]
【The invention's effect】
According to the method for manufacturing a wiring board according to the present invention, as described above, after a copper foil with a copper carrier is applied to a base material, the copper carrier is peeled off from the copper foil, so that a predetermined thickness is formed on the surface of the base material. Can be formed to a uniform thickness, and by etching this copper foil, it becomes possible to form even a fine wiring pattern with high precision. In addition, by performing drilling and plating with the copper foil with the copper carrier adhered to the base material, the wiring pattern can be reliably electrically conducted between the layers. Further, according to the present manufacturing method, the number of steps can be reduced, and a highly reliable wiring board can be manufactured by a simple method.
[Brief description of the drawings]
FIG. 1 is an explanatory view showing a method of forming a two-layer wiring board by a method of manufacturing a wiring board according to the present invention.
FIG. 2 is an explanatory view showing another method for forming a two-layer wiring board by the method for manufacturing a wiring board according to the present invention.
FIG. 3 is an explanatory view showing a method for forming a multilayer wiring board by the method for manufacturing a wiring board according to the present invention.
FIG. 4 is an explanatory view showing a method for forming a wiring board having a wiring pattern in an inner layer by the method for manufacturing a wiring board according to the present invention.
FIG. 5 is an explanatory view showing a conventional method for forming a two-layer wiring board.
[Explanation of symbols]
Reference Signs List 10 board 12 core material 14 copper foil 16 through hole 18 copper layer 18a copper plating 20 wiring pattern 20a copper foil 22 resin 30 copper foil with copper carrier 30a copper foil 30b copper carrier 32 resist pattern 34 wiring pattern 36, 36a, 36b, 36c Insulating layer 38 Via hole 40 Copper layer 40a Copper plating 42 Wiring pattern 46 Through hole 48 Copper layer

Claims (4)

電気的絶縁性を有する基材の表面に、銅キャリアに剥離可能に銅箔を被着した銅キャリア付き銅箔を、前記銅箔を基材側として被着し、
前記銅キャリア付き銅箔が被着された基材に孔あけ加工を施し、
前記基材および銅キャリア付き銅箔にめっきを施して、前記孔あけ加工によって形成した孔の内面および前記銅キャリア付き銅箔の表面にめっき皮膜を形成した後、
前記銅キャリア付き銅箔に被着しているめっき皮膜とともに前記銅キャリアを、前記銅箔から剥離し、
前記基材の表面に被着している銅箔を所定パターンにエッチングして基材の表面に配線パターンを形成することを特徴とする配線基板の製造方法。
On the surface of the substrate having electrical insulation, a copper foil with a copper carrier that is adhered to a copper carrier so that the copper foil can be peeled off, the copper foil is adhered as the substrate side,
The copper carrier-coated copper foil is subjected to a punching process on the adhered substrate,
After plating the base material and the copper foil with a copper carrier, after forming a plating film on the inner surface of the hole formed by the drilling process and the surface of the copper foil with the copper carrier,
The copper carrier is peeled off from the copper foil together with the plating film adhered to the copper foil with the copper carrier,
A method of manufacturing a wiring board, characterized by forming a wiring pattern on a surface of a base material by etching a copper foil applied on the surface of the base material into a predetermined pattern.
前記銅キャリア付き銅箔が被着された基材に施す孔あけ加工として、下層の配線層に形成された配線パターンが底面に露出するビア穴を形成し、
前記基材および銅キャリア付き銅箔にめっきを施す際に、前記ビア穴の内面および前記銅キャリア付き銅箔の表面にめっき皮膜を形成することを特徴とする請求項1記載の配線基板の製造方法。
As a drilling process to be performed on the substrate on which the copper foil with the copper carrier is adhered, a wiring pattern formed on a lower wiring layer is formed with a via hole that is exposed on the bottom surface,
2. The wiring board according to claim 1, wherein a plating film is formed on an inner surface of the via hole and a surface of the copper foil with the copper carrier when plating the base material and the copper foil with the copper carrier. Method.
前記基材および銅キャリア付き銅箔にめっきを施す際に、前記孔あけ加工によって形成された孔の内部を、めっき金属によって充填することを特徴とする請求項1または2記載の配線基板の製造方法。The method according to claim 1, wherein when plating the base material and the copper foil with a copper carrier, the inside of the hole formed by the drilling is filled with a plating metal. 4. Method. 前記銅箔をエッチングして基材の表面に配線パターンを形成する際に、
前記基材の表面に被着している銅箔の表面に配線パターンとして残す部位を被覆したレジストパターンを形成し、
該レジストパターンをマスクとして銅箔をエッチングすることにより配線パターンを形成することを特徴とする請求項1、2または3記載の配線基板の製造方法。
When etching the copper foil to form a wiring pattern on the surface of the substrate,
Forming a resist pattern covering a portion to be left as a wiring pattern on the surface of the copper foil adhered to the surface of the base material,
4. The method according to claim 1, wherein a wiring pattern is formed by etching the copper foil using the resist pattern as a mask.
JP2002245403A 2002-08-26 2002-08-26 Method for manufacturing wiring board Pending JP2004087697A (en)

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Cited By (7)

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Publication number Priority date Publication date Assignee Title
JP2006312265A (en) * 2005-05-09 2006-11-16 Furukawa Circuit Foil Kk Extremely thin copper foil with carrier, printed wiring board using it and multilayered printed wiring board
KR100778990B1 (en) 2005-03-29 2007-11-22 히다치 덴센 가부시끼가이샤 Double-sided wiring board fabrication method, double-sided wiring board, and base material therefor
KR100916124B1 (en) 2007-12-18 2009-09-08 대덕전자 주식회사 Carrier for coreless substrate processing and process technology thereof
JP2010073809A (en) * 2008-09-17 2010-04-02 Tdk Corp Method of manufacturing printed circuit board
JP2011210811A (en) * 2010-03-29 2011-10-20 Kyocer Slc Technologies Corp Method for manufacturing wiring board
CN103068188A (en) * 2012-12-21 2013-04-24 福州瑞华印制线路板有限公司 Method for plating inner side of hole of single-sided board with copper
KR20150052051A (en) * 2012-09-05 2015-05-13 미쓰이금속광업주식회사 Printed wiring board production method and printed wiring board

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100778990B1 (en) 2005-03-29 2007-11-22 히다치 덴센 가부시끼가이샤 Double-sided wiring board fabrication method, double-sided wiring board, and base material therefor
JP2006312265A (en) * 2005-05-09 2006-11-16 Furukawa Circuit Foil Kk Extremely thin copper foil with carrier, printed wiring board using it and multilayered printed wiring board
KR100916124B1 (en) 2007-12-18 2009-09-08 대덕전자 주식회사 Carrier for coreless substrate processing and process technology thereof
JP2010073809A (en) * 2008-09-17 2010-04-02 Tdk Corp Method of manufacturing printed circuit board
JP2011210811A (en) * 2010-03-29 2011-10-20 Kyocer Slc Technologies Corp Method for manufacturing wiring board
KR20150052051A (en) * 2012-09-05 2015-05-13 미쓰이금속광업주식회사 Printed wiring board production method and printed wiring board
KR20180108880A (en) * 2012-09-05 2018-10-04 미쓰이금속광업주식회사 Printed wiring board production method and printed wiring board
KR102046738B1 (en) * 2012-09-05 2019-11-19 미쓰이금속광업주식회사 Printed wiring board production method and printed wiring board
KR102090353B1 (en) * 2012-09-05 2020-03-17 미쓰이금속광업주식회사 Printed wiring board production method and printed wiring board
CN103068188A (en) * 2012-12-21 2013-04-24 福州瑞华印制线路板有限公司 Method for plating inner side of hole of single-sided board with copper

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