JP2004061118A - Apparatus and method for inspecting pattern - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a pattern inspecting apparatus that has less erroneous detection and enables relatively easy defect inspection even in a wiring pattern having different wiring widths. <P>SOLUTION: In a width measurement circuit 4, the wiring width is measured at a plurality of measurement positions in the wiring pattern used as a pattern to be inspected in a binary image. Then, the wiring width concerned is compared with a wiring width at a reference position corresponding to the measurement position of a confirming pattern that becomes a comparison reference being stored in a reference image memory 7 by a comparison circuit 8, and the presence or absence of a defect in the pattern to be inspected is judged based on a compared result by a judgment circuit 9. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a pattern inspection apparatus and a pattern inspection method for visually inspecting a pattern defect in a printed circuit board, a semiconductor package, a flat panel display, and the like.
[0002]
[Prior art]
Generally, in this type of pattern inspection apparatus, a predetermined detection is performed from a grayscale image (binary image or multi-valued image) generated based on imaging data of a pattern to be inspected (for example, a wiring pattern or a pad) on a printed circuit board or the like. An algorithm is used to detect a defect such as disconnection or short circuit on the pattern. As the detection algorithm at that time, a feature extraction algorithm (also called a design rule check (DRC) method) and a pattern matching (also called a perfect comparison method) have been used.
[0003]
The feature extraction algorithm performs a local window process on a grayscale image of a pattern to be inspected within a predetermined processing area, thereby extracting a defective portion in the pattern to be inspected as a singular point. Further, the measurement results such as the wiring width and the interval of the pattern are compared with a reference target, and if they differ from the reference target, the difference is determined to be a defect. On the other hand, the pattern matching is to directly compare the shapes of a reference non-defective pattern and a pattern to be inspected.
[0004]
[Problems to be solved by the invention]
However, in recent years, wiring patterns and the like on printed circuit boards and the like tend to be complicated and have high densities. In particular, there are many wiring patterns and those formed such that the width such as the interval between the wiring patterns changes depending on the location. . When inspecting a printed circuit board having such a wiring pattern, the following problem arises in the case of pattern inspection using a feature extraction algorithm.
[0005]
In other words, when performing line width inspection on a pattern in which the line width changes in this manner, a part based on a uniform pattern width is also recognized as a defect even if it is not a defect, and an appropriate inspection cannot be performed. Was. In other words, when a thin wiring pattern and a thick wiring pattern are mixed on the printed circuit board to be inspected, the tolerance for each pattern cannot be set independently, and the optimum tolerance according to the thickness of the wiring pattern cannot be set. Pattern inspection was difficult. The general line width in the pattern inspection is allowed to be, for example, 2/3 or more and 4/3 or less of the reference line width. However, in pattern inspection using only the minimum line width using feature extraction, it is difficult to make comparisons based on a ratio where the tolerance changes depending on the line width. In pattern inspection using pattern matching, the wiring shape is limited due to the nature of the algorithm. Only the comparison was possible, and the line width itself could not be inspected.
[0006]
The present invention has been made in view of such circumstances, and its purpose is to prevent erroneous detection from occurring even in a pattern having a high density and a complicated shape having different line widths and pattern intervals depending on locations. Another object of the present invention is to provide a pattern inspection apparatus and a pattern inspection method that enable relatively easy defect inspection.
[0007]
[Means for Solving the Problems]
In order to achieve the above object, the invention according to claim 1 is based on a grayscale image of imaging data obtained by photographing an inspection object provided with a pattern to be inspected in a predetermined imaging range. In a pattern inspection apparatus for detecting a defect, width measurement means for measuring a pattern dimension in a specific direction at a plurality of measurement positions for one pattern to be inspected in the grayscale image, and the measurement position in a grayscale image of a non-defective pattern serving as a comparison reference A reference data storage unit that stores reference data relating to a pattern dimension in a specific direction at a reference position corresponding to the reference position, and measurement data obtained from a measurement result of the width measurement unit with respect to the pattern to be inspected and the reference data storage unit. Comparing means for comparing the stored reference data, and a defect in the pattern to be inspected based on a comparison result of the comparing means. That comprises a defect determination unit that determines whether there was a gist.
[0008]
According to a second aspect of the present invention, in the pattern inspection apparatus according to the first aspect, the reference data storage unit automatically generates the reference data based on a measurement result when the non-defective pattern is a pattern to be inspected. The gist of the present invention is that reference data generating means is provided.
[0009]
According to a third aspect of the present invention, in the pattern inspection apparatus according to the first or second aspect, the reference data storage means includes a dimension in a predetermined direction at one position in a predetermined area in a grayscale image of the non-defective pattern. Together with the reference data according to the above, storing a plurality of reference data having the same data value as the reference data as each reference data at another plurality of positions located near the one position in the predetermined area. Abstract.
[0010]
According to a fourth aspect of the present invention, in the pattern inspection apparatus according to any one of the first to third aspects, the defect determination unit determines that a comparison result of the comparison unit is a defect for the pattern to be inspected. The gist is to judge that there is a defect when the value is out of a predetermined allowable condition range set in advance to judge that there is no defect.
[0011]
On the other hand, the invention according to claim 5 relating to the pattern inspection method is characterized in that a plurality of inspection patterns in a gray scale image of imaging data obtained by photographing an inspection target object provided with a pattern to be inspected in a predetermined imaging range. After measuring the pattern size in the specific direction at the measurement position, the pattern size and reference data relating to the pattern size in the specific direction at the reference position corresponding to the measurement position in the grayscale image of the non-defective pattern as a comparison reference The gist is to compare and then determine the presence or absence of a defect in the pattern to be inspected based on the result of the comparison.
[0012]
BEST MODE FOR CARRYING OUT THE INVENTION
An embodiment in which the present invention is embodied in a printed circuit board pattern inspection apparatus will be described below with reference to FIGS.
[0013]
As shown in FIG. 1, a pattern inspection apparatus 1 according to the present embodiment includes a CCD 2, a preprocessing circuit 3, a width measurement circuit 4, a switching circuit 5, an expansion processing circuit 6, a reference image memory 7, a comparison circuit 8, and an allowable error memory. 9, a judgment circuit 10 is provided.
[0014]
In the CCD 2, a wiring pattern as a pattern to be inspected formed on a printed circuit board to be inspected is photographed in an imaging range of a predetermined shape (a rectangular shape in the present embodiment). Image data obtained by shooting is sent to the preprocessing circuit 3. The preprocessing circuit 3 includes an A / D converter and a binarization circuit (not shown). In the A / D converter, the imaging data output from the CCD 2 is converted into a digital signal.
The digitally converted image data is subjected to a binarization process by a binarization circuit at a predetermined threshold value, and a binary image, which is a type of a grayscale image in which the set value (pixel value) of each pixel is 0 and 1 Generated image data is generated.
[0015]
In the width measuring circuit 4 as the width measuring means and the reference data generating means, the wiring width as the pattern dimension is measured using the feature extraction filter in the entire area of the binarized image data. In the switching circuit 5, the circuit for transmitting the wiring width measurement data is switched between when the reference wiring width is generated and when the wiring width inspection is performed. That is, the wiring width measurement data is transmitted to the expansion processing circuit 6 as the reference data generating means when the reference wiring width is generated, and is transmitted to the comparison circuit 8 as the comparing means when performing the wiring width inspection. The expansion processing circuit 6 expands the wiring width measurement data output from the width measuring circuit 4 to a predetermined area when the reference wiring width is generated.
[0016]
The expanded wiring width measurement data is stored as reference data in a reference image memory 7 serving as reference data storage means. The comparison circuit 8 compares the reference data with the wiring width at a position corresponding to the reference data in the wiring pattern of the binarized image data when performing the wiring width inspection. At the time of comparison, allowable error information set in advance in the allowable error memory 9 is referred to. The determination circuit 10 as a defect determination unit determines the presence or absence of a defect based on the result of the comparison by the comparison circuit 8.
[0017]
Next, a method of performing a pattern inspection using the pattern inspection apparatus according to the present embodiment configured as described above will be described. The pattern inspection includes a step of automatically generating reference data and a step of performing a line width inspection of a wiring pattern. First, a process of automatically generating reference data will be described.
[0018]
Image data of a wiring pattern on a printed circuit board of a non-defective pattern which is imaged by the CCD 2 and is a comparison reference is sent to the pre-processing circuit 3 and is converted into multi-valued 8 bits (256 gradations) by the A / D converter (not shown). Digitally converted. Then, from the digitally converted image data, binarized image data separated into a wiring pattern area and other areas is generated in a binarizing circuit by a predetermined threshold (128 in this embodiment). FIG. 2 is a binarized image B which is a part of the binarized image data obtained by imaging the non-defective pattern and in which an area where the wiring patterns 21 to 23 are arranged is enlarged. In the present embodiment, the pixel values of the wiring pattern regions 21a to 23a in the wiring patterns 21 to 23 are 1, and the pixel values of the other regions 24 are 0. The generated binarized image data is sent to the width measuring circuit 4.
[0019]
In the width measuring circuit 4, the wiring width of the wiring patterns 21 to 23 is measured using a feature extraction filter. Hereinafter, a method of measuring the wiring width using the feature extraction filter in the width measuring circuit 4 will be described. FIG. 3 shows the shapes of three types of feature extraction filters (first to third feature extraction filters 31 to 33) in the present embodiment. Each of the feature extraction filters 31 to 33 includes a wiring detection unit 31a to 33a for detecting the wiring pattern area 21a to 23a in the binary image B and a non-wiring detection unit 31b to 33b for detecting the other area 24. Respectively.
[0020]
The first feature extraction filter 31 is a filter for recognizing the wiring width of 3 to 5 pixels, and includes a first wiring detecting unit 31a and a pair of first non-wiring detecting units 31b. The first wiring detection unit 31a has a shape in which three unit pixels 30 in the binarized image B are continuously arranged in a specific direction (vertical direction in FIG. 3), and the first non-wiring detection unit 31b has a unit pixel 30 Have a shape in which three pixels are continuously arranged in a direction orthogonal to the specific direction (the horizontal direction in FIG. 3). Further, both ends in the longitudinal direction of the first wiring detecting section 31a and respective central parts of the pair of first non-wiring detecting sections 31b are formed so as to be located on the same straight line, and furthermore, recognition is made between the two. In order to allow the wiring width to have a width (3 to 5 pixels), the wirings are formed so as to be arranged one pixel apart.
[0021]
When the pixel value of the binarized image data at the position corresponding to the first wiring detection unit 31a is 1 (wiring pattern areas 21a to 23a), the first feature extraction filter 31 sets 1 as an output code. When the pixel value is 0 (the other area 24), 0 is output as an output code. When the pixel value of the binarized image data at the position corresponding to the pair of first non-wiring detection units 31b is 0 (the other area 24), 1 is output as the output code, and the pixel value is 1 (wiring In the case of the pattern areas 21a to 23a), 0 is output as an output code. Only when all the output codes of the first wiring detection unit 31a and the output codes of the pair of first non-wiring detection units 31b become 1, the output result of the first feature extraction filter 31 becomes It becomes 1.
[0022]
The second feature extraction filter 32 is a filter for recognizing the wiring width of 5 to 7 pixels, and includes a second wiring detecting unit 32a and a pair of second non-wiring detecting units 32b. The second wiring detection unit 32a has a shape in which five unit pixels 30 in the binary image B are continuously arranged in a specific direction (the vertical direction in FIG. 3), and the second non-wiring detection unit 32b is a unit. The pixel 30 has a shape in which three pixels 30 are continuously arranged in a direction orthogonal to the specific direction (the horizontal direction in FIG. 3). Further, both ends in the longitudinal direction of the second wiring detecting section 32a and the respective central parts of the pair of second non-wiring detecting sections 32b are formed so as to be located on the same straight line. In order to allow the wiring width to have a width (5 to 7 pixels), it is formed so as to be arranged one pixel apart.
[0023]
The third feature extraction filter 33 is a filter for recognizing the wiring width of 7 to 9 pixels, and includes a third wiring detecting unit 33a and a pair of third non-wiring detecting units 33b. The third wiring detection unit 33a has a shape in which the unit pixels 30 in the binarized image B are continuously arranged for seven pixels in a specific direction (vertical direction in FIG. 3), and the third non-wiring detection unit 33b has the unit pixel 30 Have a shape in which three pixels are continuously arranged in a direction orthogonal to the specific direction (the horizontal direction in FIG. 3). Further, both ends in the longitudinal direction of the third wiring detecting section 33a and the respective central parts of the pair of third non-wiring detecting sections 33b are formed so as to be located on the same straight line. In order to allow the wiring width to have a width (7 to 9 pixels), the wirings are formed so as to be arranged one pixel apart. The conditions of the output results from the second feature extraction filter 32 and the third feature extraction filter 33 are the same as those of the first feature extraction filter 31.
[0024]
Further, these feature extraction filters 31 to 33 are rotated by a predetermined angle (for example, 22.5 degrees, 45 degrees, 67.5 degrees, and 90 degrees with reference to feature extraction filters 31 to 33 shown in FIG. 3 (0 degree)). , 112.5 degrees, 135 degrees, 157.5 degrees), and the width measurement using these feature extraction filters is also performed simultaneously. This makes it possible to measure the line widths of the wiring patterns arranged in various directions. Therefore, for each pixel of the binarized image B, eight patterns are prepared for each of the three types of feature extraction filters 31 to 33 that are rotated at intervals of 22.5 degrees, and a total of 24 types of filtering are performed. become.
[0025]
For example, when only the output result of the second feature extraction filter 32 is 1 at a certain measurement position on the binarized image B, it is understood that the wiring pattern width at that measurement position is 6. Further, when the output result of the second feature extraction filter 32 and the third feature extraction filter 33 becomes 1 at a certain measurement position, it can be understood that the wiring pattern width at that measurement position is 7. When the output results of all the feature extraction filters 31 to 33 are 0, that is, when the wiring width cannot be detected, the one detected at the measurement position exceeds the measurement range of these feature extraction filters or is not a wiring pattern. Is determined.
[0026]
Then, for each of the feature extraction filters 31 to 33, the width of the wiring pattern (hereinafter referred to as the wiring width) obtained by the feature extraction filter of each pattern having the same shape and the same size except for the rotation angle at the same measurement position ) Is the narrowest wiring width at the measurement position. When the output results of all the feature extraction filters 31 to 33 at all the rotation angles are 0, that is, when the wiring width cannot be detected, the detection result at that position indicates the measurement range of these feature extraction filters. It is judged that it exceeds or is not a wiring pattern. The wiring width obtained from the output results of the feature extraction filters 31 to 33 is output as a numerical code 25 along a position corresponding to the center of the wiring patterns 21 to 23 as shown in FIG. Is done. FIG. 5 is an enlarged view of a portion P surrounded by a dotted line in FIG. Each digitized code 25 representing each of the wiring widths 3 to 5 is output at a position corresponding to the center of the wiring pattern 23 in the width direction.
[0027]
When the reference wiring width is generated, the digitized code 25 generated by the width measuring circuit 4 is sent to the expansion processing circuit 6 connected via the switching circuit 5. The expansion processing circuit 6 executes a process of expanding the numerical code 25 to a peripheral position, assuming a positional shift at the time of inspection. The expansion range at this time may be arbitrary, and is expanded in an appropriate range based on the assumed displacement amount. FIG. 6 shows the result of the expansion processing. FIG. 7 is an enlarged view of a portion Q surrounded by a dotted line in FIG. In the present embodiment, as shown in the figure, the wiring pattern 23 is expanded by three pixels in the left and right width directions. Then, the digitized code 25 generated in this way and the digitized code 26 having the same data value as the digitized code 25 expanded to the surrounding area are together with the positional information as reference data as reference data. Stored in the memory 7.
[0028]
Next, a process of performing a line width inspection of a wiring pattern will be described. Note that the method of generating the binarized image B is the same as that described above, and will not be described here. FIG. 8 is a diagram of a binarized image B obtained by enlarging a part of binarized image data generated by imaging a binarized image of a printed circuit board which is an inspection target provided with a pattern to be inspected. It is. In the wiring pattern regions 41a to 43a of the wiring patterns 41 to 43 in FIG. 11, a pinhole is surrounded by a dotted line 44, a chipped portion is surrounded by a dotted line 45, and a portion surrounded by a dotted line 46 is displayed. There are protrusions on the surface.
[0029]
In the width measurement circuit 4, the wiring width in each of the wiring patterns 41 to 43 is measured by the method described above for all the positions of all the wiring pattern regions 41a to 43a in the binary image B. The digitized code (hereinafter also referred to as measurement data) generated by the width measuring circuit 4 at the time of executing the wiring width inspection is sent to the comparison circuit 8 connected via the switching circuit 5. The comparison circuit 8 compares the reference data stored in the reference image memory 7 with the measurement data at a position corresponding to the reference data. At the time of comparison, the allowable error information set in the allowable error memory 9 is referred to. That is, the allowable condition range of the error is set in advance, and it is determined whether or not the measured data matches the reference data in consideration of the allowable condition range. This is because, when comparing the reference data and the measurement data, it is not practically preferable to judge that a defect is present unless the wiring width is always the same, since erroneous detection occurs frequently.
[0030]
The allowable error condition range is stored in advance in the allowable error memory 9 for each wiring width of the assumed reference data. In the present embodiment, when the wiring width of the reference data is 3 pixels or less, 2 to 4 pixels are set as the allowable range. When the wiring width is 4 to 7 pixels, it is 3 pixels or more and 1/2 pixel of the reference data. The above is an allowable range. When the wiring width of the reference data is 8 pixels or more, the allowable range is 2/3 pixels or more and 4/3 pixels or less of the reference data. As described above, by giving an appropriate tolerance for each wiring width, an optimal tolerance can be set. The comparison result obtained in this way is sent to the judgment circuit 10.
[0031]
FIG. 9 shows the result of comparison between the reference data and the measurement data. In the portion of the wiring pattern 41 surrounded by the dotted line 44, there are two wiring widths measured due to the presence of the pinholes, and both widths are shorter than the reference data. Further, in a portion surrounded by a dotted line 45 in the wiring pattern 42, the measured wiring width is shorter than the reference data due to the presence of a chip. In the portion of the wiring pattern 43 surrounded by the dotted line 46, the measured wiring width is longer than the reference data due to the presence of the protrusion.
[0032]
The determination circuit 10 determines whether there is a defect. When the measurement data is smaller than the range of the permissible error (the portion indicated by the dotted lines 44 and 45 in FIG. 9), the determination circuit 10 determines that there is a chip or a pinhole at that position. If it is large (the portion indicated by the dotted line 46 in FIG. 9), it is determined that there is a protrusion at that position. On the other hand, if the position is within the allowable error range, it is determined that there is no defect at that position. Then, the determination result thus obtained is output to an external output device such as a television monitor. At this time, as shown in FIG. 10, a mark of a predetermined shape (in FIG. 10, a cross mark) is additionally displayed near the defect position, so that the defect and the defect position can be easily recognized.
[0033]
Therefore, in the present embodiment, the following effects can be obtained by configuring the pattern inspection apparatus as described above.
(1) In the present embodiment, a method is adopted in which the line width is measured at every position of the wiring patterns 41 to 43 of the pattern to be inspected and the wiring patterns 21 to 23 of the non-defective pattern, and successive comparison is performed. Therefore, even on a printed circuit board on which a wiring pattern having a high-density and complicated shape is formed, it is possible to relatively easily and reliably perform defect detection based on a line width inspection in which erroneous detection is less likely to occur.
[0034]
(2) In the present embodiment, the line width of the non-defective pattern is measured by the width measuring circuit 4 and the measured data is stored in the reference image memory 7 via the switching circuit 5 and the expansion processing circuit 6 as reference data. be able to. That is, the reference data can be automatically created.
[0035]
(3) In the present embodiment, the expansion processing circuit 6 expands the reference data of the non-defective pattern also to the surrounding area, so that a slight shift occurs when comparing the reference data with the measurement data of the pattern to be inspected. Even if it occurs, an accurate line width inspection can be performed.
[0036]
(4) In the present embodiment, the detection of an excessive defect in the determination circuit 10 can be suppressed by providing an allowable error range of a predetermined width or a predetermined ratio with respect to the measurement data.
[0037]
The above embodiment may be modified as follows.
In the above embodiment, the binarized image B has been described as an example. However, the present invention is not limited to this, and a pattern inspection may be performed on a multi-valued image (for example, an 8-bit 256-gradation image) that is a grayscale image. In this case, the preprocessing circuit 3 is configured without including the binarization circuit. That is, the preprocessing circuit 3 includes an A / D converter (not shown), and the imaging data output from the CCD 2 is converted into a digital signal by the A / D converter to generate multi-valued image data.
[0038]
In the above embodiment, the wiring patterns 21 to 23 have been described as examples of the pattern to be inspected. However, the present invention is not limited to this. Is also good.
[0039]
In the above embodiment, the line width was measured at all positions (measurement positions) of the wiring pattern areas 21a to 23a (41a to 43a) in the binarized image B, but a predetermined range in the pattern forming direction or the like is limited. Line width may be measured.
[0040]
In the above embodiment, three types of feature extraction filters 31 to 33 are used. However, the present invention is not limited to this, and a required number of filters capable of detecting the minimum width and the maximum width of an assumed wiring pattern are used. Is desirable. Further, the feature extraction filters 31 to 33 are not limited to the shapes described in the present embodiment and the drawings, but may adopt a predetermined shape suitable for measuring the line width.
[0041]
In the above embodiment, the expansion processing circuit 6 automatically generates the reference data relating to the non-defective pattern, but may input the data from an input device such as a keyboard (not shown) each time. Also, it may be set in advance.
[0042]
In the above embodiment, when the reference data relating to the non-defective pattern is generated, the printed board of the non-defective pattern serving as the comparison reference is imaged by the CCD 2, but the reference data may be generated using the CAD data.
[0043]
In the above embodiment, the permissible error is stored in advance in the permissible error memory 9, but the permissible error may be calculated by calculation. For example, a method in which a deviation within a certain pixel (for example, two pixels) from the reference data is set as an allowable error (an example by addition), or a ratio between the measurement data and the reference data is obtained, and a certain ratio (for example, 80% to 120%) There is a method (an example based on a ratio) in which the deviation is set as an allowable error. Further, the deviation may be defined as a fixed pixel and a fixed ratio (for example, a deviation within 2 pixels and 80% to 120% of the reference data).
[0044]
In the above embodiment, the processing for expanding the digitized code 25 to the peripheral position is executed in the expansion processing circuit 6, but this processing may be omitted. That is, the digitized code 25 generated by the width measuring circuit 4 may be directly transmitted to the reference image memory 7.
[0045]
In the above embodiment, the presence or absence of a defect is determined based on the allowable error information set in the allowable error memory 9, but the defect may be determined without setting the allowable error.
[0046]
【The invention's effect】
As described above in detail, according to the present invention, erroneous detection hardly occurs even in a wiring pattern having a high density and a complicated shape having a different line width or pattern interval depending on a place, and defect detection can be performed relatively easily. It can be carried out.
[Brief description of the drawings]
FIG. 1 is a system configuration diagram of a pattern inspection apparatus according to an embodiment.
FIG. 2 is an explanatory diagram of a binarized image of reference data.
FIG. 3 is an explanatory diagram of a feature extraction filter.
FIG. 4 is an explanatory diagram at the time of measuring a wiring width.
FIG. 5 is an explanatory diagram at the time of measuring a wiring width.
FIG. 6 is an explanatory diagram of an expansion process.
FIG. 7 is an explanatory diagram of an expansion process.
FIG. 8 is an explanatory diagram of a binarized image of a pattern to be inspected.
FIG. 9 is an explanatory diagram at the time of a defect inspection.
FIG. 10 is an explanatory diagram of a defect position display example.
[Explanation of symbols]
4 Width measurement circuit as width measurement means and reference data generation means 6 Expansion processing circuit as reference data generation means 7 Reference image memory as reference data storage means 8 Comparison circuit as comparison means 9 Judgment circuit as defect judgment means

Claims (5)

In a pattern inspection apparatus that detects a defect of the pattern to be inspected based on a grayscale image of imaging data obtained by photographing an inspection object provided with the pattern to be inspected in a predetermined imaging range,
Width measuring means for measuring a pattern dimension in a specific direction at a plurality of measurement positions for one pattern to be inspected in the grayscale image,
Reference data storage means for storing reference data relating to a pattern dimension in a specific direction at a reference position corresponding to the measurement position in a grayscale image of a non-defective pattern serving as a comparison reference,
Comparison means for comparing measurement data obtained from the measurement result of the width measurement means with respect to the pattern to be inspected and reference data stored in the reference data storage means; and A pattern inspection apparatus, comprising: a defect determination unit that determines presence or absence of a defect in a pattern. 2. The pattern according to claim 1, wherein the reference data storage unit includes a reference data generation unit that automatically generates the reference data based on a measurement result when the non-defective pattern is a pattern to be inspected. Inspection equipment. The reference data storage means stores a plurality of reference data having the same data value as the reference data together with reference data relating to a dimension in a predetermined direction at one position in a predetermined area in the grayscale image of the non-defective pattern. 3. The pattern inspection apparatus according to claim 1, wherein the reference data is stored as reference data at a plurality of other positions near the one position in the area. 4. The defect determination unit determines that there is a defect when the comparison result of the comparison unit deviates from a predetermined allowable condition range set in advance to determine that the pattern to be inspected has no defect. The pattern inspection apparatus according to claim 1. After measuring the pattern dimensions in a specific direction at a plurality of measurement positions in one inspected pattern in a grayscale image of the imaging data obtained by photographing the inspection object provided with the inspected pattern in a predetermined imaging range,
Compare the pattern size with reference data relating to the pattern size in a specific direction at the reference position corresponding to the measurement position in the grayscale image of the non-defective pattern as a comparison reference,
Thereafter, a pattern inspection method for determining the presence or absence of a defect in the pattern to be inspected based on a result of the comparison.

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