JP2004031732A5 - - Google Patents

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Publication number
JP2004031732A5
JP2004031732A5 JP2002187257A JP2002187257A JP2004031732A5 JP 2004031732 A5 JP2004031732 A5 JP 2004031732A5 JP 2002187257 A JP2002187257 A JP 2002187257A JP 2002187257 A JP2002187257 A JP 2002187257A JP 2004031732 A5 JP2004031732 A5 JP 2004031732A5
Authority
JP
Japan
Prior art keywords
groove
incidentally
rolled
shifting
overlap
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2002187257A
Other languages
Japanese (ja)
Other versions
JP2004031732A (en
JP3953900B2 (en
Filing date
Publication date
Application filed filed Critical
Priority to JP2002187257A priority Critical patent/JP3953900B2/en
Priority claimed from JP2002187257A external-priority patent/JP3953900B2/en
Publication of JP2004031732A publication Critical patent/JP2004031732A/en
Publication of JP2004031732A5 publication Critical patent/JP2004031732A5/ja
Application granted granted Critical
Publication of JP3953900B2 publication Critical patent/JP3953900B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Description

なお、圧延アンバー板１２を上面１３側から見た場合、上面１３側に設けられた溝部１８と、下面１４側に設けられた溝部１９とが重なり合わないように、これらを基板面方向にずらした状態で配置している。 Incidentally, when viewed rolled amber plate 12 from the upper surface 13 side, the groove 18 provided on the upper surface 13 side, so as not to overlap and a groove 19 provided on the lower surface 14 side, shifting them to the substrate surface direction Are placed in the

JP2002187257A 2002-06-27 2002-06-27 Multilayer resin wiring board and manufacturing method thereof Expired - Fee Related JP3953900B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002187257A JP3953900B2 (en) 2002-06-27 2002-06-27 Multilayer resin wiring board and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002187257A JP3953900B2 (en) 2002-06-27 2002-06-27 Multilayer resin wiring board and manufacturing method thereof

Publications (3)

Publication Number Publication Date
JP2004031732A JP2004031732A (en) 2004-01-29
JP2004031732A5 true JP2004031732A5 (en) 2005-06-02
JP3953900B2 JP3953900B2 (en) 2007-08-08

Family

ID=31182345

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002187257A Expired - Fee Related JP3953900B2 (en) 2002-06-27 2002-06-27 Multilayer resin wiring board and manufacturing method thereof

Country Status (1)

Country Link
JP (1) JP3953900B2 (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7765691B2 (en) * 2005-12-28 2010-08-03 Intel Corporation Method and apparatus for a printed circuit board using laser assisted metallization and patterning of a substrate
JP5183045B2 (en) * 2006-07-20 2013-04-17 三洋電機株式会社 Circuit equipment
JP2008060372A (en) * 2006-08-31 2008-03-13 Sanyo Electric Co Ltd Circuit apparatus, method of manufacturing the same, wiring substrate, and method of manufacturing the same
JPWO2008069260A1 (en) * 2006-11-30 2010-03-25 三洋電機株式会社 Circuit element mounting board, circuit device using the same, and air conditioner
JP2010278379A (en) * 2009-06-01 2010-12-09 Murata Mfg Co Ltd Wiring board and method of manufacturing the same
US9024446B2 (en) 2009-06-30 2015-05-05 Panasonic Intellectual Property Management Co., Ltd. Element mounting substrate and semiconductor module
KR101044127B1 (en) 2009-11-16 2011-06-28 삼성전기주식회사 Heat-dissipating substrate and fabricating method of the same
JP2012114217A (en) 2010-11-24 2012-06-14 Nitto Denko Corp Manufacturing method of wiring circuit board
KR101177651B1 (en) * 2011-01-25 2012-08-27 삼성전기주식회사 Printed circuit board and method of manufacturing the same
JP5178899B2 (en) 2011-05-27 2013-04-10 太陽誘電株式会社 Multilayer board

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