JP2004022969A - Semiconductor light emitting device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor light emitting element capable of obtaining white light of a high luminance, at a more inexpensive cost. <P>SOLUTION: A first light emitting structure is formed of a barrier layer 105, a lower active layer 106, and another barrier layer 107. A second light emitting structure is formed of the barrier layer 107, a middle active layer 108, and the other barrier layer 109. A third light emitting structure is formed of the barrier layer 109, an upper active layer 110, and the barrier layer 111. The light emitting wavelength of respective light emitting structures is specified so as to be the shortest in the first light emitting structure and the longest in the third light emitting structure. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor light emitting device that emits light in a visible region.
[0002]
[Prior art]
Conventionally, there have been three types of structures for a semiconductor light emitting element that can be used as a white light source. The first is a structure in which three types of light-emitting diodes that emit red, green, and blue light, which are the three primary colors of light, are used, and light generated from these is superimposed to form a white light source.
[0003]
Second, a white light source is obtained by extracting light emitted from a blue-green light emitting diode having a quantum well structure having a well layer of ZnCdSe grown on a ZnSe substrate through ZnSe as a substrate. This is because blue-green light emission is extracted from the quantum well, and the extracted light extracts orange light from a deep level called SA emission from a defect existing in the ZnSe substrate. By doing so, it is a structure that obtains white light.
[0004]
Third, a semiconductor chip of a light emitting diode that emits blue light is molded with plastic mixed with phosphor powder. The phosphor powder is made of a phosphor material that emits yellow to red light. The phosphor in the plastic mold is excited by blue emitted from the semiconductor chip (light emitting diode), and emits yellow to red light. In the third structure, white light is obtained by mixing yellow to red light from the phosphor and blue light from the semiconductor chip.
[0005]
[Problems to be solved by the invention]
In the first structure, it is necessary to prepare light emitting diode chips for three colors of light. As a configuration actually used, a total of three light emitting diode chips that emit red, green, and blue light are integrated. In the first structure, the light-emitting diode chips of three colors are made of different materials, respectively, and after independently forming elements of three colors, they are integrated on the same substrate. Further, in the first structure, it is necessary to adjust the light output of the three light emitting diode chips so that the sum of the light generated from the three light emitting diode chips becomes white. For example, the injection current for each light emitting diode chip has been adjusted. As described above, the first structure has a problem that mass productivity is hindered, for example, it is necessary to integrate a large number of elements, and it is necessary to adjust an injection current for each element.
[0006]
Next, the second structure requires a ZnSe substrate which is about one order of magnitude more expensive than a widely used semiconductor substrate such as Si or GaAs. Furthermore, when a semiconductor light emitting device is manufactured using a ZnSe substrate, a molecular beam epitaxial growth method (MBE) is required to form a crystal layer doped with a p-type impurity (carrier). Even if a polycrystalline layer doped with MBE can be manufactured, in order to obtain a crystal capable of activating the doped carrier in order to increase luminous efficiency, first, a zinc treatment must be performed as a substrate treatment before crystal growth. It is necessary to etch the substrate with a special acid that does not produce an oxide and to remove the substrate oxide film in the MBE growth chamber by hydrogen plasma treatment that does not roughen the substrate surface.
[0007]
In addition, in order to realize the second structure, it is necessary to control the rearrangement of the crystal surface. For this purpose, a reflection high-speed electron diffraction image is simultaneously observed during the growth, and the raw material supply ratio of the group II and the group VI is determined. It is necessary to control VI / II to about 1.1 to 1.3. These advanced manufacturing techniques make it possible for the first time to grow high-quality crystals to realize the second structure. The inventors developed this technology in 1997 and succeeded in developing a semiconductor laser on a ZnSe substrate for the first time in the world. Based Laser Diodes Homoepitaxia 11yGrown on Semi-Insulation ZnSe Substrates, Electron. Lett., 33, 11, pp. 990-991 (1997) .T.O.T.O.T.O.T.O.T.O.T. VI Laser Green On ZnSe Substrate Clean d \ with \ Hydrogen \ Plasma ", J. Crystal \ Growth, 184/185, pp. 550-553 (1998). \ T.Ohno, A.Ohki \ and \ T.Matsuoka.Sci. \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\ Growth, "J. Vac. Sci. Technol. B., 16, 4, pp. 2539-2545 (1998).).
[0008]
However, after the above developments, there has not been significant progress on the second structure, at the industrial or academic level. This is because, as a fundamental problem relating to the material, the crystal itself is fragile and is likely to have defects. Further, the second structure has a problem of SA emission intensity. In order to obtain white light by the second structure, it is necessary to control the thickness of the ZnSe substrate and adjust the ratio of the blue light intensity output from the light emitting diode structure on the substrate to the SA light emission intensity. Since the intensity of the SA emission largely depends on the characteristics of the material, this adjustment must be performed in accordance with the characteristics of the ZnSe substrate every time the element is manufactured, which is a factor that hinders mass productivity.
[0009]
In the third structure, the conversion efficiency of the injected power to light is the product of the luminous efficiency of the semiconductor chip and the luminous efficiency of the phosphor, and each luminous efficiency does not become 100%. Is low. For example, the luminous efficiency of the semiconductor optical device is about 40%, and the luminous efficiency of the phosphor is about 50%. Therefore, the efficiency of converting the injected power into light in the white light emitting device having the third structure is about 20%. And low. In such a third structure, the efficiency is almost the same as that of an incandescent lamp and lower than that of a fluorescent lamp, so that the advantage of the semiconductor optical device (LED) is reduced.
[0010]
As described above, in the related art, when manufacturing a white light semiconductor light emitting device, first, there are many manufacturing steps, and it is necessary to adjust to obtain white light. It was difficult to provide at low cost.
SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and has as its object to provide a semiconductor light emitting device capable of obtaining high-luminance white light at a lower cost.
[0011]
[Means for Solving the Problems]
A semiconductor light emitting device according to the present invention includes a first cladding layer formed on a substrate, a first light emitting structure formed on the first cladding layer, and a second light emitting structure formed on the first light emitting structure. And a second cladding layer formed on the second light emitting structure, wherein the first light emitting structure includes a first active layer sandwiched between barrier layers, and the second light emitting structure includes a barrier layer. The first light emitting structure and the second light emitting structure have different emission wavelengths.
The semiconductor light emitting element emits light obtained by combining the first light emitted from the first light emitting structure and the second light emitted from the second light emitting structure having a different wavelength from the first light.
[0012]
In the above-mentioned semiconductor light emitting device, the first active layer and the second active layer have different composition ratios of In._1-XYGa_XAl_YN (0 ≦ X, Y ≦ 1, 0 ≦ X + Y <1), and the first active layer and the second active layer may have different thicknesses of In._1-XYGa_XAl_YN (0 ≦ X, Y ≦ 1, 0 ≦ X + Y <1).
In the above-described semiconductor light emitting device, the barrier layer has a band gap energy higher than that of the first and second active layers._1-XYGa_XAl_YN (0 ≦ X, Y ≦ 1, 0 ≦ X + Y ≦ 1).
[0013]
A semiconductor light emitting device according to the present invention includes a first cladding layer formed on a substrate, a first light emitting structure formed on the first cladding layer, and a second light emitting structure formed on the first light emitting structure. At least a structure, a third light emitting structure formed on the second light emitting structure, and a second cladding layer formed on the third light emitting structure, wherein the first light emitting structure is sandwiched between barrier layers The first light emitting structure is constituted by a first active layer, the second light emitting structure is constituted by a second active layer sandwiched by barrier layers, and the third light emitting structure is constituted by a third active layer sandwiched by barrier layers. The first light emitting structure, the second light emitting structure, and the third light emitting structure have different light emission wavelengths.
The semiconductor light emitting device includes a first light emitted from the first light emitting structure, a second light emitted from the second light emitting structure having a different wavelength from the first light, and a light having a different wavelength from the first and second lights. The light emitted from the third light emitting structure is combined with the third light emitted from the third light emitting structure.
[0014]
In the above-described semiconductor light emitting device, the first active layer, the second active layer, and the third active layer each have a different composition ratio of In._1-XYGa_XAl_YN (0 ≦ X, Y ≦ 1, 0 ≦ X + Y <1). The first active layer, the second active layer, and the third active layer have different thicknesses of In._1-XYGa_XAl_YN (0 ≦ X, Y ≦ 1, 0 ≦ X + Y <1).
In the above semiconductor light emitting device, the barrier layer is made of In having a larger band gap energy than the first to third active layers._1-XYGa_XAl_YN (0 ≦ X, Y ≦ 1, 0 ≦ X + Y ≦ 1).
[0015]
A semiconductor light emitting device according to the present invention includes: a first light emitting unit having a lower clad layer, a lower barrier layer, a first active layer, an upper barrier layer, and an upper clad layer, which are sequentially formed on a substrate; A second light-emitting portion, in which a lower clad layer, a lower barrier layer, a second active layer, an upper barrier layer, and an upper clad layer are sequentially stacked, and a lower clad layer, a lower barrier layer, and a third barrier layer formed on a substrate. An active layer, an upper barrier layer, and an upper cladding layer are stacked at least in the order of a third light emitting unit. The first light emitting unit, the second light emitting unit, and the third light emitting unit have different emission wavelengths. It is like that.
The semiconductor light emitting element includes a first light emitted from the first light emitting portion, a second light emitted from the second light emitting portion having a different wavelength from the first light, and a second light having a different wavelength from the first and second lights. The light emitted from the third light emitting unit is combined with the third light emitted from the third light emitting unit.
[0016]
In the above-described semiconductor light emitting device, the first active layer, the second active layer, and the third active layer each have a different composition ratio of In._1-XYGa_XAl_YN (0 ≦ X, Y ≦ 1, 0 ≦ X + Y <1). The first active layer, the second active layer, and the third active layer have different thicknesses of In._1-XYGa_XAl_YN (0 ≦ X, Y ≦ 1, 0 ≦ X + Y <1).
In the above-described semiconductor light emitting device, the lower barrier layer and the upper barrier layer are formed of In having a larger band gap energy than the first to third active layers._1-XYGa_XAl_YN (0 ≦ X, Y ≦ 1, 0 ≦ X + Y ≦ 1).
[0017]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
<Embodiment 1>
FIG. 1 is a schematic cross-sectional view illustrating a configuration example of a semiconductor light emitting device according to the present embodiment. This semiconductor light-emitting device is a white light-emitting diode having three light-emitting layers, and FIG. 1 schematically shows a cross section cut in the thickness direction of crystal growth. This light-emitting diode first has a (0001) plane sapphire (Al₂O₃A buffer layer 102 made of GaN and having a thickness of 20 nm, an electrode layer 103 made of n-type GaN doped with Si and having a thickness of 4 μm, and an n-type doped Si Al_0.1Ga_0.9A cladding layer (first cladding layer) 104 made of N and having a thickness of 0.5 μm is provided. The single crystal substrate 101 is not limited to sapphire. For example, silicon carbide (SiC), zinc oxide (ZnO), lithium gallate (LiGaO₂) May be used.
[0018]
On the cladding layer 104, a barrier layer 105 made of n-type InGaAlN to which Si is added,_1-XYGa_XAl_YIn where Y = 0 in N (0 ≦ X, Y ≦ 1, 0 ≦ X + Y <1)_1-XGa_XA lower active layer (first active layer) 106 made of N; a barrier layer 107 made of n-type InGaAlN doped with Si;_{1- X '}Ga_{X '}An intermediate active layer (second active layer) 108 made of N; a barrier layer 109 made of n-type InGaAlN doped with Si;_{1-X "}Ga_{X "}An upper active layer (third active layer) 110 made of N and a barrier layer 111 made of InGaAlN are formed. On the barrier layer 111, p-type Al added with Mg_0.1Ga_0.9A cladding layer (second cladding layer) 112 made of N and having a thickness of 0.5 μm, and a contact layer 113 made of p-type GaN doped with Mg and having a thickness of 0.1 μm are formed.
[0019]
Further, on the contact layer 113, SiO 2 having a substantially circular opening window having a diameter of about 20 μm is provided.₂Is formed, and a p-type metal electrode 115 that is in contact with the contact layer 113 through the opening window is formed on the current limiting insulating layer 114. Although not shown, the p-type metal electrode 115 includes a 50 nm-thick palladium layer which directly contacts the contact layer 113, a 30 nm-thick platinum layer formed thereon, and a 200 nm-thickness layer formed thereon. It has a laminated structure with a gold layer.
The electrode layer 103 has an exposed region formed by partially removing each layer on the electrode layer 103, and the n-type metal electrode 116 is formed in the exposed region. Although not shown, the n-type metal electrode 116 has a laminated structure of a 50-nm-thick titanium layer that directly contacts the exposed region, a 30-nm-thick platinum layer, and a 200-nm-thick gold layer.
[0020]
In the semiconductor light emitting device thus configured in the present embodiment, the first light emitting structure is formed by the barrier layer 105, the lower active layer 106, and the barrier layer 107, and the barrier layer 107, the middle active layer 108, the barrier layer 109 Form a second light emitting structure, and the barrier layer 109, the upper active layer 110, and the barrier layer 111 form a third light emitting structure. As will be described later, the emission wavelength of each light emitting structure is the shortest for the first light emitting structure and the longest for the third light emitting structure by controlling the composition and thickness of each active layer. That is, the light emitting structure closer to the single crystal substrate 101 from which light is emitted is formed so as to have a shorter emission wavelength (to have a larger band gap). Therefore, light emitted from the third light emitting structure is emitted from the back surface of the single crystal substrate 101 without being absorbed by the second light emitting structure and the first light emitting structure.
[0021]
Of the light emitted from the second light emitting structure, light emitted toward the first light emitting structure is emitted from the back surface of the single crystal substrate 101 without being absorbed by the first light emitting structure. On the other hand, of the light emitted from the second light emitting structure, the light emitted toward the third light emitting structure is absorbed by the third light emitting structure. The absorbed light is converted into a wavelength of light emitted from the third light emitting structure, and emitted from the back surface of the single crystal substrate 101 as light from the third light emitting structure.
[0022]
In the light emitted from the first light emitting structure, the light emitted to the single crystal substrate 101 side is emitted from the back surface of the single crystal substrate 101 without being subjected to the above-described absorption. On the other hand, of the light emitted from the first light emitting structure, light emitted to the side opposite to the single crystal substrate 101 is absorbed by the second light emitting structure or the third light emitting structure. Each of these absorbed lights is converted into a wavelength of light emitted from the second light emitting structure or the third light emitting structure, and is emitted from the back surface of the single crystal substrate 101, respectively.
[0023]
In the semiconductor light emitting device shown in FIG. 1, InGaN is used for the active layer (well layer), but the present invention is not limited to this. By appropriately setting the thickness of the active layer and the composition of the barrier layer, InN can be used for the active layer.
[0024]
As described above, in the semiconductor light emitting device of FIG. 1, by designing the stacking order of each light emitting structure in consideration of the positional relationship with the light extraction direction, high efficiency white light emission with reduced loss is achieved. Is obtained. Further, in the semiconductor light emitting device of FIG. 1, there is no need to prepare individual device chips for light of three colors, no special manufacturing device or manufacturing method is required, and no complicated adjustment is required. Therefore, according to the semiconductor light emitting device of FIG. 1, the device can be provided at lower cost.
[0025]
In addition, in the semiconductor light emitting device of FIG. 1, since the device can be formed with a smaller area than the conventional device, for example, a plurality of devices are simultaneously formed on the same substrate, and these are cut out to obtain a semiconductor light emitting device chip. In this case, more chips can be obtained. Also in this regard, the element can be provided at lower cost due to the generally-known mass production effect and the like. In addition, since the element can be formed thin, it can be mounted on a smaller device.
[0026]
Incidentally, it is also possible to realize a semiconductor laser resonator with the layer configuration shown in FIG. In this case, FIG. 1 is a side view showing the emission end face of the semiconductor laser resonator. In this case, a groove having a width of 2 μm extending in the normal direction of the paper surface of FIG. 1 is formed in the current limiting insulating layer 114 so as to reach both ends of the element, and a p-type metal electrode 115 is formed along the groove. It will be. The emission end face shown in FIG. 1 is a plane cut out by cleavage, and a light output is extracted from this emission end face in a direction normal to the paper surface of FIG.
[0027]
Next, a method for manufacturing the semiconductor light emitting device shown in FIG. 1 will be described. First, a metal organic chemical vapor deposition apparatus having a vertical growth furnace is used for crystal growth for forming each crystal layer. Ammonia is used as a nitrogen source, and nitrogen gas is used as a carrier gas when growing a layer containing In, and hydrogen gas is used when growing a layer not containing In. The growth pressure is normal pressure.
First, the surface of the single-crystal substrate 101 made of sapphire is nitrided in an ammonia atmosphere at a substrate temperature of 1050 ° C., and thereafter, the buffer layer 102 is formed by growing the GaN at a substrate temperature of 550 ° C. In the growth of GaN, triethyl gallium (TEG) having a relatively low gallium vapor pressure is used as a gallium source.
[0028]
Subsequently, the single crystal substrate 101 is annealed at 1050 ° C. for 9 minutes to perform single crystallization of the buffer layer 102. Next, the temperature of the single crystal substrate 101 is set to 1020 ° C., n-type GaN to which Si is added, and n-type Al to which Si is added._0.1Ga_0.9N is sequentially grown to form an electrode layer 103 and a cladding layer 104. As the aluminum raw material, trimethyl aluminum (TMA) is used, and as the gallium raw material, trimethyl gallium (TMG) having a relatively high vapor pressure is used. Further, in order to add Si to each layer, silane (SiH) having a concentration of 1 ppm diluted with hydrogen is used.₄) Use gas. The same raw material is used for the addition of Si in the growth process of each layer described below.
[0029]
Subsequently, the barrier layer 105, the lower active layer 106, the barrier layer 107, the middle active layer 108, the barrier layer 109, the upper active layer 110, and the barrier layer 111 are formed by continuous crystal growth (metal organic chemical vapor deposition). In the growth of these indium-containing layers, the growth temperature is set to about 500 ° C. because the nitrogen equilibrium vapor pressure on the solid phase of InN is high. Trimethylindium (TMI) is used as the indium raw material. In addition, TEG is used as a gallium raw material in growing these indium-containing layers. This is because TEG decomposes at a lower temperature and has a lower vapor pressure than TMG, and is suitable for controlling the composition of the crystal layer.
[0030]
Here, in the growth of each layer containing indium, in order to prevent the deposition of metal indium and grow a layer made of a high-quality alloy, the ratio (V / III) is set to 660000. In growing the layer containing indium, the carrier gas and the bubbling gas are nitrogen. This is because the decomposition of ammonia is suppressed when hydrogen is used as a carrier gas or the like. Proceedings of the Lectures of the Alliance for Applied Physics, p. 270 (1p-ZN-10) (1989)).
[0031]
After growing each layer containing indium, the source gas is changed and p-type Al to which Mg is added._0.1Ga_0.9A p-type GaN doped with N and Mg is grown to form a cladding layer 112 and a contact layer 113. As a raw material for adding Mg, methylcaptan / biscyclopentadienylmagnesium (MeCp₂Mg). This raw material is a liquid, and a commonly used solid raw material, biscyclopentadienyl magnesium (Cp₂The reproducibility of the Mg concentration is better than that of Mg).
[0032]
After forming the cladding layer 112 and the contact layer 113, annealing is performed in a nitrogen atmosphere at 700 ° C. for 30 minutes in order to activate the added Mg. Subsequently, using an RF magnetron sputtering apparatus, SiO 2 was formed on the contact layer 113.₂The current limiting insulating layer 114 made of is formed, and is processed by a known photolithography technique and etching technique to form an opening window. After an opening window is formed in the current-limiting insulating layer 114, a 50 nm-thick palladium film, a 30-nm-thick platinum film, and a 200-nm-thick gold film are formed on the current-limiting insulating layer 114 including the inside of the opening window by using an electron beam evaporation apparatus. Are stacked to form a p-type metal electrode 115.
[0033]
Next, a part of the cladding layer 104 and the electrode layer 103 is removed from the current limiting insulating layer 114 by a known photolithography technique and an etching technique, so that a part of the electrode layer 103 is exposed. Form 116. The etching of the crystal layers such as the contact layer 113 to the cladding layer 104 may be performed by, for example, reactive ion etching using chlorine gas as an etching gas. The n-type metal electrode 116 is formed by stacking 50 nm thick titanium, 30 nm thick platinum, and 200 nm thick gold on the exposed surface of the electrode layer 103, and etching the stacked body by a known photolithography technique and etching. It is formed by patterning with technology.
[0034]
As described above, after the p-type metal electrode 115 and the n-type metal electrode 116 are formed, the back surface of the single crystal substrate 101 is polished, and the single crystal substrate 101 is thinned from its original thickness of 450 μm to 200 μm. Then, the back side is mirror-finished. After the back surface of the single crystal substrate 101 is polished to a mirror surface, these are cleaned, and the single crystal substrate 101 is cut into predetermined dimensions using a diamond scriber, and cut out into elements. The element size is about 500 μm square.
[0035]
When a current is applied to the thus formed device using the p-type metal electrode 115 as an anode and the n-type metal electrode 116 as a cathode and light emitted from the back surface of the single crystal substrate 101 is observed, bluish white light is obtained. It is. As described above, the light emission obtained in this embodiment has a bluish white color. By appropriately controlling the composition of the crystal layer constituting the active layer and the thickness of the active layer, the emission color having desired characteristics can be obtained. Can be obtained.
[0036]
Further, in the semiconductor light emitting device of FIG. 1, three active layers are stacked with a barrier layer interposed therebetween. However, the present invention is not limited to this, and the composition of the crystal constituting each active layer and the thickness thereof are appropriately set, and By designing the emission color of the light-emitting layer, even a semiconductor light-emitting element in which two active layers are stacked via a barrier layer can emit substantially white light.
[0037]
Here, In used in the above-described embodiment is used._1-XYGa_XAl_YN (0 ≦ X, Y ≦ 1, 0 ≦ X + Y ≦ 1) will be described. Conventionally, a semiconductor light emitting device that attempts to obtain light in a wavelength range longer than orange_1-XYGa_XAl_YThere was no technical idea to apply N (0 ≦ X, Y ≦ 1, 0 ≦ X + Y ≦ 1). This is because the material having the smallest band gap (Eg) in this material system is InN, and the Eg is 1.9 to 2.1 eV. At the time this Eg was measured, there was only polycrystalline InN (Reference 2: K. Osamura, K. Nakajima {and})._Y. Murakami, Solid State Comm. , 11 (1972) 617; Puychevrier @ and @ M. Menoret, Thin Solid Films, 36 (1976) 141; L. Tansley @ and @ C. P. Foley, J .; App1. Phys. , 59 (1986). ).
[0038]
In these eras, it was attempted to form InN by a method such as reactive sputtering, so that only polycrystalline InN could be formed. In_1-XYGa_XAl_YAmong the compounds AlN, GaN, and InN constituting N (0 ≦ X, Y ≦ 1, 0 ≦ X + Y ≦ 1), the equilibrium vapor pressure of nitrogen on the solid phase of InN is five orders of magnitude higher than that of others (Reference 5). : T. Matsuoka, H. Tanaka, T. Sasaki and A. Katsui, "Wide-Gap Semiconductor Company (In, Ga) N", International Symposium on GaAs and Republic of Korea, Republic of Korea, Republic of Korea. Conf. Ser., 106. pp. 141-146). With InN having such characteristics, it is almost impossible to form a high-quality crystal by a method such as reactive sputtering in which the pressure in a container for forming a film cannot be increased. In the above-mentioned era, since an InN film was to be formed on a glass substrate, information on a lattice for growing a single crystal was not obtained, and a single crystal could not be grown.
[0039]
In response to the above, the present inventors, in 1988, used a metalorganic vapor phase epitaxy method (hereinafter, referred to as MOVPE) on a single-crystal sapphire substrate to apply a nitrogen pressure to grow a single crystal of InN. The world's first successful single crystal growth. The results were presented at a conference in 1989 (Literature 1: Takashi Matsuoka, Toru Sasaki, Koji Sato, Akinori Katsui, "InN thin film growth by MOVPE method", Proceedings of the 36th Alliance Lecture Meeting on Applied Physics, p.270 (1p-ZN-10) (1989)).
[0040]
However, the single crystal growth at this time had insufficient crystallinity, and did not lead to obtaining the optical characteristics of InN. After this, the inventor succeeded in growing the world's first single crystal of high quality InN capable of measuring optical characteristics in 2001 by various technical improvements (Takashi Matsuoka, Masashi Nakao, Hiroshi Okamoto, Hiroshi Harima, Eiji Kurimoto, Eiji Hagiwara) Emi, "InN Bandgap Energy", Proceedings of the 49th Joint Lecture on Applied Physics, p.392 (29p-ZM-1) (2002). 8th: The conference will be held from March 27 to 30, and the presentation date will be March 29.)
[0041]
The first technical improvement for the growth of the high-quality single crystal of InN is that GaN having a lattice constant between sapphire and InN is formed on a sapphire substrate, and InN is formed on the GaN layer. It is a growing point. In this case, the GaN layer is required to have high crystallinity. Therefore, with respect to the following points, the growth conditions of GaN were optimized.
[0042]
1. Cleaning of sapphire substrate surface in growth furnace
2. Ammonia nitridation of sapphire surface
3. Growth of low-temperature grown GaN as buffer layer to mitigate lattice mismatch between sapphire and GaN
4. High temperature annealing to achieve single crystallization of the buffer layer
5. High quality GaN growth at high temperature
[0043]
A second technical improvement is that the growth conditions of InN were examined on GaN grown under the conditions optimized as described above. Items studied include the growth temperature, growth rate, the ratio of group V source to In source, and the gas flow rate in the growth furnace. As a result of the examination of each of these items, the growth of InN, whose optical characteristics can be measured, has finally reached for the first time. At present, it is possible to form an InN layer directly on a sapphire substrate without using a GaN layer.
[0044]
As an example of the relationship between the growth conditions and crystallinity in InN, InN grown by changing the ratio V / In between the supply amount of ammonia as a nitrogen source to the growth furnace and the supply amount of trimethylindium (TMI) as the indium source is changed. X-ray diffraction spectrum of the sample is shown in FIG. FIG. 2 shows an ω-2θ scan spectrum. As shown in FIGS. 2A and 2B, in the film formed under the conditions of V / III of 160000 or less and V / III of 320000, a signal from metal indium is observed. On the other hand, as shown in FIG. 2C, in the film formed under the condition of V / III of 660000, the peak of metal indium has disappeared, and it can be seen that metal indium is not contained.
[0045]
Here, the characteristics of the InN film formed under the condition of V / III of 660000 are shown in FIGS. FIG. 3 is a characteristic diagram showing the relationship between the square of the absorption and the photon energy in the formed film. As shown in FIG. 3, in the InN film under the above conditions, the absorption edge is clearly detected. Since this relationship is almost linear, InN is of a linear transition type, and Eg can be estimated to be 0.8 eV.
[0046]
FIG. 4 shows the photoluminescence of the InN film formed under the above conditions measured at room temperature, and it can be seen that light is emitted near a wavelength of 1.59 μm (0.8 eV). The results of the absorption and photoluminescence shown in FIGS. 3 and 4 indicate that the Eg of the InN film formed under the above conditions is 0.8 eV. From these results, it can be estimated that Eg of InN is around 0.8 eV.
[0047]
For the first time, it has been found that Eg of single-crystal InN is 0.8 eV, which is about half of the conventional measurement result, by the various technical improvements and many years of effort described above. FIG._1-XYGa_XAl_YFIG. 6 is a characteristic diagram showing a relationship between Eg of N (0 ≦ X, Y ≦ 1, 0 ≦ X + Y ≦ 1) and lattice constant a of a-axis. In FIG. 5, the dashed line is the old data, and the solid line is the result reflecting the data (Eg = 0.8 eV) obtained by the inventor.
[0048]
As shown in FIG. 4, since Eg of InN is near 0.8 eV, InN or In with small Eg is used._1-XYGa_XAl_YN (0 ≦ X, Y ≦ 1, 0 ≦ X + Y <1) is used as a well layer (active layer), and a material In having a larger Eg than these is used._{1-X'-Y '}Ga_{X '}Al_{Y '}By using a quantum well structure with N (0 ≦ X ′, Y ′ ≦ 1, 0 ≦ X ′ + Y ′ ≦ 1) as a barrier layer, and selecting the thickness of the active layer and the composition of these layers, Light emission ranging from to ultraviolet. Therefore, a semiconductor light emitting device that emits white light can be realized by stacking three types of quantum well structures that emit three primary colors of light.
[0049]
Further, according to these configurations, since the same type of material is used, it is easy to stack three types of quantum well structures, and a white light source can be realized monolithically. In addition, in general, white used as a light source includes bluish white, white called daylight close to sunlight, warm reddish white, and the like. The emission color can be adjusted by a combination with the film thickness.
[0050]
By the way, In_1-XYGa_XAl_YIn the growth of N (0 ≦ X, Y ≦ 1, 0 ≦ X + Y ≦ 1), phase separation often occurs. FIG. 6 shows In obtained from experiments and calculations._1-XYGa_XAl_YN (0 ≦ X, Y ≦ 1, 0 ≦ X + Y ≦ 1) indicates an immiscible region (Reference 6: T. Matsuoka, “Phase Separation in Wurtzite In”_1-XYGa_XAl_YN ", MRS @ Internet @ J. Nitride@Semicond.Res. 3, 54 (1998)). In FIG._1-XYGa_XAl_YAn immiscible region of N (0 ≦ X, Y ≦ 1, 0 ≦ X + Y ≦ 1) is indicated by a dashed line, and the In region when grown at 800 ° C._1-XYGa_XAl_YThe immiscible region of N (0 ≦ X, Y ≦ 1, 0 ≦ X + Y ≦ 1) is indicated by a solid line, and the In when growing at 1000 ° C._1-XYGa_XAl_YThe immiscible region of N (0 ≦ X, Y ≦ 1, 0 ≦ X + Y ≦ 1) is indicated by a broken line, and the inner region is the immiscible region. As shown in FIG. 6, there is a composition region that cannot be grown under the thermal equilibrium condition. However, with the composition shown in the mixing region outside the immiscible region, a light emitting element that emits light of any color can be manufactured by controlling the composition and thickness of the quantum well structure.
[0051]
As described above, In is added to the active layer._1-XYGa_XAl_YBy configuring a semiconductor light emitting device with a nitride semiconductor such as using N (0 ≦ X, Y ≦ 1, 0 ≦ X + Y <1), the semiconductor light emitting device can be manufactured at lower cost as compared with a case where a material such as ZnSe is used. Can be manufactured. Further, by using a compound semiconductor as described above, light emission can be more efficiently obtained.
[0052]
By the way, in the semiconductor light emitting device of FIG. 1, the n-type metal electrode 116 is formed on the electrode layer 103, but the invention is not limited to this. An electrode layer may be provided in the middle of the three light emitting units, and a metal electrode may be provided here. Hereinafter, this will be described in more detail. FIG. 7 is a schematic cross-sectional view illustrating a configuration example of a semiconductor light emitting device according to another embodiment of the present invention.
[0053]
This semiconductor light emitting device (light emitting diode) first has a (0001) plane sapphire (Al₂O₃Buffer layer 202 made of GaN, a 1 μm-thick crystal layer 203 made of GaN, and a 1 μm-thick clad layer made of AlGaN (first clad layer) 204 is provided. Note that the single crystal substrate 201 is not limited to sapphire, but may be, for example, silicon carbide (SiC), zinc oxide (ZnO), or LiGaO.₂Such a crystal may be used.
[0054]
On the cladding layer 204, a barrier layer 205 made of InGaAlN, a lower active layer (first active layer) 206 made of InN, a barrier layer 207 made of InGaAlN, and an intermediate active layer (second active layer) 208 made of InN , InGaAlN barrier layer 209, Si-added n-type GaN electrode layer 210, Si-added n-type InGaAlN barrier layer 211, InN upper active layer (third active layer) A barrier layer 213 made of p-type InGaAlN to which 212 and Mg are added is formed.
[0055]
On the barrier layer 213, p-type Al to which Mg is added is formed._0.1Ga_0.9A cladding layer (second cladding layer) 214 made of N and having a thickness of 0.5 μm, and a contact layer 215 made of p-type GaN doped with Mg and having a thickness of 0.1 μm are formed. Further, on the contact layer 215, a SiO having a substantially circular opening having a diameter of about 20 μm is provided.₂Is formed, and a p-type metal electrode 215 that is in contact with the contact layer 215 through the opening window is formed on the current limiting insulating layer 216. The p-type metal electrode 217 includes a 50-nm-thick palladium layer that directly contacts the contact layer 215, a 30-nm-thick platinum layer formed thereon, and a 200-nm-thick gold layer formed thereon. It has a laminated structure.
[0056]
In addition, in the semiconductor light emitting device of FIG. 7, the electrode layer 210 has an exposed region formed by partially removing each layer thereon by etching, and the n-type metal electrode 218 is provided in the exposed region. The n-type metal electrode 218 has a stacked structure of a 50-nm-thick titanium layer that directly contacts an exposed region of the electrode layer 210, a 30-nm-thick platinum layer, and a 200-nm-thick gold layer.
[0057]
In the semiconductor light emitting device of FIG. 7 having the above-described laminated structure, a first light emitting structure is formed by the barrier layer 205, the lower active layer 206, and the barrier layer 207, and the barrier layer 207, the middle active layer 208 The barrier layer 209 forms a second light emitting structure, and the barrier layer 211, the upper active layer 212, and the barrier layer 213 form a third light emitting structure. The emission wavelength of each light emitting structure is the longest in the first light emitting structure and the shortest in the third light emitting structure.
[0058]
Therefore, the light emitted from the third light emitting structure is absorbed by the second light emitting structure and the first light emitting structure, and excites each light emitting structure. As a result, light of a unique wavelength is emitted from the first and second light emitting structures. Of the light generated from the third light emitting structure, light not absorbed in the first and second light emission diagrams is emitted from the back surface of the single crystal substrate 201 to the outside. Light emitted from the second light emitting structure is partially absorbed by the first light emitting structure, and the remaining light is emitted from the back surface of the single crystal substrate 201 to the outside.
[0059]
The first light emitting structure is also excited by light emitted from the second light emitting structure. Therefore, the first light emitting structure is excited by the light emitted from the second and third light emitting structures, and emits light having a wavelength unique to the first light emitting structure. As described above, by arranging the respective light emitting structures in a stacked manner in consideration of the positional relationship with the light extraction direction, highly efficient light emission with reduced loss can be obtained. By appropriately designing the first, second, and third light emitting structures, emitted light can be obtained from the back surface of the single crystal substrate 201 over a wide wavelength range from infrared, visible, and ultraviolet.
[0060]
In the above description, the emission wavelength of the first emission structure is the longest and the emission wavelength of the third emission structure is the shortest, but the emission wavelength of the second emission structure may be the longest. In this case, the emission wavelength is: second emission structure> first emission structure> third emission structure. Considering light propagating toward the single crystal substrate 101 in the light extraction direction in this configuration, light emitted from the third light emitting structure is absorbed by the first and second light emitting structures as described above. . However, for light propagating in the light extraction direction, no other absorption occurs. For this reason, it becomes easy to design a light emitting structure for obtaining desired light emission.
[0061]
Next, a method for manufacturing the semiconductor light emitting device shown in FIG. 7 will be described. First, a metal organic chemical vapor deposition apparatus having a vertical growth furnace is used for crystal growth for forming each crystal layer. Ammonia is used as a nitrogen source, and hydrogen is used as a carrier gas. The growth pressure is normal pressure.
First, the surface of the single crystal substrate 201 made of sapphire is nitrided in an ammonia atmosphere at a substrate temperature of 1050 ° C., and thereafter, the buffer layer 202 is formed by growing GaN at a substrate temperature of 550 ° C. In the growth of GaN, triethyl gallium (TEG) having a relatively low gallium vapor pressure is used as a gallium source.
[0062]
Subsequently, the single crystal substrate 201 is annealed at 1050 ° C. for 9 minutes to perform single crystallization of the buffer layer 202. Next, GaN is crystal-grown on the buffer layer 202 to form a crystal layer 203. Next, the temperature of the single crystal substrate 201 was set to 1020 ° C._0.1Ga_0.9The cladding layer 204 is formed by growing N. As the aluminum raw material, trimethyl aluminum (TMA) is used, and as the gallium raw material, trimethyl gallium (TMG) having a relatively high vapor pressure is used.
[0063]
Subsequently, the barrier layer 205, the lower active layer 206, the barrier layer 207, the middle active layer 208, the barrier layer 209, the electrode layer 210, the barrier layer 211, the upper active layer 212, the barrier layer 213, the cladding layer 214, and the contact layer are continuously formed. It is formed by crystal growth (metal organic chemical vapor deposition). In the growth of these indium-containing layers, the growth temperature is set to about 550 ° C. because the nitrogen equilibrium vapor pressure on the solid phase of InN is high. Trimethylindium (TMI) is used as the indium raw material. In addition, TEG is used as a gallium raw material in growing these indium-containing layers. This is because TEG decomposes at a lower temperature and has a lower vapor pressure than TMG, and is suitable for controlling the composition of the crystal layer.
[0064]
Here, in the growth of each layer containing indium, in order to prevent the deposition of metal indium and grow a layer made of a high-quality alloy, the ratio (V / III) is set to 660000. In growing the layer containing indium, the carrier gas and the bubbling gas are nitrogen. This is because the decomposition of ammonia is suppressed when hydrogen is used as a carrier gas or the like. Proceedings of the Lectures of the Alliance for Applied Physics, p. 270 (1p-ZN-10) (1989)).
[0065]
In order to add Si to a predetermined layer, silane gas SiH having a concentration of 1 ppm diluted with hydrogen is used.₄, And as a raw material for adding Mg, methylcaptan / biscyclopenta / dienylmagnesium (MeCp₂Mg). The raw material for adding Mg is liquid, and biscyclopentadienyl magnesium (Cp) which is a commonly used solid raw material is used.₂The reproducibility of the Mg concentration is better than that of Mg).
[0066]
After forming the cladding layer 214 and the contact layer 215, annealing is performed in a nitrogen atmosphere at 700 ° C. for 30 minutes in order to activate the added Mg. Subsequently, using a RF magnetron sputtering apparatus, SiO 2 was formed on the contact layer 215.₂The current limiting insulating layer 216 made of is formed, and this is processed by a known photolithography technique and an etching technique to form an opening window. After an opening window is formed in the current-limiting insulating layer 216, palladium having a thickness of 50 nm, platinum having a thickness of 30 nm, and gold having a thickness of 200 nm are formed on the current-limiting insulating layer 216 including the inside of the opening window using an electron beam evaporation apparatus. Are stacked to form a p-type metal electrode 217.
[0067]
Next, a part of the barrier layer 211 and the electrode layer 210 is removed from the current limiting insulating layer 216 by a known photolithography technique and an etching technique, so that a part of the electrode layer 210 is exposed. 218 are formed. The etching of the crystal layer such as the contact layer 215 to the barrier layer 211 may be performed by, for example, reactive ion etching using chlorine gas as an etching gas. The n-type metal electrode 218 is formed by laminating titanium with a thickness of 50 nm, platinum with a thickness of 30 nm, and gold with a thickness of 200 nm on the exposed surface of the electrode layer 210. It is formed by patterning with technology.
[0068]
As described above, after the p-type metal electrode 217 and the n-type metal electrode 218 are formed, the back surface of the single crystal substrate 201 is polished, and the single crystal substrate 201 is thinned from its original thickness of 450 μm to 200 μm. Then, the back side is mirror-finished. After the back surface of the single crystal substrate 201 is polished to a mirror surface, these are washed, and the single crystal substrate 201 is cut into a predetermined size using a diamond scriber, and cut into elements. The element size is about 500 μm square.
[0069]
When a current is applied and the light emitted from the back surface of the single crystal substrate 201 is observed by using the p-type metal electrode 217 of the element formed as described above as an anode and the n-type metal electrode 218 as a cathode, a bluish white light is obtained. It is. As described above, the light emission obtained in this embodiment has a bluish white color. By appropriately controlling the composition of the crystal layer constituting the active layer and the thickness of the active layer, the emission color having desired characteristics can be obtained. Can be obtained. Further, as described above, the composition of the crystal constituting each active layer and the thickness thereof are appropriately set, and the emission colors of the respective light emitting layers are designed, whereby the two active layers are stacked via the barrier layer. Almost white light can be obtained with a semiconductor light emitting element.
[0070]
<Embodiment 2>
Next, another embodiment of the present invention will be described.
FIG. 8 is a schematic cross-sectional view illustrating a configuration example of the semiconductor light emitting device according to the present embodiment. This semiconductor light emitting device is composed of three light emitting diodes formed on the same single crystal substrate. FIG. 8 schematically shows a cross section cut in the thickness direction of crystal growth.
This semiconductor light emitting device first has a (0001) plane sapphire (Al) having a thickness of 330 μm.₂O₃A buffer layer 302 made of GaN and having a thickness of 20 nm, and an electrode layer 303 made of n-type GaN doped with Si and having a thickness of 4 μm are provided on a double-crystal polished single crystal substrate 301 made of . Note that the single crystal substrate 301 is not limited to sapphire, but may be, for example, silicon carbide (SiC), zinc oxide (ZnO), or LiGaO.₂Such a crystal may be used.
[0071]
Further, n-type Al doped with silicon is formed on the electrode layer 303._0.1Ga_0.9A cladding layer 304 made of N and having a thickness of 0.5 μm is formed in each of the region A (first light emitting portion), the region B (second light emitting portion), and the region C (third light emitting portion). The above configuration is common to the regions A, B, and C, but the light emitting regions are different as shown below. First, a region A is formed on the cladding layer 304 by n-type Al doped with Si._1-XAGa_XAFilm thickness d of N_Anm barrier layer 305a and In_1-YAGa_YAN active layer 306a and Al_1-XAGa_XAAn N barrier layer 307a.
[0072]
The region B is formed on the clad layer 304 by forming n-type Al doped with Si._1-XBGa_XBThickness d consisting of N_BBarrier layer 305b and In_1-YBGa_YBN active layer 306b and Al_1-XBGa_XBAn N barrier layer 307b. The region C is formed on the clad layer 304 by n-type Al doped with Si._1-XCGa_XCThickness d consisting of N_CAnd a barrier layer 305c of_1-YCGa_YCN active layer 306c and Al_1-XCGa_XCAn N barrier layer 307c.
In addition, each of the regions A, B, and C has a p-type Al doped with Mg on each of the barrier layers 307a, 307b, and 307c._0.1Ga_0.9A cladding layer 308 made of N and having a thickness of 0.5 μm, and a contact layer 309 made of p-type GaN doped with Mg and having a thickness of 0.1 μm are provided. Note that InGaN constituting each active layer is InGaN_{1-X- Y}Ga_XAl_YThis is an example in which Y = 0 when N (0 ≦ X, Y ≦ 1, 0 ≦ X + Y <1).
[0073]
In addition, in order to limit the electrode injection region, a SiO 2 having a substantially circular opening window having a diameter of about 20 μm is commonly used for the regions A, B, and C.₂Is formed, and a p-type metal electrode 311 that contacts each of the barrier layers 307a, 307b, and 307c in the opening window is formed. The p-type metal electrode 311 has a stacked structure of a nickel layer having a thickness of 50 nm and a gold layer having a thickness of 200 nm.
Note that an n-type metal electrode 312 is formed in a region other than the regions A, B, and C of the electrode layer 303. The n-type metal electrode 312 has a stacked structure of a 50-nm-thick aluminum layer that directly contacts the electrode layer 303 and a 200-nm-thick gold layer.
[0074]
In the present embodiment, the active layer is made of InN or InGaN containing a small amount of Ga. In each of the regions A, B, and C, the composition of the active layer and the barrier layer and the film thickness of the active layer are controlled, and these are changed for each of the regions A, B, and C to obtain a desired emission color. It is possible to obtain. The use of InN for the active layer dramatically improves the reproducibility and the in-plane uniformity within the substrate as compared to the case where InGaN is used for the active layer. This is because, as described below, the composition of the vapor phase and the composition of the solid phase during growth of the InGaN film are significantly different, and the controllability is not so good. Note that the barrier layer has a larger band gap energy than the active layer.
[0075]
FIG. 9 shows the result of the composition control. As shown in FIG. 9, when growing InGaN, at a growth temperature (substrate temperature) of 500 ° C., the composition ratio between the gas phase and the solid phase has a linear relationship. The composition of InGaN is selected in a region outside the immiscible region shown in FIG. However, at a growth temperature of 800 ° C., when the composition ratio of indium (TMI) is increased, the composition ratio between the gas phase and the solid phase becomes non-linear. As shown in these figures, in the metal organic chemical vapor deposition method, the higher the growth temperature, the smaller the amount of indium taken into the growing InGaN film. These are due to the fact that the vapor pressure of nitrogen of InN is about five orders of magnitude higher than that of GaN.
As described above, when InN is used for the active layer, control of the composition is not required as compared with the case where InGaN is used, so that reproducibility of the growth process and uniformity of crystallinity can be ensured. Phase separation does not occur in principle, and a layer having a uniform composition can be obtained.
[0076]
In the semiconductor light emitting device of the present embodiment described above, light emitted from the back surface side of single crystal substrate 301 is used as output light. Here, the size of the opening of the current limiting insulating layer 310 in the region A, the region B, and the region C is uniformly set to 20 μmφ in diameter. This size can be changed in each region so that the output light has a desired color tone. Further, in the semiconductor light emitting device of FIG. 8, the regions A, B, and C are arranged on a straight line, but it is natural that these regions may be arranged in any manner.
[0077]
Further, in the present embodiment, an example has been described in which the same p-type metal electrode 311 is connected to the regions A, B, and C. However, a p-type metal electrode may be individually provided. Further, here, the case where three regions are provided has been described, but four or more regions may be provided on the same substrate so that a larger light output can be obtained. In this case, three regions as shown in FIG. 8 may be set as one set, and a large number of these may be mounted on the same substrate. Alternatively, regions having different structures may be mounted on the same substrate. Is also good. With this configuration, it is possible to widen the range of color tones of the light output obtained from the semiconductor light emitting element and to improve the light output. Further, for example, a display can be configured by arranging regions emitting red, green, and blue as one set and arranging a plurality of sets in a matrix.
[0078]
As described above, in the semiconductor light emitting device of FIG. 8, a plurality of light emitting portions including the active layer are formed monolithically on the same substrate, so that individual device chips are respectively formed for three colors of light. There is no need to prepare. Further, the semiconductor light emitting device of FIG. 8 does not require a special manufacturing device or manufacturing method, and does not require complicated adjustment. Therefore, according to the semiconductor light emitting device of FIG. 8, the device can be provided at lower cost.
[0079]
In addition, in the semiconductor light emitting device of FIG. 8, since the device can be formed with a smaller area than the conventional device, for example, a plurality of devices are simultaneously formed on the same substrate, and these are cut out to obtain a semiconductor light emitting device chip. In this case, more chips can be obtained. Also in this regard, the element can be provided at lower cost due to the generally-known mass production effect and the like. In addition, since the element can be formed thin, it can be mounted on a smaller device.
[0080]
Next, a method for manufacturing the semiconductor light emitting device shown in FIG. 8 will be described. First, a metal organic chemical vapor deposition apparatus having a vertical growth furnace is used for crystal growth for forming each crystal layer. Ammonia is used as a nitrogen source, and hydrogen is used as a carrier gas. The growth pressure is normal pressure.
First, the surface of a single crystal substrate 301 made of sapphire is nitrided in an ammonia atmosphere at a substrate temperature of 1050 ° C., and thereafter, the buffer layer 302 is formed by growing GaN at a substrate temperature of 550 ° C. In the growth of GaN, triethyl gallium (TEG) having a relatively low gallium vapor pressure is used as a gallium source.
[0081]
Subsequently, the single crystal substrate 301 is annealed at 1050 ° C. for 9 minutes to perform single crystallization of the buffer layer 302. Next, the temperature of the single crystal substrate 301 is set to 1020 ° C., n-type GaN to which Si is added is grown, and an electrode layer 303 is formed. In order to add Si to each layer, silane gas SiH having a concentration of 1 ppm diluted with hydrogen is used.₄Is used. The same raw material is used for the addition of Si in the growth process of each layer described below.
[0082]
Next, a region other than the region A is covered with a silicon oxide film, and an n-type Al doped with Si is first formed on the electrode layer 303 exposed in the region A._0.1Ga_0.9N is grown to form a cladding layer 304. The silicon oxide film serves as a selective growth mask. As the aluminum raw material, trimethyl aluminum (TMA) is used, and as the gallium raw material, trimethyl gallium (TMG) having a relatively high vapor pressure is used. On the cladding layer 304 in the region A, n-type Al to which Si is added is formed by continuous crystal growth (metal organic chemical vapor deposition)._1-XAGa_XAN, In_1-YAGa_YAN, Al_1-XAGa_XAN is sequentially grown to form a barrier layer 305a, an active layer 306a, and a barrier layer 307a.
[0083]
After forming up to the barrier layer 307a, p-type Al to which Mg is added_0.1Ga_0.9A cladding layer 308 is formed by growing N, and a p-type GaN to which Mg is added is grown thereon to form a contact layer 309. As a raw material for adding Mg, methylcaptan / biscyclopentadienylmagnesium (MeCp₂Mg). This raw material is a liquid, and a commonly used solid raw material, biscyclopentadienyl magnesium (Cp₂The reproducibility of the Mg concentration is better than that of Mg).
[0084]
In the growth of these indium-containing layers, the growth temperature is set to about 500 ° C. because the nitrogen equilibrium vapor pressure on the solid phase of InN is high. Trimethylindium (TMI) is used as the indium raw material. In addition, TEG is used as a gallium raw material in growing these indium-containing layers. This is because TEG decomposes at a lower temperature and has a lower vapor pressure than TMG, and is suitable for controlling the composition of the crystal layer.
[0085]
Here, in the growth of each layer containing indium, in order to prevent the deposition of metal indium and grow a layer made of a high-quality alloy, the ratio (V / III) is set to 660000. In growing the layer containing indium, the carrier gas and the bubbling gas are nitrogen. This is because the decomposition of ammonia is suppressed when hydrogen is used as a carrier gas or the like. Proceedings of the Lectures of the Alliance for Applied Physics, p. 270 (1p-ZN-10) (1989)). The same applies to the following regions B and C.
[0086]
Next, the silicon oxide film covering the region other than the region A formed as the selective growth mask is removed using, for example, a hydrofluoric acid solution, and thereafter, a selective growth mask made of silicon oxide covering the region other than the region B is formed. Next, on the electrode layer 303 exposed in the region B, first, an n-type Al_0.1Ga_0.9N is grown to form a cladding layer 304. Next, on the cladding layer 304 in the region B, n-type Al to which Si is added by continuous crystal growth._1-XBGa_XBN, In_1-YBGa_YBN, Al_1-XBGa_XBN is sequentially grown to form a barrier layer 305b, an active layer 306b, and a barrier layer 307b. After forming up to the barrier layer 307b, p-type Al to which Mg is added_0.1Ga_0.9N is grown to form a cladding layer 308, on which p-type GaN doped with Mg is grown to form a contact layer 309.
[0087]
Next, after removing the selective growth mask covering the area other than the area B and forming a selective growth mask covering the area other than the area C, Si is first added on the electrode layer 303 exposed in the area C in the same manner as described above. N-type Al_0.1Ga_0.9The cladding layer 304 is formed by growing N. Next, on the cladding layer 304 in the region C, n-type Al to which Si is added by continuous crystal growth._1-XCGa_XCN, In_1-YCGa_YCN, Al_1-XCGa_XCN is sequentially grown to form a barrier layer 305c, an active layer 306c, and a barrier layer 307c. After forming up to the barrier layer 307b, p-type Al to which Mg is added_{0. 1}Ga_0.9N is grown to form a cladding layer 308, on which p-type GaN doped with Mg is grown to form a contact layer 309.
[0088]
Thereafter, in order to activate Mg added to the cladding layer 308 and the contact layer 309 in each of the regions A, B, and C, annealing is performed in a nitrogen atmosphere at 700 ° C. for 30 minutes. Subsequently, using an RF magnetron sputtering apparatus, SiO 2 was formed on the contact layer 309 in each of the regions A, B, and C.₂The current limiting insulating layer 310 made of is formed, and is processed by a known photolithography technique and an etching technique to form an opening window for each of the regions A, B, and C.
[0089]
After an opening window is formed in the current-limiting insulating layer 310, 50 nm-thick palladium, 30-nm-thick platinum, and 200-nm-thick gold are deposited on the current-limiting insulating layer 310 including the inside of the opening window by using an electron beam evaporation apparatus. Are stacked to form a p-type metal electrode 311 over each of the regions A, B, and C.
Next, an n-type metal electrode 312 is formed on the exposed surface of the electrode layer 303 other than the regions A, B, and C. The n-type metal electrode 312 is formed by laminating aluminum with a thickness of 50 nm and gold with a thickness of 200 nm on the exposed surface of the electrode layer 303 and patterning these laminates by a known photolithography technique and etching technique. I do.
[0090]
By the way, it is also possible to realize a semiconductor laser resonator by the layer configuration shown in FIG. In this case, FIG. 8 is a side view showing the emission end face of the semiconductor laser resonator. In this case, a 1.5 μm wide groove extending in the direction normal to the paper surface of FIG. 8 is formed in the current limiting insulating layer 310 so as to reach both ends of the regions A, B, and C. Thus, the p-type metal electrode 311 is formed. Note that the regions A, B, and C are arranged at an interval of 10 μm. The emission end face shown in FIG. 8 is a plane cut out by cleavage, and light output is extracted from this emission end face in the direction normal to the paper surface of FIG.
[0091]
【The invention's effect】
As described above, in the present invention, the same substrate is provided with three portions that emit light of different emission wavelengths. In addition, the light emitting portions are made to have different composition ratios or different film thicknesses._1-XYGa_XAl_YThe active layer was composed of N (0 ≦ X, Y ≦ 1, 0 ≦ X + Y <1).
As a result, according to the present invention, there is obtained an excellent effect that a semiconductor light emitting device that can obtain high-luminance white light can be provided at lower cost.
[Brief description of the drawings]
FIG. 1 is a schematic cross-sectional view illustrating a configuration example of a semiconductor light emitting device according to an embodiment of the present invention.
FIG. 2 is a characteristic diagram showing an X-ray diffraction spectrum of InN grown by changing the ratio V / In between the supply amount of ammonia as a nitrogen source to a growth furnace and the supply amount of trimethylindium (TMI) as an indium source. It is.
FIG. 3 is a characteristic diagram showing the relationship between the square of absorption and the photon energy of an InN film formed under the condition that V / III is 660000.
FIG. 4 is a characteristic diagram showing photoluminescence measured at room temperature of an InN film formed under the condition that V / III is 660000.
FIG. 5: In_1-XYGa_XAl_YFIG. 6 is a characteristic diagram showing a relationship between Eg of N (0 ≦ X, Y ≦ 1, 0 ≦ X + Y ≦ 1) and lattice constant a of a-axis.
FIG. 6 shows In obtained from experiments and calculations._1-XYGa_XAl_YFIG. 6 is a correlation diagram showing an immiscible region of N (0 ≦ X, Y ≦ 1, 0 ≦ X + Y ≦ 1).
FIG. 7 is a schematic cross-sectional view illustrating a configuration example of a semiconductor light emitting device according to another embodiment of the present invention.
FIG. 8 is a schematic sectional view illustrating a configuration example of a semiconductor light emitting device according to an embodiment of the present invention.
FIG. 9 is a characteristic diagram showing a comparison of a raw material composition ratio between a vapor phase and a solid phase at each temperature during vapor phase growth.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 101 ... single crystal substrate, 102 ... buffer layer, 103 ... electrode layer, 104 ... clad layer (first clad layer), 105 ... barrier layer, 106 ... lower active layer (first active layer), 107 ... barrier layer, 108 ... intermediate active layer (second active layer), 109 ... barrier layer, 110 ... upper active layer (third active layer), 111 ... barrier layer, 112 ... cladding layer (second cladding layer), 113 ... contact layer, 114 ... current limiting insulating layer, 115 ... p-type metal electrode, 116 ... n-type metal electrode, 201 ... single crystal substrate, 202 ... buffer layer, 203 ... crystal layer, 204 ... cladding layer (first cladding layer), 205 ... barrier Layers, 206: lower active layer (first active layer), 207: barrier layer, 208: intermediate active layer (second active layer), 209: barrier layer, 210: electrode layer, 211: barrier layer, 212: upper active layer layer( 3 active layer), 213 barrier layer, 214 cladding layer (second cladding layer), 215 contact layer, 216 current limiting insulating layer, 217 p-type metal electrode, 218 n-type metal electrode, 301 single Crystal substrate, 302: buffer layer, 303: electrode layer, 304: clad layer, 305a, 305b, 305c: barrier layer, 306a, 306b, 307c: active layer, 307a, 307b, 307c: barrier layer, 308: clad layer, 309: contact layer, 310: current limiting insulating layer, 311: p-type metal electrode, 312 ... n-type metal electrode.

Claims (12)

A first cladding layer formed on the substrate,
A first light emitting structure formed on the first cladding layer;
A second light emitting structure formed on the first light emitting structure;
A second cladding layer formed on the second light emitting structure,
The first light emitting structure includes a first active layer sandwiched between barrier layers,
The second light emitting structure includes a second active layer sandwiched between barrier layers,
The semiconductor light emitting device according to claim 1, wherein the first light emitting structure and the second light emitting structure have different emission wavelengths. The semiconductor light emitting device according to claim 1,
Wherein the first active layer and said second active layer, which was composed of _{In 1-X-Y} Ga of different composition ratios _{X Al Y N (0 ≦ X} , Y ≦ 1,0 ≦ X + Y <1) A semiconductor light emitting device, comprising: The semiconductor light emitting device according to claim 1,
Wherein the first active layer and said second active layer, which has been composed of different thickness of the _{In 1-X-Y Ga X} Al Y N (0 ≦ X, Y ≦ 1,0 ≦ X + Y <1) A semiconductor light emitting device, comprising: The semiconductor light emitting device according to claim 2, wherein
The barrier layer, the first, that is composed of a large _{In 1-X-Y Ga X} Al Y N bandgap energy than the second active layer (0 ≦ X, Y ≦ 1,0 ≦ X + Y ≦ 1) A semiconductor light emitting device, characterized in that: A first cladding layer formed on the substrate,
A first light emitting structure formed on the first cladding layer;
A second light emitting structure formed on the first light emitting structure;
A third light emitting structure formed on the second light emitting structure;
A second cladding layer formed on the third light emitting structure,
The first light emitting structure includes a first active layer sandwiched between barrier layers,
The second light emitting structure includes a second active layer sandwiched between barrier layers,
The third light emitting structure includes a third active layer sandwiched between barrier layers,
The semiconductor light emitting device, wherein the first light emitting structure, the second light emitting structure, and the third light emitting structure have different emission wavelengths. The semiconductor light emitting device according to claim 5,
The first active layer, second active layer, and the third active layer, from each of the different composition ratios _{In 1- X-Y Ga X Al} Y N (0 ≦ X, Y ≦ 1,0 ≦ X + Y <1) A semiconductor light emitting device comprising: a light emitting device; The semiconductor light emitting device according to claim 5,
The first active layer, second active layer, and the third active layer, from each of the different thicknesses _{In 1-X- Y Ga X Al} Y N (0 ≦ X, Y ≦ 1,0 ≦ X + Y <1) A semiconductor light emitting device comprising: a light emitting device; The semiconductor light emitting device according to claim 6, wherein
The barrier layer, which was composed of the first to third from the active layer of the band gap energy larger _{In 1-X-Y Ga X} Al Y N (0 ≦ X, Y ≦ 1,0 ≦ X + Y ≦ 1) A semiconductor light emitting device, characterized in that: A first light-emitting portion formed on the substrate in the order of a lower cladding layer, a lower barrier layer, a first active layer, an upper barrier layer, and an upper cladding layer;
A second light emitting unit, which is formed on the substrate, in which a lower clad layer, a lower barrier layer, a second active layer, an upper barrier layer, and an upper clad layer are sequentially stacked;
A third cladding layer formed on the substrate, a lower barrier layer, a third active layer, an upper barrier layer, and a third light emitting unit laminated in the order of the upper cladding layer;
The semiconductor light emitting device according to claim 1, wherein the first light emitting unit, the second light emitting unit, and the third light emitting unit have different emission wavelengths. The semiconductor light emitting device according to claim 9,
The first active layer, second active layer, and the third active layer, from each of the different composition ratios _{In 1- X-Y Ga X Al} Y N (0 ≦ X, Y ≦ 1,0 ≦ X + Y <1) A semiconductor light emitting device comprising: a light emitting device; The semiconductor light emitting device according to claim 9,
The first active layer, second active layer, and the third active layer, from each of the different thicknesses _{In 1-X- Y Ga X Al} Y N (0 ≦ X, Y ≦ 1,0 ≦ X + Y <1) A semiconductor light emitting device comprising: a light emitting device; 12. The semiconductor light emitting device according to claim 10, wherein the lower barrier layer and the upper barrier layer have a band gap energy higher than that of the first to third active layers, In _1-XY Ga _X Al _Y N (0). .Ltoreq.X, Y.ltoreq.1, 0.ltoreq.X + Y.ltoreq.1).

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