JPH0936427A - Semiconductor device and fabrication thereof - Google Patents

Semiconductor device and fabrication thereof

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Publication number
JPH0936427A
JPH0936427A JP18188795A JP18188795A JPH0936427A JP H0936427 A JPH0936427 A JP H0936427A JP 18188795 A JP18188795 A JP 18188795A JP 18188795 A JP18188795 A JP 18188795A JP H0936427 A JPH0936427 A JP H0936427A
Authority
JP
Japan
Prior art keywords
substrate
layer
amorphous
iii
heterojunction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18188795A
Other languages
Japanese (ja)
Inventor
Mineo Okuyama
峰夫 奥山
Takashi Udagawa
隆 宇田川
Ryoichi Takeuchi
良一 竹内
Noriyuki Aihara
範行 粟飯原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Holdings Corp
Original Assignee
Showa Denko KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Showa Denko KK filed Critical Showa Denko KK
Priority to JP18188795A priority Critical patent/JPH0936427A/en
Publication of JPH0936427A publication Critical patent/JPH0936427A/en
Pending legal-status Critical Current

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  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
  • Led Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a multilayer structure including a heterojunction based emission layer on a substrate of amorphous material by depositing a III-V compound semiconductor heterojunction comprising at least one kind of group III element including Al, Ga and In and a group III-V element containing at least nitrogen directly on the substrate of amorphous material. SOLUTION: A substrate 101 is subjected, on the surface thereof, to nitrogen plasma processing and an n-type AlN0.05 P0.95 layer is deposited directly thereon as a lower clad layer 103. Subsequently, C5 H5 In and NH3 are fed to the reaction system in order to deposit a p-type Ga0.4 In0.6 N layer as an emission layer 4. Finally, a heterojunction of the Ga0.4 In0.6 N emission layer 104 and the lower clad layer 103 of AlN0.05 P0.95 deposited directly on the surface of amorphous AlN substrate 101 is formed. The multilayer structure including a heterojunction based emission layer may be provided on a substrate of amorphous material by plasma processing of a gas containing nitrogen atoms on the surface of amorphous substrate.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】III −V族窒化物半導体からなる
半導体装置に係わり、特に高輝度の短波長可視発光ダイ
オード(LED)の発光強度の増大をもたらす材料の構
成に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device made of a III-V group nitride semiconductor, and more particularly, to a material structure for increasing the emission intensity of a high-luminance short-wavelength visible light emitting diode (LED).

【0002】[0002]

【従来の技術】窒化ガリウム(GaN)や窒化アルミニ
ウム(AlN)または窒化インジウム(InN)、或い
はそれらの混晶等のIII −V族窒化物半導体は比較的高
温でも動作する耐環境型の電界効果型トランジスタ
(M.Asif Khan他、Appl.Phys.L
ett.、65(9)(1994)、1121.)やL
ED等の半導体装置の構成材料として用いられている。
最近では、GaN等のIII −V族窒化物半導体の積層構
造からなる青色や青緑色等の短い波長の可視光を発光す
る短波長可視LEDが構成されている(例えば真部 勝
英、「豊田合成技報」、第35巻第4号(1993)、
68頁)。
2. Description of the Related Art III-V group nitride semiconductors such as gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), and mixed crystals thereof are environment-resistant electric field effects that operate even at relatively high temperatures. Type transistor (M. Asif Khan et al., Appl. Phys. L)
ett. , 65 (9) (1994), 1121. ) And L
It is used as a constituent material of semiconductor devices such as EDs.
Recently, a short-wavelength visible LED that emits visible light of a short wavelength such as blue or blue-green is formed by a laminated structure of III-V group nitride semiconductors such as GaN (for example, Katsuhide Sanbe, “Toyoda Gosei”). Technical Report ", Vol. 35, No. 4, (1993),
68).

【0003】III −V族窒化物半導体から構成されてい
る従来のLEDチップの構造例を図1に示す。LEDチ
ップを構成するための窒化物半導体各層は酸化アルミニ
ウム(Al23 )単結晶(サファイア)基板(20
1)上に設けられている(例えばH.M.Manase
vit他、J.Electrochem.Soc.、
18(1971)、1864)。従来から、基板として
は、単結晶であるサファイアが使用されるのが通例とな
っている。
FIG. 1 shows a structural example of a conventional LED chip composed of a III-V group nitride semiconductor. Each layer of the nitride semiconductor for forming the LED chip is an aluminum oxide (Al 2 O 3 ) single crystal (sapphire) substrate (20).
1) provided above (eg HM Manase)
Vit et al., J. Electrochem. Soc. , 1
18 (1971), 1864). Conventionally, it has been customary to use sapphire that is a single crystal as a substrate.

【0004】単結晶であるサファイアが基板として用い
られている理由の一つは、サファイアが青色等の短波長
の光を透過するため発光が基板に吸収されず、外部への
発光の放出を防げないからである。LEDにあっては、
外部へ効率良く発光を取り出すために発光波長に相当す
るエネルギーよりも高い禁止帯幅を有する材料から基板
を構成するのが通例となっている。
One of the reasons why sapphire, which is a single crystal, is used as a substrate is that sapphire transmits light of a short wavelength such as blue, so that light emission is not absorbed by the substrate and emission of light emission to the outside can be prevented. Because there is no. For LEDs,
In order to efficiently take out emitted light to the outside, it is customary to form the substrate from a material having a band gap higher than the energy corresponding to the emission wavelength.

【0005】また、従来のLEDの構成要素であるGa
NやAlN、或いはそれらの混晶であるIII −V族窒化
物半導体の各層は約1000℃の高温で成長されている
(M.Illegems、J.Cryst.Growt
h,13/14(1972)、360.)。III −V族
窒化物半導体層の成長には、有機金属気相成長法(MO
CVD、MOVPEやOMVPE法と称される。)やハ
ロゲン化物を原料とする気相成長法(VPE法)等の成
長方式に拘らず一般にこの様な高温が必要とされてい
る。従って、高温の成長温度でも変質しない、融点が高
い耐熱性のある材料を基板とする必要があった。融点が
成長温度を上回る約2040℃のサファイアを基板とし
て利用する理由が此処にある。
Further, Ga, which is a constituent element of the conventional LED,
Each layer of N- or AlN or a III-V group nitride semiconductor, which is a mixed crystal thereof, is grown at a high temperature of about 1000 ° C. (M. Illegems, J. Cryst. Growth).
h, 13/14 (1972), 360. ). The metal-organic vapor phase epitaxy method (MO
It is called a CVD, MOVPE or OMVPE method. ) Or a halide as a raw material, such a vapor phase growth method (VPE method) or the like, such a high temperature is generally required. Therefore, it is necessary to use a heat-resistant material having a high melting point as a substrate, which does not deteriorate even at a high growth temperature. This is the reason why sapphire having a melting point of about 2040 ° C. higher than the growth temperature is used as the substrate.

【0006】基板としてはこの他、単結晶の酸化ガリウ
ム・ネオジウム(NdGaO3 )(1994年秋季第5
5回応用物理学会学術講演会講演予稿集No.1、講演
番号19p−MG−4、184頁)や同じく単結晶の酸
化亜鉛(ZnO)が用いられている。ZnOの禁止帯幅
は3.2eVと禁止帯幅が広く短波長の光を吸収せずに
透過するため、且つAlGaInN等のIII −V族窒化
物半導体混晶材料との格子の不整合度が小さいためIII
−V族窒化物半導体の成長に適する基板として開示され
ている(特公平6−14564)。
As a substrate, in addition to this, single crystal gallium neodymium oxide (NdGaO 3 ) (Fifth Autumn 1994)
Proceedings of the 5th JSAP Academic Lecture Meeting No. 1, Lecture No. 19p-MG-4, page 184) and similarly single crystal zinc oxide (ZnO). ZnO has a wide bandgap of 3.2 eV and transmits a short wavelength light without absorbing it, and has a lattice mismatch with a III-V group nitride semiconductor mixed crystal material such as AlGaInN. Because it is small III
It is disclosed as a substrate suitable for growing a group-V nitride semiconductor (Japanese Patent Publication No. 6-14564).

【0007】III −V族窒化物半導体層成長用の従来の
基板材料は単結晶材料が利用されることが多い。サファ
イア等の単結晶は、一般にはアルミナの粉末或いは多結
晶のサファイア塊等を原料として高温高圧での環境下で
合成される。単結晶合成工程を経た後、所望の形状に切
削加工される。その後、表面を機械的或いは化学的に精
密に研磨され、基板として供される。即ち、基板とする
単結晶の材料を得るには多くの工程を経なければなら
ず、従って単結晶材料は一般には高価である。
Single crystal materials are often used as conventional substrate materials for growing III-V nitride semiconductor layers. A single crystal such as sapphire is generally synthesized by using alumina powder or a polycrystalline sapphire lump as a raw material in an environment of high temperature and high pressure. After passing through the single crystal synthesizing step, it is cut into a desired shape. After that, the surface is precisely polished mechanically or chemically and used as a substrate. That is, many steps are required to obtain a single crystal material for a substrate, and thus the single crystal material is generally expensive.

【0008】単結晶材料を基板として使用する一般的な
理由は単結晶の成長層を得るためである。即ち、単結晶
基板上にエピタキシャル(epitaxial)成長し
た成長層は単結晶となるからである。単結晶成長層は同
一の方位の結晶面から構築されているため、光学的或い
は電気的な特性が画一化され、特性の揃ったLED等の
素子を得るには都合が良い。むしろ、LEDは単結晶の
膜から構成されることが要求される。
A common reason for using a single crystal material as a substrate is to obtain a single crystal growth layer. That is, the growth layer epitaxially grown on the single crystal substrate becomes a single crystal. Since the single crystal growth layer is constructed from crystal planes having the same orientation, the optical or electrical characteristics are standardized, which is convenient for obtaining elements such as LEDs with uniform characteristics. Rather, the LED is required to be composed of a single crystal film.

【0009】しかし、AlN等のIII −V族窒化物半導
体にあっては、単結晶ではない材料上に成長させた場合
でも結晶化し、単結晶膜が得られることが知られている
(赤崎勇、「光学」、第22巻第11号(1993)、
670頁)。このことは単結晶のIII −V族窒化物半導
体膜を得るに、一般的に高価な単結晶基板が敢えて必要
とされないことを意味する。即ち、単結晶化のため単結
晶合成工程を要せず、一般的に単結晶の材料に比較すれ
ば廉価である結晶性を持たない非晶質の材料が利用でき
ることを示唆している。
However, it is known that a III-V group nitride semiconductor such as AlN can be crystallized even when grown on a material that is not a single crystal to obtain a single crystal film (Akazaki Isamu). , "Optics", Vol. 22, No. 11 (1993),
670). This means that a generally expensive single crystal substrate is not intentionally required to obtain a single crystal III-V nitride semiconductor film. That is, it suggests that a single crystal synthesizing step is not required for single crystallization, and an amorphous material having no crystallinity, which is generally cheaper than a single crystal material, can be used.

【0010】過去にあっては、非晶質な材料としてパイ
レックスガラスを使用し、その上にIII −V族窒化物半
導体の一種であるAlNの単層膜を形成した例が知られ
ている(上村 揚一郎他、「応用物理」第40巻第5号
(1971)、572頁)。また、導電性のガラス材料
からなる電極上にAlN膜も設けた例がある(G.A.
WOLFF他、Phys.Rev.、114(5)(1
959)、1262.)。しかし、従来に於ける例で
は、短い波長の可視光を発光する材料としてAlx Ga
y Inz N(x、y及びzは組成比を表し、x+y+z
=1、x>0である)が示されているが(特公平6−1
4564)混晶層等を発光層として備えたLED用途の
ヘテロ接合積層構造を、非晶質の材料上に直接設ける実
施態様は例示されていない。
In the past, there is known an example in which Pyrex glass is used as an amorphous material and an AlN single layer film, which is a kind of III-V group nitride semiconductor, is formed on it. Yoichiro Uemura et al., "Applied Physics," Vol. 40, No. 5, (1971), page 572). Further, there is an example in which an AlN film is also provided on an electrode made of a conductive glass material (G.A.
WOLFF et al., Phys. Rev. , 114 (5) (1
959), 1262. ). However, in the conventional example, Al x Ga is used as a material that emits visible light having a short wavelength.
y In z N (x, y and z represent composition ratios, x + y + z
= 1 and x> 0) are shown (Japanese Patent Publication 6-1
4564) An embodiment in which a heterojunction laminated structure for an LED having a mixed crystal layer or the like as a light emitting layer is directly provided on an amorphous material is not exemplified.

【0011】非晶質の材料を基板とする場合でも短い波
長の光を透過する材料であれば外部へ発光が効率良く取
り出せ、発光強度の増大が果たせる。透光性の材料の一
主面に、基板材料を透過してくる発光を反射する機能を
有する金属被膜等を設ければ、エピタキシャル膜の結晶
性の向上に依らずとも尚一層のLEDの高輝度化が簡便
に図れる。また、発光部分をヘテロ接合で構成すること
により、より高輝度化が図れる。
Even when the substrate is made of an amorphous material, if the material transmits light of a short wavelength, the emitted light can be efficiently extracted to the outside, and the emission intensity can be increased. By providing a metal film having a function of reflecting the light emitted from the substrate material on one main surface of the translucent material, it is possible to further improve the LED performance even if the crystallinity of the epitaxial film is not improved. Brightness can be easily achieved. Further, by forming the light emitting portion with a heterojunction, higher brightness can be achieved.

【0012】非晶質材料を石英ガラスとし、石英ガラス
の一主面上に金属導電膜を形成した後、Alw Ga1-w
N(0≦w≦1)やInNエピタキシャル膜を堆積する
成長方法も知られている。この場合は、III −V族窒化
物半導体層を石英ガラス上に直接、堆積するのではな
く、光学研磨を施した石英ガラス等の表面上に、一旦ク
ロム(Cr)、ニッケル(Ni)、モリブデン(M
o)、金(Au)または白金(Pt)などの金属を導電
膜として被着させて石英ガラス等の表面に導電性をもた
せ、然る後、III −V族窒化物半導体層を成長させてい
る(特公平5−86646)。しかし、この場合はヘテ
ロ接合を含んでいない。また、この成長方法は成長層を
石英ガラスの表面に形成した金属導電膜を介して形成す
ることに依って、窒素空格子点の少ない高品質のAlx
Ga1-x N(0≦x≦1)やInNのエピタキシャル膜
の成長を目的としたものであって、エピタキシャル膜の
結晶性の向上をもって高輝度の発光素子を作製するに有
利とした方法にほかならない。即ち、石英ガラスの表面
に設ける導電性膜は何も発光を反射させるための反射膜
としての作用を果たすために設けられてはいなかった。
Amorphous material is made of quartz glass, a metal conductive film is formed on one main surface of the quartz glass, and then Al w Ga 1-w is used.
A growth method for depositing N (0 ≦ w ≦ 1) or InN epitaxial film is also known. In this case, instead of directly depositing the III-V group nitride semiconductor layer on the quartz glass, once chromium (Cr), nickel (Ni), molybdenum is once formed on the surface of the quartz glass or the like which has been optically polished. (M
o), a metal such as gold (Au) or platinum (Pt) is deposited as a conductive film so as to have conductivity on the surface of quartz glass, and then a III-V group nitride semiconductor layer is grown. (Japanese Patent Publication No. 5-86646). However, in this case, the heterojunction is not included. In addition, this growth method forms a growth layer through a metal conductive film formed on the surface of quartz glass, so that high-quality Al x with few nitrogen vacancies is formed.
It is intended to grow an epitaxial film of Ga 1-x N (0 ≦ x ≦ 1) or InN, and to improve the crystallinity of the epitaxial film, which is advantageous for producing a high-luminance light emitting device. Nothing else. That is, the conductive film provided on the surface of the quartz glass has not been provided in order to serve as a reflection film for reflecting the emitted light.

【0013】ましてや、公知例による石英ガラスの上に
設けた金属導電膜を介してIII −V族化合物半導体層を
成長させるに際しては、金属導電膜と金属アルミニウム
等のターゲット材料との間に直流電圧を印加し、窒素ガ
スを含む雰囲気中で高周波スパッタリング法により、先
ずAlx Ga1-x N(0≦x≦1)やInNのバッファ
層を堆積する。その後、アンモニア (NH3 )と第II
I 族の有機金属を原料とする有機金属気相成長法により
バッファ層と同一の組成のAlx Ga1-x N(0≦x≦
1)またはInNをエピタキシャル成長させる(特公平
5−86646)。この成長方法に依れば、窒素空格子
点の少ない高品質のAlx Ga1-x N(0≦x≦1)や
InNのエピタキシャル膜が得られ、しいては高輝度の
発光素子を作製できる利点があるとされるが、エピタキ
シャル膜を得るに煩雑な工程を必要としている。例えば
エピタキシャル膜の成長工程にしてもスパッタリング法
と有機金属気相成長法と2種の成長方法が必須となり、
成長工程が複雑となり煩雑であるため、発光素子の製造
価格の上昇を招きかねない。
Furthermore, when growing a III-V group compound semiconductor layer through a metal conductive film provided on quartz glass according to a known example, a DC voltage is applied between the metal conductive film and a target material such as metal aluminum. And a buffer layer of Al x Ga 1-x N (0 ≦ x ≦ 1) or InN is first deposited by high frequency sputtering in an atmosphere containing nitrogen gas. After that, ammonia (NH 3 ) and II
Al x Ga 1-x N (0 ≦ x ≦, which has the same composition as the buffer layer, is formed by metal organic chemical vapor deposition using a group I organic metal as a raw material.
1) or InN is epitaxially grown (Japanese Patent Publication No. 5-86646). According to this growth method, a high-quality Al x Ga 1-x N (0 ≦ x ≦ 1) or InN epitaxial film with few nitrogen vacancies can be obtained, and thus a high-luminance light-emitting device can be manufactured. Although it is said that there is an advantage that it can be obtained, a complicated process is required to obtain an epitaxial film. For example, a sputtering method, a metal organic chemical vapor deposition method, and two types of growth methods are indispensable even in the epitaxial film growth step.
Since the growth process is complicated and complicated, the manufacturing cost of the light emitting device may increase.

【0014】例えばLEDの様な汎用素子にあっては、
特に廉価であることが要求されるため、複雑な工程は好
ましくない。非晶質材料からなる基板にあっては、基板
上に直接III −V族窒化物半導体層を成長させても容易
に単結晶膜は得られない。III −V族窒化物半導体層を
堆積する非晶質材料の一主面、即ち基板の表面にその上
に堆積する成長層の単結晶化を促進できる簡易な表面処
理が必要である。
For a general-purpose element such as an LED,
A complicated process is not preferable because it is required to be particularly inexpensive. In the case of a substrate made of an amorphous material, a single crystal film cannot be easily obtained even if the III-V group nitride semiconductor layer is grown directly on the substrate. There is a need for a simple surface treatment that can promote single crystallization of one major surface of the amorphous material on which the III-V nitride semiconductor layer is deposited, that is, the surface of the substrate, to promote single crystallization of the growth layer deposited thereon.

【0015】発光素子の高輝度化はエピタキシャル成長
膜の高品質化のみではなく、発光を反射する機能を有す
る構成とすれば簡易に高輝度化が達成される場合があ
る。例えば反射鏡を適当な位置に配置して外部への発光
の放出を助長する従来法が知られている。この様な反射
鏡を備えてなる従来のLEDの構成例を図2に示す。従
来は高輝度化をもたらす反射鏡(111)はLEDのチ
ップ(112)を固定するためのステム(台座器具)
(113)の一部に設けられている。従来に於いては、
この様に発光を反射させるに特殊で構造が複雑となるス
テムが必要とされた。例えば、基板が透光性であれば、
それを利用して基板の一部に反射作用を得ることを目的
とした部材を被着すれば構造の簡素化が図れる。しか
し、現在迄にこの様に高輝度化を果たすための発光を反
射する作用を得る目的のための部材を有し、尚且つ簡素
化された構成からなる高輝度のLEDは知られていな
い。
In order to increase the brightness of the light emitting device, not only the quality of the epitaxially grown film is improved but also the brightness may be easily achieved by using a structure having a function of reflecting emitted light. For example, there is known a conventional method of arranging a reflecting mirror at an appropriate position to promote emission of emitted light to the outside. FIG. 2 shows a configuration example of a conventional LED provided with such a reflecting mirror. Conventionally, the reflector (111) that brings about high brightness is a stem (pedestal device) for fixing the LED chip (112).
It is provided in a part of (113). In the past,
Thus, a stem having a special and complicated structure was required to reflect the emitted light. For example, if the substrate is translucent,
The structure can be simplified by applying a member for obtaining a reflecting action to a part of the substrate by utilizing this. However, up to now, there is no known high-luminance LED which has a member for the purpose of obtaining the action of reflecting the light emission for achieving such high-luminance and has a simplified structure.

【0016】例えば図2に示す公知例とは異なり、透光
性である石英ガラス基板のIII −V族窒化物半導体層の
堆積を行う表面とは反対側の一主面、即ち基板の裏面側
に金属反射膜を設ければ発光のLEDの外部への反射強
度を増大できる。反射膜を設ける基板の裏面の表面積を
拡大する加工を施せば、反射強度は反射作用を有する反
射膜の表面積の拡張に伴い増加するため更に増加する。
表面積の増加をもたらす加工方法の一つに表面に凹凸状
の溝を形成する方法がある。実際、表面側に溝を形成し
た(0001)面を有する六方晶系の基板上に、基板と
同様の六方晶系の結晶層を成長させる方法も公開されて
いる(特開平5−36602)。しかし、従来は、溝は
六方晶基板の表面側に形成されており、且つまた溝は基
板と同じ結晶系の六方晶形の膜の表面状態を向上させる
目的で設けられるもので、基板の一主面の表面積を拡張
させるために溝が設けられているのではない。
Unlike the known example shown in FIG. 2, for example, one main surface of the transparent quartz glass substrate opposite to the surface on which the III-V nitride semiconductor layer is deposited, that is, the back surface side of the substrate. If a metal reflective film is provided on the LED, the intensity of the emitted light reflected to the outside can be increased. If processing is performed to increase the surface area of the back surface of the substrate on which the reflective film is provided, the reflection intensity further increases as the surface area of the reflective film having a reflecting action increases.
One of the processing methods for increasing the surface area is a method of forming uneven grooves on the surface. In fact, a method for growing a hexagonal crystal layer similar to the substrate on a hexagonal substrate having a (0001) plane with a groove formed on the surface side has also been disclosed (JP-A-5-36602). However, conventionally, the groove is formed on the surface side of the hexagonal crystal substrate, and the groove is provided for the purpose of improving the surface state of a hexagonal crystal film having the same crystal system as the substrate. Grooves are not provided to expand the surface area of the surface.

【0017】[0017]

【発明が解決しようとする課題】廉価なLEDを供給す
るには、非晶質材料を基板とするのが得策である。それ
には非晶質基板表面上に容易に単結晶膜を与える様な表
面処理が必要である。更には、特殊なステムを必要とせ
ずに発光を反射する作用を有する部材が基板と接触して
設けられており、LEDからの発光の反射強度を増大さ
せ結果としてLEDからの発光強度の増大がもたらされ
る簡易な構成があれば尚更都合が良い。しかし、現在に
至る迄に短波長の可視LEDについて、電力消費が少な
く、高輝度LEDを得るに必要なpn接合となすヘテロ
接合系発光層を含む積層構造が、非晶質材料基板上に設
けられた例は知られていない。または発光の反射強度の
増大をもたらす構成を非晶質基板上に設けられた例は知
られていない。この様な背景に鑑み廉価で且つ高輝度の
LEDを供給するために、これらの従来の問題を新たな
創意をもって解決するのが本発明の課題である。
In order to supply an inexpensive LED, it is advantageous to use an amorphous material as the substrate. For that purpose, surface treatment is required so that a single crystal film is easily provided on the surface of the amorphous substrate. Further, a member having a function of reflecting emitted light without the need for a special stem is provided in contact with the substrate, increasing the reflection intensity of the emitted light from the LED and, as a result, increasing the emitted light intensity from the LED. It would be even more convenient if there were a simple configuration provided. However, until now, for a short-wavelength visible LED, a laminated structure including a hetero-junction light emitting layer which is a pn junction required for obtaining a high-brightness LED with low power consumption is provided on an amorphous material substrate. The examples given are not known. Alternatively, there is no known example in which a structure for increasing the reflection intensity of emitted light is provided on an amorphous substrate. In view of such a background, it is an object of the present invention to solve these conventional problems with new ideas in order to supply an inexpensive and high-brightness LED.

【0018】[0018]

【課題を解決するための手段】即ち、本発明は非晶質材
料からなる基板を窒素原子を含む気体のプラズマ雰囲気
に曝して表面処理した後、Al、Ga若しくはInの少
なくとも一つの第 III族元素と第V族元素として少なく
とも窒素を含むIII −V族窒化物半導体のヘテロ接合を
備えた積層構造を、該非晶質材料基板の表面上に直接堆
積することを特徴とするものである。また、III −V族
窒化物半導体を直接堆積する非晶質基板の表面とは反対
側の、対向する基板の裏面上に金属被膜が形成されてな
る半導体装置を提供することを特徴とする。金属被膜は
複数の溝を設けた非晶質基板の裏面上に設けられている
半導体装置も提供する。
That is, according to the present invention, a substrate made of an amorphous material is exposed to a plasma atmosphere of a gas containing nitrogen atoms and surface-treated, and then at least one of Group III of Al, Ga or In is added. The present invention is characterized in that a laminated structure including a heterojunction of a III-V group nitride semiconductor containing at least nitrogen as an element and a Group V element is directly deposited on the surface of the amorphous material substrate. Another feature of the present invention is to provide a semiconductor device in which a metal film is formed on the back surface of an opposite substrate opposite to the surface of an amorphous substrate on which a III-V nitride semiconductor is directly deposited. The metal coating also provides a semiconductor device provided on the back surface of an amorphous substrate having a plurality of grooves.

【0019】本発明では単結晶材料に比較すれば廉価な
非晶質材料であり且つ透光性を有する材料を基板として
利用する。非晶質材料とは、結晶学的に無定形(amo
rphous)か或いは部分的に結晶化した領域を持つ
ミセル(miscel)構造を有する材料を指す。非晶
質で且つ透光性の材料には、例えば非晶質ガラスや結晶
化ガラスや石英ガラスなどが挙げられる。この他、透光
性を有するAlNなどのセラミック材料もこれに該当す
る。GaNやAlN等の成膜温度が一般的に約1000
℃と高温であるため、この様な高温でも軟化または融解
せずに実用に耐える基板材料が望ましい。この点からす
れば、比較的低温で軟化を起こす非晶質ガラス材料より
も石英ガラスやAlN等の透光性セラミック材料が都合
が良い。石英ガラス材料は紫外線領域の短波長光に対し
ても優れた透過性を有するため特に都合が良い。
In the present invention, a material that is an inexpensive amorphous material and has a light-transmitting property as compared with a single crystal material is used as the substrate. Amorphous materials are crystallographically amorphous (amo
or a material having a micellar structure with partially crystallized regions. Examples of the amorphous and translucent material include amorphous glass, crystallized glass, and quartz glass. In addition, a ceramic material such as AlN having a light-transmitting property also corresponds to this. The film forming temperature of GaN, AlN, etc. is generally about 1000.
Since the temperature is as high as ° C, a substrate material that can withstand practical use without softening or melting even at such a high temperature is desirable. From this point, a transparent ceramic material such as quartz glass or AlN is more convenient than an amorphous glass material that softens at a relatively low temperature. Quartz glass material is particularly convenient because it has excellent transparency to short-wavelength light in the ultraviolet region.

【0020】本発明では、例えば石英ガラス基板等の非
晶質基板材料の成長層の堆積を実施する一主面、即ち表
面を窒素原子を少なくとも構成原子の一つとする分子を
含む気体からなるプラズマ雰囲気に曝し表面処理を行
う。このプラズマ処理により、非晶質基板の表面に窒素
原子を存在させることができる。基板表面の近傍に存在
することとなった窒素原子は、表面上にIII −V族窒化
物半導体層が成長する際に結晶の成長機構の面から見れ
ば窒素のサイト(site)として働き、これにより単
結晶膜の成長を容易にする効果がある。
In the present invention, for example, a plasma containing a gas containing a molecule having nitrogen atoms as at least one of the constituent atoms is formed on one main surface for depositing a growth layer of an amorphous substrate material such as a quartz glass substrate. Surface treatment is performed by exposing to the atmosphere. By this plasma treatment, nitrogen atoms can be made to exist on the surface of the amorphous substrate. Nitrogen atoms existing near the surface of the substrate act as nitrogen sites from the viewpoint of the crystal growth mechanism when the III-V group nitride semiconductor layer grows on the surface. This has the effect of facilitating the growth of the single crystal film.

【0021】本発明者らが鋭意検討した結果からは、窒
素原子を少なくとも構成原子の一つとする分子として窒
素ガスを使用し、80Torrの真空環境に於いて、周
波数が2.45GHzのマイクロ波をもって窒素ガスを
励起し、石英ガラス基板の表面を10分間処理すると、
例えば常圧のMOCVD法により成長温度600℃で表
層部が単結晶化されたGaN膜を得るのに充分なプラズ
マ表面処理となる。
From the results of earnest studies by the present inventors, nitrogen gas was used as a molecule having a nitrogen atom as at least one of the constituent atoms, and a microwave having a frequency of 2.45 GHz was generated in a vacuum environment of 80 Torr. When nitrogen gas is excited and the surface of the quartz glass substrate is treated for 10 minutes,
For example, the plasma surface treatment is sufficient to obtain a GaN film whose surface layer portion is single-crystallized at a growth temperature of 600 ° C. by the MOCVD method under normal pressure.

【0022】基板表面を処理するプラズマは窒素ガスか
ら生成させるに限らず、例えばアンモニア(NH3 )や
脂肪族、脂環式或いは芳香族アミン類や窒素原子を少な
くとも一つの環の構成要素として含むピロール(Pyr
role)等の複素(ヘテロ環式)や窒素を含む置換基
であるアミン基を含む化合物、アゾ基(−N=N−)を
含む化合物等を利用して生成しても構わない。
The plasma for treating the surface of the substrate is not limited to being generated from nitrogen gas, but includes, for example, ammonia (NH 3 ), aliphatic, alicyclic or aromatic amines and nitrogen atom as at least one ring constituent element. Pyrrole
Role) and the like, a compound containing an amine group that is a substituent containing nitrogen or a substituent containing nitrogen, a compound containing an azo group (-N = N-), and the like may be used.

【0023】基板表面の処理方法としては、プラズマを
利用する方法以外に例えば窒素イオンを基板表面に注入
する方法もある。しかし、本発明者らが検討を重ねた結
果からは、プラズマ処理と同様の単結晶化についての効
果を得るには、窒素イオンについて約300KeVを越
える加速エネルギーを必要とし、尚且つ1014から10
15cm-2或いはそれを越える多大なドーズ(dose)
量を必要とする。ドーズ量が増大すると注入を終えるに
至る時間が増加するため簡便な表面処理方法とはなり得
なくなる。
As a method of treating the surface of the substrate, there is a method of implanting nitrogen ions into the surface of the substrate in addition to the method of utilizing plasma. However, as a result of repeated studies by the present inventors, in order to obtain the same effect on the single crystallization as the plasma treatment, an acceleration energy exceeding about 300 KeV is required for nitrogen ions, and 10 14 to 10
A huge dose of 15 cm -2 or more
Need quantity. If the dose amount is increased, the time required to complete the implantation is increased, so that it cannot be a simple surface treatment method.

【0024】本発明のいう非晶質の基板上に成長させる
Al、Ga若しくはInの少なくとも一つのIII 族元素
と窒素とを含むIII −V族窒化物半導体の例にはGa
N、AlN、InN、AlGaN、GaInN、AlI
nN、AlGaInN等がある。
Ga is an example of a III-V nitride semiconductor containing nitrogen and at least one Group III element of Al, Ga or In grown on the amorphous substrate according to the present invention.
N, AlN, InN, AlGaN, GaInN, AlI
Examples include nN and AlGaInN.

【0025】また、Nに加える第V族元素としては、ヒ
素(元素記号:As)やリン(元素記号:P)を含むII
I −V族窒化物半導体も本発明に該当する。これには、
GaNAs、GaNP、AlNAs、AlNP、InN
As、InNP、AlGaNAs、AlGaNP、Ga
InNAs、GaInNP、AlInNAs、AlIn
NP、AlGaInNAs、AlGaInNP、GaN
PAs、AlNPAs、InNPAs、AlGaInN
PAs等がある。
Further, as a Group V element added to N, arsenic (element symbol: As) and phosphorus (element symbol: P) are included II
I-V group nitride semiconductors also correspond to the present invention. This includes
GaNAs, GaNP, AlNAs, AlNP, InN
As, InNP, AlGaNAs, AlGaNP, Ga
InNAs, GaInNP, AlInNAs, AlIn
NP, AlGaInNAs, AlGaInNP, GaN
PAs, AlNPAs, InNPAs, AlGaInN
There are PAs and the like.

【0026】本発明では、これらのIII −V族窒化物半
導体層の組合せからなるヘテロ接合積層構造を、上記の
プラズマ処理を施した非晶質で且つ短波長の光を透過す
る材料からなる基板の表面上に直接積層する。従来例と
は異なり基板上に直接、積層構造を堆積しても単結晶膜
を得ることができる。単結晶膜を得ることができるのは
基板表面に上記のプラズマ処理を施したことによる。こ
れより、従来の如く非晶質の石英ガラスやガラス上にA
lGaNまたはInNエピタキシャル膜を成長するに必
要であった煩雑な成長工程を省略出来る利点がある。
In the present invention, the heterojunction laminated structure formed by combining these III-V nitride semiconductor layers is subjected to the above plasma treatment, and is a substrate made of an amorphous material that transmits light of a short wavelength. Laminate directly on the surface of. Unlike the conventional example, a single crystal film can be obtained by directly depositing a laminated structure on a substrate. The single crystal film can be obtained by subjecting the substrate surface to the above plasma treatment. From this, it is possible to
There is an advantage that the complicated growth process required for growing the lGaN or InN epitaxial film can be omitted.

【0027】非晶質基板上にIII −V族窒化物半導体層
を直接堆積する際の成長方法には、特に制限はない。従
来のMOCVD成長法やVPE成長法が利用できる。ま
た、分子線エピタキシャル(MBE)法や化学ビームエ
ピタキシャル(CBE)法等の成長方法もできる。MB
E法には使用する原料の形態に依ってガスソース(G
S)MBEや有機金属(MO)MBE等の方式が有るが
いずれでも利用できる。III −V族窒化物半導体層を成
長させるに当たってのGa、AlまたはIn或いはN原
料についても制限はない。本発明は、非晶質の基板上に
設けるIII −V族窒化物半導体層の窒素の空格子欠陥の
低減による膜質の高品質化により発光強度の増大を果た
すことを目的とはしていないため、従来例の如く複数の
成長方法を必要とせず、よって半導体装置を作製するた
めの積層構造を得るに際し、工程の簡略化が達成され
る。
The growth method for directly depositing the III-V group nitride semiconductor layer on the amorphous substrate is not particularly limited. The conventional MOCVD growth method or VPE growth method can be used. Further, a growth method such as a molecular beam epitaxial (MBE) method or a chemical beam epitaxial (CBE) method can also be used. MB
Depending on the form of the raw material used in the E method, a gas source (G
Although there are methods such as S) MBE and organic metal (MO) MBE, any method can be used. There is no limitation on the Ga, Al or In or N raw material for growing the III-V group nitride semiconductor layer. The present invention is not intended to increase the emission intensity by improving the film quality by reducing the nitrogen vacancy defects of the III-V group nitride semiconductor layer provided on the amorphous substrate. Unlike the conventional example, a plurality of growth methods are not required, and therefore, in obtaining a laminated structure for manufacturing a semiconductor device, simplification of steps is achieved.

【0028】ヘテロ接合は、前記したIII −V族窒化物
半導体の例の中から、構成元素を異にする層或いは構成
元素が同一であっても構成元素の組成を異にする層、即
ち構成元素や組成を異にする異種(ヘテロ)の半導体を
相互に接合させれば形成できる。例えばGaInNとG
aInNPとのヘテロ接合は構成元素を異にする半導体
層からなるヘテロ接合の例である。組成比を表すvとw
の値を異にするInN1-v Asv とInN1-w Asw
の接合は組成比を異にするヘテロ接合の例である。
The heterojunction is a layer having a different constituent element from the examples of the III-V group nitride semiconductors described above, or a layer having a different constituent element composition even if the constituent elements are the same, that is, a structure. It can be formed by joining heterogeneous semiconductors having different elements or compositions to each other. For example GaInN and G
The heterojunction with aInNP is an example of a heterojunction composed of semiconductor layers having different constituent elements. V and w that represent the composition ratio
The junction between InN 1-v As v and InN 1-w As w having different values of is an example of a heterojunction having different composition ratios.

【0029】ヘテロ接合を構成する層が2であれば接合
界面(ヘテロ接合界面)は一つである。これを単一(シ
ングル)ヘテロ接合と称す。3層よりヘテロ接合が構成
されていればヘテロ接合界面の数は2となり二重(ダブ
ル)ヘテロ接合と称される。ヘテロ接合界面の数が3で
あれば三重(トリプル)ヘテロ接合と称される場合もあ
るが、一般には多重ヘテロ接合と呼ばれる。積層構造に
これらのシングル、ダブルヘテロ接合や多重ヘテロ接合
を含ませれば、本発明のいうヘテロ接合を備えた積層構
造が形成される。
If the number of layers forming the heterojunction is 2, there is one junction interface (heterojunction interface). This is called a single heterojunction. If the heterojunction is composed of three layers, the number of heterojunction interfaces is 2, which is called a double heterojunction. If the number of heterojunction interfaces is three, it may be called a triple heterojunction, but it is generally called a multiple heterojunction. By including these single, double heterojunctions and multiple heterojunctions in the laminated structure, the laminated structure having the heterojunction referred to in the present invention is formed.

【0030】本発明では、光透過性の非晶質基板の一主
面上に発光を反射させるための金属の被膜を設ける。金
属被膜を設けるのはIII −V族窒化物半導体層を堆積す
る一主面、即ち基板の表面ではなく、基板の裏面上に設
ける。この反射用被膜は金(元素記号:Au)やアルミ
ニウム(元素記号:Al)やクロム(元素記号:Cr)
などの金属を真空蒸着法により基板の裏面側に被着させ
れば形成できる。短波長領域の発光に対する反射率の高
さや廉価なLEDを得るための経済性等を勘案するとA
lが最も適する。設ける金属被膜は単体からなる膜、例
えばAlのみからなる膜であっても良いし、例えばAl
とチタン(元素記号:Ti)の各層を重ねた2層構造の
膜であっても構わない。単層或いは数層の金属被膜を設
ける場合、各層の膜厚に特に制限はないが、1から10
nm程度と極端に薄いと光が透過する確率も高くなるた
め好ましくない。100nmから5000nmの膜厚が
実用上、適当である。例えば或る特定の波長の光の反射
率を高めるために設計された膜厚を有するAl薄膜とT
i薄膜とを多層に積層したいわゆる光干渉膜構造として
も構わない。基板材料の一主面に反射作用を与える金属
被膜を設ければ、従来例の如く反射鏡を別個にステム内
に設ける必要もなく、簡易な構成をもってLEDの発光
を外部へ反射でき、よってLEDからの発光強度の増大
がもたらされる。勿論、従来の様な発光の反射鏡を備え
たステムに本発明に係わる基板の裏面側に反射用金属被
膜を備えた素子をマウントしても発光強度の増加を果た
すという点では構わない。
In the present invention, a metal coating for reflecting emitted light is provided on one main surface of a light-transmissive amorphous substrate. The metal film is provided on the back surface of the substrate, not on the one main surface on which the III-V nitride semiconductor layer is deposited, that is, on the front surface of the substrate. This reflective coating is made of gold (elemental symbol: Au), aluminum (elemental symbol: Al), chromium (elemental symbol: Cr).
It can be formed by depositing a metal such as the above on the back surface side of the substrate by a vacuum deposition method. Considering the high reflectance for light emission in the short wavelength region and the economical efficiency for obtaining an inexpensive LED, A
l is most suitable. The metal coating to be provided may be a film made of a single substance, for example, a film made of only Al, or, for example, Al
It may be a film having a two-layer structure in which the respective layers of titanium and titanium (elemental symbol: Ti) are stacked. When a single layer or several layers of metal coating are provided, the thickness of each layer is not particularly limited, but it is from 1 to 10
If the thickness is extremely thin, such as about nm, the probability of light transmission increases, which is not preferable. A film thickness of 100 nm to 5000 nm is suitable for practical use. For example, an Al thin film having a thickness designed to enhance the reflectance of light of a certain wavelength and T
A so-called optical interference film structure in which i thin films are laminated in multiple layers may be used. By providing a metal coating on one main surface of the substrate material to provide a reflecting action, it is not necessary to separately provide a reflecting mirror inside the stem as in the conventional example, and the light emission of the LED can be reflected to the outside with a simple structure. To increase the emission intensity from. Of course, it is acceptable to mount an element having a reflection metal coating on the back surface side of the substrate according to the present invention on a stem having a reflection mirror for light emission as in the prior art, in that the emission intensity is increased.

【0031】反射光の強度は反射面として機能する面積
が広い程増加する。本発明では、特に導電性を有するが
故に基板の裏面側に反射用の金属被膜を設ける場合に於
いて、基板の裏面側に溝を形成し基板の表面積を拡大し
反射面積の増大を果たす。
The intensity of the reflected light increases as the area that functions as the reflecting surface increases. In the present invention, in the case of providing a metal coating for reflection on the back surface side of the substrate because it has conductivity, a groove is formed on the back surface side of the substrate to increase the surface area of the substrate and increase the reflection area.

【0032】溝は基板の裏面について公知のフォトリソ
グラフィー法によるパターニング技術を利用しエッチン
グ法等に依れば形成できる。例えば、非晶質の導電性ガ
ラス材料の裏面を、一旦通常のフォトレジスト材料で被
覆する。然る後、露光しフォトレジスト材料を感光させ
所望するの溝の形状にパターニングする。溝の部分に相
当するフォトレジスト材料をレジスト剥離液等で除去
し、基板材料の面を露呈させる。露呈させた領域に限
り、エッチングを施し基板材料の一部を除去する。最終
的に残存するフォトレジスト材料を剥離すれば、溝が形
成された基板材料を得ることができる。溝は旋盤等の工
作機械を利用して機械的な切削によっても形成できる。
The groove can be formed on the back surface of the substrate by an etching method or the like using a known patterning technique by photolithography. For example, the back surface of the amorphous conductive glass material is once coated with a normal photoresist material. After that, it is exposed to light to expose the photoresist material and is patterned into a desired groove shape. The photoresist material corresponding to the groove portion is removed with a resist stripping solution or the like to expose the surface of the substrate material. Only the exposed area is etched to remove a part of the substrate material. By peeling off the finally remaining photoresist material, a substrate material having grooves formed therein can be obtained. The groove can also be formed by mechanical cutting using a machine tool such as a lathe.

【0033】表面積をより拡大するには、溝を格子状に
形成すると良い。溝の断面の形状は限定がないが、断面
を半円状とし、そこに金属反射被膜を設けるとほぼ全方
位に発光を反射できる。また、基板の裏面に格子状の溝
を形成すべく基板材料をエッチングし、除去するに際
し、三角形状の断面を与えるエッチング薬剤或いはエッ
チング条件を選択すると結果として三角錐状に搾孔され
表面積の拡大をもたらす。基板に設ける溝の数量につい
ては特段の制限はない。但し、LEDの一般的なチップ
は一辺が300μmから450μmの方形であることか
ら、このチップの形状内に少なくとも数本の溝が配置さ
れるのが好ましい。
In order to further increase the surface area, it is advisable to form the grooves in a grid pattern. Although the shape of the cross section of the groove is not limited, the light emission can be reflected in almost all directions if the cross section is semicircular and a metal reflective coating is provided on the cross section. Also, when etching and removing the substrate material to form the grid-shaped grooves on the back surface of the substrate, selecting an etching agent or etching condition that gives a triangular cross-section results in piercing in a triangular pyramid shape and increasing the surface area. Bring There is no particular limitation on the number of grooves provided on the substrate. However, since a general LED chip has a rectangular shape with one side of 300 μm to 450 μm, it is preferable that at least several grooves are arranged in the shape of this chip.

【0034】上記の様な溝を形成した後、発光を反射す
る機能を持つ反射膜とする金属被膜を形成すれば良い。
金属被膜の形成方法としては真空蒸着法や塗布法が利用
できる。塗布法では、例えば所望する金属粉或いは化合
物等を含む液状の物質を溝を形成した基板の面に塗布
し、然る後、加熱して固化させれば金属の被膜が形成で
きる。また、塗布法では液状の物質を利用するため溝等
の段差を埋めるのに都合が良く、結果として平坦な表面
の金属被膜が得られ易い利点がある。真空蒸着法やスパ
ッタリング法等の物理的な堆積法では、数十μmを越え
る膜厚の被膜を得るのが容易でない場合がある。この様
な場合は、溝の側面なり壁面を全体的に覆う程度に一旦
被膜しておき、その被膜の上に然る後に鍍金(メッキ)
法等により被膜の膜厚を増加させ、溝を埋め尽くす手段
もある。但し、溝を金属被膜を構成する材料で完璧に埋
め、敢えて基板裏面を平坦化する絶対的な必要性はな
く、溝の形状を故意に残存させても構わない。基板裏面
側に金属被膜を構成する材料により不完全に埋め尽くさ
れた凹凸上の段差を残した溝が存在すると、ステム材料
へ素子を固定するための接着固定剤の素子に対する接触
面積の増加を招き頑固な固定を達成できるからである。
After forming the groove as described above, a metal film serving as a reflection film having a function of reflecting emitted light may be formed.
As a method for forming the metal coating, a vacuum vapor deposition method or a coating method can be used. In the coating method, for example, a liquid substance containing a desired metal powder or compound is coated on the surface of the substrate on which the groove is formed, and then heated and solidified to form a metal coating. In addition, since the coating method uses a liquid substance, it is convenient to fill a step such as a groove, and as a result, a metal film having a flat surface can be easily obtained. It may be difficult to obtain a film having a film thickness exceeding several tens of μm by a physical deposition method such as a vacuum evaporation method or a sputtering method. In such a case, once coat the side surface of the groove or the wall surface so as to entirely cover the groove, and then apply plating (plating).
There is also a method of increasing the film thickness of the coating by a method or the like to fill the groove. However, it is not absolutely necessary to completely fill the groove with the material forming the metal film and to flatten the back surface of the substrate, and the shape of the groove may be intentionally left. If there is a groove on the back side of the substrate that is unevenly filled with the material that constitutes the metal film and that has a step on the unevenness, the contact area of the adhesive fixing agent for fixing the element to the stem material increases. This is because the stubborn fixation can be achieved.

【0035】基板に設ける溝の深さは、溝を深くするに
伴い基板の表面積は拡大される傾向にあるため、溝を深
くするほど発光の反射強度の増大を招くが、同時に基板
が薄層化するため、基板の機械的強度が損なわれる。従
って、基板に設ける溝の深さは基板の厚さに対して最深
でも80%程度に止めておくのが好ましい。例えば厚さ
が300μmの基板については、溝の深さは最大でも2
40μmに止めておくのが良い。
Since the surface area of the substrate tends to increase with the depth of the groove provided in the substrate, the deeper the groove, the more the reflection intensity of light emission increases, but at the same time, the substrate has a thin layer. Therefore, the mechanical strength of the substrate is impaired. Therefore, it is preferable that the depth of the groove provided in the substrate is about 80% at the deepest with respect to the thickness of the substrate. For example, for a substrate with a thickness of 300 μm, the maximum groove depth is 2
It is better to stop at 40 μm.

【0036】[0036]

【作用】非晶質基板表面の窒素原子を含む気体からなる
プラズマ処理は、同表面上への単結晶III −V族窒化物
半導体層の容易な形成をもたらし、従来の非晶質基板上
へエピタキシャル膜成長工程の煩雑さを回避する。基板
裏面に形成された金属被膜は、発光の外部への反射を増
大させる。基板裏面に設ける溝は発光を反射する金属被
膜の表面積を拡張し、反射強度を更に増加させる。
The plasma treatment using a gas containing nitrogen atoms on the surface of the amorphous substrate results in the easy formation of a single crystal III-V group nitride semiconductor layer on the surface of the amorphous substrate. The complexity of the epitaxial film growth process is avoided. The metal coating formed on the back surface of the substrate increases reflection of emitted light to the outside. The groove provided on the back surface of the substrate expands the surface area of the metal film that reflects light emission, and further increases the reflection intensity.

【0037】[0037]

【実施例】【Example】

(実施例1)本発明に係わる半導体装置用途の積層構造
をMOCVD法により得る実施例を基に本発明を詳細に
説明する。図3は本実施例に係わる積層構造の断面模式
図である。基板(101)には絶縁性の非晶質AlNを
用いた。このAlNは透光性を有していた。基板(10
1)の厚さは約300μmであった。
(Example 1) The present invention will be described in detail based on an example in which a laminated structure for semiconductor device use according to the present invention is obtained by MOCVD. FIG. 3 is a schematic sectional view of a laminated structure according to this example. Insulating amorphous AlN was used for the substrate (101). This AlN had translucency. Board (10
The thickness of 1) was about 300 μm.

【0038】基板(101)を市販のドライエッチング
装置の真空チャンバー内に載置した後、チャンバー内を
真空度が約2×10-5100Torrに到達する迄排気
した。到達真空度がほぼ安定した時点でチャンバー内に
純度5Nの窒素ガスを導入し、チャンバー内の圧力を約
100Torrにした。然る後に、チャンバー内の平行
平面電極に周波数が13.56MHzの高周波バイアス
を印加し、窒素プラズマを発生させた。上記の基板(1
01)は平行に配置された平行平面電極の接地されてい
る側の電極上に載置した。平行平面電極間に生成された
窒素プラズマにより基板(101)の表面に窒素プラズ
マによる処理を施した。
The substrate (101) was placed in the vacuum chamber of a commercially available dry etching apparatus, and then the chamber was evacuated until the degree of vacuum reached about 2 × 10 −5 100 Torr. When the ultimate vacuum was almost stabilized, nitrogen gas with a purity of 5N was introduced into the chamber to adjust the pressure in the chamber to about 100 Torr. After that, a high frequency bias having a frequency of 13.56 MHz was applied to the parallel plane electrodes in the chamber to generate nitrogen plasma. The above substrate (1
01) was placed on the grounded side electrode of the parallel plane electrodes arranged in parallel. The surface of the substrate (101) was treated with nitrogen plasma by the nitrogen plasma generated between the parallel plane electrodes.

【0039】窒素プラズマにより表面を処理したAlN
基板(101)上に、直接n形のAlN0.050.95層を
下部クラッド層(103)として堆積した。膜厚は約
0.1μmであった。キャリア濃度は約1×1018cm
-3とした。この層(103)はトリメチルガリウム
((CH33 Ga)/トリメチルアルミニウム((C
33 Al)/ホスフィン(PH3 )/水素(H2
反応系による常圧MOCVD法により、温度750℃で
成長させた。次にPH3 の体積濃度を10%となる様に
高純度水素で希釈されたPH3 とH2 との混合ガスと
(CH33 GaとのMOCVD反応系への供給を停止
し、替わりにシクロペンタジエニルインジウム(C5
5 In)とアンモニア(NH3 )を反応系に供給し、p
形のGa0.4 In0.6 N層を発光層(104)として堆
積した。温度70℃に保持したC55 InとNH3
反応系内への添加流量は170cc/分と1lcc/分
に各々設定した。膜厚は約0.1μmとした。キャリア
濃度は約1×1017cm-3とした。
AlN whose surface is treated with nitrogen plasma
An n-type AlN 0.05 P 0.95 layer was directly deposited on the substrate (101) as a lower cladding layer (103). The film thickness was about 0.1 μm. Carrier concentration is about 1 × 10 18 cm
-3 . This layer (103) is trimethylgallium ((CH 3 ) 3 Ga) / trimethylaluminum ((C
H 3) 3 Al) / phosphine (PH 3) / hydrogen (H 2)
It was grown at a temperature of 750 ° C. by an atmospheric pressure MOCVD method using a reaction system. Next, the supply of the mixed gas of PH 3 and H 2 diluted with high-purity hydrogen so that the volume concentration of PH 3 becomes 10% and (CH 3 ) 3 Ga to the MOCVD reaction system is stopped and replaced. Cyclopentadienylindium (C 5 H
5 In) and ammonia (NH 3 ) are supplied to the reaction system, and p
A Ga 0.4 In 0.6 N layer of the form was deposited as the light emitting layer (104). The flow rates of C 5 H 5 In and NH 3 added to the reaction system maintained at a temperature of 70 ° C. were set to 170 cc / min and 1 lcc / min, respectively. The film thickness was about 0.1 μm. The carrier concentration was about 1 × 10 17 cm −3 .

【0040】これにより、窒素プラズマにより表面処理
された非晶質なAlNからなる基板(101)の表面
に、従来の如く金属被膜を介さずに直接堆積されたAl
0.05P0.95からなる下部クラッド層(103)とGa
0.4 In0.6 Nからなる発光層(104)とのヘテロ接
合を形成した。窒素プラズマにより処理された基板(1
01)表面の上に堆積した成長層((103)及び(1
04))は、通常のX線回折法による回折パターンか
ら、いずれも単結晶化された膜であることが判った。
As a result, Al directly deposited on the surface of the substrate (101) made of amorphous AlN surface-treated by nitrogen plasma without a metal coating as in the conventional case.
Ga and the lower clad layer (103) consisting of N 0.05 P 0.95
A heterojunction was formed with the light emitting layer (104) made of 0.4 In 0.6 N. Substrates treated with nitrogen plasma (1
01) Growth layers ((103) and (1
In the case of (04)), it was found from the diffraction pattern by the usual X-ray diffraction method that they were all single-crystallized films.

【0041】次に、発光層(104)上にp形のGaN
0.98As0.02からなる上部クラッド層(105)を積層
した。膜厚は0.3μmとし、キャリア濃度は約2×1
18cm-3とした。As源としては水素希釈されたアル
シン(体積濃度10%)−高純度水素(体積濃度90
%)の混合ガスを使用した。Ga源とした(CH33
Ga)は恒温槽により温度0℃に保持し毎分30ccの
流量をもって反応系に供給した。アルシン(AsH3
は35cc/分の流量とした。
Next, p-type GaN is formed on the light emitting layer (104).
An upper clad layer (105) made of 0.98 As 0.02 was laminated. The film thickness is 0.3 μm and the carrier concentration is about 2 × 1.
It was set to 0 18 cm -3 . As a source of hydrogen, diluted arsine (volume concentration 10%)-high purity hydrogen (volume concentration 90
%) Mixed gas was used. Ga source (CH 3 ) 3
Ga) was kept at a temperature of 0 ° C. by a thermostat and supplied to the reaction system at a flow rate of 30 cc / min. Arsine (AsH 3 )
Was 35 cc / min.

【0042】以上の構成により、AlN0.050.95
(103)とGa0.4 In0.6 N層(104)とのヘテ
ロ接合とGa0.4 In0.6 N層(104)とGaN0.98
As0. 02(105)とのヘテロ接合とからなるダブルヘ
テロ接合を備えたLED用途の積層構造を非晶質AlN
基板(101)上に直接、堆積することにより構成し
た。このダブルヘテロ接合積層構造を使用して短波長L
EDを作成した。このLEDは青緑色を帯びた青色の発
光が観測され、その中心の発光波長は約4720オング
ストローム(Å)であった。発光強度についての従来例
との比較では、本実施例に係わるLEDは、従来のLE
Dと遜色ない強度を与えるのが認められた。ここで、従
来のLEDとはカドミウム(Cd)や亜鉛(Zn)等の
不純物を添加した、Inの組成比率が0.2程度のGa
InNを発光層とする深緑色の発光をもたらすLEDを
指す。一方、発光スペクトルの半値幅は約340オング
ストローム(Å)であり、これに関しては上記の従来の
LEDに比較すれば約1/2(従来のLEDに於ける発
光スペクトルの半値幅は約700オングストロームであ
る。)と格別に顕著な改善が達成されるものとなった。
半値幅が縮小した一因として、本発明では表面を窒素プ
ラズマ処理した基板を使用することにより、その上に堆
積するヘテロ接合層内の窒素の空孔(vacancy)
濃度の減少がもたらされたものと判断された。
With the above structure, the heterojunction between the AlN 0.05 P 0.95 layer (103) and the Ga 0.4 In 0.6 N layer (104), the Ga 0.4 In 0.6 N layer (104) and the GaN 0.98 layer.
As 0. 02 (105) and amorphous AlN stacked structure of LED applications having a double hetero-junction comprising a heterojunction
It was constructed by depositing directly on the substrate (101). Short wavelength L using this double heterojunction laminated structure
ED was created. This LED was observed to emit blue-greenish blue light, and the central emission wavelength was about 4720 angstroms (Å). In comparison with the conventional example regarding the emission intensity, the LED according to the present example shows that the LED according to the conventional LE
It was recognized that it gave strength comparable to D. Here, a conventional LED is a Ga having an In composition ratio of about 0.2 to which impurities such as cadmium (Cd) and zinc (Zn) are added.
It refers to an LED that emits deep green light using InN as a light emitting layer. On the other hand, the full width at half maximum of the emission spectrum is about 340 angstroms (Å), which is about 1/2 of that of the conventional LED described above (the full width at half maximum of the emission spectrum of the conventional LED is about 700 angstroms). There is a remarkable improvement.
One of the reasons why the full width at half maximum is reduced is that the present invention uses a substrate whose surface is treated with nitrogen plasma, so that nitrogen vacancies in the heterojunction layer deposited thereon are used.
It was determined that the concentration was reduced.

【0043】(実施例2)ナトリウム、カリウム、リチ
ウム等のアルカリ金属類の総含有量が5重量ppm以下
の非晶質石英ガラスを基板(101)として使用した。
図4に本実施例に係わるLEDの構造の平面模式図を、
図5に図4の破線A−A’に沿う断面模式図を示す。石
英ガラス基板(101)の表面を実施例1に記載の方法
に則り、窒素プラズマによる表面処理を施した。プラズ
マ処理時の真空度等の条件は実施例1とほぼ同一とした
が、プラズマ生成時のパワーは210Wと増大させた。
実施例1で基板として使用した非晶質のAlNは、そも
そも窒素原子を構成元素として含んでいるが、石英ガラ
スは二酸化珪素(SiO2 )を主成分とし窒素原子を構
成元素として含有しないため、石英ガラス基板の表面に
効率良く窒素のサイトを形成するためにプラズマパワー
を増大させた。
Example 2 Amorphous quartz glass having a total content of alkali metals such as sodium, potassium and lithium of 5 ppm by weight or less was used as the substrate (101).
FIG. 4 is a schematic plan view of the structure of the LED according to this embodiment.
FIG. 5 shows a schematic sectional view taken along the broken line AA ′ in FIG. The surface of the quartz glass substrate (101) was subjected to surface treatment with nitrogen plasma according to the method described in Example 1. The conditions such as the degree of vacuum during plasma processing were almost the same as in Example 1, but the power during plasma generation was increased to 210 W.
The amorphous AlN used as the substrate in Example 1 originally contains a nitrogen atom as a constituent element, but quartz glass contains silicon dioxide (SiO 2 ) as a main component and does not contain a nitrogen atom as a constituent element. The plasma power was increased in order to efficiently form nitrogen sites on the surface of the quartz glass substrate.

【0044】プラズマ処理を施した石英ガラス基板(1
01)の表面に、直接上記の常圧MOCVD法によりn
形のGaN層を下部クラッド層(103)として堆積し
た。膜厚は約0.1μmとした。キャリア濃度は約1×
1018cm-3とした。次に、p形のGa0.88In0.12
層を発光層(104)として堆積した。発光層(10
4)の膜厚は0.25μmとし、キャリア濃度は1×1
17cm-3とした。発光層(104)上にはp形のGa
Nを上部クラッド層(105)として形成した。膜厚は
0.05μmとし、キャリア濃度は2×1018cm-3
した。これらの非晶質基板上に直接堆積された結晶層
((103)〜(105))によりダブルヘテロ接合を
備えた積層構造を構成した。反射電子線回折(RHEE
D)による極く表面近傍に於ける結晶形態に関する分析
では、窒素プラズマ処理を施した石英ガラス基板(10
1)の表面に堆積させた第一層であるGaN下部クラッ
ド層(103)の表層部は結晶化していた。
A quartz glass substrate (1
N) directly on the surface of No. 01) by the above atmospheric pressure MOCVD method.
Shaped GaN layer was deposited as the lower cladding layer (103). The film thickness was about 0.1 μm. Carrier concentration is about 1x
It was 10 18 cm -3 . Next, p-type Ga 0.88 In 0.12 N
The layer was deposited as a light emitting layer (104). Light-emitting layer (10
The film thickness of 4) is 0.25 μm, and the carrier concentration is 1 × 1.
It was set to 0 17 cm -3 . A p-type Ga is formed on the light emitting layer (104).
N was formed as the upper cladding layer (105). The film thickness was 0.05 μm, and the carrier concentration was 2 × 10 18 cm −3 . The crystal structure ((103) to (105)) directly deposited on these amorphous substrates constitutes a laminated structure having a double heterojunction. Reflection electron diffraction (RHEE
In the analysis on the crystal morphology in the vicinity of the surface by D), the quartz glass substrate (10
The surface layer of the GaN lower clad layer (103), which is the first layer deposited on the surface of 1), was crystallized.

【0045】積層構造の最表層にあたる上部クラッド層
(105)に公知のフォトリソグラフィー技術を利用し
てAlからなる陽極電極(107)を形成した。対向す
る陰極電極(108)は上部クラッド層(105)及び
発光層(104)の周辺部分をメサエッチングして露呈
させた下部クラッド層(103)上に形成した。
An anode electrode (107) made of Al was formed on the upper clad layer (105) corresponding to the outermost layer of the laminated structure by using a known photolithography technique. The facing cathode electrode (108) was formed on the lower clad layer (103) exposed by mesa etching the peripheral portions of the upper clad layer (105) and the light emitting layer (104).

【0046】非晶質な石英基板(101)の裏面側に
は、発光層(104)からの発光を反射するためのAl
からなる金属被膜(109)を真空蒸着により被着させ
た。金属被膜(109)の膜厚は約0.5μmとした。
本実施例では、発光の反射用の金属被膜と電極を構成す
る材料を同一としたが、別段この様な材料構成に限るこ
とはなく、電極と反射用の金属被膜とを構成する材料を
異にしても差し支えはない。
On the back side of the amorphous quartz substrate (101), Al for reflecting the light emitted from the light emitting layer (104) is formed.
A metal coating (109) consisting of was deposited by vacuum evaporation. The thickness of the metal coating (109) was about 0.5 μm.
In the present embodiment, the materials forming the metal film for reflection of light emission and the electrode are the same, but the material composition for forming the electrode and the metal film for reflection is different. But there is no problem.

【0047】以上の構成により、プラズマ処理された非
晶質基板の表面上に直接堆積されたダブルヘテロ接合を
備えたIII −V族窒化物半導体層からなる積層構造を有
し、且つ非晶質基板の裏面側に発光を反射する目的で設
けられた金属被膜とを有する半導体装置(LED)を構
成した。発光は紫色がかった青色であって、その中心波
長は約3850オングストローム(Å)であった。この
発光は上記の正及び負電極に数ボルト(V)の直流電圧
を印加することにより観測され、順方向電流を20mA
とした時の非モールド品チップの発光強度は約62ミリ
カンデラ(mcd)に達した。得られた発光強度は、同
様のダブルヘテロ積層構造から構成された金属被膜を具
備しないLEDの約2.2倍の大きさであることから、
非晶質の基板材料の裏面側に金属被膜によって、発光強
度の増大をもたらすことが如実に示された。この結果は
光学的に透明な単結晶材料に比較すれば廉価な非晶質透
明材料であっても、発光を反射する金属被膜を設けるこ
とによって強度が増大した発光を得ることができること
を示している。
With the above-mentioned structure, the amorphous structure has a laminated structure composed of a III-V group nitride semiconductor layer having a double heterojunction directly deposited on the surface of a plasma-treated amorphous substrate, and has an amorphous structure. A semiconductor device (LED) having a metal coating provided on the back surface side of the substrate for the purpose of reflecting emitted light was constructed. The luminescence was violetish blue and its center wavelength was about 3850 angstroms (Å). This light emission was observed by applying a DC voltage of several volts (V) to the positive and negative electrodes, and the forward current was 20 mA.
The emission intensity of the non-molded product chip reached about 62 millicandelas (mcd). Since the obtained emission intensity is about 2.2 times as large as that of the LED having no metal coating composed of the same double hetero laminated structure,
It was clearly shown that a metallic coating on the back side of the amorphous substrate material leads to an increase in emission intensity. This result shows that even with an inexpensive amorphous transparent material as compared with an optically transparent single crystal material, it is possible to obtain light emission with increased intensity by providing a metal film that reflects light emission. There is.

【0048】(実施例3)非晶質の溶融石英ガラスを基
板(101)として、実施例2と同様の積層構造を実施
例2の窒素プラズマ処理を施した基板表面に直接設け
た。図6に本実施例に係わるLEDの断面模式図を示
す。積層構造を構成する各層は常圧のMOCVD法によ
り、成長温度を700℃として形成した。使用した基板
(101)は直径が50mmの円形であり、厚みは15
0μmであった。
(Example 3) Amorphous fused silica glass was used as the substrate (101), and a laminated structure similar to that of Example 2 was directly provided on the surface of the substrate subjected to the nitrogen plasma treatment of Example 2. FIG. 6 shows a schematic sectional view of an LED according to this example. Each layer constituting the laminated structure was formed by a MOCVD method under normal pressure at a growth temperature of 700 ° C. The substrate (101) used had a circular shape with a diameter of 50 mm and a thickness of 15
It was 0 μm.

【0049】積層構造を得る前に、基板(101)の裏
面には開口幅が30μmの直線状の溝(110)を60
μmの間隔で周期的に設けた。即ち、溝の中心間の距離
を60μmとした。溝の開口幅や溝の中心間の間隔は適
宣、設定すれば良いが、本実施例では溝(110)と一
辺が360μmの正方形のチップを得るためのダイシン
グ用の切削溝とを共用するためこの値とした。このチッ
プサイズはあくまでも一例である。溝(110)の断面
形状は半円形とし、溝(110)の深さは20μmとし
た。この溝(110)の深さは基板(101)の厚さに
対して13%強の比率となった。これらの溝(110)
は旋盤を使用した切削加工により形成した。
Before the laminated structure is obtained, 60 linear grooves (110) having an opening width of 30 μm are formed on the back surface of the substrate (101).
It was provided periodically at intervals of μm. That is, the distance between the centers of the grooves was set to 60 μm. The opening width of the groove and the distance between the centers of the grooves may be set appropriately, but in the present embodiment, the groove (110) and the cutting groove for dicing for obtaining a square chip having a side of 360 μm are shared. Therefore, this value was used. This chip size is just an example. The cross-sectional shape of the groove (110) was semicircular, and the depth of the groove (110) was 20 μm. The depth of the groove (110) was more than 13% of the thickness of the substrate (101). These grooves (110)
Was formed by cutting using a lathe.

【0050】裏面に溝(110)を周期的に形成した非
晶質石英基板(101)の上には、実施例2と同様の積
層構造を直接堆積した。電極((107)及び(10
8))も上記実施例2に記載と同様にAlにより形成し
た。
The same laminated structure as in Example 2 was directly deposited on the amorphous quartz substrate (101) in which the grooves (110) were periodically formed on the back surface. Electrodes ((107) and (10
8)) was also made of Al as described in Example 2 above.

【0051】積層構造及び電極((107)及び(10
8))を形成した後、基板(101)の裏面に全面にA
lを真空蒸着し、発光反射用のAlからなる金属被膜
(109)を形成した。真空蒸着した金属被膜(10
9)の厚さは約7μmとした。本実施例では、反射用の
金属被膜は非晶質基板(101)上に直接積層構造を形
成するプロセスを経た後設けた。これは、上記した様に
積層構造を構成する各層を、金属被膜(109)材料の
Alの融点である660℃を上回る温度で成長させてい
るため、予め非晶質基板(101)の裏面にこの様な比
較的低い融点の金属を被着させておくと成長中に金属被
膜が溶解し、溝(110)の壁面から離脱し反射作用を
示す表面積の低下、即ち反射効率の低下を生ずるからで
ある。
Laminated structure and electrodes ((107) and (10)
8)) is formed, and then A is entirely formed on the back surface of the substrate (101).
1 was vacuum-deposited to form a metal coating (109) made of Al for reflecting light emission. Vacuum deposited metal film (10
The thickness of 9) was about 7 μm. In this embodiment, the reflective metal film is provided after the process of directly forming a laminated structure on the amorphous substrate (101). This is because each layer constituting the laminated structure is grown at a temperature higher than 660 ° C., which is the melting point of Al of the metal film (109) material, as described above, and thus is formed on the back surface of the amorphous substrate (101) in advance. If such a metal having a relatively low melting point is deposited, the metal film is dissolved during growth and is separated from the wall surface of the groove (110) to reduce the surface area exhibiting the reflection action, that is, the reflection efficiency is reduced. Is.

【0052】この様にして得られた基板に反射用の金属
被膜を備えたLEDは、従来例のLEDに比較し、発光
強度が増加するのが認められた。更に、特に実施例3に
記載の表面積を増大させた面に発光反射用の金属被膜を
設けることにより、単に、反射用金属を基板に付着させ
た場合よりも更なる反射強度の増大が達成された。具体
例を示せば、実施例2及び3で得られたLEDの発光の
中心波長には然したる相違はないものの、前記の実施例
2の場合に比較すれば発光強度は更にその1.3倍の約
80ミリカンデラ(mcd)に到達した。
It was observed that the LED thus obtained, which was provided with a metal coating for reflection on the substrate, had an increased emission intensity as compared with the LED of the conventional example. Furthermore, by providing a metal coating for light emission reflection on the surface having the increased surface area described in Example 3, further increase in the reflection intensity can be achieved as compared with the case where the reflection metal is simply attached to the substrate. It was If a specific example is shown, there is no difference in the center wavelengths of the light emission of the LEDs obtained in Examples 2 and 3, but the emission intensity is further 1.3% compared to the case of Example 2 described above. It doubled to about 80 millicandelas (mcd).

【0053】[0053]

【発明の効果】窒素を含有する気体によるプラズマ表面
処理は非晶質基板上に直接、堆積された成長層の単結晶
化を促す効果がある。また、基板の裏面側に金属被膜を
設けることによってLEDの素子としての発光強度を増
大させる効果がある。反射用の金属被膜を設ける基板裏
面の表面積を増大させれば尚更、発光の外部への反射強
度をより増大される効果が発揮される。
The plasma surface treatment with a gas containing nitrogen has the effect of promoting single crystallization of a growth layer deposited directly on an amorphous substrate. Further, by providing a metal coating on the back surface side of the substrate, there is an effect of increasing the light emission intensity as an element of the LED. Increasing the surface area of the back surface of the substrate on which the metal coating for reflection is provided has the effect of further increasing the reflection intensity of emitted light to the outside.

【0054】尚、本実施例では本発明に係わる半導体装
置の一例としてLEDについて説明したが、本発明の効
果、特に非晶質材料基板の表面にプラズマ処理を施すこ
とにより単結晶化が促進される効果は他の半導体装置、
例えばGaN/AlGaN等のヘテロ接合を備えてなる
ホール素子、電界効果型トランジスタ等のいわゆる電子
デバイス用途の積層構造を得るにも効果が発揮される。
Although the LED has been described as an example of the semiconductor device according to the present invention in the present embodiment, the effect of the present invention, in particular, the single crystallization is promoted by performing the plasma treatment on the surface of the amorphous material substrate. Other semiconductor devices,
For example, it is also effective for obtaining a laminated structure for so-called electronic devices such as Hall elements and field effect transistors having a heterojunction such as GaN / AlGaN.

【図面の簡単な説明】[Brief description of drawings]

【図1】従来の青色LEDチップの例を示す断面模式図
である。
FIG. 1 is a schematic sectional view showing an example of a conventional blue LED chip.

【図2】反射鏡を備えた台座に固定されてなるLEDの
断面模式図である。
FIG. 2 is a schematic sectional view of an LED fixed to a pedestal provided with a reflecting mirror.

【図3】本発明の実施例1に係わるLED用途の積層構
造例の断面模式図である。
FIG. 3 is a schematic sectional view of an example of a laminated structure for LED application according to Example 1 of the present invention.

【図4】本発明の実施例2に係わるLEDの平面模式図
である。
FIG. 4 is a schematic plan view of an LED according to Example 2 of the present invention.

【図5】図4に示した破線A−A’に沿った断面模式図
である。
5 is a schematic cross-sectional view taken along the broken line AA ′ shown in FIG.

【図6】本発明の実施例3に係わるLEDの断面模式図
である。
FIG. 6 is a schematic sectional view of an LED according to Example 3 of the present invention.

【符号の説明】[Explanation of symbols]

(101) 基板 (102) 緩衝層 (103) 下部クラッド層 (104) 発光層 (105) 上部クラッド層 (106) コンタクト層 (107) 陽極電極 (108) 陰極電極 (109) 金属被膜 (110) 溝 (111) 反射鏡 (112) チップ (113) ステム (114) 外囲樹脂 (115) 結線 (201) サファイア基板 (101) Substrate (102) Buffer layer (103) Lower clad layer (104) Light emitting layer (105) Upper clad layer (106) Contact layer (107) Anode electrode (108) Cathode electrode (109) Metal coating (110) Groove (111) Reflecting mirror (112) Chip (113) Stem (114) Envelope resin (115) Connection (201) Sapphire substrate

───────────────────────────────────────────────────── フロントページの続き (72)発明者 粟飯原 範行 埼玉県秩父市大字下影森1505番地 昭和電 工株式会社秩父研究所内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Noriyuki Awaihara 1505 Shimokagemori, Chichibu City, Saitama Prefecture Showa Denko Co., Ltd. Chichibu Laboratory

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 Al、Ga若しくはInのうち少なくと
も1種の第 III族元素と、少なくとも窒素を含む第V族
元素とからなる III−V族窒化物半導体ヘテロ接合を、
非晶質材料基板の表面上に直接堆積した積層構造から構
成されてなる発光素子用の半導体装置。
1. A III-V nitride semiconductor heterojunction comprising at least one Group III element of Al, Ga or In and a Group V element containing at least nitrogen.
A semiconductor device for a light emitting element, which is composed of a laminated structure directly deposited on the surface of an amorphous material substrate.
【請求項2】 III −V族窒化物半導体ヘテロ接合を堆
積した基板の表面とは反対側の、基板の裏面上に金属被
膜が形成されてなる請求項1に記載の発光素子用の半導
体装置。
2. The semiconductor device for a light emitting device according to claim 1, wherein a metal film is formed on the back surface of the substrate opposite to the front surface of the substrate on which the III-V group nitride semiconductor heterojunction is deposited. .
【請求項3】 非晶質材料基板の裏面に複数の溝を設
け、さらにその上に金属被膜を設けた請求項2に記載の
発光素子用の半導体装置。
3. The semiconductor device for a light emitting device according to claim 2, wherein a plurality of grooves are provided on the back surface of the amorphous material substrate, and a metal film is further provided on the grooves.
【請求項4】 非晶質材料基板を窒素原子を含むプラズ
マ雰囲気中に曝した後、該基板表面にAl、Ga若しく
はInのうち少なくとも1種の第 III族元素と、少なく
とも窒素を含む第V族元素とからなる III−V族窒化物
半導体ヘテロ接合を堆積させることを特徴とする発光素
子用半導体装置の製造方法。
4. An amorphous material substrate is exposed to a plasma atmosphere containing nitrogen atoms, and then at least one group III element of Al, Ga or In and a group V element containing at least nitrogen are formed on the surface of the substrate. A method for manufacturing a semiconductor device for a light emitting device, which comprises depositing a III-V group nitride semiconductor heterojunction composed of a group element.
JP18188795A 1995-07-18 1995-07-18 Semiconductor device and fabrication thereof Pending JPH0936427A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18188795A JPH0936427A (en) 1995-07-18 1995-07-18 Semiconductor device and fabrication thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18188795A JPH0936427A (en) 1995-07-18 1995-07-18 Semiconductor device and fabrication thereof

Publications (1)

Publication Number Publication Date
JPH0936427A true JPH0936427A (en) 1997-02-07

Family

ID=16108622

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18188795A Pending JPH0936427A (en) 1995-07-18 1995-07-18 Semiconductor device and fabrication thereof

Country Status (1)

Country Link
JP (1) JPH0936427A (en)

Cited By (13)

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US8664687B2 (en) 2004-03-31 2014-03-04 Samsung Electronics Co., Ltd. Nitride semiconductor light-emitting device and process for producing the same
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