JP2009016505A - Group iii nitride compound semiconductor light emitting element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a group III nitride compound semiconductor light emitting element of high light emitting output. <P>SOLUTION: In the group III nitride compound semiconductor light emitting element, a first layer and a DBR layer composed of a group III nitride compound semiconductor are provided in the order on a substrate whose refractive index is different from the one of the group III nitride compound semiconductor, an n-type layer, a light emitting layer and a p-type layer composed of the group III nitride compound semiconductor are provided on the DBR layer so that the light emitting layer is held between the n-type layer and the p-type layer, and the thickness of the first layer is equal to or less than 1,000 nm. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a group III nitride compound semiconductor light emitting device, and more particularly to a face-up type III nitride compound semiconductor light emitting device having a high light emission output.

  Group III nitride compound semiconductors (hereinafter referred to as Group III nitride compound semiconductors are expressed as AlGaInN) have a direct transition type band gap of energy corresponding to the visible to ultraviolet light region, and emit light with high efficiency. Therefore, commercialization as LED and LD has been achieved. In addition, the electronic device has a potential to obtain characteristics that cannot be obtained by a conventional III-V group compound semiconductor.

Single crystal wafers of III-V compound semiconductors are not yet commercially available, and a method for growing a group of III-V compound semiconductors on single crystal wafers of different materials is common. A large lattice mismatch exists between such a heterogeneous substrate and a group III nitride compound semiconductor crystal epitaxially grown thereon. For example, there is a lattice mismatch of 16% between sapphire (Al ₂ O ₃ ) and gallium nitride (GaN) and 6% between SiC and gallium nitride. In general, when such a large lattice mismatch exists, it is difficult to directly epitaxially grow a crystal on a substrate, and a crystal with good crystallinity cannot be obtained even if grown. Therefore, when a group III nitride compound semiconductor crystal is epitaxially grown on a sapphire single crystal substrate or a SiC single crystal substrate by metal organic chemical vapor deposition (MOCVD), Japanese Patent No. 3026087 and Japanese Patent Application Laid-Open No. 4-297003. As shown in FIG. 1, a method called a low-temperature buffer layer made of aluminum nitride (AlN) or AlGaN is first deposited on a substrate, and then a group III nitride compound semiconductor crystal is epitaxially grown on the layer at a high temperature. Has been done in general.

  A technique for forming a multilayer film on a Group III nitride compound semiconductor layer having good crystallinity using this low-temperature buffer layer has been disclosed. For example, Japanese Patent No. 2985908 discloses a technique for growing an n-type GaN layer on a buffer layer grown at a temperature of 200 to 900 ° C. and forming a multilayer film made of AlN and GaN on the n-type GaN layer. ing. However, the purpose of forming this multilayer film is to improve crystallinity.

  Moreover, a structure called Distributed Bragg Reflectors (DBR), which is a multilayer film layer having a function of reflecting light of a specific wavelength entering from a specific angle using the light interference effect, has long been used in a compound semiconductor light emitting device. Has been adopted. There are many research examples on Group III nitride compound semiconductor light-emitting devices, including reviews summarized in Japanese Journal of Applied Physics, Vol.44, No.10, 2005, pp.7207-7216.

Usually, such a reflective film inserted between the light emitting layer and the substrate is installed in order to avoid a decrease in light emission output due to light absorption by the substrate. However, in the case of a group III nitride compound semiconductor light emitting device using sapphire as a substrate, this is not necessary because sapphire is transparent. The role of the DBR layer in the group III nitride compound semiconductor light emitting device is mainly to change the light distribution of light emission and concentrate the light emission density on the front side on the electrode side. By concentrating the light emission in front of the electrodes, the light emission can be extracted effectively regardless of the performance of the package and can be used effectively. The light distribution is the angle dependency of light emitted from the chip with respect to the chip.
From the above situation, the DBR layer should be provided between the light emitting layer and the substrate. However, since the DBR layer is made of a material different from the crystal forming the base layer, the crystallinity of the base layer is lowered by inserting the DBR layer. In order to improve the lowered crystallinity, it is effective to form the base layer with a large film thickness. In other words, it is desirable to form a crystal having a film thickness as large as possible between the formation of the DBR layer and the light emitting layer.

Although there are such circumstances, unnecessarily increasing the film thickness of the entire crystal structure causes disadvantages such as an increase in processing time and an increase in warpage of the substrate.
For this reason, in a group III nitride compound semiconductor light emitting device, it is desired to place the DBR layer as far from the light emitting layer as possible, in other words, as close to the substrate as possible.

  However, in general, it is known that flatness is once lost in the initial stage of growth in the film formation of a group III nitride compound semiconductor crystal on a sapphire substrate using a low temperature buffer layer by MOCVD. For this reason, until the crystal film having a certain thickness is stacked, even if the DBR layer is formed, it does not become a flat film, and the original function cannot be exhibited.

  In addition, the DBR layer can be formed directly on the sapphire substrate by a technique such as MBE which does not take such a growth mechanism. However, film formation on a sapphire substrate by a technique such as MBE causes problems that the crystallinity is not improved as expected and the light emission efficiency of the light emitting layer is not improved.

Japanese Patent No. 3026087 Japanese Patent Laid-Open No. 4-297003 Japanese Patent No. 2985908 Japanese Journal of Applied Physics, Vol.44, No.10, 2005, pp.7207-7216

  An object of the present invention is to form a DBR layer near a sapphire substrate by MOCVD using a buffer layer capable of forming a flat crystal film from the initial stage of growth, thereby producing a light-emitting layer with good crystallinity. And a group III nitride compound semiconductor light emitting device having a high light emission output.

The present invention provides the following inventions.
(1) A first layer and a DBR layer made of a group III nitride compound semiconductor are provided in this order on a substrate having a refractive index different from that of the group III nitride compound semiconductor. On the DBR layer, An n-type layer, a light-emitting layer, and a p-type layer made of a group III nitride compound semiconductor are provided so that the light-emitting layer is sandwiched between the n-type layer and the p-type layer, and the thickness of the first layer is 1000 nm. A group III nitride compound semiconductor light emitting device, which is:

(2) The group III nitride compound semiconductor light-emitting device according to the above item 1, wherein the DBR layer is composed of a laminate of at least two kinds of layers having different refractive indexes.
(3) The group III nitride compound semiconductor light-emitting device according to the above item 2, wherein 3 to 50 layers of at least two types having different refractive indexes are laminated.
(4) The group III nitride compound semiconductor light-emitting device according to 2 or 3 above, wherein the thickness of each layer of the laminate constituting the DBR layer is 200 nm or less.

  (5) One of at least two types of layers having different refractive indexes is GaN, and the other is at least one selected from the group consisting of AlN, InN, and AlInN. Group III nitride compound semiconductor light-emitting device.

(6) The group III nitride compound semiconductor light-emitting device according to any one of the above items 1 to 5, wherein the first layer covers at least 90% of the substrate surface.
(7) The group III nitride compound semiconductor light-emitting element according to any one of the above items 1 to 6, wherein the first layer is formed of a columnar crystal.

(8) The group III nitride compound semiconductor light-emitting device according to the above item 7, wherein the columnar crystal has a width of 0.1 nm to 100 nm.
(9) The group III nitride compound semiconductor light-emitting device according to the item 8, wherein the columnar crystal has a width of 1 nm to 70 nm.

(10) The group III nitride compound semiconductor light-emitting device according to any one of items 1 to 6, wherein the first layer is made of a single crystal.
(11) The group III nitride compound semiconductor light-emitting device according to any one of 1 to 10, wherein the first layer has a thickness of 10 nm to 500 nm.
(12) The group III nitride compound semiconductor light-emitting device according to the item 11, wherein the thickness of the first layer is 20 nm to 100 nm.

(13) The group III nitride compound semiconductor light-emitting device according to any one of items 1 to 12, wherein the first layer is a group III nitride compound semiconductor containing Al.
(14) The group III nitride compound semiconductor light-emitting device according to the above item 13, wherein the first layer is made of AlN.

(15) The group III nitride compound semiconductor light-emitting device according to any one of items 1 to 14, wherein the first layer is formed by sputtering.
(16) The group III nitride compound semiconductor light-emitting device according to the above item 15, wherein the sputtering method is a reactive sputtering method performed while a nitrogen source is circulated in the reactor.

(17) The group III nitride compound semiconductor light-emitting device according to the above item 15 or 16, which is a sputtering method using nitrogen gas as a nitrogen source.
(18) The group III nitride compound semiconductor light-emitting device according to any one of the above items 15 to 17, wherein the sputtering method is an RF sputtering method.

  (19) The group III nitride compound according to any one of the above items 1 to 18, wherein a second layer made of a group III nitride compound semiconductor is further provided between the first layer and the DBR layer. Semiconductor light emitting device.

(20) The group III nitride compound semiconductor light-emitting device according to the above item 19, wherein the second layer is AlGaN.
(21) The group III nitride compound semiconductor light-emitting device according to the above item 19, wherein the second layer is GaN.

(22) The group III nitride compound semiconductor light-emitting device according to any one of items 19 to 21, wherein the second layer is formed by a MOCVD method.
(23) The group III nitride compound semiconductor light-emitting device according to any one of the above 19 to 22, wherein the dislocation density on the surface of the second layer is 10 ⁹ or less.

(24) A lamp comprising the group III nitride compound semiconductor light-emitting device according to any one of items 1 to 23.
(25) An electronic device in which the lamp described in item 24 is incorporated.
(26) A machine device in which the electronic device described in the above item 25 is incorporated.

  Since the group III nitride compound semiconductor light-emitting device of the present invention has a DBR layer near the sapphire substrate, the group III nitride compound semiconductor light-emitting device includes a crystal layer made of a group III nitride compound semiconductor with good crystallinity, has a high light emission output, and Since it has an angle distribution in which the light emission output is concentrated on the front surface, light emission can be taken out efficiently when it is incorporated in a package.

  As a result of diligent research and development, the present inventors have found that when an AlN buffer layer is formed by sputtering, the crystal layer is flattened with a relatively thin film thickness of about 40 nm and changes to 2D mode growth. I found it. This is very different from the conventional film formation of the low-temperature buffer layer, in which the planarization is from a film thickness of about 1000 nm. By realizing flattening with such a thin film thickness of 40 nm and at most 100 nm, a DBR layer suitable for optical design can be introduced near the substrate.

In the present invention, the DBR layer has a function of totally reflecting light from the light emitting layer and extracting light from the side opposite to the substrate, that is, the electrode side.
The structure of the DBR layer has a structure in which at least two kinds of materials having different refractive indexes are laminated.

As a material constituting the DBR layer, at least two kinds of materials made of general AlGaInN having different compositions can be used. In order to achieve the above functions, it is desirable that the refractive indexes are greatly different. Therefore, it is advantageous to combine those having different compositions, and it is preferable to use AlN and GaN, GaN and AlInN, GaN and InN, or the like.
Further, in order to keep the crystallinity of the DBR layer well, it is desirable to stack those having a close lattice constant, and in order to obtain the effect, mixed crystals may be stacked repeatedly.
Furthermore, it is not always necessary to repeat materials having the same composition. By changing the composition according to the order of crystal growth, it is possible to obtain the light reflectivity as designed while maintaining good crystallinity.

In order to achieve the above function, the thickness of each layer constituting the DBR layer varies depending on the wavelength of light to be extracted, but is generally preferably 20 to 200 nm. More preferably, it is 30-150 nm. When the refractive index of the material used is N and the wavelength of the light to be extracted is λ, the thickness of each layer is controlled with λ / 4N as a guideline, and the range is 0.5 to 2 times λ / 4N. It is preferable to do. The appropriate thickness can be simulated using optical design software or the like based on the refractive index of the material used and the wavelength of the extracted light.
The film thickness of each layer does not need to be the same film thickness. By combining several layers having different film thicknesses, the reflected wavelength can be set to a certain wavelength range instead of a single narrow wavelength range.

In order to achieve the above function, the number of layers constituting the DBR layer is preferably 3 or more. More preferably, there are 5 or more layers. 10 layers or more are particularly preferred. However, when the number of layers is 50 or more, the crystallinity is lowered, which is not preferable.
When three or more kinds of materials having different refractive indexes are used, it is preferable that the layers are laminated so that the increase and decrease of the refractive index are alternately repeated.

The DBR layer is preferably present near the substrate, for example, within 1000 nm, more preferably within 800 nm, and particularly preferably within 500 nm. Although it is most preferable to provide the DBR layer directly on the substrate, when the DBR layer is directly provided on the substrate, the crystallinity of the DBR layer is deteriorated.
Therefore, the group III nitride compound semiconductor light-emitting device of the present invention includes a first layer as described below that can achieve initial planarization with a small film thickness as a buffer layer on a substrate.

That is, when the group III nitride compound semiconductor crystal is epitaxially grown on the substrate, a first layer is formed by a film formation method in which a group III metal source and a gas containing nitrogen element are activated by plasma, for example, a sputtering method, Using this as a buffer layer, a DBR layer is formed thereon. The first layer formed by such a film formation method can be flattened with a thin film thickness of 40 nm or at most 100 nm.
In order to realize planarization with a thin film thickness, a layer made of columnar crystals is preferable, but a single crystal layer may be used.

  In the present invention, the columnar crystal is separated by forming a crystal grain boundary between adjacent crystal grains, and the columnar crystal itself is a columnar crystal as a longitudinal cross-sectional shape. FIG. 2 is a transmission electron microscope (TEM) photograph of a cross section of a group III nitride compound semiconductor multilayer structure produced in a reference example described later, and FIG. 3 is a schematic diagram of FIG. The first layer is delimited by a boundary as shown by a solid line in FIG. 3, and each crystal lump between the boundaries has a hexagonal column shape. In this specification, this is called an aggregate of columnar crystals. As can be seen from these drawings, this crystal form can be called a layer delimited by a boundary depending on the expression, but the present inventors refer to an aggregate of columnar crystals including such a layer.

Such a first layer (buffer layer) desirably covers the substrate without any gap. If the first layer does not cover the substrate and the surface of the substrate is partially exposed, a crystal lattice is formed by the DBR layer formed on the first layer and the DBR layer formed directly on the substrate. Since the constants are different, uniform crystals are not obtained. As a result, hillocks and pits are generated.
For this reason, the first layer needs to cover at least 60% of the substrate surface. More desirably, it is 80% or more, and most desirably covers 90% or more.

  The ratio of the first layer covering the substrate can be measured from the cross-sectional TEM photograph. In particular, when the materials of the first layer and the DBR layer are different, by scanning the interface between the substrate and the layer in parallel with the substrate surface using EDS or the like, the ratio of the region where the first layer is not formed Can also be estimated. In addition, by preparing a sample in which only the first layer is formed, it is possible to measure the exposed area of the substrate by a technique such as AFM. In this invention, it measured from the said cross-sectional TEM photograph.

It is desirable to appropriately control the grain width of the individual crystals of the columnar crystal. Specifically, it is desirable that the width of each columnar crystal is a value between 0.1 nm and 100 nm. More desirably, the value is between 1 nm and 70 nm.
The width of each columnar crystal can be easily measured by the cross-sectional TEM photograph. That is, in FIG. 4, the interval between the boundaries of each columnar crystal is the width of each columnar crystal. As can be seen from FIG. 3, the width of each columnar crystal cannot be precisely defined and has a certain distribution. Therefore, even if there are about several percent of crystals in which the width of each columnar crystal is out of the above range, the effect of the present invention is not affected. 90% or more is preferably within the above range.

  The thickness of the first layer is preferably 10 nm to 500 nm. If it is thinner than this, the function as a buffer layer cannot be sufficiently achieved, and even if it is thicker than this, the function does not change. More preferably, the layer thickness is 20 nm to 100 nm. The layer thickness of the first layer can also be easily measured by the cross-sectional TEM photograph.

  As the material constituting the first layer, any material can be used as long as it is a group III nitride compound semiconductor represented by the general formula AlGaInN. Further, As and P may be included as a group V. However, among these, a composition containing Al is desirable. In particular, GaAlN is desirable, and the composition of Al is preferably 50% or more. Furthermore, AlN is more preferable because it can be efficiently formed into a columnar crystal aggregate.

  Sputtering, PLD, PED, CVD and the like are known as film forming methods for converting a group III metal raw material into plasma. As a method for generating plasma, there are a sputtering method in which discharge is caused by applying a high voltage at a specific degree of vacuum, a PLD method that is generated by irradiating a laser having a high energy density, and a PED method that is generated by irradiating an electron beam. However, among these, the sputtering method is the most convenient and suitable for mass production, so it is a suitable method. In DC sputtering, the target surface is charged up and there is a high possibility that the deposition rate is not stable. Therefore, it is desirable to use pulse DC or RF sputtering.

  In the sputtering method, it is generally practical to increase the efficiency by confining plasma in a magnetic field, and it is desirable to move the position of the magnet within the target as a method for avoiding charge-up. The specific motion method can be selected by the apparatus, and can be swung or rotated.

  When the first layer is formed by sputtering, the important parameters are the pressure in the furnace and the partial pressure of nitrogen except for the substrate temperature. The pressure in the furnace is preferably 0.3 Pa or more. At pressures below this, the amount of nitrogen present is small and the sputtered metal adheres without becoming nitrides. The upper limit of the pressure is not particularly defined, but it is needless to say that a low pressure that can generate plasma is required. The ratio of the nitrogen flow rate to the nitrogen flow rate is preferably 20% or more and 90% or less. When the flow rate ratio is less than this, the sputtered metal adheres as it is, and when the flow rate ratio is higher than this, the amount of argon is small and the sputtering rate is reduced. Particularly preferably, it is 50% or more and 90% or less.

  The film formation rate is desirably 0.01 nm / second to 10 nm / second. At higher speeds, the film becomes amorphous rather than crystalline. If the film formation speed is lower than this, the film does not become a layer but grows in an island shape and cannot cover the surface of the substrate.

The substrate can be pretreated using a method such as sputtering after being introduced into the reactor. Specifically, the surface can be prepared by exposure to Ar or N ₂ plasma. For example, by applying plasma such as Ar gas or N ₂ gas to the substrate surface, it is possible to remove organic substances and oxides attached to the surface. In this case, plasma particles efficiently act on the substrate by applying a voltage between the substrate and the chamber.
The substrate can also be subjected to wet pretreatment. For example, for a silicon substrate, a well-known RCA cleaning method or the like is performed, and the surface is hydrogen-terminated, so that a stable process is achieved.

  In the experiments by the present inventors, it has been found that the substrate temperature during the film formation of the first layer is desirably 300 to 800 ° C. If the temperature is lower than that, the first layer may not cover the entire surface of the substrate, and the substrate surface may be exposed. At a temperature higher than this, the migration of the Group III metal raw material becomes too active, which seems not suitable for the first layer. More preferably, it is 400-800 degreeC.

  If you want to form a mixed crystal as the first layer using a film-forming method that turns the Group III metal material into plasma, the target metal is a mixture of metal materials from the beginning (not necessarily forming an alloy). Or a method of preparing two targets made of different materials and performing sputtering at the same time. In general, a mixed material target is used to form a film with a fixed composition, and a plurality of targets are placed in a chamber to form several types of films having different compositions.

  As the nitrogen raw material used in the present technology, generally known compounds can be used without any problem. Particularly, ammonia and nitrogen are preferable because they are easy to handle and are available at a relatively low cost. Ammonia has good decomposition efficiency and can be deposited at a high growth rate. However, ammonia is highly reactive and toxic, requires abatement equipment and a gas detector, and uses materials for the components used in the reactor. It needs to be devised, for example, it needs to be chemically stable. Conversely, when nitrogen is used as a raw material, the apparatus is simple, but a high reaction rate cannot be obtained. The method in which nitrogen is decomposed by an electric field or heat and then introduced into the apparatus is inferior to ammonia, but can provide a film forming rate that can be used. Considering the balance with the apparatus cost, the most suitable nitrogen source It is.

In order to improve the crystallinity of the DBR layer, a second layer made of a group III nitride compound semiconductor is preferably provided between the first layer and the DBR layer. The material making up the second layer need not be the same as the first layer.
As a result of experiments by the present inventors, a Group III nitride compound semiconductor containing Ga was desired as the material for the second layer. It is necessary to loop dislocations by migration so that the crystallinity of the first layer, which is an aggregate of columnar crystals, is not inherited, but a material that easily causes dislocation looping is a nitride containing Ga. is there. In particular, AlGaN is desirable and GaN is also suitable. By such looping, an excellent dislocation density of 10 ⁹ cm ⁻² or less is achieved on the surface of the second layer, and the crystallinity of the DBR layer formed thereon is very good. .

  The second layer can have a structure doped with a dopant as necessary, or can have an undoped structure. In the case of using a conductive substrate, it is desirable to have a structure in which electrodes are attached to both surfaces of the chip by doping the second layer so that a current flows in the layer structure in the vertical direction. When an insulating substrate is used, a chip structure in which electrodes are formed on the same surface of the chip is employed. Therefore, the crystallinity is better when the layer immediately above the substrate is made of undoped crystals.

Annealing after forming the first layer and before forming the second layer is not particularly necessary.
However, when the second film formation is performed by a vapor phase chemical film formation method such as MOCVD, MBE, or VPE, generally, a temperature rising process and a temperature stabilization process without film formation are performed. In these processes, group V source gas is often circulated, and as a result, there is a possibility that an annealing effect is produced. However, this does not particularly use the effect of annealing, and is a generally known technique.

  Moreover, the carrier gas which distribute | circulates in that case can use a general thing without a problem. That is, hydrogen or nitrogen widely used in vapor phase chemical film formation methods such as MOCVD may be used. However, raising the temperature in chemically relatively active hydrogen may impair the crystallinity and the flatness of the crystal surface, and should not be performed for a long time.

The method of laminating the second layer is not particularly limited. There is no problem as long as it is a crystal growth technique capable of causing the above-described dislocation looping. In particular, the MOCVD method, the MBE method, and the VPE method are preferable because they can generally cause such a migration and can form a film with a good crystallinity. Among them, the MOCVD method is often used because a film having the best crystallinity can be obtained.
Alternatively, the second layer can be formed using a sputtering method. In the case of the sputtering method, the apparatus can be easily made as compared with the MOCVD method or the MBE method.

The substrate temperature when forming the second layer is desirably 800 ° C. or higher. This is because, when the substrate temperature is high, atom migration is likely to occur, and dislocation looping easily proceeds. More desirably, it is 900 ° C. or higher, and particularly desirably 1000 ° C. or higher.
Needless to say, the film formation must be performed at a temperature lower than the temperature at which the crystal decomposes, and a temperature of 1200 ° C. or higher is not suitable as the growth temperature of the second layer.

  Needless to say, the thickness of the second layer is set so that the total thickness of the second layer is 1000 nm or less. The thickness is preferably 800 nm or less, more preferably 500 nm or less. The thickness of the second layer is preferably 100 to 900 nm. Below 100 nm, the dislocation looping may be insufficient.

As group III nitride compound semiconductors, semiconductors having various compositions represented by the general formula Al _x In _y Ga _1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1) are known. . The group III nitride semiconductor constituting the light-emitting device of the present invention also includes these known semiconductors and has a general formula of Al _x In _y Ga _1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y). Semiconductors having various compositions represented by ≦ 1) can be used without any limitation.

  As the substrate that can be used in the present invention, any material can be used as long as it is a transparent substrate that can generally form a group III nitride compound semiconductor crystal. For example, sapphire, SiC, zinc oxide, magnesium oxide, manganese oxide, zirconium oxide, magnesium aluminum oxide, gallium oxide, indium oxide, lithium gallium oxide, lithium aluminum oxide, neodymium gallium oxide, lanthanum strontium aluminum tantalum, strontium titanium oxide and For example, titanium oxide.

  Among them, the oxide layer and the metal substrate that are known to cause chemical modification by contact with ammonia at a high temperature, the first layer does not use ammonia, the second layer or When the DBR layer is formed by a technique using ammonia, the first layer acts as a coat layer, which has an effect of preventing chemical alteration and can be used as an effective film formation method.

  A semiconductor stacked structure having a light emitting function is formed on the DBR layer. That is, an n-type layer, a light-emitting layer, and a p-type layer made of a group III nitride compound semiconductor are provided so that the light-emitting layer is sandwiched between the n-type layer and the p-type layer. These n-type layer, light-emitting layer, and p-type layer are well known in various compositions and structures. The n-type layer, light-emitting layer, and p-type layer in the present invention are also known as the n-type layer, light-emitting layer, and p-type layer. Any n-type layer, light-emitting layer, and p-type layer having any composition and structure including the p-type layer can be used without any limitation.

The n-type layer is usually composed of an underlayer, an n-type contact layer provided with a negative electrode, and an n-type clad layer having a large band gap energy and in contact with the light emitting layer. It can also serve as a mold cladding layer.
The p-type layer is usually composed of a p-type contact layer provided with a positive electrode and a p-type cladding layer having a large band gap energy and in contact with the light emitting layer. However, the p-type contact layer can also serve as the p-type cladding layer. .
In general, the light emitting layer is often a light emitting layer having a multiple quantum well structure in which a number of well layers and barrier layers having a large band gap energy are alternately stacked.

  The n-type layer and the p-type layer are provided with a negative electrode and a positive electrode. Various compositions and structures are well known as the negative electrode and the positive electrode, and the negative electrode and the positive electrode of any composition and structure including the known negative electrode and the positive electrode are used without any limitation as the negative electrode and the positive electrode in the present invention. be able to.

  It is possible to package a light emitting element manufactured by the present technology and use it as a lamp. Further, a technique for changing the emission color by combining with a phosphor is known, and this can be used without any problem. For example, by appropriately selecting a phosphor, light having a longer wavelength than that of the light emitting element can be obtained, and a white package can be obtained by mixing the light emitting wavelength of the light emitting element itself with the wavelength converted by the phosphor. You can also.

  In addition, since a lamp manufactured from the Group III nitride compound semiconductor light emitting device of the present invention has high light emission output, an electronic device such as a mobile phone, a display, or a panel incorporating the lamp manufactured by this technology, or the electronic device is used. Mechanical devices such as automobiles, computers, and game machines that are incorporated can realize high characteristics.

  Furthermore, by applying the technique proposed in this case, it is possible to enhance the extraction of light emission to the electrode side, so that various techniques can be applied to the surface of the chip on the electrode side to effectively utilize this technique. Can do. For example, by applying a fine uneven structure to the outermost surface of the chip, applying a non-reflective coating consisting of a plurality of transparent films having different refractive indexes, or adopting a structure that prevents reflection on the electrode side of the chip, The reflected light emission is not reflected again to the crystal side, which is effective for extracting light.

  Hereinafter, the present invention will be specifically described based on examples. However, the present invention is not limited only to these examples.

(Reference example)
In this reference example, a layer made of AlN was formed as a first layer on a c-plane sapphire substrate using RF sputtering, and a GaN layer was formed thereon as a second layer using MOCVD. Thereafter, a DBR layer was further formed thereon by MOCVD to produce a group III nitride compound semiconductor multilayer structure for a group III nitride compound semiconductor light emitting device.

FIG. 1 is a diagram schematically showing a cross section of a group III nitride compound semiconductor multilayer structure produced in this reference example. In the figure, 1 is a substrate made of c-plane sapphire, 2 is a first layer made of AlN having a thickness of 40 nm, 3 is a second layer made of undoped GaN having a thickness of 300 nm, and 4 is a DBR layer of 11 to 37 27 layer structure. The DBR layer has a structure in which AlN and AlGaN are alternately stacked. Among 11 to 37, an odd number is AlN and an even number is AlGaN. The thickness of the AlN layer is 40 nm for 11 to 21, 23 is 60 nm, 25 is 57 nm, 27 is 53 nm, 29 to 35 are 56 nm, and 37 is 51 nm. As for the thickness of the AlGaN layer, 2 to 22 is 60 nm, 24 is 44 nm, 26 is 49 nm, 28 and 30 are 47 nm, 32 is 46 nm, 34 is 47 nm, and 36 is 48 nm. The composition of AlGaN is Al _0.04 Ga _0.96 N. The production procedure will be described below.

  First, a c-plane sapphire substrate that was mirror-polished to such an extent that only one side could be used for epitaxial growth was introduced into a sputtering machine without any wet pretreatment. The sputtering machine used has a high-frequency power source and a mechanism that can move the position of the magnet within the target.

  First, the substrate is heated to 500 ° C. in a sputtering apparatus, nitrogen gas is introduced at a flow rate of 15 sccm, the pressure in the chamber is maintained at 1 Pa, a high frequency bias of 50 W is applied to the substrate side, and nitrogen plasma is applied. The substrate surface was cleaned by exposing.

Subsequently, after introducing argon and nitrogen gas, a high frequency bias of 2000 W was applied to the metal Al target side, the pressure in the furnace was kept at 0.5 Pa, Ar gas was flowed at 5 sccm, and nitrogen gas was flowed at 15 sccm ( The ratio of nitrogen to the whole gas was 75%), and AlN was deposited on the sapphire substrate. The growth rate was 0.12 nm / s.
The magnet in the target was swung during both substrate cleaning and film formation.
After deposition of 40 nm AlN, the plasma was stopped and the substrate temperature was lowered.

Subsequently, the substrate taken out from the sputtering machine was introduced into the MOCVD furnace.
After the introduction, the second layer and the DBR layer were formed by the following procedure using the MOCVD method. First, a sapphire substrate was introduced into the reactor. The sapphire substrate was placed on a carbon susceptor for heating in a glove box substituted with nitrogen gas.

  Then, after flowing nitrogen gas, the carrier gas was changed to hydrogen and the heater was operated to raise the substrate temperature to 1150 ° C. After confirming that the temperature was stabilized at 1150 ° C., the valve of the ammonia piping was opened, and distribution of ammonia into the furnace was started. Subsequently, hydrogen containing trimethylgallium (TMGa) vapor was supplied into the reactor, and a process of attaching a group III nitride compound semiconductor constituting the second layer on the sapphire substrate was started. By this step, a second layer made of GaN having a thickness of 300 nm was first laminated on the first layer made of AlN having a thickness of 40 nm.

  Thereafter, the supply of TMGa was stopped, and instead of trimethylaluminum (TMAl), a layer 11 made of AlN having a thickness of 40 nm was formed. Next, the supply of TMGa was resumed, and a layer 12 made of AlGaN having a thickness of 60 nm was formed. Next, the supply of TMGa was stopped, and a layer 13 made of AlN having a thickness of 40 nm was formed. By repeating the same steps, a DBR layer 4 made of 11 to 37 as shown in FIG. 1 was produced.

  Thereafter, the valve of the TMAl pipe was switched, the supply of the raw material to the reactor was terminated, and the growth was stopped. After completing the growth of the DBR layer, the energization to the heater was stopped and the temperature of the substrate was lowered to room temperature.

  Through the above steps, the first layer of AlN is formed on the sapphire substrate, the second layer made of the undoped GaN layer is formed thereon, and then the AlN and AlGaN layers are alternately formed on the second layer. By forming the laminated DBR layer, the group III nitride compound semiconductor multilayer structure shown in FIG. 1 was produced. The taken-out substrate exhibited a colorless and transparent mirror shape.

  Next, the X-ray rocking curve (XRC) measurement of the DBR layer grown by the above method was performed. The measurement was performed on a (0002) plane which is a symmetric plane and a (10-10) plane which is an asymmetric plane, using a Cuβ ray X-ray generation source as a light source. In general, in the case of a group III nitride compound semiconductor, the XRC spectrum half width of the (0002) plane is an index of crystal flatness (mosaicity), and the XRC spectrum half width of the (10-10) plane is the dislocation density (twist). ). As a result of this measurement, the DBR layer of the group III nitride compound semiconductor multilayer structure produced in this reference example showed a half-value width of 50 arcsec in the (0002) plane measurement and a half-value width of 250 arcsec in the (10-10) plane.

  After grinding and polishing the back surface of the substrate of the obtained group III nitride compound semiconductor multilayer structure to form a mirror-like surface, the light reflectance was measured with a spectrophotometer. The light reflectance near 470 nm was 90%, exceeding 20% when the DBR layer 4 was not formed.

  The cross section of the obtained group III nitride compound semiconductor multilayer structure was observed with a transmission electron microscope (TEM). FIG. 2 is a TEM photograph and FIG. 3 is a schematic diagram of FIG. As can be seen from these figures, an AlN film having many grain boundaries in the direction substantially perpendicular to the substrate surface was observed at the interface between the sapphire substrate and the gallium nitride layer. The film thickness was about 40 nm, and the distance between the grain boundaries was 5 nm to 20 nm. This layer is considered to be a layer composed of an assembly of vertically long columnar crystals. The first layer covered the entire surface of the substrate.

(Example)
In this example, a group III nitride compound semiconductor light emitting device using the group III nitride compound semiconductor multilayer structure manufactured in the reference example will be described. In this example, after forming the DBR layer under the same conditions as in the reference example, a base layer made of undoped GaN, an n-type contact layer using Si as a dopant, and the like are formed on the group III nitride. A compound semiconductor light emitting device was produced. FIG. 4 is a schematic sectional view thereof, and FIG. 5 is a schematic plan view thereof. That is, after forming the first layer 2 made of AlN having a thickness of 40 nm on the sapphire substrate 1 having the c-plane by the same growth method as described in the reference example, the undoped layer having a thickness of 300 nm is sequentially formed from the substrate side. The second layer 3 made of GaN, the DBR layer 4 having a 27-layer structure in which AlN and AlGaN are alternately stacked, the underlayer 5a made of undoped GaN having a thickness of 6 μm, and a thickness having an electron concentration of 4 × 10 ¹⁸ cm ⁻³ N-type contact layer 5b made of Si-doped GaN having a thickness of 2 μm, n-type layer 5 made of n-type cladding layer 5c made of In _0.1 Ga _0.9 N having a thickness of 20 nm and an electron concentration of 1 × 10 ¹⁸ cm ⁻³ , GaN ending the GaN barrier layer begins to barrier layer, well layer and is alternately made of the GaN barrier layer and the layer thickness of 6 layers of the layer thickness and 16nm undoped in _0.2 Ga _0.8 N of the 5-layer to 3nm P-type consisting of Mg-doped Al _0.02 Ga _0.98 N of stacked p-type cladding layer 7c and the film thickness 0.2μm composed of Mg of the light emitting layer 6 and the thickness of 5nm of multiple quantum well structure doped at Al _0.1 Ga _0.9 N The p-type layer 7 composed of the contact layer 7b is stacked. 8 is a negative electrode and 9 is a positive electrode. The positive electrode 9 includes a translucent positive electrode 9a and a positive electrode bonding pad 9b.

Fabrication of a wafer having an epitaxial layer in the semiconductor light emitting device described above was performed according to the following procedure.
The same procedure as in the reference example was used until the DBR layer 4 was formed on the sapphire substrate. Subsequent lamination of each semiconductor layer was performed in the same manner as the film formation of the second layer and the DBR layer in the reference example, using the same MOCVD apparatus used in the reference example.

By the procedure as described above, an epitaxial wafer having an epitaxial layer structure for a semiconductor light emitting device was produced. Here, the p-type contact layer made of Mg-doped Al _0.02 Ga _0.98 N showed the p-type without the annealing treatment for activating the p-type carrier.

Next, a light-emitting diode, which is a kind of semiconductor light-emitting element, was manufactured using an epitaxial wafer in which an epitaxial layer structure was stacked on the sapphire substrate. About the produced wafer, on the surface of the p-type contact layer made of Mg-doped Al _0.02 Ga _0.98 N by a known photolithography technique, a transparent positive electrode 9a made of ITO, and Ti, Al and A positive electrode bonding pad 9 b having a structure in which Au is laminated is formed as a positive electrode 9. Further, dry etching was performed on the wafer to expose a portion 5d for forming the negative electrode of the n-type contact layer made of Si-doped GaN, and a negative electrode 8 made of four layers of Ni, Al, Ti, and Au was produced on the exposed portion. . By these operations, an electrode having a shape as shown in FIG. 5 was produced on the wafer.

  With respect to the wafer on which the positive electrode and the negative electrode were thus formed, the back surface of the sapphire substrate was ground and polished to obtain a mirror-like surface. Thereafter, the wafer was cut into 350 μm square chips, placed on the lead frame so that the electrodes were on top, and connected to the lead frame with gold wires to obtain a light emitting device. When a forward current was passed between the positive electrode and the negative electrode of the light-emitting diode produced as described above, the forward voltage at a current of 20 mA was 3.0V. Moreover, when light emission was observed through the translucent positive electrode, the light emission wavelength was 470 nm and the light emission output showed 15 mW. Such characteristics of the light-emitting diode were obtained with no variation for light-emitting diodes manufactured from almost the entire surface of the manufactured wafer.

(Comparative example)
A group III nitride compound semiconductor light emitting device similar to the example except that the first layer is formed using the MOCVD method and the DBR layer is provided after the formation of the underlayer 5a constituting the n-type layer 5 And the obtained light-emitting elements were evaluated in the same manner as in the examples. The forward voltage at a current of 20 mA was 3.0 V, the emission wavelength was 470 nm, and the emission output was 11.2 mW. Since the DBR layer is close to the light emitting layer, it is presumed that the crystallinity of the light emitting layer is poor and the light emission output is reduced.

  The group III nitride compound semiconductor light-emitting device of the present invention has good light-emitting layer crystallinity and extremely high light emission output. Therefore, the industrial utility value as a lamp etc. is very large.

It is the figure which showed typically the cross section of the group III nitride compound semiconductor laminated structure produced by the reference example for using for the group III nitride compound semiconductor light-emitting device of this invention. It is a cross-sectional TEM photograph of the 1st layer of the group III nitride compound semiconductor laminated structure produced by the reference example. FIG. 3 is a diagram schematically illustrating FIG. 2. It is a schematic diagram which shows the cross section of the group III nitride compound semiconductor light-emitting device of this invention produced in the Example. It is a schematic diagram which shows the plane of the group III nitride compound semiconductor light-emitting device of this invention produced in the Example.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Board | substrate 2 1st layer 3 2nd layer 4 DBR layer 5 n-type layer 6 Light emitting layer 7 p-type layer 8 Negative electrode 9 Positive electrode

Claims (26)

  A first layer and a DBR layer made of a group III nitride compound semiconductor are provided in this order on a substrate having a refractive index different from that of the group III nitride compound semiconductor, and the group III nitride is formed on the DBR layer. An n-type layer, a light-emitting layer and a p-type layer made of a physical compound semiconductor are provided so that the light-emitting layer is sandwiched between the n-type layer and the p-type layer, and the thickness of the first layer is 1000 nm or less Group III nitride compound semiconductor light emitting device.   The group III nitride compound semiconductor light-emitting device according to claim 1, wherein the DBR layer is composed of a laminate of at least two types of layers having different refractive indexes.   The group III nitride compound semiconductor light-emitting device according to claim 2, wherein 3 to 50 layers of at least two kinds of layers having different refractive indexes are laminated.   The group III nitride compound semiconductor light-emitting device according to claim 2 or 3, wherein each layer of the laminate constituting the DBR layer has a thickness of 200 nm or less.   The group III according to any one of claims 2 to 4, wherein one of at least two kinds of layers having different refractive indices is GaN, and the other is at least one selected from the group consisting of AlN, InN and AlInN. Nitride compound semiconductor light emitting device.   The group III nitride compound semiconductor light-emitting device according to any one of claims 1 to 5, wherein the first layer covers at least 90% of the substrate surface.   The group III nitride compound semiconductor light-emitting device according to any one of claims 1 to 6, wherein the first layer is formed of a columnar crystal.   The group III nitride compound semiconductor light-emitting device according to claim 7, wherein the columnar crystal has a width of 0.1 nm to 100 nm.   The group III nitride compound semiconductor light-emitting device according to claim 8, wherein the columnar crystal has a width of 1 nm to 70 nm.   The group III nitride compound semiconductor light-emitting device according to any one of claims 1 to 6, wherein the first layer is made of a single crystal.   The group III nitride compound semiconductor light-emitting device according to claim 1, wherein the first layer has a thickness of 10 nm to 500 nm.   The group III nitride compound semiconductor light-emitting device according to claim 11, wherein the thickness of the first layer is 20 nm to 100 nm.   The group III nitride compound semiconductor light-emitting device according to any one of claims 1 to 12, wherein the first layer is a group III nitride compound semiconductor containing Al.   The group III nitride compound semiconductor light-emitting device according to claim 13, wherein the first layer is made of AlN.   The group III nitride compound semiconductor light-emitting device according to claim 1, wherein the first layer is formed by sputtering.   The group III nitride compound semiconductor light-emitting device according to claim 15, wherein the sputtering method is a reactive sputtering method performed while a nitrogen source is circulated in the reactor.   The group III nitride compound semiconductor light-emitting device according to claim 15 or 16, which is a sputtering method using nitrogen gas as a nitrogen source.   The group III nitride compound semiconductor light-emitting device according to any one of claims 15 to 17, wherein the sputtering method is an RF sputtering method.   The group III nitride compound semiconductor light-emitting element according to any one of claims 1 to 18, further comprising a second layer made of a group III nitride compound semiconductor between the first layer and the DBR layer. .   The group III nitride compound semiconductor light-emitting device according to claim 19, wherein the second layer is AlGaN.   The group III nitride compound semiconductor light-emitting device according to claim 19, wherein the second layer is GaN.   The group III nitride compound semiconductor light-emitting device according to any one of claims 19 to 21, wherein the second layer is formed by a MOCVD method. The group III nitride compound semiconductor light-emitting device according to any one of claims 19 to 22, wherein the dislocation density on the surface of the second layer is 10 ⁹ cm ^-2 or less.   A lamp comprising the group III nitride compound semiconductor light-emitting device according to any one of claims 1 to 23.   An electronic device in which the lamp according to claim 24 is incorporated.   A mechanical device in which the electronic device according to claim 25 is incorporated.