JP2004014651A - Wiring board, semiconductor device using the same wiring board, and method for manufacturing the same wiring board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring board, a method for manufacturing the wiring board, and a semiconductor using the wiring board capable of reducing the number of connection holes to be formed on the board face, and reducing the costs. <P>SOLUTION: In this frame-shaped wiring board equipped with a plurality of first connection terminal 1 to be used for connection to a semiconductor element and a plurality of second connection terminal 2 to be used for connection to the outside, a plurality of conduits 3 and 4 are formed on an external peripheral face 7 and an internal peripheral face 8, and the whole part or a part of first connection terminals 1 and the whole part or a part of second connection terminals 2 are electrically connected through the conduit 3 or 4. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a wiring board, a semiconductor device using the same, and a method for manufacturing a wiring board.
[0002]
[Prior art]
A description will be given of a wiring board conventionally used for a resin-sealed semiconductor device. FIG. 25A is a diagram illustrating one substrate surface of a conventional wiring board, and FIG. 25B is a diagram illustrating the other substrate surface of the conventional wiring substrate. In the wiring board 140 shown in FIGS. 25A and 25B, the base material is a glass epoxy resin. An opening 145 is provided at the center of the wiring board 140. The substrate surface of the wiring board shown in FIG. 25A is hereinafter referred to as “upper surface”, and the substrate surface of the wiring substrate shown in FIG. 25B is hereinafter referred to as “lower surface”.
[0003]
As shown in FIG. 25A, a first connection terminal 141 connected to a connection terminal of a semiconductor element to be mounted, a wiring pattern 142, and a connection hole (via hole) 143 are provided on the upper surface of the wiring board 140. Have been. The wiring pattern 142 is formed by subjecting a metal foil formed on the upper surface of the wiring board 140 to photolithography and chemical etching. One end of the wiring pattern 142 is connected to the first connection terminal 141, and the other end of the wiring pattern 142 is connected to a connection hole (via hole) 143. The first connection terminal 141 is connected to a connection terminal (not shown) of the semiconductor device by a thin metal wire (not shown). The connection hole 143 is connected to a lower wiring.
[0004]
Further, as shown in FIG. 25B, a second connection terminal 144 used for connection to the outside is formed on the lower surface of the wiring board 140. Similarly to the wiring pattern 142, the second connection terminal 144 is formed by subjecting a metal foil formed on the lower surface to photolithography and chemical etching. The second connection terminal 144 is electrically connected to a connection hole 143 provided on the upper surface inside the substrate. The wiring board 140 is connected to an external device via the second connection terminal 144.
[0005]
In FIGS. 25A and 25B, an organic film such as a solder resist is formed in a hatched portion. Reference numeral 146 denotes an adhesion area for adhering a support base on which the semiconductor element is mounted. In this area, the metal foil used to form the second connection terminal 144 is left.
[0006]
Next, a semiconductor device using the wiring board 140 will be described. FIG. 26 is a cross-sectional view showing a conventional semiconductor device using a wiring board and its manufacturing process, and FIGS. 26A to 26C show a series of manufacturing processes. The cross section shown in FIG. 26 is a cross section taken along a cutting line GG in FIGS. 25A and 25B, and FIG. 26 shows only the lines that appear in the cross section.
[0007]
First, as shown in FIG. 26A, the support 148 is bonded to the bonding area 146 of the wiring board 140. The bonding of the support 148 to the bonding area 146 is performed by interposing a conductive paste (not shown) between the bonding area 146 and the support 148, and heating at a temperature of 80 ° C. to 150 ° C. for 15 minutes to 45 minutes. This is done by curing the conductive paste. This forms a mechanically robust connection.
[0008]
Next, as shown in FIG. 26B, the semiconductor element 149 is fixed to the support 148 such that the semiconductor element 149 is housed in the opening 145. Further, the connection terminal 150 of the semiconductor element 149 and the first connection terminal 141 are connected by a thin metal wire 151. The connection is performed by ultrasonic thermocompression bonding at a temperature of 140 ° C to 200 ° C.
[0009]
Thereafter, as shown in FIG. 26 (c), transfer molding using a thermosetting solid resin or screen printing molding using a liquid resin is performed on the upper surface of the wiring substrate 3 to form the wiring substrate 140 and the semiconductor. The element 149 and the thin metal wire 151 are integrally sealed with the sealing resin 152. Further, the sealing resin 152 is cured by heating at a temperature of 170 ° C. for 5 hours. Further, a solder ball 152 is joined to the second connection terminal 144 as needed. In this case, a resin-type BGA package is obtained.
[0010]
25 and 26, the wiring substrate 140 is shown as a single unit. However, in practice, a plurality of wiring substrates 140 are formed on a single multilayer substrate. For this reason, after the step of FIG. 26 (c), each wiring board 140 is cut out into a predetermined size by dicing to be individualized.
[0011]
[Problems to be solved by the invention]
Meanwhile, in the above-described conventional wiring board, a predetermined position of the wiring board 140 is required to connect the first connection terminal 141 formed on the upper surface and the second connection terminal 144 formed on the lower surface. It is necessary to provide a very large number of connection holes 143. The number of the connection holes 143 required is equal to the number of the first connection terminals 141 and the second connection terminals 144 to be connected.
[0012]
However, in manufacturing the wiring substrate 140, the processing cost of the connection holes 11 in the total manufacturing cost of the substrate is high. Therefore, as the number of the connection holes 143 increases, the price of the wiring substrate 140 also increases significantly. Would.
[0013]
Further, when the connection holes 143 are provided, a great restriction is imposed on the degree of freedom in designing a wiring pattern (for example, the wiring pattern 142 shown in FIG. 25A) provided on the upper surface or the lower surface of the wiring substrate 140. This means that providing the connection holes 143 sacrifices the electrical characteristics of the wiring board 140.
[0014]
Further, when wiring and connection holes are to be provided in the effective area on the lower surface of the wiring board 140, the area where the second connection terminals 144 can be arranged becomes smaller. In this case, it is necessary to multi-layer the wiring board 140 and to reduce the number of the second connection terminals 144. As a result, the cost of the semiconductor device assembled by using the wiring board 140 increases, and the performance and function of the semiconductor device deteriorate.
[0015]
SUMMARY OF THE INVENTION An object of the present invention is to provide a wiring board which can solve the above problems, reduce the number of connection holes provided on the substrate surface, and reduce the cost, a method of manufacturing the wiring board, and a semiconductor device using the same.
[0016]
[Means for Solving the Problems]
In order to achieve the above object, a first wiring board according to the present invention comprises a plurality of first connection terminals used for connection with a semiconductor element, and a plurality of second connection terminals used for connection to the outside. Is provided on at least one of the outer peripheral surface and the inner peripheral surface, a plurality of conduction paths are provided, and all or a part of the first connection terminals and all or one of the first connection terminals are provided. The second connection terminal of the unit is electrically connected to the second connection terminal via the conduction path.
[0017]
Due to this feature, there is no need to provide connection holes on the substrate surface or inside the substrate, and there is no need to multi-layer the substrate. Therefore, according to the first wiring board of the present invention, it is possible to increase the degree of freedom in designing a wiring pattern formed on the substrate surface and to increase the area where the second connection terminal can be arranged, as compared with the conventional example. As a result, a wiring board that is more advantageous in electrical characteristics can be realized.
[0018]
In the first wiring board, the conduction path is provided on the outer peripheral surface and the inner peripheral surface, and the first connection terminal and the second connection terminal are provided on different substrate surfaces, and Some of the first connection terminals are formed by a wiring pattern formed on a substrate surface on which the first connection terminals are provided, and a conduction path provided on the outer peripheral surface and a conduction path provided on the inner peripheral surface. And at least one of the second connection terminals is electrically connected to the outer peripheral surface by a wiring pattern formed on a substrate surface provided with the second connection terminals. The electrical connection may be made to be electrically connected to at least one of the provided conductive path and the conductive path provided on the inner peripheral surface.
[0019]
Further, in the first wiring board, the conduction path is provided on the outer peripheral surface and the inner peripheral surface, and the first connection terminal and the second connection terminal are provided on a same substrate surface. All or some of the first connection terminals are electrically connected to a conductive path provided on the inner peripheral surface by a wiring pattern formed on the same substrate surface, and The second connection terminal is electrically connected to a conduction path provided on the outer peripheral surface by a wiring pattern formed on the same substrate surface different from the wiring pattern, and provided on the outer peripheral surface. The conduction path provided and the conduction path provided on the inner peripheral surface may be electrically connected by a wiring pattern formed on a substrate surface which is a back surface of the same substrate surface.
[0020]
Further, in the first wiring substrate, the conduction path is provided on the inner peripheral surface, the first connection terminal and the second connection terminal are provided on different substrate surfaces, and the whole or a part is provided. The first connection terminal is electrically connected to a conduction path provided on the inner peripheral surface by a wiring pattern formed on a substrate surface on which the first connection terminal is provided, and An aspect in which some of the second connection terminals are electrically connected to a conductive path provided on the inner peripheral surface by a wiring pattern formed on a substrate surface on which the second connection terminals are provided. You can also.
[0021]
Further, in the first wiring board, the conductive path is provided on the outer peripheral surface, the first connection terminal and the second connection terminal are provided on different substrate surfaces, and the whole or a part of the first connection terminal is provided on a different substrate surface. The first connection terminal is electrically connected to a conduction path provided on the outer peripheral surface by a wiring pattern formed on a substrate surface provided with the first connection terminal, and the whole or a part thereof is provided. The second connection terminal may be electrically connected to a conduction path provided on the outer peripheral surface by a wiring pattern formed on a substrate surface provided with the second connection terminal. it can.
[0022]
In order to achieve the above object, a second wiring board according to the present invention comprises a plurality of first connection terminals used for connection with a semiconductor element and a plurality of second connection terminals used for connection to the outside. A wiring board provided with terminals, wherein a plurality of conductive paths are provided on the outer peripheral surface, and all or some of the first connection terminals and all or some of the second connection terminals are It is characterized by being electrically connected through a conduction path.
[0023]
Due to this feature, as in the case of the first wiring board, the degree of freedom in designing a wiring pattern formed on the substrate surface can be increased as compared with the conventional example, and the area where the second connection terminals can be arranged is increased. As a result, a wiring board that is more advantageous in electrical characteristics can be realized.
[0024]
In the second wiring board, the first connection terminal and the second connection terminal are provided on different substrate surfaces, and the whole or a part of the first connection terminal is the first connection terminal. Are connected to the conductive path by a wiring pattern formed on the substrate surface provided with the second connection terminals, and all or some of the second connection terminals are formed on the substrate surface provided with the second connection terminals. It is possible to adopt a mode in which it is connected to the conductive path by the wiring pattern thus formed.
[0025]
Further, in order to achieve the above object, a third wiring board according to the present invention comprises a plurality of first connection terminals used for connection with a semiconductor element and a plurality of second connection terminals used for connection to the outside. A terminal and a wiring board provided on the same substrate surface, wherein a plurality of conduction paths are provided on an outer peripheral surface, and one conduction path and other conduction paths are the back surface of the same substrate surface. All or some of the second connection terminals are connected by a wiring pattern formed on the substrate surface, and all or some of the second connection terminals are formed of the first connection terminal and the conductive path by the wiring pattern formed on the same substrate surface. It is characterized by being connected to at least one.
[0026]
Due to this feature, as in the case of the first wiring board, the degree of freedom in designing a wiring pattern formed on the substrate surface can be increased as compared with the conventional example, and the area where the second connection terminals can be arranged is increased. As a result, a wiring board that is more advantageous in electrical characteristics can be realized.
[0027]
In the wiring board according to the present invention, if the first connection terminal and the second connection terminal are provided on different substrate surfaces, a spiral wiring provided on the substrate surface A pattern, and a connection hole electrically connected to at least one end of the spiral wiring pattern, wherein some of the first connection terminals and some of the second connection terminals are An electrical connection may be made via the spiral wiring pattern and the connection hole.
[0028]
In the wiring board according to the present invention, a third connection terminal used for connection with a mounting component other than the semiconductor element is provided on the substrate surface, and the third connection terminal is partially provided. A mode in which the first connection terminal or a part of the second connection terminal is electrically connected may be employed.
[0029]
In a preferred embodiment of the wiring board according to the present invention, a groove is provided on at least one of the outer peripheral surface and the inner peripheral surface, and a conductive film is formed on a wall surface of the groove, and the conductive film is used as a conductive path. Further, the base material constituting the wiring board can be formed of an organic material or an inorganic material. Examples of the organic material include a material containing at least one selected from glass epoxy resin, polyimide resin, polybenzoxazal resin, and high heat-resistant thermoplastic resin. Examples of the inorganic material include a material containing at least one selected from a ceramic material, a glass material, and a metal material.
[0030]
Next, in order to achieve the above object, a semiconductor device according to the present invention is characterized by having at least the above-mentioned wiring board and a semiconductor element.
[0031]
When the first wiring board is used, the semiconductor device according to the present invention further includes a support for mounting the semiconductor element, and the support does not include the first connection terminal. The semiconductor device is fixed to the support surface so as to be covered by the inner peripheral surface of the wiring board, and the semiconductor element is fixed to the support base so as to be enclosed by the inner peripheral surface. And the first connection terminal may be electrically connected via a thin metal wire. Further, the semiconductor element is fixed on a substrate surface on which the first connection terminal is provided, and the connection terminal of the semiconductor element is fixed to the first connection terminal via a bump contact. It can also be.
[0032]
In this case, since the semiconductor element is mounted so as to be submerged in the opening of the wiring board, the thickness and weight of the package can be reduced. Further, heat generated in the semiconductor element can be released by selecting a material of the support base, so that heat radiation can be improved.
[0033]
In the semiconductor device according to the present invention, when the second wiring substrate or the third wiring substrate is used, the semiconductor element is fixed to a substrate surface provided with the first connection terminal, and The element and the first connection terminal may be electrically connected via a thin metal wire. Further, the semiconductor element is fixed on a substrate surface on which the first connection terminal is provided, and the connection terminal of the semiconductor element is fixed to the first connection terminal via a bump contact. It can also be.
[0034]
Furthermore, in the semiconductor device according to the present invention, it is possible to adopt a mode in which bump contacts are provided on the second connection terminals of the wiring board.
[0035]
Next, in order to achieve the above object, a method of manufacturing a wiring board according to the present invention is a method of manufacturing a wiring board by cutting a plate-like member. Providing a plurality of through-holes penetrating in the direction along the outer peripheral shape of the wiring board to be manufactured; and (b) forming a conductive film on the wall surface of the through-hole or electrically conductive inside the through-hole. At least a step of filling a material and a step of (c) cutting the plate-shaped member so that the through hole is divided in a thickness direction of the plate-shaped member are provided.
[0036]
With this feature, it is possible to easily manufacture a wiring board having conductive paths formed on the outer peripheral surface and the inner peripheral surface. In particular, in the case where a conduction path is provided on the outer peripheral surface, the provision of one through hole allows the formation of a conduction path between the two wiring boards, so that the cost for perforation can be reduced. Further, a low-cost single-layer substrate can be used. Therefore, the cost of the wiring board can be reduced, and the cost of the semiconductor device can be reduced.
[0037]
In the method for manufacturing a wiring board according to the present invention, the wiring board to be manufactured has a frame shape, and in the step (a), the plurality of through holes are further formed as the manufacturing object. The conductive film is provided along the inner peripheral shape of the wiring substrate, and in the step (b), the conductive film is further formed on the wall surface of the through hole provided along the inner peripheral shape, or The inside of the through-hole provided along with the conductive material is also filled, and in the step (c), the through-hole provided along the inner peripheral shape further extends in the thickness direction of the plate-shaped member. The plate-shaped member may be cut so as to be divided. The shape of the through hole is preferably any one of a circle, an oval, and a polygon.
[0038]
BEST MODE FOR CARRYING OUT THE INVENTION
(Embodiment 1)
Hereinafter, a wiring board, a semiconductor device, and a method of manufacturing the wiring board according to the first embodiment of the present invention will be described with reference to FIGS.
[0039]
First, a wiring board according to the first embodiment will be described with reference to FIG. FIG. 1 is a diagram showing a schematic configuration of a wiring board according to a first embodiment of the present invention. FIG. 1A shows one substrate surface of the wiring board according to the first embodiment, and FIG. Indicates the other substrate surface of the wiring substrate according to the first embodiment. The substrate surface shown in FIG. 1A is hereinafter referred to as “upper surface”, and the substrate surface shown in FIG. 1B is hereinafter referred to as “lower surface”.
[0040]
As shown in FIGS. 1A and 1B, the wiring board according to the first embodiment is a board for mounting a semiconductor element and connecting the mounted semiconductor element to an external device. The wiring board according to the first embodiment has an opening 10 at the center and is formed in a frame shape.
[0041]
Further, as shown in FIG. 1A, a plurality of first connection terminals 1 used for connection with a semiconductor element are provided on the upper surface of the wiring board. On the other hand, as shown in FIG. 1B, a plurality of second connection terminals 2 used for connection to the outside are provided on the lower surface of the wiring board. In the wiring board according to the first embodiment, the first connection terminal 1 and the second connection terminal 2 are provided on different substrate surfaces.
[0042]
As described above, also in the wiring board according to the first embodiment, similarly to the above-described conventional example, the terminal connected to the semiconductor element or the external device is provided. However, in the wiring board according to the first embodiment, the connection structure between the first connection terminal 1 and the second connection terminal 2 is different from the conventional example. This will be described below.
[0043]
As shown in FIG. 1A, a part of the first connection terminals 1 is connected to a conduction path 3 provided on an outer peripheral surface 7 by a wiring pattern 5a formed on the upper surface, and another part of the first connection terminals 1 is connected to another part. Are connected to the conductive path 4 provided on the inner peripheral surface 8 by a wiring pattern 5b. Further, as shown in FIG. 1B, some of the second connection terminals 2 are connected to a conduction path 3 provided on an outer peripheral surface 7 by a wiring pattern 6a formed on the lower surface, and another The second connection terminal 2 of the portion is connected to the conduction path 4 provided on the inner peripheral surface 8 by a wiring pattern 6b formed on the lower surface.
[0044]
As can be seen from FIGS. 1A and 1B, in the wiring board according to the first embodiment, the first connection terminal 1 and the second connection terminal 2 are connected to each other on the outer surface 7. They are electrically connected via a passage 3 provided in the passage 3 or the inner peripheral surface 8. For this reason, there is no need to provide a connection hole on the substrate surface or inside the substrate, and it is not necessary to make the substrate multilayer. Therefore, according to the wiring board according to the first embodiment, the degree of freedom in designing the wiring pattern formed on the substrate surface can be increased and the area in which the second connection terminal can be arranged is larger than in the conventional example. Can be secured.
[0045]
In FIGS. 1A and 1B, an organic film such as a solder resist is formed in a hatched portion. In FIG. 1B, an area around the opening 10 where the organic film is not formed is an adhesion area 9 for adhering a support for mounting a semiconductor element.
[0046]
In the first embodiment, the size of the wiring board can be appropriately set according to the size of the semiconductor element to be mounted. Further, in the wiring board according to the first embodiment, a semiconductor element is mounted inside the opening 10 as shown in FIG. For this reason, the opening 10 is formed such that each of the vertical and horizontal dimensions is at least 0.2 mm larger than that of the semiconductor element.
[0047]
Next, a method of manufacturing the wiring board according to the first embodiment will be described with reference to FIGS. FIG. 2 is a plan view showing a parent board for manufacturing the wiring board according to the first embodiment of the present invention. FIG. 3 is a cross-sectional view illustrating the method for manufacturing the wiring board according to the first embodiment of the present invention, and FIGS. 3A to 3G illustrate a series of manufacturing steps. The cross section of the wiring board shown in FIG. 3 is a cross section cut along the cutting line AA in FIGS. 1 and 2, and FIG. 3 shows only the lines that appear in the cross section.
[0048]
First, as shown in FIG. 3A, a single-layer substrate 11 having metal foils 12a and 12b attached to both substrate surfaces is prepared. In the first embodiment, the plate-like member is used as the parent substrate 13 and the parent substrate 13 is cut into a predetermined size to obtain a wiring substrate.
[0049]
In the first embodiment, a substrate formed of glass epoxy resin is used as single-layer substrate 11. However, in the present invention, the single-layer substrate 11 is not limited to this, and is made of an organic material other than the glass epoxy resin, for example, a polyimide resin, a polybenzoxazal resin (PBO), a high heat-resistant thermoplastic resin, or the like. The formed substrate may be used. In addition, polycarbonate etc. are mentioned as a high heat resistant thermoplastic resin. Further, the single-layer substrate 11 may be a substrate formed of an inorganic material such as a ceramic material, a glass material, and a metal material.
[0050]
When a substrate formed of an organic material is used as the single-layer substrate 11, the difference in linear expansion coefficient between the sealing resin used in manufacturing a semiconductor device described later and the single-layer substrate 11 can be reduced, and Since the adhesion at the interface between the sealing resin and the single-layer substrate 11 can be improved, the heat resistance of the semiconductor device can be improved. When a substrate formed of an inorganic material is used as the single-layer substrate 11, heat generated by the operation of the semiconductor element 1 mounted on the wiring substrate can be efficiently radiated.
[0051]
In the first embodiment, a copper foil is used as a metal foil provided for forming a wiring pattern on both substrate surfaces, but the metal foil is not limited to this. In the present invention, other metal foils, for example, a multilayer foil formed by laminating a copper foil and a nickel foil, or a foil formed of an alloy such as a copper-tin alloy can also be used.
[0052]
When a substrate formed of a ceramic material or a glass material is used as the single-layer substrate, for example, a paste mixed with a metal powder such as copper, nickel, tungsten, or molybdenum is printed on the substrate, and the printed substrate is fired. Thereby, it is possible to obtain a parent substrate having a metal layer formed on both substrate surfaces.
[0053]
The thickness of the single-layer substrate 11 may be appropriately set according to the application or material. For example, when the single-layer substrate 11 is formed of glass epoxy resin, the thickness may be 0.1 mm to 1.0 mm, and a flexible material such as a polyimide resin may be used. When formed of a material, the thickness may be 80 μm to 350 μm. The thickness of the metal foils 12a and 12b may be set to 10 μm to 100 μm.
[0054]
Next, as shown in FIG. 3B, a plurality of through-holes 14a and 14b penetrating in the thickness direction of the parent substrate are formed in the parent substrate 13. As shown in FIG. 2, the through holes 14a and 14b are formed so that the plurality of through holes 14a and 14b are arranged along the outer peripheral shape and the inner peripheral shape of the wiring substrate shown in FIG. Do.
[0055]
The formation of the through holes 14a and 14b can be performed using, for example, a laser, a drill, a mold, or the like. The shape of the through-hole (the cross-sectional shape perpendicular to the thickness direction of the wiring board) is determined in consideration of the ease of processing (such as crack resistance) due to the difference in the material of the mother board 13 and the arrangement of the first and second connection terminals. For example, it can be appropriately selected from a circle such as a perfect circle, an ellipse, and an ellipse, a rectangle including a square, a rectangle such as a rhombus, and other polygons.
[0056]
Also, the size of the through holes 14a and 14b may be set as appropriate according to the type of the semiconductor element mounted on the wiring board. Specifically, the through-holes 14a and 14b may be formed so that the diameter of the through-holes is 20 μm to 500 μm when the shape of the through-hole is circular, and when the shape of the through-hole is rectangular.
[0057]
Next, as shown in FIG. 3 (c), the portions other than the openings of the through holes 14a and 14b and the periphery thereof on both substrate surfaces are covered with a photoresist film 15, and plated with copper. Thereby, the conductive film 16 is formed on the wall surfaces of the through holes 14a and 14b and around the openings. At this time, since the conductive film 16 is formed of copper, it is integrated with the metal foils 12a and 12b. In the first embodiment, the conductive film 16 is formed of copper. However, the present invention is not limited to this, and a metal other than copper or another conductive material can be used.
[0058]
The thickness of the conductive film 16 may be appropriately set according to the size of the through hole 14 before plating. In the case where the size of the through hole is as described above, the thickness of the conductive film 16 may be set to 5 μm to 100 μm. In the first embodiment, the conductive film is provided on the wall surfaces of the through holes 14a and 14b. However, a conductive material may be filled in the through holes 14a and 14b.
[0059]
Next, as shown in FIG. 3D, the photoresist film 15 is removed. The removal of the photoresist film 16 can be performed using plasma ashing or a resist removing solution.
[0060]
Next, as shown in FIG. 3E, a photoresist film 17 is formed on both substrate surfaces and inside the through holes 14a and 14b. On the upper surface of the wiring board, the photoresist film 17 covers at least a region on the metal foil 12a to be the first connection terminal 1, the conduction paths 3 and 4, and the wiring patterns 5a and 5b shown in FIG. It forms so that it may be. On the lower surface of the wiring board, the photoresist film 16 has at least a region on the metal foil 12b to be the second connection terminal 2, the conductive paths 3 and 4, and the wiring patterns 6a and 6b shown in FIG. Formed to be coated.
[0061]
Next, after performing etching as shown in FIG. 3F, the photoresist film 16 is removed. By this step, the first connection terminal 1, the second connection terminal 2, the conduction paths 3 and 4, and the wiring patterns 5a, 5b, 6a, 6b shown in FIG. 1A or 1B are formed.
[0062]
The etching can be performed by dry etching such as plasma etching or wet etching such as immersion in a copper etching solution. The removal of the photoresist film 16 may be performed in the same manner as the photoresist film 15 described above.
[0063]
Next, as shown in FIG. 3G, an opening 10 is formed in the center of the wiring board, and an organic film 18 is formed on the surface of the board. The opening 10 is formed by cutting the parent member such that the through hole 14a provided along the inner peripheral shape of the wiring substrate is divided in the thickness direction of the parent substrate. Specifically, the parent substrate 13 is cut along a dotted line indicating the inner peripheral shape shown in FIG. The cutting can be performed using a laser, a thread saw, a press, or the like.
[0064]
The organic coating 18 is formed by using screen printing or photolithographic technology so that portions other than the first connection terminal 1, the second connection terminal 2, and the bonding region 9 are covered.
[0065]
Through the above steps, it is possible to obtain a mother board on which a plurality of wiring boards according to the first embodiment are formed. In addition, finally, according to the first embodiment, the parent substrate is cut so that the through holes 14b provided along the outer peripheral shape of the wiring substrate are divided in the thickness direction of the parent substrate. Although a wiring board is obtained, this cutting may be performed before or after mounting the semiconductor element.
[0066]
As described above, according to the method for manufacturing a wiring board according to the first embodiment, it is possible to easily manufacture a wiring board having a conduction path formed on the outer peripheral surface and the inner peripheral surface. In particular, when a conductive path is provided on the outer peripheral surface as in the wiring board according to the first embodiment, providing one through hole can form a conductive path between the two wiring boards. Such costs can be reduced. Further, a low-cost single-layer substrate can be used. Therefore, the cost of the wiring board can be reduced, and the cost of a semiconductor device described later can be reduced.
[0067]
Next, a semiconductor device according to the first embodiment will be described with reference to FIG. FIG. 4 is a cross-sectional view showing a semiconductor device according to the first embodiment of the present invention and a manufacturing process thereof, and FIGS. 4A to 4D show a series of manufacturing processes. The cross section of the wiring board shown in FIG. 4 is also a cross section cut along the cutting line AA in FIGS. 1 and 2, and FIG. 4 shows only the lines that appear in the cross section.
[0068]
First, as shown in FIG. 4A, the parent substrate shown in FIGS. 2 and 3F is prepared. Next, as shown in FIG. 4B, a tape-shaped adhesive 19 (thickness: 10 μm to 150 μm) is arranged in the adhesive region (see FIG. 1B), and furthermore, a portion surrounded by the inner peripheral surface 8. The support base 20 is arranged so that is closed. Thereafter, the support 20 is bonded to the lower surface of the wiring board by heating and pressing. In the first embodiment, a tape-shaped adhesive is used as the adhesive 19, but an adhesive other than a tape, such as a liquid, may be used.
[0069]
In the first embodiment, a copper plate having both surfaces plated with tin lead, tin silver, palladium, or the like is used as the support 20. However, in the present invention, the support base 20 is not limited to this, and may be formed of an inorganic material such as a metal material other than copper, a ceramic material, or a glass material, or may be a glass epoxy resin or a glass epoxy resin. It may be formed of an organic material such as a polyimide resin.
[0070]
When the support base 20 is formed of an inorganic material as in the first embodiment, heat generated by the operation of the semiconductor element 21 can be efficiently radiated. When the support base 20 is formed of an organic material, the difference in the coefficient of linear expansion between the sealing resin and the support base 20 described below can be reduced, and the interface between the sealing resin and the single-layer substrate 11 can be reduced. Since the adhesiveness can be improved, the heat resistance of the semiconductor device can be improved.
[0071]
In the first embodiment, a resin such as a polyamideimide ether resin or an epoxy resin is used as the adhesive 19. The heating of the adhesive 19 is performed at a temperature equal to or higher than the softening point of the resin, for example, in the range of 160 ° C to 400 ° C.
[0072]
Next, as shown in FIG. 4C, a connection member 22 such as a silver paste or solder is applied or arranged on the upper surface of the support base 12, and the semiconductor element 21 previously finished to a thickness of 50 μm or more is formed thereon. Put. Further, in this state, the connection member 22 is heated or softened or melted at a temperature of 150 ° C. to 300 ° C., and then the connection member 22 is naturally cooled and hardened. By this step, the semiconductor element 21 is fixed to the support 12 while being surrounded by the inner peripheral surface 8.
[0073]
Next, as shown in FIG. 4 (d), the connection terminals 23 of the semiconductor element 21 and the first connection terminals 1 provided on the upper surface of the wiring board are formed by thin metal wires 24 formed of gold, copper, or a gold alloy. And wire bonding. The heating temperature at the time of wire bonding is appropriately set according to the type of the single-layer substrate 11 constituting the wiring substrate. In the first embodiment, since the single-layer substrate 11 is a glass epoxy substrate, about 150 ° C. Is set to When the single-layer substrate 11 is a high glass transition temperature resin substrate, the heating temperature may be set to about 250 ° C.
[0074]
Next, as shown in FIG. 4E, the semiconductor element 21 after the completion of the wire bonding and the wiring substrate are sealed with a sealing resin 25 from the upper surface side. As a sealing method using the sealing resin 25, transfer molding in which sealing is performed with a resin using a sealing mold having a plurality of cavity blocks, or print molding in which sealing is performed with a liquid resin using a metal mask. And the like. Further, after the resin sealing is completed, the mother board is diced to cut out the wiring board. Specifically, the parent substrate 13 is cut along a dotted line indicating the outer peripheral shape shown in FIG.
[0075]
Thus, the semiconductor device according to the first embodiment can be obtained. In the semiconductor device according to the first embodiment, since the semiconductor element 21 is mounted so as to be submerged in the opening of the wiring board, the thickness and weight of the package can be reduced. Further, as described above, since the heat generated in the semiconductor element can be released by the support base 12, the semiconductor device according to the first embodiment is excellent in heat dissipation.
[0076]
Although not shown in FIG. 4, a solder ball having a diameter of about 40 μm to 300 μm can be attached to the second connection terminal (see FIG. 1B) by solder reflow. In this case, a BGA package is obtained.
[0077]
(Embodiment 2)
Next, a method for manufacturing a wiring board, a semiconductor device, and a wiring board according to a second embodiment of the present invention will be described with reference to FIGS.
[0078]
First, a wiring board according to the second embodiment will be described with reference to FIG. FIG. 5 is a diagram showing a schematic configuration of a wiring board according to a second embodiment of the present invention. FIG. 5A shows one substrate surface of the wiring board according to the second embodiment, and FIG. Indicates the other substrate surface of the wiring substrate according to the second exemplary embodiment. In FIG. 5, as in FIG. 1, the substrate surface shown in FIG. 5A is hereinafter referred to as “upper surface”, and the substrate surface shown in FIG. 5B is hereinafter referred to as “lower surface”.
[0079]
As shown in FIGS. 5A and 5B, the wiring board according to the second embodiment is also a board used for mounting a semiconductor element, like the wiring board according to the first embodiment. The wiring board according to the second embodiment also has an opening 50 at the center and is formed in a frame shape. Further, also in the wiring board according to the second embodiment, the conduction path 53 is provided on the outer peripheral surface 57, and the conduction path 54 is provided on the inner peripheral surface 58.
[0080]
However, in the second embodiment, as shown in FIG. 5B, a plurality of first connection terminals 51 used for connection to a semiconductor element and a plurality of second connection terminals used for connection to the outside. The terminal 52 is provided on the same substrate surface (lower surface), and is different from the first embodiment in this point.
[0081]
Therefore, as shown in FIG. 5A, the conduction path 53 is connected to the conduction path 54 by a wiring pattern 55 formed on the upper surface. Further, as shown in FIG. 5B, some of the second connection terminals 52 are connected to the conduction path 53 provided on the outer peripheral surface 57 by a wiring pattern 56a formed on the lower surface. Some of the first connection terminals 51 are connected to the conduction path 54 by a wiring pattern 56b formed on the lower surface.
[0082]
In the second embodiment, as shown in FIG. 1B, the first connection terminal 51 and the second connection terminal 52 can be directly connected by the wiring pattern 56c. The wiring pattern 56d is used when directly connecting the second connection terminals.
[0083]
As described above, the first connection terminal 51 and the second connection terminal 52 are provided on the same substrate surface. However, also in the second embodiment, the connection hole is not provided as in the conventional example. The first connection terminal 51 and the second connection terminal 52 can be connected. Accordingly, in the second embodiment, as in the first embodiment, the degree of freedom in designing the wiring pattern formed on the substrate surface can be increased as compared with the conventional example, and the second connection terminal can be used. It can be said that a large area can be secured. Further, the wiring board according to the second embodiment is configured such that the semiconductor element is mounted via bump contacts as described later. Therefore, by using the wiring board according to the second embodiment, the thickness of the semiconductor device can be reduced as compared with the first embodiment.
[0084]
In FIGS. 5A and 5B, an organic film is formed in a hatched portion as in the first embodiment. In FIG. 1B, a region around the opening 50 where the organic film is not formed is a semiconductor element mounting region 59 for mounting a semiconductor element. In the wiring board according to the first embodiment, as shown in FIG. 6 described later, a semiconductor element is mounted on the board surface. For this reason, the opening 10 is formed such that each of the vertical and horizontal dimensions is at least 0.2 mm smaller than that of the semiconductor element.
[0085]
The manufacture of the wiring board according to the second embodiment can be performed according to the manufacturing process (see FIGS. 2 and 3) described in the first embodiment. In other words, as shown in FIGS. 2 and 3, a single-layer substrate having metal foils adhered to both sides is used as a parent substrate, a through hole serving as a conductive path is formed in the parent substrate, and a second surface is formed on the substrate surface of the parent substrate. The first connection terminal 51, the second connection terminal 52, the various wiring patterns 55 and 56a to 56d are provided by photolithography or etching, and the parent substrate is cut so that the through holes are divided in the thickness direction. The wiring board according to the second embodiment can be obtained.
[0086]
Next, a semiconductor device according to the second embodiment will be described with reference to FIG. FIG. 6 is a cross-sectional view showing the semiconductor device according to the first embodiment of the present invention and the manufacturing steps thereof, and FIGS. 6A to 6D show a series of manufacturing steps. The cross section shown in FIG. 6 is a cross section cut along the cutting line BB in FIG. 5, and FIG. 6 shows only the lines appearing in the cross section.
[0087]
First, as shown in FIG. 6A, a parent board (150 μm thick) on which the wiring board shown in FIG. 5 is formed is prepared. In FIG. 6, reference numeral 60 denotes a single-layer substrate, and 61 denotes an organic film.
[0088]
Next, as shown in FIG. 6B, the first connection terminal 51 provided around the opening 50 on the lower surface of the wiring substrate and the connection terminal of the semiconductor element 63 finished in advance to a thickness of 50 μm or more are formed. The bonding is performed via the bump contact 62. As the bump contact 62, a low melting point metal such as gold, solder, or copper formed in a bump shape by electrolytic or electroless plating or the like can be used. The bonding by the bump contact is performed by heating to 180 to 270 ° C. Ultrasonic vibration is applied as needed.
[0089]
Next, as shown in FIG. 6C, a support 65 for supporting the semiconductor element 63 is bonded to the wiring board. The bonding of the support 65 is performed by disposing a tape-like adhesive 64 (thickness: 10 μm to 150 μm) in a region on the outer peripheral side of the first connection terminal 51 in the semiconductor element mounting region 59. It is performed by superposing the parts and heating and pressing. At the same time, a connection member 66 such as silver paste or solder is applied or arranged on the surface of the semiconductor element 63 on the support base 65 side, and the semiconductor element 63 and the support base 65 are also joined.
[0090]
In the second embodiment, as the adhesive 64, an adhesive other than a tape, such as a liquid, can be used as in the case of the adhesive 19 described in the first embodiment. Further, as the support 65, similarly to the first embodiment, a support formed of a copper plate plated with tin lead, tin silver, palladium, or the like on both surfaces can be used.
[0091]
Next, as shown in FIG. 6D, the upper surface of the wiring board is sealed with a sealing resin 67. The sealing with the sealing resin 67 can be performed by transfer molding, print molding, or the like, as in the first embodiment.
[0092]
Finally, as shown in FIG. 6E, the parent board is diced to cut out the wiring board. Dicing is performed in the same manner as in the first embodiment so that a through hole (through hole serving as a conductive path 53) provided along the outer peripheral shape is divided.
[0093]
Thus, the semiconductor device according to the second embodiment can be obtained. In the semiconductor device according to the second embodiment, the semiconductor element 63 is mounted by a face-down method, and a connection terminal of the semiconductor element 63 is connected to the first connection terminal 51 via a bump contact. Therefore, components that hinder the high-frequency circuit, such as resistance, capacitance, and inductance, can be drastically reduced. According to the second embodiment, a semiconductor device having excellent high-frequency characteristics can be obtained.
[0094]
In the second embodiment, a solder ball (40 μm to 300 μm in diameter) 68 is attached to the second connection terminal 52 before dicing. The solder balls are attached by solder reflow.
[0095]
(Embodiment 3)
Next, a method for manufacturing a wiring board, a semiconductor device, and a wiring board according to Embodiment 3 of the present invention will be described with reference to FIG.
[0096]
FIG. 7 is a diagram showing a schematic configuration of a wiring board according to Embodiment 3 of the present invention. FIG. 7A shows one substrate surface of the wiring board according to Embodiment 3, and FIG. Indicates the other substrate surface of the wiring substrate according to the third embodiment. In FIG. 7, as in FIG. 1, the substrate surface shown in FIG. 7A is hereinafter referred to as “upper surface”, and the substrate surface shown in FIG. 7B is hereinafter referred to as “lower surface”.
[0097]
As shown in FIGS. 7A and 7B, the wiring board according to the third embodiment is also a board used for mounting a semiconductor element, like the wiring board according to the first embodiment. The wiring board according to the third embodiment also has an opening 70 at the center and is formed in a frame shape.
[0098]
Further, as in the first embodiment, the plurality of first connection terminals 71 used for connection to the semiconductor element and the plurality of second connection terminals 72 used for connection to the outside are provided on different substrate surfaces. Is provided. Also in the third embodiment, as shown in FIG. 7A, the first connection terminal 71 is provided on the upper surface, and as shown in FIG. 7B, the second connection terminal 52 is provided on the lower surface. I have.
[0099]
However, in the third embodiment, as shown in FIGS. 7A and 7B, the conduction path 74 is provided only on the inner peripheral surface 78, which is different from the first embodiment. . For this reason, in the third embodiment, the connection between the first connection terminal 71 and the second connection terminal 72 is performed only by the conduction path 74 provided on the inner peripheral surface 78.
[0100]
In FIG. 7A, reference numeral 75 denotes a wiring pattern that connects some of the first connection terminals 71 to the conduction path 74. In FIG. 7B, reference numeral 76 denotes a wiring pattern that connects some of the second connection terminals 72 to the conduction path 74.
[0101]
As described above, in the third embodiment, the conduction path 74 is provided only on the inner peripheral surface 78. However, in the third embodiment, the first passage is provided without providing the connection hole unlike the conventional example. Connection terminal 71 and the second connection terminal 72 can be connected.
[0102]
Thus, in the third embodiment, as in the first embodiment, the degree of freedom in designing the wiring pattern formed on the substrate surface can be increased as compared with the conventional example, and the second connection terminal can be used. It can be said that a large area can be secured.
[0103]
7A and 7B, an organic film is formed in a hatched portion as in the first embodiment. In FIG. 7B, a region where the organic film is not formed around the opening 70 is a bonding region 79 for bonding a support for mounting a semiconductor element.
[0104]
In the wiring board according to the third embodiment, a semiconductor element is mounted inside the opening 70 as in the wiring board according to the first embodiment. For this reason, the opening 70 is also formed such that each of the vertical and horizontal dimensions is at least 0.2 mm larger than that of the semiconductor element.
[0105]
The fabrication of the wiring board according to the third embodiment can be performed according to the manufacturing process (see FIGS. 2 and 3) described in the first embodiment. In other words, as shown in FIGS. 2 and 3, a single-layer substrate having metal foils adhered to both sides is used as a parent substrate, a through hole serving as a conductive path is formed in the parent substrate, and a second surface is formed on the substrate surface of the parent substrate. The first connection terminal 71, the second connection terminal 72, various wiring patterns 75 and 76 are provided by photolithography or etching, and the parent substrate is cut so that the through holes are divided in the thickness direction. A wiring board according to mode 3 can be obtained. In the third embodiment, the through holes need only be provided along the inner peripheral shape.
[0106]
Further, the fabrication of the semiconductor device according to the third embodiment can also be performed according to the manufacturing process (see FIG. 4) described in the first embodiment. That is, the support base is bonded to the bonding area 79, the semiconductor element is fixed to the support base so as to fit inside the opening 70, and the first connection terminal 71 and the connection terminal of the semiconductor element are connected by a thin metal wire. Finally, by sealing the semiconductor element and the wiring board with the sealing resin, the semiconductor device according to the third embodiment can be obtained.
[0107]
(Embodiment 4)
Next, a method for manufacturing a wiring board, a semiconductor device, and a wiring board according to Embodiment 4 of the present invention will be described with reference to FIG.
[0108]
FIG. 8 is a diagram showing a schematic configuration of a wiring board according to a fourth embodiment of the present invention. FIG. 8A shows one substrate surface of the wiring board according to the fourth embodiment, and FIG. Indicates the other substrate surface of the wiring substrate according to the fourth embodiment. In FIG. 8, as in FIG. 1, the substrate surface shown in FIG. 8A is hereinafter referred to as “upper surface”, and the substrate surface shown in FIG. 8B is hereinafter referred to as “lower surface”.
[0109]
As shown in FIGS. 8A and 8B, the wiring board according to the fourth embodiment is also a board used for mounting a semiconductor element, like the wiring board according to the first embodiment. The wiring board according to the fourth embodiment also has an opening 80 at the center and is formed in a frame shape.
[0110]
Further, similarly to the first embodiment, the plurality of first connection terminals 81 used for connection to the semiconductor element and the plurality of second connection terminals 82 used for connection to the outside are provided on different substrate surfaces. Is provided. Also in the fourth embodiment, as shown in FIG. 8A, the first connection terminal 81 is provided on the upper surface, and as shown in FIG. 8B, the second connection terminal 82 is provided on the lower surface. I have.
[0111]
However, in the fourth embodiment, as shown in FIGS. 8A and 8B, the conduction path 83 is provided only on the outer peripheral surface 87, which is different from the first embodiment. For this reason, in the fourth embodiment, the connection between the first connection terminal 81 and the second connection terminal 82 is performed only by the conduction path 83 provided on the outer peripheral surface 87.
[0112]
In FIG. 8A, reference numeral 85 denotes a wiring pattern for connecting some of the first connection terminals 81 and the conduction path 83. In FIG. 7B, reference numeral 86 denotes a wiring pattern that connects some of the second connection terminals 82 and the conduction path 83.
[0113]
As described above, in the fourth embodiment, the conduction path 83 is provided only on the outer peripheral surface 87. However, in the fourth embodiment, the first connection path is provided without providing the connection hole unlike the conventional example. The connection terminal 81 and the second connection terminal 82 can be connected.
[0114]
Thus, in the fourth embodiment, as in the first embodiment, the degree of freedom in designing a wiring pattern formed on the substrate surface can be increased as compared with the conventional example, and the second connection terminal can be used. It can be said that a large area can be secured.
[0115]
8 (a) and 8 (b), an organic film is formed in the hatched portions as in the first embodiment. In FIG. 8B, an area where the organic film is not formed around the opening 80 is an adhesion area 89 for adhering a support for mounting a semiconductor element.
[0116]
Similarly to the wiring board according to the first embodiment, the semiconductor element is mounted inside the opening 80 also in the wiring board according to the fourth embodiment. For this reason, the opening 80 is also formed such that each of the vertical and horizontal dimensions is at least 0.2 mm larger than that of the semiconductor element.
[0117]
The production of the wiring board according to the fourth embodiment can also be performed according to the manufacturing process (see FIGS. 2 and 3) described in the first embodiment. That is, as shown in FIGS. 2 and 3, a single-layer substrate having metal foils adhered to both sides is used as a parent substrate, a through hole serving as a conductive path is formed in the parent substrate, and a second surface is formed on the substrate surface of the parent substrate. The first connection terminal 81, the second connection terminal 82, the various wiring patterns 85 and 86 are provided by photolithography or etching, and the parent substrate is cut so that the through holes are divided in the thickness direction. The wiring board according to the fourth aspect can be obtained. In the fourth embodiment, the through holes need only be provided along the outer peripheral shape.
[0118]
The fabrication of the semiconductor device according to the fourth embodiment can also be performed according to the manufacturing process (see FIG. 4) described in the first embodiment. That is, the support is bonded to the bonding region 89, the semiconductor element is fixed to the support so as to fit inside the opening 80, and the first connection terminal 81 and the connection terminal of the semiconductor element are connected by a thin metal wire. Finally, by sealing the semiconductor element and the wiring board with the sealing resin, the semiconductor device according to the fourth embodiment can be obtained.
[0119]
(Embodiment 5)
Next, a method of manufacturing a wiring board, a semiconductor device, and a wiring board according to a fifth embodiment of the present invention will be described with reference to FIGS.
[0120]
First, a wiring board according to the fifth embodiment will be described with reference to FIG. FIG. 9 is a diagram showing a schematic configuration of a wiring board according to the fifth embodiment of the present invention. FIG. 9A shows one substrate surface of the wiring board according to the fifth embodiment, and FIG. Indicates the other substrate surface of the wiring substrate according to the fifth embodiment. In FIG. 9, as in FIG. 1, the substrate surface shown in FIG. 9A is hereinafter referred to as “upper surface”, and the substrate surface shown in FIG. 9B is hereinafter referred to as “lower surface”.
[0121]
As shown in FIGS. 9A and 9B, the wiring board according to the fifth embodiment is also a board used for mounting a semiconductor element, like the wiring board according to the first embodiment. Further, as in the first embodiment, the plurality of first connection terminals 91 used for connection to the semiconductor element and the plurality of second connection terminals 92 used for connection to the outside are provided on different substrate surfaces. Is provided. Also in the fifth embodiment, as shown in FIG. 9A, the first connection terminal 91 is provided on the upper surface, and as shown in FIG. 9B, the second connection terminal 92 is provided on the lower surface. I have.
[0122]
However, the wiring board according to the fifth embodiment does not have an opening at the center as shown in FIGS. 9A and 9B, and the conduction path 93 is provided only on the outer peripheral surface 94. This is different from the first embodiment in this point. Therefore, also in the fifth embodiment, similarly to the fourth embodiment, connection between first connection terminal 91 and second connection terminal 92 is performed only by conduction path 93 provided on outer peripheral surface 94. It is.
[0123]
In FIG. 9A, reference numeral 95 denotes a wiring pattern that connects some of the first connection terminals 91 and the conduction path 93. In FIG. 9B, reference numeral 96 denotes a wiring pattern for connecting some of the second connection terminals 92 and the conduction path 93. 9A and 9B, an organic film is formed in a hatched portion as in the first embodiment. In FIG. 9B, reference numeral 97 denotes a semiconductor element mounting area for mounting a semiconductor element.
[0124]
Thus, also in the fifth embodiment, the conduction path 83 is provided only on the outer peripheral surface 87 as in the fourth embodiment, but the first connection is performed without providing the connection hole unlike the conventional example. The terminal 81 and the second connection terminal 82 can be connected.
[0125]
Thus, in the fifth embodiment, as in the first embodiment, the degree of freedom in designing the wiring pattern formed on the substrate surface can be increased as compared with the conventional example, and the second connection terminal can be used. It can be said that a large area can be secured.
[0126]
The fabrication of the wiring board according to the fifth embodiment can also be performed according to the manufacturing steps described in the first embodiment (see FIGS. 2 and 3). In other words, as shown in FIGS. 2 and 3, a single-layer substrate having metal foils adhered to both sides is used as a parent substrate, a through hole serving as a conductive path is formed in the parent substrate, and a second surface is formed on the substrate surface of the parent substrate. The first connection terminal 91, the second connection terminal 92, the various wiring patterns 95 and 96 are provided by photolithography or etching, and the parent substrate is cut so that the through holes are divided in the thickness direction. A wiring board according to mode 5 can be obtained.
[0127]
In the fifth embodiment, the through holes need only be provided along the outer peripheral shape. In addition, it is not necessary to provide the openings described in the first to fourth embodiments, and the metal foil is not removed from the semiconductor element mounting region 97 but remains.
[0128]
Next, a semiconductor device according to the fifth embodiment will be described with reference to FIGS. FIG. 10 is a cross-sectional view showing a first semiconductor device according to the fifth embodiment of the present invention and a manufacturing process thereof, and FIGS. 10A to 10E show a series of manufacturing processes. FIG. 11 is a cross-sectional view showing a second semiconductor device according to the fifth embodiment of the present invention and a manufacturing process thereof, and FIGS. 11A to 11D show a series of manufacturing processes. Note that the cross section of the wiring board shown in FIGS. 10 and 11 is a cross section cut along the cutting line CC in FIG. 9, and FIGS. 10 and 11 show only the lines that appear in the cross section. I have.
[0129]
First, the first semiconductor device shown in FIG. 10 and its manufacturing process will be described below. First, as shown in FIG. 10A, a parent board (150 μm thick) on which the wiring board shown in FIG. 9 is formed is prepared. In FIG. 10, reference numeral 98 denotes an organic film, and 99 denotes a single-layer substrate constituting a wiring board.
[0130]
Next, as shown in FIG. 10B, a connection member 101 such as a silver paste or solder is applied or arranged on the semiconductor element mounting area 97 of the wiring board, and the semiconductor is finished to have a thickness of 50 μm or more in advance. The element 100 is mounted. In this state, the connection member 101 is melted by heating at a temperature of 150 ° C. to 300 ° C., and then the connection member 101 is naturally cooled and cured. By this step, the semiconductor element 100 is fixed to the wiring board.
[0131]
Next, as shown in FIG. 10C, the connection terminal 103 of the semiconductor element 100 and the first connection terminal 91 provided on the upper surface of the wiring board are formed by a thin metal wire 102 made of gold, copper, or a gold alloy. And wire bonding. Note that wire bonding may be performed in the same manner as in the step of FIG. 4D described in the first embodiment.
[0132]
Next, as shown in FIG. 10D, the semiconductor element 100 and the wiring substrate on which the wire bonding has been completed are sealed with the sealing resin 104 from the upper surface side. Note that the sealing with the sealing resin 104 can be performed by transfer molding, print molding, or the like, as in the first embodiment.
[0133]
Finally, as shown in FIG. 10E, the parent board is diced to cut out the wiring board. Dicing is performed in the same manner as in the first embodiment so that a through hole (through hole serving as conductive path 93) provided along the outer peripheral shape is divided.
[0134]
The second semiconductor device shown in FIG. 11 and its manufacturing process will be described below. First, as shown in FIG. 11A, a mother board on which the wiring board shown in FIG. 9 is formed is prepared. The parent substrate is the same as the parent substrate shown in FIG. 10A. Reference numeral 98 denotes an organic film, and reference numeral 99 denotes a single-layer substrate constituting a wiring substrate.
[0135]
Next, as shown in FIG. 11B, the first connection terminal 91 provided on the upper surface of the wiring board and the connection terminal of the semiconductor element 105 previously finished to a thickness of 50 μm to 400 μm are connected to the bump contact 106. To join through. Note that, as the bump contact 106, one formed of the same low melting point metal as in Embodiment 2 can be used (see FIG. 6A).
[0136]
Further, a connection member 107 is applied or arranged on the semiconductor element mounting area 97 of the wiring board in the same manner as in the process of FIG. Also, bonding is performed.
[0137]
Next, as shown in FIG. 11C, the upper surface of the wiring board is sealed with a sealing resin. The sealing with the sealing resin 108 can be performed by transfer molding, print molding, or the like, as in the first embodiment.
[0138]
Finally, as shown in FIG. 11D, the parent board is diced to cut out the wiring board. Dicing is performed in the same manner as in the first embodiment so that a through hole (through hole serving as conductive path 93) provided along the outer peripheral shape is divided.
[0139]
Thus, the first and second semiconductor devices according to the fifth embodiment can be obtained. Although not shown in FIGS. 10 and 11, a solder ball having a diameter of about 40 μm to 300 μm can be attached to the second connection terminal (see FIG. 9B) by solder reflow. In this case, a BGA package is obtained.
[0140]
(Embodiment 6)
Next, a method for manufacturing a wiring board, a semiconductor device, and a wiring board according to Embodiment 6 of the present invention will be described with reference to FIGS.
[0141]
First, a wiring board according to the sixth embodiment will be described with reference to FIG. FIG. 12 is a diagram showing a schematic configuration of a wiring board according to a sixth embodiment of the present invention. FIG. 12A shows one substrate surface of the wiring board according to the sixth embodiment, and FIG. Indicates the other substrate surface of the wiring substrate according to the sixth embodiment. In FIG. 12, as in FIG. 1, the substrate surface shown in FIG. 12A is hereinafter referred to as an “upper surface”, and the substrate surface shown in FIG. 12B is hereinafter referred to as a “lower surface”.
[0142]
As shown in FIGS. 12A and 12B, the wiring board according to the sixth embodiment is the same as that according to the first embodiment except that the region provided with the organic film (the hatched region) is different. It is configured similarly to the wiring board. For this reason, the wiring board according to the sixth embodiment has the same effect as the wiring board according to the first embodiment.
[0143]
In FIG. 12, the members denoted by the same reference numerals as those in FIG. 1 are the same as the members shown in FIG. The wiring board according to the sixth embodiment is also manufactured through the manufacturing steps shown in FIGS.
[0144]
However, in FIG. 12A, the area around the first connection terminal 1 where the organic film is not provided is a semiconductor element mounting area 30 for mounting a semiconductor element. The wiring board according to the sixth embodiment is different from the wiring board according to the first embodiment, and is used for mounting a semiconductor element having an outer shape larger than the opening 10.
[0145]
Therefore, as shown in FIG. 13 below, the semiconductor device according to the sixth embodiment has a different configuration from the semiconductor device according to the first embodiment. The manufacture of the wiring board according to the sixth embodiment can be performed by the manufacturing process described in the first embodiment (see FIGS. 2 and 3).
[0146]
A semiconductor device according to the sixth embodiment will be described with reference to FIG. FIG. 13 is a cross-sectional view showing a semiconductor device according to the sixth embodiment and a manufacturing process thereof. FIGS. 13A to 13E show a series of manufacturing processes. The cross section of the wiring board shown in FIG. 13 is a cross section cut along a cutting line DD in FIG. 12, and FIG. 12 shows only the lines that appear in the cross section.
[0147]
First, as shown in FIG. 13A, a parent board (150 μm thick) on which the wiring board shown in FIG. 12 is formed is prepared. Next, as shown in FIG. 13B, the first connection terminal 1 provided around the opening 10 on the upper surface of the wiring board and the connection terminal of the semiconductor element 31 previously finished to a thickness of 50 μm or more are formed. The bonding is performed via the bump contact 32. In addition, as the bump contact 32, one formed of the same low melting point metal as in the second embodiment can be used (see FIG. 6A).
[0148]
Next, as shown in FIG. 13C, a support 33 for supporting the semiconductor element 31 is bonded to the wiring board. Similarly to the second embodiment, a tape-like adhesive 35 (thickness: 10 μm to 150 μm) is disposed on the semiconductor element mounting area 30 on the outer peripheral side of the first connection terminal 1. This is performed by superimposing 35 and the outer peripheral portion of the support base 33, and applying heat and pressure. At the same time, a connection member 34 such as silver paste or solder is applied or arranged on the surface of the semiconductor element 31 on the support stand 33 side, and the semiconductor element 31 and the support stand 33 are also joined. In the sixth embodiment, as the adhesive 35, a liquid or other adhesive other than a tape may be used as in the case of the adhesive 19 described in the first embodiment.
[0149]
Next, as shown in FIG. 13D, the lower surface of the wiring board is sealed with a sealing resin. The sealing with the sealing resin 36 can be performed by transfer molding, print molding, or the like, as in the first embodiment.
[0150]
Finally, as shown in FIG. 13E, the mother board is diced to cut out the wiring board. Dicing is performed in the same manner as in the first embodiment so that a through hole (through hole serving as conductive path 3) provided along the outer peripheral shape is divided. Thus, the semiconductor device according to the sixth embodiment can be obtained.
[0151]
In the sixth embodiment, a solder ball having a diameter of about 40 μm to 300 μm can be attached to the second connection terminal (see FIG. 12B) by solder reflow. In this case, a BGA package is obtained.
[0152]
(Embodiment 7)
Next, a wiring board, a semiconductor device, and a method of manufacturing a wiring board according to a seventh embodiment of the present invention will be described with reference to FIG.
[0153]
First, a wiring board according to the seventh embodiment will be described with reference to FIG. FIG. 14 is a diagram showing a schematic configuration of a wiring board according to a seventh embodiment of the present invention. FIG. 14 (a) shows one substrate surface of the wiring board according to the seventh embodiment, and FIG. Indicates the other substrate surface of the wiring substrate according to the seventh embodiment. In FIG. 14, as in FIG. 1, the substrate surface shown in FIG. 14A is hereinafter referred to as “upper surface”, and the substrate surface shown in FIG. 14B is hereinafter referred to as “lower surface”.
[0154]
As shown in FIGS. 14A and 14B, the wiring board according to the seventh embodiment is the same as that according to the second embodiment except that the region where the organic film is provided (the hatched region) is different. It is configured similarly to the wiring board. For this reason, the wiring board according to the seventh embodiment has the same effect as the wiring board according to the second embodiment.
[0155]
In FIG. 14, members denoted by the same reference numerals as those in FIG. 5 are the same as the members shown in FIG. Similarly to the wiring board according to the second embodiment, the wiring board according to the seventh embodiment can be performed according to the manufacturing process (see FIGS. 2 and 3) described in the first embodiment.
[0156]
However, in FIG. 14A, a region where the organic film is not formed around the conduction path 54 is a bonding region 69 for bonding a support for mounting a semiconductor element. The wiring board according to the seventh embodiment is different from the wiring board according to the second embodiment and is used for mounting a semiconductor element having an outer shape smaller than the opening 50. Therefore, as shown in FIG. 15 below, the semiconductor device according to the seventh embodiment has a different configuration from the semiconductor device according to the second embodiment.
[0157]
A semiconductor device according to the seventh embodiment will be described with reference to FIG. FIG. 15 is a cross-sectional view showing a semiconductor device according to the seventh embodiment and a manufacturing process thereof, and FIGS. 15A to 15E show a series of manufacturing processes. The cross section of the wiring board shown in FIG. 15 is a cross section cut along the cutting line EE in FIG. 14, and FIG. 15 shows only the lines appearing in the cross section.
[0158]
First, as shown in FIG. 15A, a parent board (150 μm thick) on which the wiring board shown in FIG. 14 is formed is prepared. In FIG. 15, the members denoted by the same reference numerals as those in FIG. 6 are the same as the members shown in FIG.
[0159]
Next, as shown in FIG. 15B, a support 110 for mounting the semiconductor element is bonded to the bonding region 69 of the wiring board. As in the first embodiment, a tape-like adhesive 111 is provided around the opening 50 on the upper surface of the wiring board, and the adhesive 111 and the outer peripheral portion of the support 110 are overlapped. It is performed by heating and pressing together. In the seventh embodiment, as the adhesive 111, a liquid adhesive other than a tape-like adhesive can be used as in the case of the adhesive 19 described in the first embodiment.
[0160]
Further, as shown in FIG. 15C, a connection member 114 such as silver paste or solder is applied or arranged on the surface of the semiconductor element 112 on the support base 110 side, and the semiconductor element 112 and the support base 110 are joined. I do.
[0161]
Next, as shown in FIG. 15D, the connection terminals 113 of the semiconductor element 112 and the first connection terminals 51 provided on the lower surface of the wiring board are wire-bonded with the thin metal wires 115. Further, the semiconductor element 112 after the completion of the wire bonding and the periphery of the opening 50 of the wiring board are sealed with the sealing resin 117 from the lower surface side. Note that wire bonding may be performed in the same manner as in the step of FIG. 4D described in the first embodiment.
[0162]
Finally, as shown in FIG. 15E, similarly to the second embodiment, after solder balls (diameter: 40 μm to 300 μm) 68 are attached to the second connection terminals 52, the parent substrate is diced and Cut out. Dicing is performed in the same manner as in the first embodiment so that a through hole (through hole serving as a conductive path 53) provided along the outer peripheral shape is divided. Thus, the semiconductor device according to the seventh embodiment can be obtained.
[0163]
(Embodiment 8)
Next, a wiring board, a semiconductor device, and a method of manufacturing a wiring board according to an eighth embodiment of the present invention will be described with reference to FIG.
[0164]
FIG. 16 is a diagram showing a schematic configuration of a wiring board according to the eighth embodiment of the present invention. FIG. 16A shows one substrate surface of the wiring board according to the eighth embodiment, and FIG. Shows the other substrate surface of the wiring substrate according to the eighth embodiment. In FIG. 16, as in FIG. 1, the substrate surface shown in FIG. 16A is hereinafter referred to as “upper surface”, and the substrate surface shown in FIG. 16B is hereinafter referred to as “lower surface”.
[0165]
As shown in FIGS. 16 (a) and (b), the wiring board according to the eighth embodiment is different from the wiring board according to the third embodiment except that a region provided with an organic film (a hatched region) is different. It is configured similarly to such a wiring board. For this reason, the wiring board according to the eighth embodiment has the same effect as the wiring board according to the third embodiment.
[0166]
In FIG. 16, the members denoted by the same reference numerals as those in FIG. 7 are the same as the members shown in FIG. Similarly to the wiring board according to the third embodiment, the wiring board according to the eighth embodiment can be manufactured according to the manufacturing process (see FIGS. 2 and 3) described in the first embodiment.
[0167]
However, in FIG. 16A, the area around the first connection terminal 71 where the organic film is not provided is a semiconductor element mounting area 118 for mounting a semiconductor element. The wiring board according to the eighth embodiment is different from the wiring board according to the third embodiment and is used for mounting a semiconductor element having an outer shape larger than the opening 70. Therefore, the configuration of the semiconductor device according to the eighth embodiment is different from that of the semiconductor device according to the third embodiment.
[0168]
The semiconductor device according to the eighth embodiment can be manufactured according to the manufacturing process (see FIG. 13) described in the sixth embodiment. That is, the first connection terminals 71 on the upper surface and the connection terminals of the semiconductor element are joined via bump contacts, the support is bonded to the semiconductor element mounting area 118, and the lower surface of the wiring board is sealed with a sealing resin. Thus, the semiconductor device according to the eighth embodiment can be obtained.
[0169]
(Embodiment 9)
Next, a wiring board, a semiconductor device, and a method of manufacturing a wiring board according to a ninth embodiment of the present invention will be described with reference to FIG.
[0170]
FIG. 17 is a diagram showing a schematic configuration of a wiring board according to the ninth embodiment of the present invention. FIG. 17 (a) shows one substrate surface of the wiring board according to the ninth embodiment, and FIG. Indicates the other substrate surface of the wiring substrate according to the ninth embodiment. In FIG. 17, as in FIG. 1, the substrate surface shown in FIG. 17A is hereinafter referred to as “upper surface”, and the substrate surface shown in FIG. 17B is hereinafter referred to as “lower surface”.
[0171]
As shown in FIGS. 17 (a) and (b), the wiring board according to the ninth embodiment is different from the fourth embodiment except that a region where an organic film is provided (hatched region) is different. It is configured similarly to such a wiring board. For this reason, the wiring board according to the ninth embodiment has the same effect as the wiring board according to the fourth embodiment.
[0172]
In FIG. 17, the members denoted by the same reference numerals as those in FIG. 8 are the same as the members shown in FIG. Similarly to the wiring board according to the fourth embodiment, the wiring board according to the ninth embodiment can be manufactured according to the manufacturing process (see FIGS. 2 and 3) described in the first embodiment.
[0173]
However, in FIG. 17A, a region where the organic film is not provided around the first connection terminal 81 is a semiconductor element mounting region 119 for mounting a semiconductor element. The wiring board according to the ninth embodiment is different from the wiring board according to the fourth embodiment and is used for mounting a semiconductor element having an outer shape larger than the opening 80. Therefore, the configuration of the semiconductor device according to the ninth embodiment is different from that of the semiconductor device according to the fourth embodiment.
[0174]
The semiconductor device according to the ninth embodiment can be manufactured according to the manufacturing process (see FIG. 13) described in the sixth embodiment. That is, the first connection terminal 81 on the upper surface and the connection terminal of the semiconductor element are joined via the bump contact, the support is bonded to the semiconductor element mounting area 119, and the lower surface of the wiring board is sealed with the sealing resin. Thus, the semiconductor device according to the ninth embodiment can be obtained.
[0175]
(Embodiment 10)
Next, a wiring board, a semiconductor device, and a method of manufacturing a wiring board according to a tenth embodiment of the present invention will be described with reference to FIGS.
[0176]
First, a wiring board according to the tenth embodiment will be described with reference to FIG. FIG. 18 is a diagram showing a schematic configuration of a wiring board according to the tenth embodiment of the present invention. FIG. 18A shows one substrate surface of the wiring board according to the tenth embodiment, and FIG. Shows the other substrate surface of the wiring substrate according to the tenth embodiment. In FIG. 18, as in FIG. 1, the substrate surface shown in FIG. 18A is hereinafter referred to as “upper surface”, and the substrate surface shown in FIG. 18B is hereinafter referred to as “lower surface”.
[0177]
As shown in FIGS. 18A and 18B, the wiring board according to the tenth embodiment is also a board used for mounting a semiconductor element. In addition, as shown in FIG. 18B, in the tenth embodiment, a plurality of first connection terminals 121 used for connection to a semiconductor element and a plurality of second connection terminals used for connection to the outside are provided. The terminal 122 is provided on the lower surface of the wiring board, similarly to the wiring board according to the second embodiment.
[0178]
Further, in the wiring board according to the tenth embodiment, similarly to the wiring board according to the fifth embodiment, no opening is provided at the center, and the conduction path 123 is provided only on the outer peripheral surface 124. .
[0179]
However, in the wiring board according to the tenth embodiment, unlike the wiring boards according to the second and fifth embodiments, the first connection terminal 121 and the second connection terminal 122 are different from the wiring patterns provided on the lower surface. 126b. Except for a part of the second connection terminal 122, the second connection terminal 122 is connected to the conduction path 123 by a wiring pattern 126a provided on the lower surface. Further, one conduction path 123 and the other conduction path 123 are connected by a wiring pattern 125 formed on the upper surface.
[0180]
As described above, in the wiring board according to the tenth embodiment, the conduction path 123 is not used for the connection between the first connection terminal 121 and the second connection terminal 122, and is mainly used between the second connection terminal. This is different from the wiring board according to the above-described embodiment in this point.
[0181]
However, also in the tenth embodiment, since there is no need to provide connection holes as in the conventional example, the degree of freedom in designing the wiring pattern formed on the substrate surface can be increased as compared with the conventional example. In addition, it can be said that a large area where the second connection terminal 122 can be arranged can be secured. Furthermore, by connecting small chip components using the wiring patterns on the upper surface, a high-density package with high design flexibility can be realized.
[0182]
In FIGS. 18A and 18B, an organic film is formed in a hatched portion as in the first embodiment. In FIG. 18B, reference numeral 127 denotes a semiconductor element mounting area for mounting a semiconductor element.
[0183]
The manufacturing of the wiring board according to the tenth embodiment can also be performed according to the manufacturing process described in the first embodiment (see FIGS. 2 and 3). In other words, as shown in FIGS. 2 and 3, a single-layer substrate having metal foils adhered to both sides is used as a parent substrate, a through hole serving as a conductive path is formed in the parent substrate, and a second surface is formed on the substrate surface of the parent substrate. The first connection terminal 121, the second connection terminal 122, and various wiring patterns 125, 126a, and 126b are provided by photolithography or etching, and the parent substrate is cut so that the through holes are divided in the thickness direction. The wiring board according to the tenth embodiment can be obtained.
[0184]
In the tenth embodiment, the through holes need only be provided along the outer peripheral shape. In addition, it is not necessary to provide the openings described in the first to fourth embodiments, and the metal foil is not removed from the semiconductor element mounting region 97 but remains.
[0185]
Next, a semiconductor device according to the tenth embodiment will be described with reference to FIGS. FIG. 19 is a cross-sectional view illustrating a first semiconductor device according to the tenth embodiment of the present invention and a manufacturing process thereof. FIGS. 19A to 19E illustrate a series of manufacturing processes. FIG. 20 is a cross-sectional view showing a second semiconductor device according to the tenth embodiment of the present invention and a manufacturing process thereof. FIGS. 20A to 20D show a series of manufacturing processes. The cross section of the wiring board shown in FIGS. 19 and 20 is a cross section cut along the cutting line FF in FIG. 18, and only the lines appearing in the cross section are shown in FIGS. I have.
[0186]
First, the first semiconductor device shown in FIG. 19 and its manufacturing process will be described. First, as shown in FIG. 19A, a parent board (150 μm thick) on which the wiring board shown in FIG. 18 is formed is prepared. In FIG. 19, 128 indicates an organic film, and 129 indicates a single-layer substrate constituting a wiring board.
[0187]
Next, as shown in FIG. 19B, a connection member 131 such as a silver paste or solder is applied or arranged on the semiconductor element mounting area 127 of the wiring board, and the semiconductor is finished in advance to a thickness of 50 μm or more. The element 130 is placed and heated. Thereby, the semiconductor element 131 is fixed to the wiring board. The heating is performed in the same manner as in the fifth embodiment (see FIG. 10B).
[0188]
Next, as shown in FIG. 19C, the connection terminal 132 of the semiconductor element 130 and the first connection terminal 121 provided on the lower surface of the wiring board are formed by a thin metal wire 133 formed of gold, copper, or a gold alloy. And wire bonding. Note that wire bonding is performed in the same manner as in the fifth embodiment (see FIG. 10C).
[0189]
Next, as shown in FIG. 19D, the semiconductor element 130 after the completion of the wire bonding and the central portion of the wiring board are sealed with a sealing resin 134 from the lower surface side. The sealing with the sealing resin 134 is performed in the same manner as in the fifth embodiment (see FIG. 10D).
[0190]
Finally, as shown in FIG. 19E, the parent board is diced to cut out the wiring board. Dicing is performed in the same manner as in the first embodiment so that a through-hole (through-hole serving as conductive path 123) provided along the outer peripheral shape is divided.
[0191]
The second semiconductor device shown in FIG. 20 and a manufacturing process thereof will be described below. First, as shown in FIG. 20A, a parent board (150 μm thick) on which the wiring board shown in FIG. 18 is formed is prepared. In FIG. 20, 128 indicates an organic film, and 129 indicates a single-layer substrate constituting a wiring board.
[0192]
Next, as shown in FIG. 20B, the first connection terminal 121 provided on the lower surface of the wiring board and the connection terminal of the semiconductor element 136 previously finished to a thickness of 50 μm to 400 μm are connected to the bump contact 135. To join through. The bump contact 135 may be formed of the same low-melting-point metal as in the second embodiment (see FIG. 6A).
[0193]
Further, a connection member 131 is applied or arranged on the semiconductor element mounting area 127 of the wiring board in the same manner as in the step of FIG. Bonding with the substrate is also performed.
[0194]
Next, as shown in FIG. 20C, a support 139 for supporting the semiconductor element 136 is bonded to the wiring board. As in the second embodiment, a tape-like adhesive 138 (thickness: 10 μm to 150 μm) is disposed on the outer peripheral side of the first connection terminal 121 to bond the support 139 to the adhesive 138 and the support 139. By heating and pressurizing. At the same time, a connection member 137 such as silver paste or solder is applied or arranged on the surface of the semiconductor element 136 on the support 139 side, and the semiconductor element 136 and the support 139 are joined. In the tenth embodiment, as in the case of the adhesive 19 described in the first embodiment, an adhesive other than a tape may be used as the adhesive 138.
[0195]
Finally, as shown in FIG. 11D, the parent board is diced to cut out the wiring board. Dicing is performed in the same manner as in the first embodiment so that a through-hole (through-hole serving as conductive path 123) provided along the outer peripheral shape is divided.
[0196]
Thus, the first and second semiconductor devices according to the tenth embodiment can be obtained. Although not shown in FIGS. 19 and 20, a solder ball having a diameter of about 40 μm to 300 μm can be attached to the second connection terminal (see FIG. 18B) by solder reflow. In this case, a BGA package is obtained.
[0197]
(Embodiment 11)
Next, a method for manufacturing a wiring board, a semiconductor device, and a wiring board according to Embodiment 11 of the present invention will be described with reference to FIG.
[0198]
FIG. 21 is a diagram showing a schematic configuration of a wiring board according to the eleventh embodiment of the present invention. FIG. 21 (a) shows one substrate surface of the wiring board according to the eleventh embodiment, and FIG. Indicates the other substrate surface of the wiring substrate according to the eleventh embodiment. In FIG. 21, as in FIG. 1, the substrate surface shown in FIG. 21A is hereinafter referred to as “upper surface”, and the substrate surface shown in FIG. 21B is hereinafter referred to as “lower surface”.
[0199]
As shown in FIGS. 21A and 21B, a wiring board according to the eleventh embodiment is configured by forming a spiral wiring pattern 40 on the upper surface of the wiring board according to the first embodiment. It is.
[0200]
A connection hole 41 is provided at the center of the spiral wiring pattern 40, and one end of the spiral wiring pattern 40 is electrically connected to an upper end of the connection hole 41. The other end of the spiral wiring pattern 40 is connected to the first connection terminal 1, and the lower end of the connection hole 41 is connected to the second connection terminal 2.
[0201]
As described above, in the wiring board according to the eleventh embodiment, unlike the wiring board according to the first embodiment, some of the first connection terminals 1 and some of the second connection terminals 2 It is connected via a wiring pattern 40 and a connection hole 41.
[0202]
For this reason, the wiring board according to the eleventh embodiment can also have the effects of the first embodiment. Further, in the wiring board according to the eleventh embodiment, since the spiral pattern can be provided in a wider area than on the semiconductor element surface, an inductance having a large L value can be formed. Further, if the second connection terminal 2 is positioned immediately below the connection hole 41, a high-performance inductance with small C and R can be realized. The wiring board according to the eleventh embodiment is particularly suitable when the semiconductor element to be mounted is a high-frequency or DC-DC power supply semiconductor element.
[0203]
The manufacturing of the wiring board according to the eleventh embodiment can be performed according to the manufacturing process described in the first embodiment (see FIGS. 2 and 3). Further, the manufacture of the semiconductor device according to the eleventh embodiment can be performed according to the manufacturing process (see FIG. 4) described in the first embodiment.
[0204]
(Embodiment 12)
Next, a method for manufacturing a wiring board, a semiconductor device, and a wiring board according to Embodiment 12 of the present invention will be described with reference to FIG.
[0205]
FIG. 22 is a diagram illustrating a schematic configuration of a wiring board according to a twelfth embodiment of the present invention. FIG. 22A illustrates one substrate surface of the wiring board according to the twelfth embodiment, and FIG. Indicates the other substrate surface of the wiring substrate according to the twelfth embodiment. In FIG. 22, as in FIG. 1, the substrate surface shown in FIG. 22A is hereinafter referred to as “upper surface”, and the substrate surface shown in FIG. 22B is hereinafter referred to as “lower surface”.
[0206]
As shown in FIGS. 22A and 22B, the wiring board according to the twelfth embodiment is a wiring board configured by providing the third connection terminals 42 on the upper surface of the wiring board according to the first embodiment. is there. The third connection terminal 42 is used for connection with a mounting component other than the semiconductor element to be mounted.
[0207]
The third connection terminal 42 is connected to the second connection terminal 2 via the conduction path 3 provided on the outer peripheral surface 7. In the twelfth embodiment, the third connection terminal 42 may be connected to the first connection terminal 1. Further, the third connection terminal 42 may be connected to the first connection terminal 1 or the second connection terminal 2 via the conduction path 4 provided on the inner peripheral surface 8.
[0208]
For this reason, the wiring board according to the eleventh embodiment has an effect that electronic components other than the semiconductor element to be mounted can be mounted in addition to the effects of the first embodiment. I have. Examples of the electronic components to be mounted include a chip resistor, a chip capacitor, a crystal oscillator, a small inductor, a small liquid crystal, and the like.
[0209]
The manufacturing of the wiring board according to the twelfth embodiment can be performed according to the manufacturing process described in the first embodiment (see FIGS. 2 and 3). The fabrication of the semiconductor device according to the twelfth embodiment can also be performed according to the manufacturing process (see FIG. 4) described in the first embodiment.
[0210]
(Embodiment 13)
Next, a method for manufacturing a wiring board, a semiconductor device, and a wiring board according to Embodiment 13 of the present invention will be described with reference to FIG.
[0211]
FIG. 23 is a diagram showing a schematic configuration of a wiring board according to Embodiment 13 of the present invention. FIG. 23A shows one substrate surface of the wiring board according to Embodiment 13, and FIG. Indicates the other substrate surface of the wiring substrate according to the thirteenth embodiment. 23, the substrate surface shown in FIG. 23A is hereinafter referred to as “upper surface”, and the substrate surface shown in FIG. 23B is hereinafter referred to as “lower surface”.
[0212]
As shown in FIGS. 23A and 23B, the wiring board according to the thirteenth embodiment includes a third connection terminal 42 similar to that of the twelfth embodiment on the upper surface of the wiring board according to the eleventh embodiment. Is further provided. That is, on the upper surface of the wiring board according to the thirteenth embodiment, the spiral wiring pattern 41, the connection hole 41, and the third connection terminal 42 are provided.
[0213]
Therefore, the wiring board according to the thirteenth embodiment can have both the effects described in the eleventh embodiment and the effects described in the twelfth embodiment. The manufacturing of the wiring board according to the thirteenth embodiment can also be performed according to the manufacturing process described in the first embodiment (see FIGS. 2 and 3). In addition, the semiconductor device according to the thirteenth embodiment can be manufactured according to the manufacturing process (see FIG. 4) described in the first embodiment.
[0214]
(Embodiment 14)
Next, a method for manufacturing a wiring board, a semiconductor device, and a wiring board according to Embodiment 14 of the present invention will be described with reference to FIG.
[0215]
FIG. 24 is a diagram showing a schematic configuration of a wiring board according to a fourteenth embodiment of the present invention. FIG. 24A shows one substrate surface of the wiring board according to the fourteenth embodiment, and FIG. Indicates the other substrate surface of the wiring substrate according to the fourteenth embodiment. In FIG. 24, as in FIG. 1, the substrate surface shown in FIG. 24A is hereinafter referred to as “upper surface”, and the substrate surface shown in FIG. 24B is hereinafter referred to as “lower surface”.
[0216]
As shown in FIGS. 24A and 24B, a wiring board according to the fourteenth embodiment has a spiral wiring pattern on the lower surface of the wiring board according to the fifth embodiment, similarly to the thirteenth embodiment. 41 is a wiring board configured by providing a connection hole 41 and a third connection terminal 42.
[0219]
In the fourteenth embodiment, as shown in FIG. 24A, the spiral wiring pattern 40 is formed on the lower surface on which the second connection terminal 92 is provided. Further, as shown in FIG. 24B, the upper end of the connection hole 41 is connected to the first connection terminal 91 via a wiring pattern 43 extending from the first connection terminal 91 toward the semiconductor element mounting region 97. Connected to terminal 91.
[0218]
As described above, in the fourteenth embodiment, as in the eleventh and thirteenth embodiments, some of the first connection terminals 91 and some of the second connection terminals 92 are connected to the spiral wiring pattern 40. And a connection hole 41. However, unlike the eleventh and thirteenth embodiments, the spiral wiring pattern 40 is provided on the lower surface where the second connection terminal 92 is provided. For this reason, according to the fourteenth embodiment, the degree of freedom in the arrangement of the spiral wiring pattern can be increased and the space for the spiral wiring pattern can be increased as compared with the eleventh and thirteenth embodiments. It is possible to obtain a larger inductance than the spiral wiring patterns of the eleventh and thirteenth embodiments.
[0219]
The manufacturing of the wiring board according to the fourteenth embodiment can also be performed according to the manufacturing process described in the first embodiment (see FIGS. 2 and 3). The semiconductor device according to the fourteenth embodiment can be manufactured according to the manufacturing process (see FIG. 10) described in the fifth embodiment.
[0220]
【The invention's effect】
As described above, according to the present invention, the first terminal connected to the connection terminal of the semiconductor element and the second terminal connected to the outside are connected to the conductor provided on the outer peripheral surface or the inner peripheral surface of the wiring board. Can be connected by passage. For this reason, it is not necessary to provide a large number of connection holes in the substrate as in the conventional case, and a wiring substrate and a semiconductor device can be obtained using a single-layer substrate in which metal layers are formed on both substrate surfaces. In comparison, the costs of the wiring board and the semiconductor device can be reduced. Furthermore, the degree of freedom in wiring design on the substrate surface can be significantly improved. In addition, L, C, and R can be incorporated, and in this case, a function package can be realized.
[Brief description of the drawings]
FIG. 1 is a diagram showing a schematic configuration of a wiring board according to a first embodiment of the present invention; FIG. 1A shows one substrate surface of the wiring board according to the first embodiment; The parentheses indicate the other substrate surface of the wiring substrate according to the first embodiment.
FIG. 2 is a plan view showing a parent board for manufacturing the wiring board according to the first embodiment of the present invention;
FIGS. 3A to 3G are cross-sectional views illustrating a method for manufacturing the wiring board according to the first embodiment of the present invention, and FIGS. 3A to 3G illustrate a series of manufacturing steps;
FIG. 4 is a cross-sectional view showing a semiconductor device according to the first embodiment of the present invention and a manufacturing process thereof, and FIGS. 4 (a) to 4 (d) show a series of manufacturing processes.
5A and 5B are diagrams illustrating a schematic configuration of a wiring board according to a second embodiment of the present invention. FIG. 5A illustrates one substrate surface of the wiring board according to the second embodiment, and FIG. () Shows the other substrate surface of the wiring substrate according to the second exemplary embodiment.
FIG. 6 is a cross-sectional view showing a semiconductor device according to the first embodiment of the present invention and a manufacturing process thereof, and FIGS. 6A to 6D show a series of manufacturing processes.
FIG. 7 is a diagram showing a schematic configuration of a wiring board according to a third embodiment of the present invention; FIG. 7A shows one substrate surface of the wiring board according to the third embodiment; () Shows the other substrate surface of the wiring substrate according to the third exemplary embodiment.
FIG. 8 is a diagram showing a schematic configuration of a wiring board according to a fourth embodiment of the present invention. FIG. 8A shows one substrate surface of the wiring board according to the fourth embodiment, and FIG. The parentheses indicate the other substrate surface of the wiring substrate according to the fourth embodiment.
FIG. 9 is a diagram showing a schematic configuration of a wiring board according to a fifth embodiment of the present invention; FIG. 9A shows one substrate surface of the wiring board according to the fifth embodiment; The parentheses indicate the other substrate surface of the wiring substrate according to the fifth embodiment.
FIG. 10 is a cross-sectional view illustrating a first semiconductor device and a manufacturing process thereof according to a fifth embodiment of the present invention, and FIGS. 10A to 10E show a series of manufacturing processes.
FIG. 11 is a cross-sectional view showing a second semiconductor device and a manufacturing process thereof according to a fifth embodiment of the present invention, and FIGS. 11A to 11D show a series of manufacturing processes.
FIG. 12 is a diagram showing a schematic configuration of a wiring board according to a sixth embodiment of the present invention; FIG. 12 (a) shows one substrate surface of the wiring board according to the sixth embodiment; ) Shows the other substrate surface of the wiring substrate according to the sixth embodiment.
FIG. 13 is a cross-sectional view showing a semiconductor device according to the sixth embodiment and a manufacturing process thereof, and FIGS. 13 (a) to 13 (e) show a series of manufacturing processes.
FIG. 14 is a diagram showing a schematic configuration of a wiring board according to a seventh embodiment of the present invention; FIG. 14 (a) shows one substrate surface of the wiring board according to the seventh embodiment; () Shows the other substrate surface of the wiring substrate according to the seventh embodiment.
FIG. 15 is a cross-sectional view showing a semiconductor device according to the seventh embodiment and a manufacturing process thereof. FIGS. 15A to 15E show a series of manufacturing processes.
FIG. 16 is a diagram showing a schematic configuration of a wiring board according to an eighth embodiment of the present invention. FIG. 16 (a) shows one substrate surface of the wiring board according to the eighth embodiment, and FIG. () Shows the other substrate surface of the wiring substrate according to the eighth embodiment.
FIG. 17 is a diagram showing a schematic configuration of a wiring board according to a ninth embodiment of the present invention, and FIG. 17 (a) shows one substrate surface of the wiring board according to the ninth embodiment; () Shows the other substrate surface of the wiring substrate according to the ninth embodiment.
FIG. 18 is a diagram showing a schematic configuration of a wiring board according to a tenth embodiment of the present invention. FIG. 18A shows one substrate surface of the wiring board according to the tenth embodiment, and FIG. () Shows the other substrate surface of the wiring substrate according to the tenth embodiment.
FIG. 19 is a cross-sectional view showing a first semiconductor device and a manufacturing process thereof according to the tenth embodiment of the present invention, and FIGS. 19A to 19E show a series of manufacturing processes.
FIG. 20 is a cross-sectional view showing a second semiconductor device and a manufacturing process thereof according to the tenth embodiment of the present invention, and FIGS. 20 (a) to (d) show a series of manufacturing processes.
FIG. 21 is a diagram showing a schematic configuration of a wiring board according to an eleventh embodiment of the present invention. FIG. 21 (a) shows one substrate surface of the wiring board according to the eleventh embodiment, and FIG. ) Shows the other substrate surface of the wiring substrate according to the eleventh embodiment.
FIG. 22A is a diagram showing a schematic configuration of a wiring board according to a twelfth embodiment of the present invention. FIG. 22A shows one substrate surface of the wiring board according to the twelfth embodiment, and FIG. () Shows the other substrate surface of the wiring substrate according to the twelfth embodiment.
FIG. 23 is a diagram showing a schematic configuration of a wiring board according to a thirteenth embodiment of the present invention. FIG. 23 (a) shows one substrate surface of the wiring board according to the thirteenth embodiment, and FIG. ) Shows the other substrate surface of the wiring substrate according to the thirteenth embodiment.
FIG. 24 is a diagram showing a schematic configuration of a wiring board according to a fourteenth embodiment of the present invention. FIG. 24 (a) shows one substrate surface of the wiring board according to the fourteenth embodiment, and FIG. ) Shows the other substrate surface of the wiring substrate according to the fourteenth embodiment.
FIG. 25A is a diagram showing one substrate surface of a conventional wiring board, and FIG. 25B is a diagram showing another substrate surface of the conventional wiring substrate.
FIG. 26 is a cross-sectional view showing a conventional semiconductor device using a wiring substrate and its manufacturing process, and FIGS. 26 (a) to (c) show a series of manufacturing processes.
[Explanation of symbols]
1, 51, 71, 81, 91, 121 First connection terminal
2, 52, 72, 82, 92, 122 Second connection terminal
3, 53, 83, 93, 123 Conducting paths provided on the outer peripheral surface
4, 54, 74 Conductive path provided on inner peripheral surface
5a, 5b, 43, 55, 75, 85, 95, 125 Wiring Pattern Formed on Top Surface
6a, 6b, 44, 56a, 56b, 56c, 56d, 76, 86, 96, 126a, 126b Wiring pattern formed on lower surface
7, 57, 77, 87, 94, 124 Outer peripheral surface
8, 58, 78, 88 Inner peripheral surface
9, 69, 79 Adhesion area
10, 50, 70, 80, 127 openings
11,60,99,129 Single layer substrate
12a, 12b Metal foil
13 Parent board
14a, 14b through hole
15, 16, 17 Photoresist film
16 Conductive film
18,61,98,128 Organic film
19, 35, 64, 111, 138 adhesive
20, 65, 33, 110, 139 support base
21, 31, 63, 100, 105, 112, 130, 136 Semiconductor element
22, 66, 101, 131, 137 Connecting member
23, 113, 132 Connection terminals for semiconductor elements
24, 102, 115, 133 Fine metal wire
25, 36, 67, 104, 108, 117, 134 Sealing resin
30, 59, 97, 118, 127 Semiconductor element mounting area
32, 62, 106, 135 Bump contacts
40 Spiral wiring pattern
41 Connection hole
42 Third connection terminal
103 Connection terminal of semiconductor element

Claims (23)

A frame-shaped wiring board provided with a plurality of first connection terminals used for connection with a semiconductor element and a plurality of second connection terminals used for connection with the outside,
A plurality of conduction paths are provided on at least one of the outer peripheral surface and the inner peripheral surface,
A wiring board, wherein all or some of the first connection terminals and all or some of the second connection terminals are electrically connected via the conduction path. The wiring board according to claim 1, wherein a groove is provided on at least one of the outer peripheral surface and the inner peripheral surface, and the conduction path is formed of a conductive film formed on a wall surface of the groove. The conduction path is provided on the outer peripheral surface and the inner peripheral surface, the first connection terminal and the second connection terminal are provided on different substrate surfaces,
All or some of the first connection terminals are provided on the conductive path provided on the outer peripheral surface and on the inner peripheral surface by a wiring pattern formed on a substrate surface provided with the first connection terminals. Is electrically connected to at least one of the conductive paths,
The whole or a part of the second connection terminal is provided on the conduction path provided on the outer peripheral surface and the inner peripheral surface by a wiring pattern formed on a substrate surface provided with the second connection terminal. The wiring board according to claim 1, wherein the wiring board is electrically connected to at least one of the conductive paths. The conduction path is provided on the outer peripheral surface and the inner peripheral surface, the first connection terminal and the second connection terminal are provided on the same substrate surface,
All or some of the first connection terminals are electrically connected to a conductive path provided on the inner peripheral surface by a wiring pattern formed on the same substrate surface,
All or some of the second connection terminals are electrically connected to a conductive path provided on the outer peripheral surface by a wiring pattern formed on the same substrate surface different from the wiring pattern. ,
The conductive path provided on the outer peripheral surface and the conductive path provided on the inner peripheral surface are electrically connected by a wiring pattern formed on a substrate surface that is a back surface of the same substrate surface. 2. The wiring board according to 1. The conduction path is provided on the inner peripheral surface, the first connection terminal and the second connection terminal are provided on different substrate surfaces,
All or some of the first connection terminals are electrically connected to a conduction path provided on the inner peripheral surface by a wiring pattern formed on a substrate surface provided with the first connection terminals. Yes,
The whole or a part of the second connection terminal is electrically connected to a conduction path provided on the inner peripheral surface by a wiring pattern formed on a substrate surface provided with the second connection terminal. The wiring board according to claim 1. The conduction path is provided on the outer peripheral surface, the first connection terminal and the second connection terminal are provided on different substrate surfaces,
All or some of the first connection terminals are electrically connected to a conduction path provided on the outer peripheral surface by a wiring pattern formed on a substrate surface provided with the first connection terminals. ,
All or some of the second connection terminals are electrically connected to a conduction path provided on the outer peripheral surface by a wiring pattern formed on a substrate surface provided with the second connection terminals. The wiring board according to claim 1. A wiring board provided with a plurality of first connection terminals used for connection with a semiconductor element and a plurality of second connection terminals used for connection with the outside,
A plurality of conduction paths are provided on the outer peripheral surface,
A wiring board, wherein all or some of the first connection terminals and all or some of the second connection terminals are electrically connected via the conduction path. The wiring substrate according to claim 7, wherein a groove is provided on the outer peripheral surface, and the conduction path is formed of a conductive film formed on a wall surface of the groove. The first connection terminal and the second connection terminal are provided on different substrate surfaces from each other,
The whole or a part of the first connection terminals are connected to the conduction path by a wiring pattern formed on a substrate surface provided with the first connection terminals,
8. The wiring board according to claim 7, wherein all or some of the second connection terminals are connected to the conductive path by a wiring pattern formed on a substrate surface provided with the second connection terminals. 9. A wiring board in which a plurality of first connection terminals used for connection to a semiconductor element and a plurality of second connection terminals used for connection to the outside are provided on the same substrate surface,
A plurality of conduction paths are provided on the outer peripheral surface,
The one conductive path and the other conductive paths are connected by a wiring pattern formed on a substrate surface that is a back surface of the same substrate surface,
All or some of the second connection terminals are connected to at least one of the first connection terminal and the conduction path by a wiring pattern formed on the same substrate surface. Wiring board. The wiring substrate according to claim 10, wherein a groove is provided on the outer peripheral surface, and the conduction path is formed of a conductive film formed on a wall surface of the groove. The first connection terminal and the second connection terminal are provided on different substrate surfaces,
A spiral wiring pattern provided on the substrate surface, and a connection hole electrically connected to at least one end of the spiral wiring pattern;
The part of the first connection terminal and the part of the second connection terminal are electrically connected to each other through the spiral wiring pattern and the connection hole. The wiring board as described. A third connection terminal used for connection with a mounting component other than the semiconductor element is provided on the substrate surface,
The wiring board according to claim 1, wherein the third connection terminal is electrically connected to some of the first connection terminals or some of the second connection terminals. The base material constituting the wiring board is a glass epoxy resin, a polyimide resin, a polybenzoxazal resin, an organic material containing at least one selected from high heat-resistant thermoplastic resin, or a ceramic material, a glass material, 14. The wiring substrate according to claim 1, wherein the wiring substrate is formed of an inorganic material containing at least one selected from metal materials. A semiconductor device comprising at least the wiring board according to claim 1 and a semiconductor element. The wiring board is the wiring board according to any one of claims 3 to 6,
Further comprising a support for mounting the semiconductor element,
The support base is fixed to a substrate surface on which the first connection terminal is not provided, so that a portion surrounded by the inner peripheral surface of the wiring substrate is closed.
The semiconductor element is fixed to the support base so as to be surrounded by the inner peripheral surface,
16. The semiconductor device according to claim 15, wherein said semiconductor element and said first connection terminal are electrically connected via a thin metal wire. The wiring board is the wiring board according to any one of claims 3 to 6,
16. The semiconductor element is fixed on a substrate surface provided with the first connection terminal, and the connection terminal of the semiconductor element is fixed to the first connection terminal via a bump contact. 13. The semiconductor device according to claim 1. The wiring board according to any one of claims 7 to 11, wherein:
The semiconductor element is fixed to a substrate surface on which the first connection terminal is provided;
16. The semiconductor device according to claim 15, wherein said semiconductor element and said first connection terminal are electrically connected via a thin metal wire. The wiring board according to any one of claims 7 to 11, wherein:
16. The semiconductor element is fixed on a substrate surface provided with the first connection terminal, and the connection terminal of the semiconductor element is fixed to the first connection terminal via a bump contact. 3. The semiconductor device according to claim 1. 20. The semiconductor device according to claim 15, wherein a bump contact is provided on a second connection terminal of the wiring board. A method of manufacturing a wiring board by cutting a plate-shaped member,
(A) providing, in the plate-shaped member, a plurality of through holes penetrating in a thickness direction along an outer peripheral shape of a wiring board to be manufactured;
(B) forming a conductive film on the wall surface of the through hole or filling a conductive material into the through hole;
(C) cutting the plate-shaped member so that the through hole is divided in the thickness direction of the plate-shaped member. The shape of the wiring substrate to be manufactured is a frame shape,
In the step (a), the plurality of through holes are further provided along an inner peripheral shape of the wiring board to be manufactured,
In the step (b), the conductive film is further formed on the wall surface of the through hole provided along the inner peripheral shape, or inside the through hole provided along the inner peripheral shape. Filling conductive material,
22. The step (c) further comprises cutting the plate-like member so that the through-hole provided along the inner peripheral shape is divided in the thickness direction of the plate-like member. Method of manufacturing a wiring board. The method according to claim 21 or 22, wherein the shape of the through hole is any one of a circle, an oval, and a polygon.

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