JP2003338933A - Image control equipment and its control method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To increase an image drawing speed and a total speed of the whole apparatus by a method wherein data coded by packed bits are subjected to high speed expansion. <P>SOLUTION: In a packed bits expansion circuit, a writing method into a register is changed by existence of data held in an output stage register. A control circuit is installed which switches a mode wherein one word is written at a time and a mode wherein one word is written every one bite. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to a Pack Bit.
Image control device having s control unit, and PackBits
The present invention relates to an image control method by control.

[0002]

2. Description of the Related Art Conventionally, when an image control apparatus having a Pack Bits control unit inputs data encoded by using the Pack Bits compression method from an external device such as a host computer and decompresses the data, all the data is transferred in Byte units. Was being processed. FIG. 2 shows a decompression circuit diagram of the conventional example.

In the figure, 201, 202, 203,
Reference numeral 204 denotes an 8-bit width shift register for the input stage, 20
Reference numerals 5 and 206 denote gates for generating an identification signal when the four latched data match or do not match, and 207 denotes B.
A Pack Bits code is a multiplexer for selecting data for each yte, and 208 is a Pack Bit
A counter for counting the repetition code of s, 210 is a latch for collecting the expanded data in word units, 209
Is a sequencer that controls all the blocks described above.

The main flow of data at this time is 201-2.
04 output from the final stage of the shift register
(Packet Bits code part) is distributed to the counter of 208, the CNTLD signal is activated, and the counter of 208 loads the count number. Then, until the counter carry (RCO) is output,
201-204 shift registers from the byte (Pa
The data part of ck Bits) is continuously set in the output stage latch (32 bit width) of 210. When data for one word (32 bits) is prepared in the latch, it is output to the block (not shown) in the next stage.

The above is the conventional example of the Pack Bits expansion circuit.

[0006]

However, the above-mentioned technique has the following problems.

With the Pack Bits decompression method as in the conventional example, all data processing is performed in byte units, that is, the counter is operated by 1 byte, so there is no problem if the number of repetitive data or discontinuous data is about several bytes. However, when data of tens to hundreds of bytes continues, a huge number of steps is required. Therefore, the transfer speed to the next block becomes slow, and the performance of the entire system is degraded.

Therefore, according to the present invention, the data which is encoded by Pack Bits is expanded at high speed by Pack Bi.
It is an object to provide a ts control device and a control method.

[0009]

As means for achieving the above object, 4count / 1step and 1count are provided.
7-bit down counter that also uses t / 1 step, and mode that writes 4 bytes at a time to the register and 1b
A control circuit is provided to switch the writing mode for each yte.

(Operation) The present invention operates as follows by the above means.

In the Pack Bits decompression circuit, when the output stage register is empty (decoded data is not written), 4 bytes are written at once to the output stage register and output to the next stage block. At this time, repeatedly, or when the discontinuous data is 4 bytes or more, 4 bytes are continuously written until the counter carry. Also, even if the data is less than 4 bytes, 4 bytes
te is written (the upper byte is garbage data), and the data is already written in the output stage register at the time of the next writing, so the data is written in the output stage register every 1 byte. When 1 word worth of data is written, it is output to the next-stage block and the output-stage register becomes empty, so the next 4-byte write operation is performed.

[0012]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described in detail below with reference to the drawings.

First, a laser beam printer will be described as an output device applied to the present invention. Needless to say, the present invention is not limited to the laser beam printer as long as the light beam scanning device is provided, and may be an image forming apparatus such as a copying machine or a FAX.

FIG. 1 is a sectional view showing the internal structure of a laser beam printer (hereinafter abbreviated as LBP) applied to this embodiment. This LBP is for registering a character pattern from a data source (not shown) and a standard format ( You can register (form data) etc. In the figure, reference numeral 1000 denotes an LBP main body, which inputs and stores character information (character code) supplied from an externally connected host computer (not shown), form information, macro commands, and the like. A corresponding character pattern, form pattern, or the like is created according to the information in (1), and an image is formed on a recording paper, which is a recording medium. 1012 is a switch and an LED for operation
An operation panel on which a display device is arranged, 1001 is an LB
A printer control unit for controlling the entire P1000 and analyzing character information and the like supplied from the host computer. The control unit 1001 mainly converts character information into a video signal of a corresponding character pattern and outputs the video signal to the laser driver 1002.

The laser driver 1002 is a semiconductor laser 1
This is a circuit for driving 003, and switches on and off the laser light 1004 emitted from the semiconductor laser 1003 according to the input video signal. Laser 1004
Is horizontally swung by the rotary polygon mirror 1005 and the electrostatic drum 1
Scan over 006. As a result, the electrostatic drum 1006
An electrostatic latent image of a character pattern is formed on the surface. The latent image is developed by the developing unit 1007 around the electrostatic drum 1006 and then transferred to the recording paper. A cut sheet is used as the recording sheet, and the cut sheet recording sheet is LBP1.
Stored in a paper cassette 1008 attached to a paper feeding roller 1009 and a paper feeding roller 1009 and conveyance rollers 1010 and 1011.
Is taken into the apparatus by and and supplied to the electrostatic drum 1006.

First, the printer control apparatus according to the first embodiment of the present invention will be described in detail. here,
A laser beam printer will be described as an example of the printer.

FIG. 3 is a block diagram showing a schematic configuration of the printer control device 30 (video controller) in the embodiment of the present invention.

In the figure, reference numeral 30 is a printer controller, 305 is an I / F section for exchanging data with a host computer (not shown), and a CPU shown as 301 as a main control means for controlling the entire apparatus. I have it.
The CPU 301 includes a ROM 303, a DRAM controller 307, a printer engine Video I / F unit 308, an I / O controller 310, and an NVRAM 3.
04 is connected via a system bus including a data bus, an address bus, and a control bus. The RAM 302 is used for a system area used by the CPU 301, an object area used as a data table, a bitmap memory for storing expanded data, a buffer area for storing received print data, and the like. The ROM 303 stores a control program, various font data for printing, and the like. The DRAM controller 307 and the CPU 301 are based on the control program stored in the ROM 303, and the Printer via the Video I / F unit 308.
It controls the output of printer data to the Engine 309.

Reference numeral 311 denotes an external device I / F unit such as an HDD, 3
10 is its control unit, 304 is NVRAM (nonvolatile memory) for storing information on various settings of the printer (paper size, character type, print offset, etc.), and 306 is Pack B
This is a control unit that generates / decodes the its code.

FIG. 4 shows the connection between the Pack Bits control unit 308 and the DRAM controller 307 in FIG. 3 in detail. A compression control unit 401 converts the input binary data in raster units or byt
Comparator for comparing in units of e, 7-bit counter for counting the number of repetitions of byte data, and PackB
It is composed of an its code generator. 402 is the above 40
The compressed data output from the code generator 1 of 1 is read / written to the drawing object memory 404, or 40
2 is a memory control unit for performing control to write the data decompressed by the second data decompression unit to the bitmap memory 405.

A data decompression unit 402 is a main block of this embodiment. It is composed of a 4-byte comparator, a counter, a decompression unit, etc. A detailed block diagram is shown in FIG.

In FIG. 5, 501 and 502 are input stage registers for holding the Pack Bits coded data from the previous stage, and 503 is 7 bytes to 4 by.
te shift register.

A command decoder 504 is a pack
It is a block that sorts out whether Bits data is discontinuous, repeated, or an end code. Reference numeral 505 is a 7-bit down counter, which counts down 4 counts and 1 counts by the enable signals of mpdce1 and mpdce4, respectively.

Reference numerals 506 to 509 denote output stage registers, and the preceding stage 503 holds the data output from the shift register and outputs it to the next stage block when 4 bytes (1 word) of data is prepared.

Reference numeral 510 is a sequencer for controlling all the blocks described above.

The detailed flow of this embodiment having the above-mentioned structure will be described with reference to the flow chart of FIG.

First, in STEP 1, the encoded Pac
The k Bits data is stored in the 302 DRAM from the host computer or other external device via the 305 host I / F unit and the 311 external device I / F unit.
Then, the drawing is started, and the 402 Pack Bits decompression unit inputs the encoded Pack Bits data from the preceding block, for example, the 404 drawing object. The 503 shift register has two words (56 bits).
Data is needed, so only the first step,
501, 502 Input stage register enable signal mpd
Output 2 clk of IE and set 2 words. Next S
In TEP2, command analysis is performed, and discontinuous, repeated, and end codes are distributed. mpsv (1: 0)
Is 4 bytes in 7 bytes Pack Bits data
e (0-31, 8-39, 16-47, 24-55bi
A signal for selecting t), which is calculated and output by the sequencer 510. 4by selected by mpsv (1: 0)
The lowest byte (control unit) of te is mpmd (32b
It appears in the lower 8 bits of the (it width). After that, 504Mp
The control part is analyzed in the com.
If the data is non-continuous or repetitive, the number of bytes (count) mpcnb (6: 0) of the data is set to 505 Mpdct in the next stage (the load signal mpdcl of the counter is active). 506 in STEP 3
If the output stage register of 509 is empty (there is no PackBits decompression data), 4 bytes (mp of the data part of the Pack Bits data (shifted by mpsv))
md) is set to active in mdpoeA to D and written to the output stage registers 506 to 509 at a time (STE).
P4). Here, mpdce4 is set to active, and -4
Start counting down every time. In STEP 5, the data to be decompressed is divided into less than 4 bytes and more than 4 bytes. Non-continuous or repeated data is 4 bytes
If it is the above data, 1-word data is output to the next block together with mpbden (STEP6) and 4 by
When the data is less than te, for example, 2 byte data, valid data is written to the output stage registers 508 and 509, and 5
Garbage data is written in the upper 2-byte registers of 06 and 507. Then in STEP 10, the next pack
If the Bits control unit is present in the word currently being processed, the process proceeds to STEP 2 to analyze the control unit.
On the contrary, if the control unit is present in the next word, the next Pack Bits data is taken in STEP 1 and command analysis is performed. After outputting the data in STEP 6, in STEP 7, the carry (mp of the counter of 505 Mpdct is
If cb4) is "0", there is still data to be decompressed, and the process proceeds to STEP8 to write the next 4-byte data. If the carry (mpcb4) of the counter is "1" in STEP7, the process proceeds to STEP10 to analyze the next control unit. Next, in STEP 8, if the data currently being processed is repetitive data, the process proceeds to STEP 4 as it is, and the same 4-byte data is written. Then, in the case of non-continuous data, the next non-continuous data is input (STEP 9) and a 4-byte write operation is performed. The control in the 503 shift register for non-continuous and repetitive data is selected by mpdsd output from the 510 sequencer. The sequence from STEP4 to STEP9 described above is repeated until mpcb4 becomes "1".

By the way, in STEP 3, when the output stage register contains the expanded data, the register (mpdoe) of the output stage register which has not been written yet.
Data of every 1 byte is written to active of any of A to D (STEP 11). Here, mpdcel is set to active, and the down count for each -1 is started. In STEP 12, when both carry of mpcb4 (4 down counter) and mpcb1 (1 down counter) become "1", ST is input to input the next data.
Proceed to EP10. If either mpcb4 or mpcb1 is "0", the process proceeds to STEP13, and it is determined whether or not one word has been prepared. If one word has not been prepared yet, the process proceeds to STEP 11 to write the next byte. If 1-word data is prepared here, it is output to the next block together with mpbden (STEP 1
4). As for the next data, the output stage register is empty at that time, so 4 byte write is performed, so STE
Go to P4. After that, STEP4 to STEP9 described above
The above operation is repeated until mpcb4 becomes "1".

When the end code is input in STEP 2, all the decompressed Pack Bits data are expanded in the 405 bit map memory by the 403 memory control unit. After that, the data is output to the 309 printer engine via the 308 video I / F unit by DMA or the like.

FIG. 7 is a state machine diagram showing the internal operation of 505 Mpdct.

The number of bytes of the Pack Bits data is loaded, and mpdce4 and mpdce1 are loaded.
Becomes active, down counters for 4 and 1 are activated, and the counters stop at false. The upper 5 bits of the counted value mpdc (6: 0) are "0".
When 0000 ", the carry mpcb4 becomes" 1 ",
When the lower 2 bits are "00", the carry mpcb1 becomes "1".

The above is the detailed flow of this embodiment. In the present embodiment, the Pack Bits decompression method is performed by hardware, but this processing can also be performed by software.

(Other Embodiments) In addition to the above embodiments, the present invention can be modified as follows.

The present invention includes a plurality of devices (eg, host computer, interface device, reader, printer, etc.).
It may be applied to a system composed of any one of the above, or may be applied to an apparatus including one device (copier, facsimile apparatus, etc.).

Further, the object of the present invention is to supply a storage medium having a program code of software for realizing the functions of the above-described embodiment to a system or apparatus, and to supply a computer (CPU or MP) of the system or apparatus.
It goes without saying that U) is also achieved by reading and executing the program code stored in the storage medium. In this case, the program code itself read from the storage medium realizes the functions of the above-described embodiments, and the storage medium storing the program code constitutes the present invention. As a storage medium for supplying the program code, for example, a floppy (registered trademark) disk, hard disk, optical disk, magneto-optical disk, CD-ROM, magnetic tape, non-volatile memory card, ROM, etc. can be used.

Further, not only the functions of the above-described embodiments are realized by executing the program read by the computer, but also the OS (operating system) running on the computer based on the instructions of the program code. It goes without saying that this also includes the case where the above-mentioned processes perform part or all of the actual processing and the functions of the above-described embodiments are realized by the processing.

The present invention has been described above with reference to the embodiments.
Various modifications are possible within the scope of the invention, and these modifications are not excluded from the scope of the invention.

[0038]

As described above, according to the present invention,
It has the following effects.

In the present invention, the decompression method of data encoded by Pack Bits is performed by using the processing in units of 4 bytes and 1 byte in combination. This has the effect of achieving high-speed expansion and increasing the total speed of the entire device, even if the amount of discontinuous and repetitive data is enormous.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing the configuration of a laser beam printer.

FIG. 2 is a block diagram showing a schematic configuration of a Pack Bits decompression device in a conventional example.

FIG. 3 is a block diagram showing a schematic configuration of a printer control device according to the present embodiment.

FIG. 4 is a block diagram showing a connection between a Pack Bits control device and a memory control device according to the present embodiment.

FIG. 5 is a block diagram showing a schematic configuration of a Pack Bits decompressing device in this embodiment.

FIG. 6 is a flowchart showing the flow of operations of the embodiment in this embodiment.

FIG. 7 is a state machine diagram showing an operation flow of a down counter.

[Explanation of symbols]

20 Printer control device 301 CPU 302 DRAM 303 ROM 304 NVRAM 305 Host I / F unit 306 Pack Bits control unit 307 DRAM controller 308 Video I / F unit 309 Printer Engine 310 I / O controller 311 External device I / F unit 401 Pack Bits Compression unit 402 Pack Bits Decompression unit 403 Memory control unit 404 Drawing object memory 405 Bitmap memory 406 Reception memory 501, 502, 506, 507, 508, 509 Latch with enable 503 7to4 shift register 504 Decoder 505 7-bit down counter 510 Sequencer

Claims (5)

[Claims] 1. An image control device having a Pack Bits control unit, wherein when decompressing data encoded by Pack Bits, the data is processed in byte units or word units depending on the storage status of output data holding means. An image control apparatus having a Pack Bits control unit, which is provided with: a means for performing the operation and a detection means for counting the number of data. 2. The image control apparatus having a Pack Bits control unit according to claim 1, wherein the detection means changes the detection method in accordance with data processing in word units or byte units. 3. An image control device having a Pack Bits control unit, wherein when decompressing data encoded by Pack Bits, the data is processed in byte units or word units depending on the storage status of output data holding means. An image control method by Pack Bits control, which comprises: a step of performing and a step of counting the number of remaining data. 4. The image control method by Pack Bits control according to claim 3, wherein the detection means changes the detection method in accordance with data processing in word units or byte units. 5. The image control device is a printer, a copying machine,
3. The image control apparatus according to claim 1, wherein the image control apparatus is a control apparatus such as a facsimile.