JPH07178972A - Device and method for image recording - Google Patents

Abstract

PURPOSE:To shorten a latency of other processing to access to an image memory such as plotting processing by controlling a state of DMA transfer from the image memory to a buffer memory in accordance with condition of data transfer from the buffer memory to a printer engine. CONSTITUTION:An image data expanded (plotted) in an image memory 5 is transferred to an FIFO 4 by a DMA circuit 2. From the FIFO 4, images are fetched sequentially in accordance with operating speed of an engine and outputted. When a considerable quantity of non-outputted data is present in the FIFO 4 (for example, when 3/4 of it is non-outputted), the transfer to the FIFO 4 by the DMA circuit 2 is inhibited, and a DMA transfer of an image generated by a plotting circuit 1 is performed. When the quantity of the data in the FIFO 4 becomes small, a burst transfer of a predetermined quantity of unit to the FIFO 4 is performed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to an image recording apparatus and method,
More specifically, the present invention relates to a printing apparatus and method for recording an image based on print data received from a higher-level device on a predetermined recording medium and outputting the image.

[0002]

2. Description of the Related Art In recent years, page printers typified by laser beam printers have rapidly become popular.

In general, this type of apparatus has a bitmap memory for one page or a fraction of a bitmap memory for one page. The latter method is advantageous in terms of cost because an image is recorded in units of bands (one band-shaped portion when one page image is divided in the horizontal direction), which requires less memory capacity.

Generally, in order to record each band, when an image of a certain band is developed in a memory, a line image in the memory is stored in a buffer memory (F) in a printer engine.
DMA transfer to IFO memory). The image data for one line transferred to the FIFO memory is sequentially read according to the operating speed of the printer engine, converted into serial data, and output to the printer engine.

The line portion on the bit map memory which has been transferred to the FIFO memory becomes a drawing target for the next band image.

[0006]

In the case of a page printer, as is well known, once the recording paper is conveyed to the photosensitive drum and the scanning and developing processing by the laser beam is started, the operation cannot be stopped. .

This also applies to an apparatus for recording an image in band units. Here, supposing that the received print data is large and the drawing contents due to the received print data are complicated, the FIFO of the band image is processed before the expansion processing of the band image in the middle is completed. There is a fear that it will be the time to request the DMA transfer to.

In such a state, a normal output image can no longer be expected.

Therefore, it is necessary to increase the time spent for developing the band image. However, in this type of device so far, the amount of information (burst length) transferred from the bitmap memory to the FIFO memory by DMA transfer is fixed. Moreover, since the timing is fixed, the time allotted to the drawing process is naturally limited.

[0010]

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and determines the DMA transfer state from the image memory to the buffer memory according to the status of data transfer from the buffer memory to the printer engine. An object of the present invention is to provide an image recording apparatus and method that can reduce the waiting time of other processing such as drawing processing for accessing an image memory by controlling.

In order to solve this problem, the image processing apparatus of the present invention has the following configuration. That is, in an image recording apparatus including a recording unit that records a visible image based on print data from a higher-level device on a predetermined recording medium, an image memory that expands output image data and an image data expanded in the image memory are displayed. A buffer memory for transferring in accordance with the recording speed of the recording means, and image data in the image memory is stored in the buffer memory.
DMA means for MA transfer and control means for controlling the transfer state by the DMA means according to the amount of untransferred image data in the buffer memory.

Another aspect of the invention is to develop output image data in an image recording apparatus having the following configuration, that is, in an image recording apparatus having recording means for recording a visible image based on print data from a higher-level device on a predetermined recording medium. An image memory, a buffer memory for transferring the image data expanded in the image memory at the recording speed of the recording means, and DMA transfer of the image data in the image memory to the buffer memory, and the image DMA means for DMA-transferring the image data to be expanded in the memory, and control means for controlling the acquisition priority of the DMA means according to the amount of untransferred image data in the buffer memory.

Further, the image processing method of the present invention comprises the following steps. That is, in an image recording method of recording a visible image based on print data from a higher-level device on a predetermined recording medium, the image data expanded in an image memory for output image data expansion is set to a recording speed of a predetermined recording unit. DM in the buffer memory for transferring together
A transfer step and a step of controlling the DMA transfer state according to the amount of untransferred image data in the buffer memory are provided.

Further, the image processing method of the present invention comprises the following steps. That is, in an image recording method of recording a visible image based on print data from a higher-level device on a predetermined recording medium, the image data expanded in an image memory for output image data expansion is set to a recording speed of a predetermined recording unit. DM in the buffer memory for transferring together
A transfer and A DMA transfer of the image data to be expanded in the image memory, and the DMA according to the amount of untransferred image data in the buffer memory.
And controlling the acquisition priority of the.

[0015]

In the structure or process of the present invention, when the image data expanded in the image memory is transferred to the buffer memory, the transfer is performed once depending on the amount of the non-output image data stored in the buffer memory. By changing the amount of such information, the waiting time of other drawing means for accessing the image memory is shortened.

[0016]

Embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

<Explanation of Device Configuration> FIG. 1 is a block diagram showing the main part (printer controller) of the laser beam printer in the embodiment.

In the figure, 1 is a drawing circuit for drawing an image, 2 is a DMA circuit for performing a DMA transfer, and 3 is a DMA.
It is a burst length counter. Reference numeral 4 is a FIFO memory that stores an image transferred to the printer engine, and has a capacity of one line or a plurality of lines. 5
Is an image memory for developing a bitmap image, 6 is a video circuit, 7 is an engine, and 8 is a bus. A CPU 9 controls the printer controller and the entire apparatus. An RO 10 stores a processing procedure (program) processed by the CPU 9 and font data.
M and 11 are used as CPU work areas,
This is a RAM that is also used as a reception buffer. Also,
Reference numeral 12 is an interface for receiving print data from a host device (host computer).

The structure and operation of the engine 7 will be described with reference to FIG. The laser beam printer of this embodiment can register a character pattern and a fixing form (form data) from a host computer.

In the figure, reference numeral 740 denotes an LBP main body, which inputs and stores character information (character code) supplied from an externally connected host computer, form information, macro commands, and the like. A corresponding character pattern or form pattern is created in accordance with the above, and an image is formed on the recording paper which is a recording medium. 700 is an operation panel on which switches for operation and an LCD display are arranged, and 701 is an LBP 740.
A printer control unit that analyzes the entire control and character information supplied from the host computer.
Each circuit configuration shown in FIG. 1 is included. The control unit 701 mainly converts the corresponding character pattern of character information into a video signal and outputs the video signal to the laser driver 702.
The laser driver 702 is a circuit for driving the semiconductor laser 703, and switches on / off the laser light 704 emitted from the semiconductor laser 703 according to an input video signal. The laser light 704 is swung in the left-right direction by the rotating polygon mirror 705 and scans the electrostatic drum 706. As a result, an electrostatic latent image such as a character pattern is formed on the electrostatic drum 706. The latent image is developed by the developing unit 707 around the electrostatic drum 706 and then transferred to the recording paper. A cut sheet is used as this recording paper, and the cut sheet recording paper is stored in a removable paper cassette 708 mounted on the LBP 740, and is taken into the apparatus by a paper feed roller 709 and delivery rollers 710 and 711, and electrostatically discharged. It is supplied to the drum 706. And the developing device 7
The toner image adhered on the electrostatic drum 706 by 07 is transferred to the conveyed recording paper. After that, the recording paper is conveyed toward the fixing device 712, the toner is fixed,
Finally, it is discharged to the outside by the discharge roller 713.

<Description of Operation> In the above configuration, the CPU 9
Receives the data sent from the host computer,
It is temporarily stored in the reception buffer of the RAM 11. Then, according to the data, an intermediate code for generating image data to be printed is generated and output to the drawing circuit 1. The drawing circuit 1 writes the instructed image image data in the image memory 5 through burst memory access or the like through the DMA circuit 2.

On the other hand, when the drawing of the image image data of a certain range (band) is completed, the CPU 9 activates the video circuit 6 and instructs the engine 7 to transfer the image image data.

The video circuit 6 instructs the DMA circuit 2 to read the image data of the image memory 5 and input it to the FIFO 4. As a result, the image memory 5
The image of the line is transferred to FIFO4. FIFO
The image data transferred to No. 4 is sequentially read according to the operating speed of the engine 7, converted into a serial signal by parallel-serial conversion (not shown), and transferred to the engine 7.

Here, in the DMA circuit 2, the data is transferred by accessing the RAM 5 by burst read in order to improve the bus usage efficiency. The burst length is either 4 words or 2 words by the DMA burst length counter 3. It is set to crab. The DMA circuit 2 includes the CPU 9 as the source, the priority of the drawing circuit 1, the video circuit 6
It is assumed that the drawing circuit 1 and the CPU 9 are adapted to receive the DMA in the order of priority.

When the drawing circuit 1 performs the drawing process of the image data for the next printing while printing (while transferring the serial signal to the engine 7), the DMA of the video circuit 6 has priority. The drawing circuit 1 executes the DMA only after the DMA cycle is completed. FIG. 4 is a flowchart for explaining the operation of the first embodiment. After the operation is started, the counter of the data amount in the FIFO is cleared in S1. After that, the remaining amount of data in the FIFO is first determined in step S2. It should be noted that this determination is made at the time when one DMA cycle ends and it is determined from which circuit the DMA processing will be performed next. If the result of determination is that the remaining amount of data in the FIFO is 1/2, the burst transfer amount of DMA is set to 4 in step S4. In step S3, it is determined whether the remaining data amount in the FIFO is 3/4 or less to 1/2, and if it is 3/4 to 1/2, the burst transfer amount of DMA is set to 2 in step S5. set. If the remaining amount of data in the FIFO is 3/4 or more, the DMA request is not issued and the FIFO from step S2
O Repeat determination of remaining amount of data. D in steps S4 and S5
When the burst transfer amount of MA is set, step S6 is subsequently executed to issue a DMA service request to the DMA circuit. Next, in step S7, the process waits until DMA transfer is performed, and when the DMA transfer is performed, the remaining FIFO data from step S2 is determined again.

FIG. 5 is almost the same flow chart as FIG. 4, except that step S7 waiting for DMA transfer is omitted and FI is always used.
The remaining amount of FO is determined in steps S12 and S13. As a result, once the remaining amount of data in the FIFO becomes 3/4, the data in the FIFO is read out while waiting for a DMA request with the DMA burst length set to 2, and the FIFO is read.
Even if the remaining amount of data becomes half, the DMA
It is possible to increase the burst transfer amount of 2 to 2/4.

Here, the feature of the embodiment is 4 words when the amount of data (non-output data) stored in the FIFO 4 is less than 1/2, 2 words when it is greater than 1/2,
If it is more than 3/4, DMA transfer is not performed. As a result, the larger the amount of data remaining in the FIFO memory is, the shorter the waiting time of the drawing circuit 1 is, and the next drawing operation is performed, as compared with the case where the DMA transfer amount is constant. You can do it fast.

<Description of Second Embodiment> FIG. 3 is a circuit block diagram of the second embodiment. In the figure, 1 to 9 are the same as the above-described embodiment (first embodiment), and the difference is that D
The DMA priority determination circuit 13 is provided instead of the burst length counter 3 of the MA. In the second embodiment, it is assumed that the amount of data transferred in one DMA is constant.

The DMA priority determination circuit 13 has a FIFO.
4, a 3/4 signal indicating the remaining amount of data in the FIFO and a 1/2 signal are input. If the amount of data stored in the FIFO is less than 1/2, the priority of DMA is raised above the drawing circuit 1 and is greater than 1/2 and 3/4.
If it is smaller, the priority of DMA is set lower than that of the drawing circuit 1. If it is larger than 3/4, no DMA transfer request is issued. As a result, when the remaining amount of data in the FIFO is large (1/2 or more), the DMA of the drawing circuit is given priority, the waiting time of the drawing circuit 1 can be reduced, and the throughput of the entire circuit can be improved.

FIG. 6 is a flow chart for explaining the operation of the second embodiment. After the operation starts, in step S21, F
Clear the IFO data amount counter. Then F
The remaining amount of data in the IFO is determined in step S22. If the remaining amount of data in the FIFO is 1/2, the priority of DMA is set to level 1 in step S28. Here, the level 1 has a higher priority than the level 2.

If the remaining amount of data in the FIFO is 1/2 to
In the case of 3/4, it is determined in step S23, and if 3 /
If 4-1 / 2, the priority of DMA is set to level 2 in step S29. If the remaining data amount in the FIFO is 3/4 or more, no DMA request is issued in step S30.

Note that, for example, it is possible to combine the first embodiment and the second embodiment to change the priority order and transfer length of the DMA according to the amount of information stored in the FIFO 4.

Further, the remaining amount of the FIFO data for changing the condition of the DMA is not particularly limited to 1/2 and 3/4, and these are the required amount of the video circuit (depending on the engine speed etc.), It is determined from the DMA cycle length.

Also, when the data amount of the FIFO is not a two-stage sense signal but is larger than 2, the priority of DMA or the transfer amount of one DMA may be set more finely.

Further, the FIFO 4 in the above embodiment may be constituted by a double buffer memory (a pair of buffer memories capable of writing while one is outputting and the other is writing).

In the above embodiment, an example in which an image is recorded in band units has been described, but the present invention is not limited to this.
A memory capable of expanding a bitmap image for a page may be provided. This is because, for the line transferred to the FIFO 4, the image drawing and expansion processing of the next page can be performed before the DMA circuit 2 is accessing the image memory 5.

In the embodiment, the laser beam printer is taken as an example, but the present invention is not limited to this, and it is easily inferred that the invention can be similarly applied to a page printer of another system such as an LED printer. Will be done.

Further, the present invention can be applied to a printer of a type in which an image is recorded by reciprocally moving a carriage having a recording head. In this case, since the speed of the recording mechanism is slower than that of the electrophotographic printer, there is no serious problem as described in the section of the prior art, but there is no change in improving the processing speed. is there.

Regarding a DMA factor of a high priority such as an LBP video circuit which always reads out certain data, and a DMA request of the drawing circuit when a DMA transfer of various lengths occurs appropriately like the drawing circuit, The delay in executing the DMA can be reduced. Although the present embodiment is realized by hardware, it can be realized by storing the program according to the flowcharts of FIGS. 4, 5 and 6 in the ROM (software).

[0040]

As described above, according to the present invention, the DMA from the image memory to the buffer memory is performed according to the status of data transfer from the buffer memory to the printer engine.
By controlling the transfer state, it is possible to reduce the waiting time for other processing such as drawing processing for accessing the image memory.

[0041]

[Brief description of drawings]

FIG. 1 is a block configuration diagram of a printer controller unit in a first embodiment.

FIG. 2 is a structural cross-sectional view of a device in an example.

FIG. 3 is a block configuration diagram of a printer controller unit in a second embodiment.

FIG. 4 is a flowchart showing the processing contents of the first embodiment.

FIG. 5 is a flowchart showing a modification of the processing contents of the first embodiment.

FIG. 6 is a flowchart showing the processing contents of the second embodiment.

[Explanation of symbols]

 1 Drawing Circuit 2 DMA Circuit 3 DMA Burst Length Counter 4 FIFO 5 Image Memory 6 Video Circuit 7 Engine 8 Bus 9 CPU 10 ROM 11 RAM 12 I / F 13 DMA Priority Control Circuit

Claims (12)

[Claims] 1. An image recording apparatus comprising recording means for recording a visible image based on print data from a higher-level device on a predetermined recording medium, and an image memory for expanding output image data, and an image memory expanded in the image memory. A buffer memory for transferring the image data in accordance with the recording speed of the recording means; a DMA means for transferring the image data in the image memory to the buffer memory by DMA; and an untransferred image data in the buffer memory. An image recording apparatus comprising: a control unit that controls a transfer state by the DMA unit according to an amount. 2. The DMA controller controls the DMA as the amount of untransferred image data in the buffer memory increases.
The image recording apparatus according to claim 1, wherein the amount of information transferred at one time by the means is reduced. 3. The control means prohibits DMA transfer from the image memory to the buffer memory by the DMA means when the amount of untransferred image data in the buffer memory is more than a predetermined value. Claim 1
The image recording device according to item 2 or item 2. 4. An image recording device comprising recording means for recording a visible image based on print data from a higher-level device on a predetermined recording medium, and an image memory for expanding output image data, and an image memory expanded in the image memory. A buffer memory for transferring image data according to the recording speed of the recording means, a DMA for transferring the image data in the image memory to the buffer memory, and a DMA for transferring the image data to be expanded to the image memory. An image recording apparatus comprising: means for controlling the acquisition priority of the DMA means in accordance with the amount of untransferred image data in the buffer memory. 5. The DMA controller controls the DMA as the amount of untransferred image data in the buffer memory increases.
The image recording apparatus according to claim 4, wherein the amount of information transferred by the means from the image memory to the buffer memory at one time is reduced. 6. The control means prohibits DMA transfer from the image memory to the buffer memory by the DMA means when the amount of untransferred image data in the buffer memory is more than a predetermined value. Claim 4
The image recording apparatus according to item 5 or 5. 7. An image recording method for recording a visible image based on print data from a higher-level device on a predetermined recording medium, wherein image data expanded in an image memory for output image data expansion is recorded in a predetermined recording means. An image characterized by including a step of performing a DMA transfer to a buffer memory for transfer according to a recording speed, and a step of controlling a DMA transfer state according to the amount of untransferred image data in the buffer memory. Recording method. 8. The control process according to claim 7, wherein the larger the amount of untransferred image data in the buffer memory is, the smaller the transfer information amount of one transfer by DMA is. Image recording method. 9. The control step, if the amount of untransferred image data in the buffer memory is more than a predetermined value, D
9. The image recording method according to claim 7 or 8, wherein DMA transfer from the image memory to the buffer memory by MA is prohibited. 10. An image recording method for recording a visible image based on print data from a higher-level device on a predetermined recording medium, wherein image data expanded in an image memory for output image data expansion is recorded in a predetermined recording means. The DMA data is transferred to a buffer memory for transfer according to the recording speed, and the image data to be expanded in the image memory is DMA transferred.
An image recording method comprising: a transfer step; and a step of controlling the acquisition priority of the DMA according to the amount of untransferred image data in the buffer memory. 11. The control step reduces the amount of information transferred by the DMA from the image memory to the buffer memory once, as the amount of untransferred image data in the buffer memory increases. Claim 10
The image recording method described in the item. 12. The control step, when the amount of untransferred image data in the buffer memory is a predetermined amount or more,
D from the image memory to the buffer memory by DMA
The image recording apparatus according to claim 10 or 11, wherein MA transfer is prohibited.