JP2003318211A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device which can show high reliability without increasing a manufacturing cost by improving adhesion strength in mounting by flattening the head of a bump electrode without adding a new process. <P>SOLUTION: In a constitution wherein a bump electrode 16 comes into contact with an electrode pad 13 of a lower layer via an opening part 15 formed in a surface protection film 14, the opening part 15 is a pattern type opening part formed by partially removing the surface protection film 14. As for the pattern, for example, an aggregate pattern consisting of a plurality of small opening parts 15a is mentioned. Since the degree of a step formed by the opening part 15 can be thereby improved, the head of the bump electrode 16 is not recessed even if the bump electrode 16 is formed above the opening part 15, thus improving flatness. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having bump electrodes, and more particularly to a semiconductor device having bump electrodes having improved connection reliability when mounted on a mounting board.

[0002]

2. Description of the Related Art In recent years, as represented by portable information terminals, electronic devices are becoming smaller and lighter, and accordingly, semiconductor integrated circuits and the like incorporated in electronic devices are also becoming smaller.・ Lighter weight is required. Miniaturization of the above semiconductor integrated circuits (hereinafter referred to as semiconductor devices)
The weight reduction can be achieved by increasing the packaging density.

As a technique for mounting the above-mentioned semiconductor device at a high density, a mounting technique using a so-called bump electrode is mentioned as a promising technique and is widely used in practice. Specifically, a bump electrode is formed at a predetermined position on the surface of the semiconductor device by using a plating technique, for example, using gold (Au). Then, the electrodes of the mounting board and TCP (Tape
A semiconductor device is directly mounted on an inner lead of a carrier package) by using the bump electrode.

When the structure of a general semiconductor device is schematically shown, as shown in FIG. 6, an electrode pad 53 on which an integrated circuit is formed is arranged on a semiconductor substrate 51 via an insulating film 52. Then, the surface protection film 54 is formed so as to cover the surfaces of the electrode pad 53 and the insulating film 52. The bump electrode 56 is formed on a part of the surface protection film 54 corresponding to the electrode pad 53. An opening 55 for use is formed.

The material of the bump electrode 56 is generally gold (Au) or an alloy containing gold, and is formed on the electrode pad 53 by a plating method (electroplating method or the like).
Here, in the plating method, since the gold plating grows isotropically, the formed bump electrode 56 accurately reflects the shape of the base. As is apparent from FIG. 6, the bump electrode 56 is
Since it is formed on the electrode pad 53 through the opening 55, the opening 5 is formed on the surface of the bump electrode 56, that is, the head.
A concave shape reflecting the shape of No. 5 is generated.

When the inner lead 57 is connected to the bump electrode 56 having the above-mentioned concave shape, the contact area (bonding area) between the inner lead 57 and the bump electrode 56 becomes small, so that sufficient adhesive strength is obtained between them. However, this causes problems such as mounting failure.

Therefore, conventionally, in the mounting technique using the bump electrode, a technique for improving the adhesive strength at the time of mounting by further flattening the head of the bump electrode and avoiding the occurrence of mounting failure is required. ing.

As a technique for flattening the head of the bump electrode, for example, a method of manufacturing a semiconductor device disclosed in Japanese Patent Laid-Open No. 2-230741 is known.

In this technique, the base is flattened before the bump electrode is formed by plating, and then the bump electrode is formed, so that the head of the bump electrode is flattened.

More specifically, first, as shown in FIG. 7A, an electrode pad 53 is formed on a semiconductor substrate 51 via an insulating film 52, and a surface protective film 54 is further formed.
The surface protection film 54 is removed from a part above the electrode pad 53 to form an opening 55. After that, the first barrier metal layer 61 is formed so as to cover the entire surface including the opening 55. Further thereafter, the first barrier-metal layer 61
A resist mask 63 is formed so as to open a step region, that is, a portion corresponding to the opening 55 as a base, and a planarizing metal layer 64 is deposited and formed on the step region.

Next, as shown in FIG. 7B, after removing the resist mask 63, the planarizing metal layer 6 is removed.
4 is melted and flattened so as to fill the step. After this planarization, the second barrier-metal layer 6 is covered to cover the entire surface.
Form 2.

Next, as shown in FIG. 7C, a bump electrode 56 is formed by a plating method in a bump electrode forming region using a resist mask (not shown), and the bump electrode 56 is used as a mask for etching. Thus, the second barrier-metal layer 62, the first barrier-metal layer 61, etc. other than those directly under the bump electrode 56 are removed.

[0013]

However, in the technique disclosed in Japanese Patent Laid-Open No. 2-230741, a step is added in order to flatten the head of the bump electrode. However, there is a problem in that the manufacturing cost is increased and the manufacturing cost is increased.

Specifically, as is clear from FIGS. 7A to 7C, although the head of the bump electrode 56 can be flattened by the technique of the above publication, at least,
A step of forming a resist mask 63 and depositing and forming a flattening metal layer 64 on the step region, or removing the resist mask 63 and then melting the flattening metal layer 64 to fill the step A step of flattening is required.

That is, as compared with the conventional general technique,
Since a new process is added, the manufacturing process becomes complicated, the manufacturing period of the semiconductor device is lengthened, and the equipment for performing such a new process must be newly added. Therefore, the capital investment will increase, which in turn will increase the manufacturing cost of the semiconductor device.

The present invention has been made in view of the above problems, and an object thereof is to flatten the head portion of a bump electrode without adding a new step to improve the adhesive strength during mounting. The object is to provide a semiconductor device that can exhibit high reliability without increasing manufacturing costs.

[0017]

In order to solve the above problems, a semiconductor device according to the present invention has an opening formed in a surface protective film laminated on an electrode pad, and an electrode is formed through the opening. In a semiconductor device in which a bump electrode is provided so as to be in contact with a pad, the opening is a region directly above the electrode pad and a pattern-type opening formed by partially removing a surface protective film. It is characterized by becoming.

According to the above structure, the surface protective film is not removed from the entire area within the opening, but the surface protective film is partially and regularly removed. That is, the opening connecting the bump electrode and the electrode pad is not a state in which the surface protective film is not formed, but is a pattern type opening in which the surface protective film remains partially and regularly.

As a result, the degree of the level difference between the surface of the surface protective film and the surface of the electrode pad due to the presence of the opening is improved, so that the upper part of the opening has a largely concave shape as in the conventional case. I won't. Therefore, even if the bump electrode is formed above the opening by plating, the head of the bump electrode does not have a concave shape, and the flatness is improved.

As a result, the contact area between the bump electrode and the inner lead can be increased without adding a new process, and a semiconductor device having high reliability without increasing the manufacturing cost can be obtained. Can be provided.

In the semiconductor device according to the present invention, in addition to the above structure, the shape of the pattern type opening is formed such that an aggregate pattern of a plurality of small openings or a surface protective film is left in an island shape. It is characterized by being any of the groove patterns.

In the present invention, the opening may have any shape as long as it is formed as a pattern type opening, but according to the above configuration, a collective pattern composed of a plurality of small openings, With a groove pattern in which the surface protective film is left in the form of a plurality of islands, it becomes easier to improve the degree of the step of the base due to the presence of the opening. Therefore, the flatness of the head of the bump electrode can be further improved.

In addition to the above structure, the semiconductor device according to the present invention is characterized in that gold or an alloy containing gold is used as a material for the bump electrodes.

In addition to the above structure, the semiconductor device according to the present invention is characterized in that a barrier layer is formed between the bump electrode and the electrode pad.

According to each of the above structures, the reliability of the bump electrode can be improved by using gold (Au) or an alloy containing gold, which is more preferable as the material of the bump electrode. Furthermore, in the case of a bump electrode using gold, if a barrier layer is formed between the bump electrode and the electrode pad,
It is possible to suppress the reaction between the gold of the bump electrode and the material (for example, aluminum) of the electrode pad. As a result, with the above respective configurations, the reliability of the semiconductor device according to the present invention can be further enhanced.

[0026]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of the present invention will be described below with reference to FIGS.
The present invention is not limited to this.

In the semiconductor device (semiconductor integrated circuit or the like) according to the present invention, the pattern of the opening is devised when forming the opening provided in the surface protective film for connecting the bump electrode and the electrode pad of the underlying layer. As a result, the degree of the step above the opening is reduced. This pattern may be regular or random.

Specifically, for example, as shown in FIG.
The semiconductor device according to the present embodiment is the semiconductor substrate 11
An insulating film 12 covering the surface thereof, an electrode pad 13 formed on the insulating film 12, a surface protection film 14 covering the entire surface of the semiconductor substrate 11 including the electrode pad 13, and the surface protection. The bump electrode 16 is formed on the film 14.

On the surface protective film 14, the electrode pad 13 is formed.
An opening 15 is formed in a part of a portion corresponding to the surface protection film 14 through the opening 15.
The electrode pad 13 serving as the underlying layer of the above and the bump electrode 16 are in contact with each other. Further, in the present invention, the opening 15 is a region directly above the electrode pad 13,
It is formed as a pattern type opening formed by partially and regularly removing the surface protective film 14.

The semiconductor substrate 11 has a circuit element such as a transistor incorporated therein by using a conventionally known technique to form an integrated circuit. However, in FIG.
Omitted. The semiconductor substrate 11 is not particularly limited as long as it includes various integrated circuits according to the application of the semiconductor device, and conventionally known semiconductor chips, IC substrates, etc. are used.

The insulating film 12 is a film that insulates the semiconductor substrate 11 from the electrode pads 13 and other conductive layers formed thereabove. The insulating film 12 is not particularly limited as long as it is a film made of an insulating material, and is a conventionally known BPSG (Boron Phospho-Silicate G).
A rass) film, a silicon oxide (SiO) film, a silicon nitride (SiN) film, an SOG (Spin On Glass) film and the like can be preferably used.

The method for forming the insulating film 12 is not particularly limited, and a conventionally known CVD method (Chem
ical vapor deposition, vapor phase growth method, chemical vapor deposition method), plasma CVD method and the like can be preferably used. Similarly, the thickness of these insulating films 12 is not particularly limited, and may be any film thickness within a range where the insulating property can be exhibited.

The electrode pad 13 is an input / output electrode for the semiconductor substrate 11. The electrode pad 13 is not particularly limited as long as it is made of a material that has conductivity and can be used as an electrode, but is preferably aluminum (Al) or an alloy thereof, such as an aluminum-silicon alloy ( A conductive layer made of (Al-Si alloy) or the like can be given.

The method of forming the electrode pad 13 is not particularly limited. For example, conventionally known CVD
It is possible to preferably use a method of forming a predetermined shape by using a conventionally known photolithography technique, etching technique, or the like after depositing and forming by a method or the like. Similarly, the shape and thickness of the electrode pad 13 are not particularly limited as long as they can function as an input / output electrode. For example, in the example described later, the electrode pad 1
Although 3 is formed in a rectangular shape, it may be a square shape.

Further, although not shown in FIG. 1, an electric wiring layer for connecting circuit elements such as a transistor included in the semiconductor substrate 11 to each other is formed together with the electrode pad 13 similarly to the electrode pad 13. The pattern and thickness of the electric wiring layer are not particularly limited.

The surface protective film 14 protects the surface of the semiconductor substrate 11 and prevents moisture and harmful impurities from entering the integrated circuit and the like of the semiconductor substrate 11. The surface protective film 14 is not particularly limited as long as it is made of a material that can prevent impurities and the like from entering.
N film, PSG film (Phospho-Silicate Grass), NSG
A conventionally known passivation film or the like such as a (Non-doped Silicate Grass) film or a laminated film thereof can be preferably used.

The method of forming the surface protective film 14 is not particularly limited, and a conventionally known CVD method or the like can be preferably used. Similarly, the surface protective film 14
The thickness is not particularly limited as long as it can protect the surface.

The bump electrode 16 corresponds to the electrode pad 1
3 is contacted (connected) and connected to the inner lead 17 as shown in FIG. 1 (in the state before connection is shown in FIG. 1), so that the semiconductor substrate 11 is inserted through the electrode pad 13. It is what is output.

The material of the bump electrode 16 is not particularly limited as long as it is conductive and can make good contact with the inner leads 17 and the electrode pads 13, but gold (Au) or An alloy containing gold is used. Gold is more preferable as a material of the bump electrode 16 and is known as a general material. TAB (Tape Aut)
omated Bonding) method and the like. Therefore, the reliability of the bump electrode 16 can be improved.

The method of forming the bump electrodes 16 is not particularly limited, and conventionally known plating methods such as electroplating can be preferably used. The thickness of the plating, that is, the height of the bump electrode 16 is not particularly limited as long as it is set according to the type of semiconductor device and the conditions and conditions of the printed circuit board or tape on which the semiconductor device is mounted.

The bump electrode 16 and the electrode pad 13 are in contact with each other through the opening 15. The opening 15 is similar to the conventional one in that it is formed at a position above the electrode pad 13 in the surface protective film 14. However, in the present invention, for example, as shown in FIG. 1, the opening 15 is a pattern type opening having a collective pattern composed of a plurality of small openings 15a.

Conventionally, the surface protective film 14 was removed from the entire region to be the opening 15, but in the present invention, the surface protective film 14 is partially and regularly removed. That is,
Opening 15 for connecting the bump electrode 16 and the electrode pad 13
Is not a state in which the surface protective film 14 is not formed, but is a pattern type opening in which the surface protective film 14 remains partially and regularly.

As a result, the degree of the level difference between the surface of the surface protective film 14 and the surface of the electrode pad 13 due to the presence of the opening 15 is improved, so that the area above the opening 15 is different from the conventional one. Does not have a deeply recessed shape. Therefore, even if the bump electrode 16 is formed above the opening 15 by plating, the head of the bump electrode 16 does not have a concave shape and the flatness is improved.

As a result, the contact area between the bump electrode 16 and the inner lead 17 or the like can be increased without adding a new step. This makes it possible to provide a highly reliable semiconductor device without increasing the manufacturing cost.

In the present invention, the opening 15 is not particularly limited as long as it has any shape as long as it is formed as a pattern type opening in which the surface protective film 14 is partially and regularly removed. Although it is not a matter of preference, it is preferable that it be either an aggregate pattern composed of a plurality of small openings 15a as shown in FIG. 1 or a groove pattern formed so that the surface protective film 14 remains in an island shape. .

Specifically, the above set pattern is as shown in FIG.
As shown in (a) and (b), a plurality of small openings 15a are formed in a region immediately above the electrode pad 13 shown by a dotted line in the figure.
(A shaded area in the figure) is regularly arranged to form one opening 1
5 is formed, in other words, the surface protective film 14 is patterned so that the fragments of the surface protective film 14 remaining in the region immediately above the electrode pad 13 are connected to the peripheral surface protective film 14. It is a structure to be converted.

Opening conditions for forming the aggregate pattern type opening 15, for example, the shape of the small opening 15a,
The size, the total opening area per electrode pad 13, and the like are not particularly limited, and may be determined according to the current flowing through the electrode pad 13 and the resistance value.

That is, when there is a possibility that the bonding strength between the bump electrode 16 and the electrode pad 13 may not be sufficiently secured due to the structure of the semiconductor device, the area of the electrode pad 13 is increased and the number of the small openings 15a is increased. Should be increased.

Furthermore, the aggregate pattern may be formed by partially and regularly removing the surface protective film 14 to form the small openings 15a, and the individual small openings 15a have the same shape and size. No need. Therefore, when forming the collective pattern type openings 15, all the small openings 15a may be the same, or the small openings 15a may have different sizes and shapes.

In the groove pattern, as shown in FIG. 3, a plurality of island-shaped fragments 14a of the surface protective film 14 are regularly arranged in a region immediately above the electrode pad 13 shown by a dotted line in the drawing. When viewed as the opening 15, a plurality of groove openings 15b (hatched areas in the drawing) are formed in a lattice pattern so as to surround the fragments 14a of the plurality of surface protection films 14. is there.

Opening conditions for forming the groove pattern type opening 15, for example, the island-shaped fragment 1
The shape and size of 4a, the total opening area per electrode pad 13, and the like are not particularly limited, and can be determined by the current flowing through the electrode pad 13 and the resistance value as in the case of the above-mentioned aggregate pattern type. Good.

That is, when there is a possibility that the bonding strength between the bump electrode 16 and the electrode pad 13 cannot be sufficiently ensured due to the structure of the semiconductor device, the area of the electrode pad 13 is increased to increase the area of the plane. That is, the number of intersections of the groove openings 15b may be increased.

Further, as for the groove pattern, like the collective pattern, it is sufficient that the surface protection film 14 is partially and regularly removed to form the island-shaped fragment 14a, and the shape and size of each fragment 14a. That is, it is not necessary that the widths and lengths of the groove openings 15b that intersect each other be the same. Therefore, when forming the groove pattern type opening 15, all the pieces 14a may be the same, or the pieces 14a may have different sizes and shapes. Similarly, all the intersecting groove openings 15b may have the same width and length, or the groove openings 15b may have different widths and lengths.

As described above, in the case of the aggregate pattern including a plurality of small openings 15a or the groove pattern in which the surface protection film 14 is left in the shape of a plurality of islands, the degree of the step difference of the base due to the existence of the openings 15 is formed. Will be easier to improve. Therefore, the flatness of the head of the bump electrode 16 can be further improved.

Further, in the present invention, like the above-mentioned aggregate pattern or groove pattern, a lattice pattern or an island pattern (island pattern) is provided.
It is preferable to pattern the surface protective film 14 to form the openings 15 on the surface of the surface protective film 14. However, a configuration in which the aggregate pattern and the groove pattern are combined, for example, a fragment 14a of the surface protective film 14 remaining in the form of an island is formed. A configuration including the small opening portion 15a and the groove opening portion 15b may be included so that the portion connected to the surrounding surface protection film 14 is included.

Further, it may be a curve pattern composed of a combination of free curves. In other words, such a curved pattern also includes the small opening 15a and the groove opening 15b by partially and regularly removing the surface protective film 14 in the region immediately above the electrode pad 13. Since it is configured as described above, it is included in the scope of the present invention.

That is, the pattern type opening portion in the present invention is an opening portion 15 formed so as to have a specific pattern (pattern) as a whole in consideration of the current flowing through the electrode pad 13, the resistance value and the like. I wish I had it. Therefore, the openings 15 of the present invention may have a random aggregate pattern rather than a regular pattern.

The method for forming the pattern-shaped opening 15, that is, the small opening 15a or the groove opening 15b, or the island-shaped fragment 14a is not particularly limited, and a conventionally known photolithographic technique can be used. The openings 15 may be formed in the surface protective film 14 in a predetermined pattern.

For example, in the case of the collective pattern shown in FIGS. 2A and 2B, photolithography may be performed using a photomask that masks a region other than the portion corresponding to the small opening 15a. Good. Similarly, in the case of the groove pattern as shown in FIG. 3, the island-shaped fragment 1
Photolithography may be performed using a photomask that masks the region corresponding to 4a.

Next, an example of a method of manufacturing a semiconductor device according to the present invention will be described.

First, for example, a BPSG film is deposited as the insulating film 12 on the entire surface of the semiconductor substrate 11 by the CVD method so as to have a thickness of about 400 nm. Next, an opening (not shown) is formed at a predetermined position of the insulating film 12.
Then, for example, an Al thin film is deposited on the entire surface of the semiconductor substrate 11 so as to have a thickness of about 600 nm, and the electric wiring and the electrode pad 13 are formed by using the photolithography technique and the metal thin film etching technique. In the present embodiment, the rectangular electrode pad 13 having a size of, for example, about 60 μm × 110 μm is formed.

Next, as shown in FIG. 4A, the surface protective film 14 is formed on the entire surface of the semiconductor substrate 11 including the electrode pads 13.
As an example, a SiN film is deposited by the plasma CVD method.

Next, as shown in FIG. 4B, an opening 15 having a predetermined pattern is formed in the surface protective film 14 located above the electrode pad 13 by using the photolithography technique and the etching technique. . The photomask used at this time is different from the photomask conventionally used in this step, as shown in FIGS. 2A and 2B and FIG.
A photomask having a specific pattern that partially and regularly leaves the surface protective film 14 is used.

For example, in the present embodiment, the electrode pad 1
Since the size of 3 is 60 μm × 110 μm, the small opening 15a is formed as the opening 15 to be 10 to 15 μm × 30.
It can be designed in a regular set pattern such that three of them are arranged in parallel with a size of μm. Alternatively, the width of the small opening 15a is 20 μm or 25 μm from left to right in the figure.
A random set pattern may be designed so that m and 15 μm are obtained.

Thereafter, as shown in FIG. 4C, a bump electrode 16 is formed by plating Au with a thickness of about 10 μm by, for example, an electroplating method using a photoresist (not shown) as a mask. As a result, the semiconductor device shown in FIG. 1 is manufactured.

As described above, in the method of manufacturing a semiconductor device according to the present invention, the surface protection film 14 is laminated on the electrode pad 13, the opening 15 is formed in the surface protection film 14, and then the opening 15 is formed. In the method of forming the bump electrode 16 so as to be in contact with the electrode pad 13 through the portion 15, in the step of forming the opening 15, the surface protective film 14 is partially formed in the region immediately above the electrode pad 13. And regularly removing to form a patterned opening.

That is, in the above-mentioned manufacturing method, in the step of forming the opening 15, the patterned opening 15 is formed using a photomask or the like. As a result, the opening 15
Since it is possible to reduce the step above the bump electrode 16, it is possible to form the bump electrode 16 having very few irregularities without any special process or cost.

In the semiconductor device according to the present invention, it is preferable that the electrode pad 13 which is the base layer of the surface protection film 14 is Al or its alloy. At this time, as shown in FIG. A barrier layer 18 may be formed between and the electrode pad 13.

When gold is used as the material of the bump electrode 16 and Al is used as the material of the electrode pad 13, when the barrier layer 18 is formed between the bump electrode 16 and the electrode pad 13, Au of the bump electrode 16 is formed. The reaction of the electrode pad 13 with Al can be suppressed. Au and Al
When and react with each other, an alloy is formed and the part becomes brittle,
Adhesion becomes poor. Therefore, by forming the barrier layer 18, the reliability of the semiconductor device according to the present invention can be further improved.

The barrier layer 18 is not particularly limited as long as it is made of a material capable of exerting a barrier function, and a conventionally known barrier metal layer can be used. Specifically, for example, titanium (Ti), copper (C
u), nickel (Ni), platinum (Pt), chromium (C
An alloy of two or more kinds of metals selected from r) and palladium (Pd) is preferably used.

The method for forming the barrier layer 18 is not particularly limited. For example, a conventionally known CVD method or the like can be preferably used. Further, the barrier layer 18 is preferably formed only between the bump electrode 16 and the electrode pad 13, as shown in FIG. For example, by using the bump electrode 16 as a mask and using a conventionally known etching technique, the barrier layer 18 can be formed only just below the bump electrode 16.

Since the barrier layer 18 is generally not thick, the surface shape of the barrier layer 18 will inherit the surface shape of the underlying layer. Therefore, although the surface shape of the barrier layer 18 is shown as flat in FIG. 5, in reality, a step is formed according to the shape of the lower surface protective film 14, that is, the pattern type opening.

As described above, in the present invention, the electrode pad is formed at a predetermined position on the surface of the semiconductor substrate, and the surface protective film is formed on the surface of the semiconductor substrate except a part of the surface of the electrode pad. When the bump electrode is provided so as to come into contact with the electrode pad through the opening where the surface protective film is not formed, the pattern of the surface protective film is present in the area inside the opening.

With this, since the step above the opening can be relaxed, it is possible to form the bump electrode having very few irregularities without any special process or cost. As a result, it is possible not only to provide a semiconductor device in which the head of the bump electrode is flat, but also to increase the number of steps and the need for capital investment, and it is possible to significantly reduce the cost as compared with the prior art.

The semiconductor device or the method for manufacturing the same according to the present invention can be suitably used for the purpose of reducing the size and weight of a semiconductor integrated circuit or the like by mounting it in a high density. The present invention can be suitably used for various electronic devices using mounted semiconductor integrated circuits and the like, for example, small and lightweight electronic devices such as mobile phones and personal digital assistants, and manufacturing thereof.

[0076]

As described above, in the semiconductor device according to the present invention, an opening is formed in the surface protection film laminated on the electrode pad, and the bump electrode is contacted with the electrode pad through the opening. In the semiconductor device provided with, the opening is a pattern-type opening formed by partially removing the surface protection film in a region directly above the electrode pad.

Therefore, in the above-mentioned structure, the pattern type opening in which the surface protective film is partially and regularly left is formed, so that the level difference between the surface of the surface protective film and the surface of the electrode pad is improved. . Therefore, even if the bump electrode is formed above the opening by plating, the head of the bump electrode does not have a concave shape, and the flatness is improved. As a result, it is possible to increase the contact area between the bump electrode and the inner lead without adding a new process, and to provide a semiconductor device having high reliability without increasing the manufacturing cost. There is an effect that can be.

In the semiconductor device according to the present invention, in addition to the above-mentioned structure, the shape of the pattern-type opening is formed so that an aggregate pattern of a plurality of small openings or a surface protective film is left in an island shape. The groove pattern is one of the groove patterns.

Therefore, in the above-mentioned structure, since it is a collective pattern composed of a plurality of small openings and a groove pattern in which the surface protective film is left in the form of a plurality of islands, the level difference of the base due to the existence of the openings can be reduced. It will be easier to improve. Therefore, the flatness of the head portion of the bump electrode can be further improved.

In addition to the above structure, the semiconductor device according to the present invention has a structure in which gold or an alloy containing gold is used as the material of the bump electrode. Further, the semiconductor device according to the present invention has the structure described above. Thus, a barrier layer is formed between the bump electrode and the electrode pad.

Therefore, in each of the above-described structures, gold (Au) or an alloy containing gold is more preferably used as the material of the bump electrode to form the barrier layer between the bump electrode and the electrode pad. It is possible to suppress the reaction between the gold of the bump electrode and the material (for example, aluminum) of the electrode pad. As a result, with each of the above configurations, there is an effect that the reliability of the semiconductor device according to the present invention can be further enhanced.

[Brief description of drawings]

FIG. 1 is a schematic sectional view showing an example of a semiconductor device according to the present invention.

2A and 2B are plan views showing an example of an aggregate pattern which is an example of a pattern type opening formed in the semiconductor device shown in FIG.

3 is a plan view showing an example of a groove pattern which is another example of the pattern type opening formed in the semiconductor device shown in FIG.

4A to 4C are schematic views showing manufacturing steps of the semiconductor device shown in FIG.

FIG. 5 is a schematic cross-sectional view showing another example of the semiconductor device according to the present invention.

FIG. 6 is a schematic cross-sectional view showing an example of a conventional semiconductor device.

7A to 7C are schematic diagrams showing manufacturing steps of the conventional semiconductor device shown in FIG.

[Explanation of symbols]

13 electrode pads 14 Surface protection film 15 openings 16 bump electrode 18 Barrier layer

Claims (4)

[Claims] 1. A semiconductor device in which an opening is formed in a surface protective film laminated on an electrode pad, and a bump electrode is provided so as to come into contact with the electrode pad through the opening. A semiconductor device having a pattern type opening formed by partially removing the surface protective film in a region directly above the electrode pad. 2. The shape of the pattern type opening is either a collective pattern composed of a plurality of small openings or a groove pattern formed so as to leave the surface protective film in an island shape. The semiconductor device according to claim 1, wherein the semiconductor device is a semiconductor device. 3. The semiconductor device according to claim 1, wherein gold or an alloy containing gold is used as a material for the bump electrodes. 4. The semiconductor device according to claim 3, wherein a barrier layer is formed between the bump electrode and the electrode pad.