JP2003297077A5 - - Google Patents

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Publication number
JP2003297077A5
JP2003297077A5 JP2002099062A JP2002099062A JP2003297077A5 JP 2003297077 A5 JP2003297077 A5 JP 2003297077A5 JP 2002099062 A JP2002099062 A JP 2002099062A JP 2002099062 A JP2002099062 A JP 2002099062A JP 2003297077 A5 JP2003297077 A5 JP 2003297077A5
Authority
JP
Japan
Prior art keywords
pull
driving
pmos transistor
transistor
nmos transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002099062A
Other languages
English (en)
Japanese (ja)
Other versions
JP2003297077A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2002099062A priority Critical patent/JP2003297077A/ja
Priority claimed from JP2002099062A external-priority patent/JP2003297077A/ja
Priority to US10/403,120 priority patent/US7064972B2/en
Publication of JP2003297077A publication Critical patent/JP2003297077A/ja
Publication of JP2003297077A5 publication Critical patent/JP2003297077A5/ja
Pending legal-status Critical Current

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JP2002099062A 2002-04-01 2002-04-01 強誘電体メモリ装置 Pending JP2003297077A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2002099062A JP2003297077A (ja) 2002-04-01 2002-04-01 強誘電体メモリ装置
US10/403,120 US7064972B2 (en) 2002-04-01 2003-04-01 Ferroelectric memory device and read control method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002099062A JP2003297077A (ja) 2002-04-01 2002-04-01 強誘電体メモリ装置

Publications (2)

Publication Number Publication Date
JP2003297077A JP2003297077A (ja) 2003-10-17
JP2003297077A5 true JP2003297077A5 (enExample) 2005-06-30

Family

ID=29388070

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002099062A Pending JP2003297077A (ja) 2002-04-01 2002-04-01 強誘電体メモリ装置

Country Status (2)

Country Link
US (1) US7064972B2 (enExample)
JP (1) JP2003297077A (enExample)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7349237B2 (en) * 2003-07-02 2008-03-25 Texas Instruments Incorporated Plateline driver with RAMP rate control
JP4091577B2 (ja) * 2004-07-20 2008-05-28 株式会社東芝 強誘電体メモリ
JP4615371B2 (ja) * 2005-05-25 2011-01-19 Ｏｋｉセミコンダクタ株式会社 強誘電体メモリ
JP2008102982A (ja) * 2006-10-17 2008-05-01 Toshiba Corp 強誘電体メモリ
JP2008108355A (ja) * 2006-10-25 2008-05-08 Toshiba Corp 強誘電体半導体記憶装置及び強誘電体半導体記憶装置の読み出し方法
US7827391B2 (en) 2007-06-26 2010-11-02 International Business Machines Corporation Method and apparatus for single-stepping coherence events in a multiprocessor system under software control
US8140925B2 (en) 2007-06-26 2012-03-20 International Business Machines Corporation Method and apparatus to debug an integrated circuit chip via synchronous clock stop and scan
US7873843B2 (en) * 2007-06-26 2011-01-18 International Business Machines Corporation Static power reduction for midpoint-terminated busses
US8010875B2 (en) 2007-06-26 2011-08-30 International Business Machines Corporation Error correcting code with chip kill capability and power saving enhancement
US7802025B2 (en) 2007-06-26 2010-09-21 International Business Machines Corporation DMA engine for repeating communication patterns
US7984448B2 (en) 2007-06-26 2011-07-19 International Business Machines Corporation Mechanism to support generic collective communication across a variety of programming models
US8230433B2 (en) 2007-06-26 2012-07-24 International Business Machines Corporation Shared performance monitor in a multiprocessor system
US8032892B2 (en) 2007-06-26 2011-10-04 International Business Machines Corporation Message passing with a limited number of DMA byte counters
US8468416B2 (en) 2007-06-26 2013-06-18 International Business Machines Corporation Combined group ECC protection and subgroup parity protection
US8458282B2 (en) 2007-06-26 2013-06-04 International Business Machines Corporation Extended write combining using a write continuation hint flag
US7877551B2 (en) 2007-06-26 2011-01-25 International Business Machines Corporation Programmable partitioning for high-performance coherence domains in a multiprocessor system
US7886084B2 (en) 2007-06-26 2011-02-08 International Business Machines Corporation Optimized collectives using a DMA on a parallel computer
US8108738B2 (en) 2007-06-26 2012-01-31 International Business Machines Corporation Data eye monitor method and apparatus
US8103832B2 (en) * 2007-06-26 2012-01-24 International Business Machines Corporation Method and apparatus of prefetching streams of varying prefetch depth
US8756350B2 (en) 2007-06-26 2014-06-17 International Business Machines Corporation Method and apparatus for efficiently tracking queue entries relative to a timestamp
US7793038B2 (en) 2007-06-26 2010-09-07 International Business Machines Corporation System and method for programmable bank selection for banked memory subsystems
US8509255B2 (en) 2007-06-26 2013-08-13 International Business Machines Corporation Hardware packet pacing using a DMA in a parallel computer
US9608624B2 (en) * 2014-03-06 2017-03-28 Mediatek Inc. Apparatus for performing signal driving with aid of metal oxide semiconductor field effect transistor
US9230618B2 (en) * 2014-03-06 2016-01-05 Kabushiki Kaisha Toshiba Semiconductor storage device
US10283181B2 (en) 2016-03-01 2019-05-07 Texas Instruments Incorporated Time tracking circuit for FRAM
CN115623775B (zh) * 2021-07-13 2025-08-19 长鑫存储技术有限公司 字线驱动器、字线驱动器阵列及半导体结构
US20240371425A1 (en) * 2023-05-01 2024-11-07 Micron Technology, Inc. Compensating for voltage offset in memory

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3766181B2 (ja) * 1996-06-10 2006-04-12 株式会社東芝 半導体記憶装置とそれを搭載したシステム
KR100583090B1 (ko) * 2003-05-30 2006-05-23 주식회사 하이닉스반도체 강유전체 레지스터의 캐패시터 제조방법

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