JP2003283063A - Ceramic circuit board - Google Patents

Ceramic circuit board

Info

Publication number
JP2003283063A
JP2003283063A JP2002081863A JP2002081863A JP2003283063A JP 2003283063 A JP2003283063 A JP 2003283063A JP 2002081863 A JP2002081863 A JP 2002081863A JP 2002081863 A JP2002081863 A JP 2002081863A JP 2003283063 A JP2003283063 A JP 2003283063A
Authority
JP
Japan
Prior art keywords
circuit board
semiconductor element
heat
metal plate
ceramic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2002081863A
Other languages
Japanese (ja)
Other versions
JP3934966B2 (en
Inventor
Takayuki Miyao
貴幸 宮尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2002081863A priority Critical patent/JP3934966B2/en
Publication of JP2003283063A publication Critical patent/JP2003283063A/en
Application granted granted Critical
Publication of JP3934966B2 publication Critical patent/JP3934966B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

Landscapes

  • Structure Of Printed Boards (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To solve a problem that heat cannot be dissipated well because the thickness of a thermally conductive composite increases depending on the warp or waving of a substrate to block the passage for dissipating heat from a semiconductor element. <P>SOLUTION: A metal circuit board 3 for mounting a semiconductor element 7 is fixed to the upper surface of a ceramic substrate 2 having the lower surface fixed with a metal plate 4 being packaged on a heat dissipating member 6 through a thermally conductive composite 5. In such a ceramic circuit board 1, a groove 8 is made in the surface of the metal plate 4 being packaged on the heat dissipating member 6 at a part of distance H of the overall thickness of the ceramic circuit board 1 from the outer circumference of the semiconductor element 7. Since the thermally conductive composite 5 immediately below the semiconductor element 7 or on the periphery thereof intrudes into the groove 8 at the time of bonding the ceramic circuit board 1 to the heat dissipating member 6 through the thermally conductive composite 5, the thermally conductive composite 5 having a relatively low thermal conductivity can be made thinner at the time of bonding resulting in the enhancement of heat dissipation characteristics. <P>COPYRIGHT: (C)2004,JPO

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、セラミック基板に
金属回路板を接合したセラミック回路基板に関するもの
である。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ceramic circuit board obtained by joining a metal circuit board to a ceramic board.

【0002】[0002]

【従来の技術】近年、パワーモジュール用基板やスイッ
チングモジュール用基板等の回路基板として、セラミッ
ク基板上に活性金属ロウ材を介して銅等から成る金属回
路板を直接接合させたセラミック回路基板が用いられて
いる。
2. Description of the Related Art In recent years, a ceramic circuit board in which a metal circuit board made of copper or the like is directly bonded onto a ceramic board via an active metal brazing material has been used as a circuit board such as a power module board or a switching module board. Has been.

【0003】図3に従来のセラミック回路基板を用いた
半導体モジュールの例を断面図で示す。図3において、
11はセラミック回路基板を示し、このセラミック回路基
板11は、セラミック基板12と、その上面に取着された複
数の金属回路板13と、セラミック基板12の下面にこれら
金属回路板13と対向させて取着された金属板14とから構
成されている。そして、このようなセラミック回路基板
11は、金属回路板13上に半導体素子17等の電子部品が搭
載され、放熱部材16上に金属板14との間に伝熱性組成物
15を介在させて接合実装されることにより、半導体モジ
ュールとして使用される。
FIG. 3 is a sectional view showing an example of a semiconductor module using a conventional ceramic circuit board. In FIG.
Reference numeral 11 denotes a ceramic circuit board. The ceramic circuit board 11 includes a ceramic board 12, a plurality of metal circuit boards 13 attached to the upper surface thereof, and a lower surface of the ceramic board 12 facing the metal circuit boards 13. It is composed of a metal plate 14 attached. And such a ceramic circuit board
Reference numeral 11 denotes a heat conductive composition in which an electronic component such as a semiconductor element 17 is mounted on a metal circuit board 13 and a metal plate 14 is provided on a heat dissipation member 16.
It is used as a semiconductor module by being bonded and mounted with 15 interposed.

【0004】かかるセラミック回路基板11は、酸化アル
ミニウム質焼結体から成るセラミック基板12を用いる場
合には、具体的には以下の方法によって製作される。
When the ceramic substrate 12 made of a sintered aluminum oxide material is used, the ceramic circuit board 11 is manufactured by the following method.

【0005】まず、酸化アルミニウム・酸化珪素・酸化
マグネシウム・酸化カルシウム等の原料粉末に適当な有
機バインダ・可塑剤・溶剤等を添加混合して泥漿状と成
すとともに、これを従来周知のドクターブレード法やカ
レンダーロール法等のテープ成形技術を採用して複数の
セラミックグリーンシートを得た後、所定寸法に成形
し、次に、セラミックグリーンシートを必要に応じて上
下に積層するとともに還元雰囲気中にて約1600℃の温度
で焼成し、セラミックグリーンシートを焼結一体化させ
て酸化アルミニウム質焼結体から成るセラミック基板12
を作製する。
First, a raw material powder of aluminum oxide, silicon oxide, magnesium oxide, calcium oxide, etc. is mixed with an appropriate organic binder, a plasticizer, a solvent, etc. to form a sludge, and this is formed by a conventionally known doctor blade method. After obtaining a plurality of ceramic green sheets by adopting tape forming technology such as the calender roll method or the like, they are formed into a predetermined size, and then the ceramic green sheets are laminated on top and bottom as needed and in a reducing atmosphere. A ceramic substrate 12 made of an aluminum oxide sintered body by firing at a temperature of about 1600 ° C. to integrally sinter the ceramic green sheets.
To make.

【0006】次に、銀−銅合金にチタン・ジルコニウム
・ハフニウムおよびこれらの水素化物の少なくとも1種
を添加した活性金属粉末に有機溶剤・溶媒を添加混合し
てロウ材ペーストを調製し、セラミック基板12の両主面
上に塗布する。
Next, a brazing paste is prepared by adding and mixing an organic solvent and a solvent to an active metal powder obtained by adding at least one of titanium, zirconium, and hafnium to a silver-copper alloy to prepare a brazing paste. Apply on 12 major surfaces.

【0007】次に、セラミック基板12上面にロウ材ペー
ストを間に挟んで銅等から成る複数の金属回路板13を載
置し、一方、これに対向するセラミック基板12の下面に
は同様にロウ材ペーストを間に挟んで銅等から成る金属
板14を配置する。
Next, a plurality of metal circuit boards 13 made of copper or the like are placed on the upper surface of the ceramic substrate 12 with a brazing paste interposed therebetween, while the lower surface of the ceramic substrate 12 facing the metal circuit boards 13 is similarly soldered. A metal plate 14 made of copper or the like is arranged with a material paste interposed therebetween.

【0008】そして最後に、セラミック基板12と金属回
路板13との間およびセラミック基板12と金属板14との間
に配されているロウ材ペーストを非酸化性雰囲気中にて
約900℃の温度に加熱して溶融させ、このロウ材でセラ
ミック基板12と金属回路板13とを、およびセラミック基
板12と金属板14とを接合することによって製作される。
Finally, the brazing paste placed between the ceramic substrate 12 and the metal circuit board 13 and between the ceramic substrate 12 and the metal plate 14 is heated at a temperature of about 900 ° C. in a non-oxidizing atmosphere. It is manufactured by heating to melt the ceramic substrate 12 and the metal circuit board 13 and the ceramic substrate 12 and the metal plate 14 with this brazing material.

【0009】このように製作されたセラミック回路基板
11は、IGBT(Insulated Gate Bipolar Transisto
r)やMOS−FET(Metal Oxide Semiconductor - F
ield Effect Transistor)等の半導体素子17等の電子部
品を半田等の接着剤を介して接合した後、例えば、アル
ミニウム等の放熱部材16に半田で接合されることによ
り、半導体素子17の動作時の発熱を良好に放熱させる半
導体モジュールとなる。
Ceramic circuit board manufactured in this way
11 is an IGBT (Insulated Gate Bipolar Transisto)
r) and MOS-FET (Metal Oxide Semiconductor-F
After connecting the electronic components such as the semiconductor element 17 such as the yield effect transistor) via an adhesive such as solder, for example, by joining to the heat dissipation member 16 such as aluminum with the solder, It becomes a semiconductor module that radiates heat well.

【0010】しかしながら、セラミック回路基板11(熱
膨張係数が約3〜10×10-6/℃)と放熱部材16(熱膨張
係数が約18〜23×10-6/℃)の熱膨張係数が大きく相違
することから、セラミック回路基板11と放熱部材16との
間の半田にクラックが発生し、剥離が生じて信頼性が著
しく劣化する場合がある。このため、半田に変えてグリ
ース状の伝熱性組成物15を介してセラミック回路基板11
と放熱部材16とを接合実装する構成が採用されている。
However, the coefficient of thermal expansion of the ceramic circuit board 11 (coefficient of thermal expansion of about 3 to 10 × 10 −6 / ° C.) and the heat dissipation member 16 (coefficient of thermal expansion of about 18 to 23 × 10 −6 / ° C.) Due to the large difference, the solder between the ceramic circuit board 11 and the heat dissipation member 16 may be cracked and peeled off, resulting in a significant deterioration in reliability. For this reason, the ceramic circuit board 11 is replaced with the grease-like heat transfer composition 15 instead of solder.
A structure in which the heat radiation member 16 and the heat radiation member 16 are joined and mounted is adopted.

【0011】[0011]

【発明が解決しようとする課題】しかしながら、グリー
ス状の伝熱性組成物15は低熱伝導のため、セラミック回
路基板11と放熱部材16との間の伝熱性組成物15が厚くな
ると、半導体素子17からの放熱経路が遮断されて良好な
熱放散を行なえなくなってしまい、半導体素子17に熱破
壊や特性の劣化を招来して半導体素子17を安定に信頼性
よく作動させることができなくなるという問題点を有し
ていた。
However, since the grease-like heat-conductive composition 15 has low heat conductivity, when the heat-conductive composition 15 between the ceramic circuit board 11 and the heat dissipation member 16 becomes thick, the semiconductor element 17 will be removed. Since the heat radiation path of is blocked, it becomes impossible to dissipate the heat well, which causes the semiconductor element 17 to be thermally destroyed or the characteristics to be deteriorated, so that the semiconductor element 17 cannot be operated stably and reliably. Had.

【0012】また、セラミック基板12自体に若干のうね
りが生じていること、また、セラミック基板12のサイズ
や金属回路板13の回路パターンおよびセラミック基板12
の厚みにより、最適な金属回路板13や金属板14の厚みを
設計する必要があるが、セラミック回路基板11の裏面を
完全に平坦にすることは非常に困難である。従って、伝
熱性組成物15を介してセラミック回路基板11を放熱部材
16に接合する際、セラミック回路基板11を押さえつけて
も、半導体素子17の温度上昇に影響のある半導体素子17
の下方の伝熱性組成物15は、伝熱性組成物15自体の粘
性、さらにはセラミック基板12のうねりが障害になるた
め、十分に金属板14より外に流れ出ない傾向があり、そ
の結果、半導体素子17の下方の伝熱性組成物15の厚みを
薄くするのが困難であるという問題点もあった。
Further, the ceramic substrate 12 itself has some undulations, the size of the ceramic substrate 12, the circuit pattern of the metal circuit board 13 and the ceramic substrate 12.
Although it is necessary to design the optimum thickness of the metal circuit board 13 and the metal plate 14 depending on the thickness of the ceramic circuit board, it is very difficult to completely flatten the back surface of the ceramic circuit board 11. Therefore, the ceramic circuit board 11 is radiated through the heat transfer composition 15.
Even when the ceramic circuit board 11 is pressed down when bonding to the semiconductor element 17, the semiconductor element 17 which has an influence on the temperature rise of the semiconductor element 17
The heat conductive composition 15 below the heat conductive composition 15 itself has a tendency that the viscosity of the heat conductive composition 15 itself and further the swell of the ceramic substrate 12 impede, so that the heat conductive composition 15 does not sufficiently flow out of the metal plate 14. There is also a problem that it is difficult to reduce the thickness of the heat conductive composition 15 below the element 17.

【0013】本発明は以上のような従来の技術における
問題点を解決すべく案出されたものであり、その目的
は、熱伝導率が相対的に低い伝熱性組成物を薄くして熱
抵抗の増加を防ぐことができ、放熱特性が良好であり、
金属回路板上に搭載される半導体素子等の電子部品を長
期にわたり安定して作動させることができるセラミック
回路基板を提供することにある。
The present invention has been devised to solve the problems in the prior art as described above, and an object thereof is to reduce the heat resistance of a heat conductive composition having a relatively low thermal conductivity. Can be prevented from increasing, and the heat dissipation characteristics are good,
An object of the present invention is to provide a ceramic circuit board that can stably operate electronic components such as semiconductor elements mounted on a metal circuit board for a long period of time.

【0014】[0014]

【課題を解決するための手段】本発明のセラミック回路
基板は、セラミック基板の上面に半導体素子が搭載され
る金属回路板を、下面に金属板を取着して成り、この金
属板が伝熱性組成物を介して放熱部材に実装されるセラ
ミック回路基板であって、前記金属板は、前記放熱部材
に実装される面に、半導体素子の外周からセラミック回
路基板の全厚みの距離の部位に溝が形成されていること
を特徴とするものである。
A ceramic circuit board of the present invention is formed by attaching a metal circuit board on which a semiconductor element is mounted on the upper surface of the ceramic substrate and a metal plate on the lower surface, and the metal plate is heat conductive. A ceramic circuit board mounted on a heat dissipation member via a composition, wherein the metal plate has a groove on a surface mounted on the heat dissipation member at a position at a distance of the entire thickness of the ceramic circuit board from the outer periphery of the semiconductor element. Are formed.

【0015】また、本発明のセラミック回路基板は、上
記構成において、前記溝の深さTが0.01≦T≦0.15
(mm)であり、かつ前記溝の幅Sが前記半導体素子の
外辺の長さLに対して、(0.18−0.91T)×L≦S≦0.
4L(mm)であることを特徴とするものである。
Further, in the ceramic circuit board of the present invention, in the above structure, the groove depth T is 0.01 ≦ T ≦ 0.15.
(Mm) and the width S of the groove is (0.18−0.91T) × L ≦ S ≦ 0 with respect to the length L of the outer side of the semiconductor element.
It is characterized by being 4 L (mm).

【0016】本発明のセラミック回路基板によれば、金
属板は、放熱部材に実装される面に、半導体素子の外周
からセラミック回路基板の全厚みの距離の部位に溝が形
成されていることから、セラミック回路基板を放熱部材
に伝熱性組成物を介して接合する際に、この溝に金属板
の半導体素子の直下およびその周囲から放熱部材との間
にある伝熱性組成物を侵入させて、金属板の半導体素子
の直下およびその周囲の部分と放熱部材との間に介在す
る熱伝導率が相対的に低い伝熱性組成物の厚みを薄くし
て接合することが可能となるため、金属板と放熱部材と
の間における熱抵抗の増加を防ぐことができる。その結
果、放熱性を改善したセラミック回路基板を提供するこ
とができる。
According to the ceramic circuit board of the present invention, since the metal plate is provided with the groove on the surface mounted on the heat dissipation member, at a portion of the entire thickness of the ceramic circuit board from the outer periphery of the semiconductor element. , When the ceramic circuit board is joined to the heat dissipation member via the heat transfer composition, the heat transfer composition between the heat dissipation member and under the semiconductor element of the metal plate is allowed to intrude into this groove, Since it is possible to reduce the thickness of the heat transfer composition interposed between the heat dissipation member and the portion of the metal plate immediately below and around the semiconductor element and the heat dissipation member, the metal plate can be bonded. It is possible to prevent an increase in thermal resistance between the heat radiation member and the heat radiation member. As a result, a ceramic circuit board with improved heat dissipation can be provided.

【0017】また、本発明のセラミック回路基板によれ
ば、溝の深さTが0.01≦T≦0.15(mm)であり、かつ
溝の幅Sが半導体素子の外辺の長さLに対して、(0.18
−0.91T)×L≦S≦0.4L(mm)であるものとした
ときには、金属板の半導体素子の直下およびその周囲に
ある伝熱性組成物が入り込むのに充分な空間が溝に形成
されるので、セラミック回路基板を放熱部材に伝熱性組
成物を介して接合する際に、この溝に半導体素子の直下
およびその周囲から充分な量の伝熱性組成物を侵入させ
ることができ、金属板の半導体素子の直下およびその周
囲の部分と放熱部材との間に介在する熱伝導率が相対的
に低い伝熱性組成物を充分に薄くして接合することが可
能となるため、金属板と放熱部材との間における熱抵抗
の増加を確実に防ぐことができる。また、金属板の厚み
が薄くなりすぎて強度が弱くなったり、セラミック回路
基板と金属板との接合時の熱負荷により変形して基板の
平坦度が保てなくなったりするということがない。
Further, according to the ceramic circuit board of the present invention, the depth T of the groove is 0.01≤T≤0.15 (mm), and the width S of the groove is relative to the length L of the outer side of the semiconductor element. , (0.18
-0.91T) × L ≦ S ≦ 0.4L (mm), a space is formed in the groove just below and around the semiconductor element of the metal plate, which is sufficient for the heat transfer composition to enter. Therefore, when joining the ceramic circuit board to the heat dissipation member via the heat conductive composition, a sufficient amount of the heat conductive composition can be made to enter into this groove from directly under the semiconductor element and its surroundings. Since it is possible to sufficiently thin and bond the heat conductive composition having a relatively low thermal conductivity, which is interposed between the heat dissipation member and the portion immediately below and around the semiconductor element, the metal plate and the heat dissipation member. It is possible to reliably prevent an increase in the thermal resistance between and. Further, the thickness of the metal plate does not become too thin and the strength thereof does not weaken, and the heat load at the time of joining the ceramic circuit board and the metal plate does not deform so that the flatness of the board cannot be maintained.

【0018】このような構成により、本発明のセラミッ
ク回路基板によれば、放熱特性が良好であり、金属回路
板上に搭載される半導体素子等の電子部品を長期にわた
り安定して作動させることができるものとなる。
With such a structure, according to the ceramic circuit board of the present invention, the heat dissipation characteristics are good, and electronic components such as semiconductor elements mounted on the metal circuit board can be stably operated for a long period of time. It will be possible.

【0019】[0019]

【発明の実施の形態】次に、本発明のセラミック回路基
板の実施の形態の例を添付図面に基づき詳細に説明す
る。
BEST MODE FOR CARRYING OUT THE INVENTION Next, an example of an embodiment of a ceramic circuit board of the present invention will be described in detail with reference to the accompanying drawings.

【0020】図1は、本発明のセラミック回路基板1を
用いた半導体モジュールの一例を示す断面図であり、2
はセラミック基板、3は金属回路板、4は金属板、5は
伝熱性組成物、6は放熱部材、7は電子部品としての半
導体素子、8は溝である。また、図2は本発明のセラミ
ック回路基板1を金属板4側から見た場合の金属板4の
平面図である。
FIG. 1 is a sectional view showing an example of a semiconductor module using the ceramic circuit board 1 of the present invention.
Is a ceramic substrate, 3 is a metal circuit board, 4 is a metal plate, 5 is a heat conductive composition, 6 is a heat dissipation member, 7 is a semiconductor element as an electronic component, and 8 is a groove. FIG. 2 is a plan view of the metal plate 4 when the ceramic circuit board 1 of the present invention is viewed from the metal plate 4 side.

【0021】セラミック基板2は、金属回路板3および
金属板4を支持する支持部材として機能し、酸化アルミ
ニウム(Al23)質焼結体・ムライト(3Al23
2SiO2)質焼結体・炭化珪素(SiC)質焼結体・
窒化アルミニウム(AlN)質焼結体・窒化珪素(Si
34)質焼結体等のセラミック材料で形成されている。
The ceramic substrate 2 functions as a support member for supporting the metal circuit board 3 and the metal plate 4, and is made of an aluminum oxide (Al 2 O 3 ) based sintered material or mullite (3Al 2 O 3. ).
2SiO 2 ) -based sintered body, silicon carbide (SiC) -based sintered body,
Aluminum nitride (AlN) -based sintered material, silicon nitride (Si
3 N 4 ) A ceramic material such as a sintered body.

【0022】セラミック基板2は、機械的強度が強く、
高靭性な窒化珪素質焼結体で形成されていることが好ま
しい。また、金属回路板3上に搭載される半導体素子7
が発生する熱を金属回路板3から金属板4へと有効に伝
導して放散させ、セラミック回路基板1の放熱特性を向
上させるためには、セラミック基板2の熱伝導率が少な
くとも60W/m・K以上であることが好ましく、特に80
W/m・K以上、さらには100W/m・K以上であるこ
とが好ましい。
The ceramic substrate 2 has high mechanical strength,
It is preferably made of a high toughness silicon nitride sintered body. In addition, the semiconductor element 7 mounted on the metal circuit board 3
In order to effectively conduct and dissipate the heat generated by the metal circuit board 3 to the metal plate 4 and improve the heat dissipation characteristics of the ceramic circuit board 1, the thermal conductivity of the ceramic board 2 is at least 60 W / m. It is preferably K or more, particularly 80
It is preferably W / m · K or more, more preferably 100 W / m · K or more.

【0023】セラミック基板2は、例えば窒化珪素質焼
結体で形成されている場合であれば、まず、窒化珪素粉
末に希土類酸化物粉末や酸化アルミニウム粉末等の焼結
助剤を添加・混合して窒化珪素質焼結体原料粉末を調整
する。次いで、窒化珪素質焼結体原料粉末に有機バイン
ダおよび分散媒を添加・混合してペースト化し、このペ
ーストをドクターブレード法等の通常の成形法でシート
状に成形して窒化珪素質グリーンシートを作製する。こ
のような窒化珪素質グリーンシートを必要枚数積層し、
プレス加工等を施して圧着(加圧接着)して窒化珪素質
成形体を作製する。この後、窒化珪素質成形体を空気中
もしくは窒素雰囲気等の非酸化性雰囲気中で脱脂処理し
た後、窒素雰囲気等の非酸化性雰囲気中で焼成して、目
的とするセラミック基板2を得る。
If the ceramic substrate 2 is formed of, for example, a silicon nitride sintered body, first, a sintering aid such as rare earth oxide powder or aluminum oxide powder is added to and mixed with silicon nitride powder. A raw material powder of silicon nitride sintered material is prepared. Next, an organic binder and a dispersion medium are added to and mixed with the raw material powder of a silicon nitride sintered material to form a paste, and the paste is molded into a sheet by an ordinary molding method such as a doctor blade method to obtain a silicon nitride green sheet. Create. Laminating the required number of such silicon nitride green sheets,
A silicon nitride molded body is produced by performing press working and pressure bonding (pressure bonding). After that, the silicon nitride compact is degreased in air or in a non-oxidizing atmosphere such as a nitrogen atmosphere, and then fired in a non-oxidizing atmosphere such as a nitrogen atmosphere to obtain the desired ceramic substrate 2.

【0024】また、セラミック基板2は、セラミック回
路基板1の機械的強度を向上させつつ放熱特性を劣化さ
せないためには、その厚みを0.2〜1.0mmとすることが
好ましい。0.2mm未満では、セラミック基板2と金属
回路板3および金属板4とを接合したときに発生する応
力により、セラミック基板2に割れ等が発生しやすくな
る傾向がある。他方、1.0mmを超えると、半導体素子
7から発生する熱を良好に放熱部材6に伝達することが
困難となる傾向がある。
The ceramic substrate 2 preferably has a thickness of 0.2 to 1.0 mm in order to improve the mechanical strength of the ceramic circuit substrate 1 and not deteriorate the heat radiation characteristics. If the thickness is less than 0.2 mm, the ceramic substrate 2 tends to be cracked or the like due to the stress generated when the ceramic substrate 2 is bonded to the metal circuit board 3 and the metal plate 4. On the other hand, if it exceeds 1.0 mm, it tends to be difficult to satisfactorily transfer the heat generated from the semiconductor element 7 to the heat dissipation member 6.

【0025】本発明のセラミック回路基板1は、上記の
ように製造したセラミック基板2の上面および下面に、
直接接合法や活性金属法を用いて導電性を有する銅やア
ルミニウム等の金属材料から成る金属回路板3および金
属板4をそれぞれ一体的に接合して製造される。
The ceramic circuit board 1 of the present invention is formed on the upper and lower surfaces of the ceramic board 2 manufactured as described above.
The metal circuit board 3 and the metal plate 4 made of a metal material having conductivity such as copper and aluminum are integrally bonded to each other by a direct bonding method or an active metal method.

【0026】例えば、活性金属法を用いる場合であれ
ば、銀−銅合金粉末等から成る銀ロウ粉末や、アルミニ
ウム−シリコン合金粉末等から成るアルミニウムロウ粉
末に、チタン・ジルコニウム・ハフニウム等の活性金属
やその水素化物の少なくとも1種からなる活性金属粉末
を2〜5重量%添加した活性金属ロウ材に、適当な有機
溶剤・溶媒を添加混合して得た活性金属ロウ材ペースト
を、セラミック基板2の上下面に従来周知のスクリーン
印刷技術を用いて金属回路板3および金属板4に対応さ
せた所定パターンに印刷する。
For example, when the active metal method is used, silver braze powder made of silver-copper alloy powder or aluminum braze powder made of aluminum-silicon alloy powder is added to active metal such as titanium, zirconium or hafnium. An active metal brazing material paste obtained by adding and mixing an appropriate organic solvent / solvent to an active metal brazing material containing 2 to 5% by weight of an active metal powder composed of at least one of hydrides and hydrides thereof is used as a ceramic substrate 2 A predetermined pattern corresponding to the metal circuit board 3 and the metal plate 4 is printed on the upper and lower surfaces using a conventionally known screen printing technique.

【0027】その後、金属回路板3および金属板4を活
性金属ロウ材ペーストのパターン上に載置し、これを真
空中または中性もしくは還元雰囲気中で、所定温度(銀
ロウの場合であれば約900℃、アルミニウムロウ材の場
合であれば約600℃)で加熱処理し、活性金属ロウ材を
溶融させて、セラミック基板2の上下面と金属回路板3
および金属板4とを接合させる。これにより、セラミッ
ク基板2の上下面に金属回路板3および金属板4が取着
されることとなる。
After that, the metal circuit board 3 and the metal plate 4 are placed on the pattern of the active metal brazing material paste, and this is placed in a vacuum or in a neutral or reducing atmosphere at a predetermined temperature (in the case of silver brazing, it is used). Heat treatment is performed at about 900 ° C. and about 600 ° C. for an aluminum brazing material to melt the active metal brazing material, and the upper and lower surfaces of the ceramic substrate 2 and the metal circuit board 3 are melted.
And the metal plate 4 are joined. As a result, the metal circuit board 3 and the metal plate 4 are attached to the upper and lower surfaces of the ceramic substrate 2.

【0028】銅やアルミニウム等から成る金属回路板3
および金属板4は、銅やアルミニウム等のインゴット
(塊)に圧延加工法や抜き打ち加工法等の従来周知の金
属加工法を施すことによって、例えば、標準の厚さが0.
5mmで、回路パターンの形状または回路パターンおよ
びその回路間の形状に対応する所定のパターン形状に製
作される。金属回路板3および金属板4の標準の厚さ
は、大電流による金属回路板3の発熱を抑制し、金属回
路板3と窒化珪素質焼結体等から成るセラミック基板2
の接合時に接合界面に発生する熱負荷によるクラックの
発生を抑制するためには、0.1〜1.0mmであることが好
ましい。厚みが0.1mm未満では、金属回路板3の電気
抵抗が大きくなるため半導体素子7からの高電流信号を
伝播しにくくなる傾向がある。他方、1.0mmを超える
と、セラミック基板2と金属回路板3および金属板4と
を接合したときに発生する応力により、セラミック基板
2に割れ等が発生しやすくなる傾向がある。
Metal circuit board 3 made of copper or aluminum
And, the metal plate 4 has a standard thickness of, for example, a standard thickness of .0 by subjecting an ingot (lump) of copper or aluminum to a conventionally known metal working method such as a rolling working method or a punching working method.
5 mm, it is manufactured in a predetermined pattern shape corresponding to the shape of the circuit pattern or the shape between the circuit pattern and the circuit. The standard thicknesses of the metal circuit board 3 and the metal plate 4 suppress the heat generation of the metal circuit board 3 due to a large current, and the ceramic substrate 2 composed of the metal circuit board 3 and a silicon nitride sintered body or the like.
In order to suppress the generation of cracks due to the heat load generated at the joining interface during joining, it is preferably 0.1 to 1.0 mm. If the thickness is less than 0.1 mm, the electric resistance of the metal circuit board 3 increases, and it tends to be difficult for a high current signal from the semiconductor element 7 to propagate. On the other hand, when it exceeds 1.0 mm, the ceramic substrate 2 tends to be cracked or the like due to the stress generated when the ceramic substrate 2 is bonded to the metal circuit board 3 and the metal plate 4.

【0029】金属回路板3および金属板4は、銅から成
る場合であれは、これを無酸素銅で形成しておくと、無
酸素銅はロウ付けの際に銅の表面が銅中に存在する酸素
により酸化されることなくロウ材との濡れ性が良好とな
るので、セラミック基板2とのロウ材を介しての接合が
強固になる。したがって、金属回路板3および金属板4
は、これを無酸素銅で形成しておくことが好ましい。
If the metal circuit board 3 and the metal plate 4 are made of copper, if they are made of oxygen-free copper, the surface of the oxygen-free copper is present in the copper during brazing. Since the wettability with the brazing material is improved without being oxidized by the oxygen, the bonding with the ceramic substrate 2 via the brazing material is strengthened. Therefore, the metal circuit board 3 and the metal plate 4
Is preferably formed of oxygen-free copper.

【0030】金属回路板3および金属板4の標準の厚み
と材質は、活性金属によるロウ付け時や半導体素子7等
の電子部品を搭載するためのリフロー時の加熱による反
りを抑制するために、同じ材質の場合には、金属板4の
厚みは金属回路板3の厚みより薄くすることが好まし
い。
The standard thicknesses and materials of the metal circuit board 3 and the metal plate 4 are set in order to suppress warpage due to heating at the time of brazing with an active metal or at the time of reflow for mounting an electronic component such as the semiconductor element 7. When the same material is used, the thickness of the metal plate 4 is preferably thinner than that of the metal circuit board 3.

【0031】また、金属回路板3は、その表面にニッケ
ルから成る良導電性で、かつ耐蝕性およびロウ材との濡
れ性が良好な金属をメッキ法により被着させておくと、
金属回路板3と外部電気回路との電気的接続を良好とす
ることができるとともに、金属回路板3に半導体素子7
等の電子部品を半田を介して強固に接着させることがで
きる。従って、金属回路板3は、その表面にニッケルか
ら成る良導電性で、かつ耐蝕性およびロウ材との濡れ性
が良好な金属をメッキ法により被着させておくことが好
ましい。
If the metal circuit board 3 is made of nickel and has good conductivity, corrosion resistance, and wettability with the brazing material, it is deposited on the surface of the metal circuit board 3 by plating.
The electric connection between the metal circuit board 3 and the external electric circuit can be improved, and the semiconductor element 7 is provided on the metal circuit board 3.
It is possible to firmly bond electronic components such as the above with solder. Therefore, it is preferable that the surface of the metal circuit board 3 is made of nickel, which has good conductivity, corrosion resistance, and wettability with the brazing material by plating.

【0032】金属板4は、放熱部材6に実装される面
に、半導体素子7の外周からセラミック回路基板1の全
厚みの距離(図1および図2にHで示す)の部位に溝8
(図2では白抜き部で示す)が形成されている。このよ
うに溝8を形成したことにより、セラミック回路基板1
を放熱部材6に伝熱性組成物5を介して接合する際に、
金属板4の溝8にその周りから伝熱性組成物5が侵入す
るため、半導体素子7の直下およびその周囲に介在す
る、熱伝導率が相対的に低い伝熱性組成物7の厚みを薄
くして接合することが可能となる。そのため、熱抵抗の
増加を防ぐことができ、放熱性を改善したセラミック回
路基板1を提供することができる。
The metal plate 4 is provided with a groove 8 on the surface to be mounted on the heat dissipation member 6 at a portion of the entire thickness of the ceramic circuit board 1 from the outer periphery of the semiconductor element 7 (shown by H in FIGS. 1 and 2).
(Indicated by a white portion in FIG. 2) is formed. By forming the groove 8 in this manner, the ceramic circuit board 1
When joining the heat-dissipating member 6 with the heat-transmitting composition 5,
Since the heat-conductive composition 5 penetrates into the groove 8 of the metal plate 4 from the periphery thereof, the thickness of the heat-conductive composition 7 interposed immediately below and around the semiconductor element 7 and having a relatively low thermal conductivity is reduced. Can be joined together. Therefore, it is possible to prevent an increase in thermal resistance and provide the ceramic circuit board 1 with improved heat dissipation.

【0033】溝8は、半導体素子7の外周からセラミッ
ク回路基板1の全厚みの距離Hの部位に形成されている
ため、半導体素子7で発生した熱は放熱部材6側へ伝導
する際に約45°の角度で広がるのに対し、その熱伝導経
路に溝8により金属板4の厚みが薄くなっている部分が
ないので、また伝熱性組成物5が侵入して存在している
溝8がないので、金属板4における熱伝導が阻害される
ことはない。
Since the groove 8 is formed at a portion at a distance H of the entire thickness of the ceramic circuit board 1 from the outer periphery of the semiconductor element 7, the heat generated in the semiconductor element 7 is about to be transferred to the heat dissipation member 6 side. While it spreads at an angle of 45 °, since there is no portion where the thickness of the metal plate 4 is thinned by the groove 8 in the heat conduction path, the groove 8 in which the heat conductive composition 5 has penetrated is present. Since it does not exist, heat conduction in the metal plate 4 is not hindered.

【0034】溝8は、半導体素子7の外周からセラミッ
ク回路基板1の全厚みの距離Hの部位より半導体素子7
側にあると、伝熱性組成物5が存在する溝8の影響を受
けて金属板4における熱拡散が阻害されることとなるた
め、熱抵抗が増加する傾向にある。また、溝8が半導体
素子7の外周からセラミック回路基板1の全厚みの距離
Hの部位より離れた位置にあると、セラミック回路基板
1を放熱部材6に伝熱性組成物5を介して接合する際
に、半導体素子7の直下およびその周囲にある伝熱性組
成物5が外側に向かって広がって溝8と放熱部材6との
隙間に侵入するのが困難になり、半導体素子7の直下お
よびその周囲の金属板4と放熱部材6との間に介在する
伝熱性組成物7の厚みを充分に薄くすることができなく
なる傾向がある。
The groove 8 is formed from the portion of the semiconductor element 7 at a distance H from the outer periphery of the semiconductor element 7 to the entire thickness of the ceramic circuit board 1.
On the side, the heat diffusion in the metal plate 4 is hindered by the influence of the groove 8 in which the heat conductive composition 5 is present, so that the thermal resistance tends to increase. Further, when the groove 8 is located away from the outer periphery of the semiconductor element 7 from the portion of the total thickness H of the ceramic circuit board 1, the ceramic circuit board 1 is bonded to the heat dissipation member 6 via the heat conductive composition 5. At this time, it is difficult for the heat conductive composition 5 located immediately below and around the semiconductor element 7 to spread outward and enter the gap between the groove 8 and the heat radiating member 6, and the area directly below the semiconductor element 7 and There is a tendency that the thickness of the heat transfer composition 7 interposed between the surrounding metal plate 4 and the heat dissipation member 6 cannot be made sufficiently thin.

【0035】また、溝8の深さTが0.01≦T≦0.15(m
m)であり、かつ溝8の幅Sが半導体素子7の外辺の長
さL(図2中に半導体素子7の位置を破線で示した)に
対して、(0.18−0.91T)×L≦S≦0.4L(mm)で
あることが好ましい。
The depth T of the groove 8 is 0.01≤T≤0.15 (m
m) and the width S of the groove 8 is (0.18−0.91T) × L with respect to the length L of the outer side of the semiconductor element 7 (the position of the semiconductor element 7 is shown by a broken line in FIG. 2). It is preferable that ≦ S ≦ 0.4 L (mm).

【0036】溝8の深さTが0.01mmより小さい場合
は、深さTが浅すぎることとなるため、金属板4の半導
体素子7の直下およびその周囲と放熱部材6との間にあ
る伝熱性組成物7が入り込むのに充分な空間が形成され
ず、半導体素子7の直下およびその周囲にある伝熱性組
成物7の厚みを充分に薄くすることができなくなる傾向
がある。他方、溝8の深さTが0.15mmより大きい場合
は、溝8の部分で金属板4の厚みが薄くなりすぎるるた
め、金属板4の強度が弱くなり、セラミック回路基板1
を放熱部材6に実装した際の基板のたわみやセラミック
回路基板1と金属板4との接合時の熱負荷により金属板
4が変形してしまい、基板の平坦度が保てなくなること
がある。また、溝8の深さTが深すぎることとなるた
め、セラミック回路基板1を放熱部材6に伝熱性組成物
5を介して接合する際に、溝8の内部に気泡が侵入した
場合、半導体素子7がスイッチングした際のセラミック
基板2と金属回路坂3および金属板4との熱膨脹差から
生じる変形によって、気泡が半導体素子7の直下に移動
して熱拡散の障害となる可能性がある。
If the depth T of the groove 8 is smaller than 0.01 mm, the depth T is too shallow. Therefore, the heat transfer member 6 is located directly below the semiconductor element 7 of the metal plate 4 and between the periphery of the semiconductor element 7 and the heat dissipation member 6. There is not enough space for the thermal composition 7 to enter, and there is a tendency that the thickness of the thermally conductive composition 7 immediately below and around the semiconductor element 7 cannot be made sufficiently thin. On the other hand, if the depth T of the groove 8 is larger than 0.15 mm, the thickness of the metal plate 4 becomes too thin at the groove 8 portion, so the strength of the metal plate 4 becomes weak and the ceramic circuit board 1
The metal plate 4 may be deformed due to the deflection of the substrate when mounted on the heat dissipation member 6 or the heat load at the time of joining the ceramic circuit board 1 and the metal plate 4, and the flatness of the substrate may not be maintained. Further, since the depth T of the groove 8 is too deep, when air bubbles enter the inside of the groove 8 when the ceramic circuit board 1 is bonded to the heat dissipation member 6 via the heat conductive composition 5, the semiconductor Due to the deformation caused by the difference in thermal expansion between the ceramic substrate 2 and the metal circuit slope 3 and the metal plate 4 when the element 7 is switched, the bubbles may move directly below the semiconductor element 7 and become an obstacle to heat diffusion.

【0037】また、溝8の幅SがS<(0.18−0.91T)
×L(mm)の場合は、幅Sが狭すぎることとなるた
め、金属板4の半導体素子7の直下およびその周囲と放
熱部材6との間にある伝熱性組成物7が入り込むのに充
分な空間が形成されず、半導体素子7の直下およびその
周囲にある伝熱性組成物7の厚みを充分に薄くすること
ができなくなる傾向がある。他方、S>0.4L(mm)
の場合は、幅Sが大きくなるため、セラミック回路基板
1を放熱部材6に伝熱性組成物5を介して接合する際
に、溝8の内部に気泡が侵入しやすくなって熱拡散に障
害が発生する可能性がある。
The width S of the groove 8 is S <(0.18-0.91T).
In the case of × L (mm), the width S is too narrow, so that it is sufficient for the heat conductive composition 7 existing immediately below the semiconductor element 7 of the metal plate 4 and between the periphery and the heat dissipation member 6 to enter. Since such a space is not formed, it tends to be impossible to sufficiently reduce the thickness of the heat conductive composition 7 immediately below and around the semiconductor element 7. On the other hand, S> 0.4L (mm)
In this case, since the width S becomes large, when the ceramic circuit board 1 is bonded to the heat dissipation member 6 via the heat conductive composition 5, bubbles easily enter the groove 8 and the heat diffusion is hindered. Can occur.

【0038】上記のようにして作製された本発明のセラ
ミック回路基板1は、金属板4上にグリース状の伝熱性
組成物5を塗布した後、アルミニウム等から成る放熱部
材6に接合されて半導体素子モジュールとなる。このと
き、伝熱性組成物5は溝8を避けて金属板4上に、その
塗布厚みを調整して均一に塗布しておくと、半導体素子
7の直下およびその周囲にある伝熱性組成物5が溝8に
効率よく侵入するため、半導体素子7の直下およびその
周囲に介在する、熱伝導率が相対的に低い伝熱性組成物
7の厚みを薄くして接合することが可能となる。
The ceramic circuit board 1 of the present invention manufactured as described above is applied to the metal plate 4 with the grease-like heat transfer composition 5 and then bonded to the heat dissipation member 6 made of aluminum or the like to form a semiconductor. It becomes an element module. At this time, if the heat-transfer composition 5 is applied to the metal plate 4 while avoiding the grooves 8 and adjusting the application thickness to be applied uniformly, the heat-transfer composition 5 immediately below and around the semiconductor element 7 is present. Since the metal efficiently penetrates into the groove 8, it becomes possible to reduce the thickness of the heat conductive composition 7 which is interposed immediately below and around the semiconductor element 7 and has a relatively low thermal conductivity, and to bond the same.

【0039】[0039]

【実施例】以下、実施例および比較例の試験結果を挙げ
て本発明のセラミック回路基板について詳細に説明する
が、本発明は以下の実施例のみに限定されるものではな
い。
EXAMPLES The ceramic circuit boards of the present invention will be described in detail below with reference to the test results of Examples and Comparative Examples, but the present invention is not limited to the following Examples.

【0040】ここでは、セラミック基板2に厚みが0.32
mmの窒化珪素質焼結体を用い、金属回路板3および金
属板4にそれぞれ厚みが0.5mmの銅を使用した。これ
らを活性金属ロウ材を用いてセラミック基板2の上下面
にそれぞれ接合した後、エッチングにより金属回路板3
の不要な金属部分を除去して回路配線パターンを形成
し、図1に示すような構成の本発明のセラミック回路基
板1の実施例の試料を作製した。なお、半導体素子7の
外周から1.32mm離れた距離の部位に、表1に示すよう
な深さTと幅Sの溝8をエッチングにより加工してして
形成した。
Here, the ceramic substrate 2 has a thickness of 0.32.
A silicon nitride sintered body having a thickness of 0.5 mm was used, and copper having a thickness of 0.5 mm was used for each of the metal circuit board 3 and the metal board 4. After these are bonded to the upper and lower surfaces of the ceramic substrate 2 by using an active metal brazing material, the metal circuit board 3 is etched.
An unnecessary metal part was removed to form a circuit wiring pattern, and a sample of an example of the ceramic circuit board 1 of the present invention having the structure shown in FIG. 1 was produced. A groove 8 having a depth T and a width S as shown in Table 1 was formed by etching at a position 1.32 mm away from the outer periphery of the semiconductor element 7.

【0041】また、溝8を形成しなかった以外は同様に
して、図3に示すような比較例のセラミック回路基板11
の試料を作製した。
Further, a ceramic circuit board 11 of a comparative example as shown in FIG. 3 is similarly used except that the groove 8 is not formed.
The sample of was produced.

【0042】そして、上記の2種類の試料を用いて、伝
熱性組成物5はオイルコンパウンドとし、メタルマスク
を用いて金属板4に溝8を除いて100μmの一様な厚み
で塗布し、各セラミック回路基板1・11を放熱部材6に
実装した後の、半導体素子7の直下の伝熱性組成物5の
厚みを評価し、さらにパワーサイクル試験を行なった。
Then, using the above two kinds of samples, the heat-conductive composition 5 was made into an oil compound, and the metal plate 4 was applied to the metal plate 4 with a uniform thickness of 100 μm except for the grooves 8 by using a metal mask. After mounting the ceramic circuit boards 1 and 11 on the heat dissipation member 6, the thickness of the heat conductive composition 5 immediately below the semiconductor element 7 was evaluated, and a power cycle test was further performed.

【0043】伝熱性組成物5の厚みの評価方法として
は、放熱部材6にφ1.5mmの穴を設け、その穴にφ1.0
mmの変位センサを設置し、放熱部材6の表面を基準面
(Z=0mm)とし、その位置からZ軸方向において、
セラミック回路基板1の裏面と放熱部材6の表面との隙
間を計測し(セラミック回路基板1の裏面に変位センサ
が接触したときの値を読み取る)、セラミック回路基板
1を実装した後のオイルコンパウンド厚みとした。
As a method for evaluating the thickness of the heat transfer composition 5, a hole having a diameter of 1.5 mm is provided in the heat dissipation member 6, and the hole has a diameter of 1.0 mm.
mm displacement sensor is installed, the surface of the heat dissipation member 6 is used as a reference plane (Z = 0 mm), and from that position in the Z-axis direction,
The gap between the back surface of the ceramic circuit board 1 and the front surface of the heat dissipation member 6 is measured (the value when the displacement sensor contacts the back surface of the ceramic circuit board 1 is read), and the oil compound thickness after mounting the ceramic circuit board 1 And

【0044】また、各セラミック回路基板1・11につい
て、熱抵抗を評価した。熱抵抗は、半導体素子7の温度
と半導体素子7の直下の放熱部材6(冷却水側)の温度
とを熱電対を用いて測定し、各温度差を印加電力で割る
ことにより計算した。なお、この熱抵抗は、セラミック
回路基板1・11を実装した直後の初期の熱抵抗であり、
オイルコンパウンドの熱抵抗も含まれる。この熱抵抗
は、各半導体素子2の外辺の長さLについて、溝8を設
けない場合(No.1、7)の熱抵抗を100%としたときの
比率(%)で示した。この熱抵抗が小さい程、放熱能力
が高いと判断できる。
The thermal resistance of each ceramic circuit board 1/11 was evaluated. The thermal resistance was calculated by measuring the temperature of the semiconductor element 7 and the temperature of the heat dissipation member 6 (cooling water side) immediately below the semiconductor element 7 using a thermocouple, and dividing each temperature difference by the applied power. Note that this thermal resistance is the initial thermal resistance immediately after mounting the ceramic circuit boards 1 and 11.
It also includes the thermal resistance of the oil compound. This thermal resistance is shown as a ratio (%) with respect to the length L of the outer side of each semiconductor element 2 when the thermal resistance in the case where the groove 8 is not provided (Nos. 1 and 7) is 100%. It can be judged that the smaller this thermal resistance is, the higher the heat dissipation capability is.

【0045】さらに、パワーサイクル試験の方法とし
て、初めの1サイクルに半導体素子7がON後5秒間で
125℃まで上昇し、OFF後15秒間で25℃まで下降する
ように印加電流を初期設定し、これを連続で5000サイク
ルおよび10000サイクル繰り返して行ない、その間の半
導体素子7の温度を熱電対にて測定した。この判定基準
としては、半導体素子7の温度上昇が10%以下であった
試料を合格とし、○で示し、10%より大きな温度上昇が
あった試料を△とした。以上の結果を表1に示す。
Further, as a method of the power cycle test, it takes 5 seconds after the semiconductor element 7 is turned on in the first cycle.
The applied current is initially set so that it rises to 125 ° C and drops to 25 ° C for 15 seconds after it is turned off, and this is repeated continuously for 5000 cycles and 10000 cycles, and the temperature of the semiconductor element 7 during that time is thermocoupled. It was measured. As a criterion for this, a sample in which the temperature rise of the semiconductor element 7 was 10% or less was judged to be acceptable, and indicated by ◯, and a sample in which the temperature rise was larger than 10% was marked as Δ. The above results are shown in Table 1.

【0046】[0046]

【表1】 [Table 1]

【0047】表1から明らかなように、溝8を設けない
場合(No.1およびNo.7)は、基板を押さえつけても、
オイルコンパウンドの粘性、さらには基板のうねりが障
害になるため、オイルコンパウンドが十分に金属板4よ
り外に流れ出ず、実装後のオイルコンパウンド厚みはN
o.1が0.082mm、No.7が0.080mmと厚くなった。ま
た、S<(0.18−0.91T)×L(mm)の溝8を設けた
場合は、金属板4の半導体素子7の直下およびその周囲
と放熱部材6との間にあるオイルコンパウンドが入り込
むのに充分な空間が形成されず、半導体素子7の直下お
よびその周囲にあるオイルコンパウンドの厚みを充分に
薄くすることができなかった。これに対して、S>(0.
18−0.91T)×L(mm)の溝8を設けた場合は、溝8
にオイルコンパウンドが侵入して溝8が埋まるため、半
導体素子7の直下のオイルコンパウンド厚みは0.05mm
よりも薄くなり、溝8を設けない場合(No.1およびNo.
7)と比較しても熱抵抗が20%以上低下した。
As is clear from Table 1, when the groove 8 is not provided (No. 1 and No. 7), even if the substrate is pressed,
Since the viscosity of the oil compound and the swell of the board interfere, the oil compound does not flow sufficiently out of the metal plate 4, and the thickness of the oil compound after mounting is N
The thickness of o.1 was 0.082 mm and that of No. 7 was 0.080 mm. When the groove 8 of S <(0.18−0.91T) × L (mm) is provided, the oil compound immediately below the semiconductor element 7 of the metal plate 4 and between the periphery of the semiconductor element 7 and the heat radiating member 6 enters. Therefore, a sufficient space was not formed, and the thickness of the oil compound immediately below and around the semiconductor element 7 could not be made sufficiently thin. On the other hand, S> (0.
18-0.91T) x L (mm) groove 8 if provided
Since the oil compound penetrates into the groove and fills the groove 8, the thickness of the oil compound directly below the semiconductor element 7 is 0.05 mm.
When the groove 8 is not provided (No. 1 and No.
Compared to 7), the thermal resistance decreased by 20% or more.

【0048】また、溝8の深さTが0.15mmの試料(N
o.6およびNo.12)は、パワーサイクル試験において、5
000サイクルでは10%以下の温度上昇であったが、10000
サイクルでは10%を超える温度上昇があった。理由とし
て、溝8に充填したオイルコンパウンドに含まれる気泡
が半導体素子7の下に位置する金属板4とオイルコンパ
ウンドとの間に移動したため、放熱特性が劣化した。
A sample (N with a depth T of the groove 8 of 0.15 mm)
o.6 and No.12) are 5 in the power cycle test.
In 000 cycles, the temperature rise was 10% or less,
There was a temperature increase of more than 10% on cycling. The reason is that the air bubbles contained in the oil compound filled in the groove 8 move between the metal plate 4 located under the semiconductor element 7 and the oil compound, so that the heat dissipation characteristics are deteriorated.

【0049】なお、本発明は上述の実施の形態の例に限
定されるものではなく、本発明の趣旨を逸脱しない範囲
であれば種々の変更は可能である。
It should be noted that the present invention is not limited to the examples of the above-described embodiments, and various modifications can be made without departing from the spirit of the present invention.

【0050】例えば、上述の例ではセラミック基板2が
窒化珪素質焼結体で形成された例を示したが、半導体素
子7が多量の熱を発し、この熱を効率良く放熱したい場
合には、セラミック基板2を熱伝達率の高い窒化アルミ
ニウム質焼結体や窒化珪素質焼結体で形成すればよい。
また、上述の例ではセラミック基板2に活性金属ロウ材
を介して直接に金属回路板3および金属板4をロウ付け
したが、これをセラミック基板2の表面に予めタングス
テンまたはモリブデン等のメタライズ金属層を被着させ
ておき、このメタライズ金属層に金属回路板3および金
属板4をロウ材を介して接合させてもよい。また、セラ
ミック基板2に活性金属ロウ材を介してあらかじめ回路
配線のパターン形状に形成された金属回路板3をロウ付
けすることにより、回路配線のパターン形成を行なって
もよい。
For example, in the above-mentioned example, the ceramic substrate 2 is made of a silicon nitride sintered material, but when the semiconductor element 7 generates a large amount of heat and it is desired to efficiently dissipate this heat, The ceramic substrate 2 may be formed of an aluminum nitride sintered body or a silicon nitride sintered body having a high heat transfer coefficient.
Further, in the above-mentioned example, the metal circuit board 3 and the metal plate 4 are directly brazed to the ceramic substrate 2 through the active metal brazing material, but this is preliminarily attached to the surface of the ceramic substrate 2 by a metallized metal layer such as tungsten or molybdenum. Alternatively, the metal circuit plate 3 and the metal plate 4 may be bonded to the metallized metal layer via a brazing material. Alternatively, the circuit wiring pattern may be formed by brazing the metal circuit board 3 previously formed in the circuit wiring pattern shape to the ceramic substrate 2 via the active metal brazing material.

【0051】[0051]

【発明の効果】本発明のセラミック回路基板によれば、
金属板は、放熱部材に実装される面に、半導体素子の外
周からセラミック回路基板の全厚みの距離の部位に溝が
形成されていることから、セラミック回路基板を放熱部
材に伝熱性組成物を介して接合する際に、この溝に金属
板の半導体素子の直下およびその周囲の部分と放熱部材
との間にある伝熱性組成物を侵入させて、金属板の半導
体素子の直下およびその周囲の部分と放熱部材との間に
介在する熱伝導率が相対的に低い伝熱性組成物の厚みを
薄くして接合することが可能となるため、金属板と放熱
部材との間における熱抵抗の増加を防ぐことができる。
その結果、放熱性を改善したセラミック回路基板を提供
することができる。
According to the ceramic circuit board of the present invention,
Since the metal plate has a groove formed on the surface to be mounted on the heat dissipation member at a position at a distance of the entire thickness of the ceramic circuit board from the outer periphery of the semiconductor element, the ceramic circuit board is provided with the heat transfer composition to the heat dissipation member. At the time of joining via a heat conductive composition between the heat dissipation member and a portion immediately below and around the semiconductor element of the metal plate into the groove, the groove immediately below and around the semiconductor element of the metal plate. Since the thickness of the heat conductive composition having a relatively low thermal conductivity interposed between the portion and the heat radiating member can be thinned and joined, the thermal resistance between the metal plate and the heat radiating member is increased. Can be prevented.
As a result, a ceramic circuit board with improved heat dissipation can be provided.

【0052】また、本発明のセラミック回路基板によれ
ば、溝の深さTが0.01≦T≦0.15(mm)であり、かつ
溝の幅Sが半導体素子の外辺の長さLに対して、(0.18
−0.91T)×L≦S≦0.4L(mm)であるものとした
ときには、金属板の半導体素子の直下およびその周囲に
ある伝熱性組成物が入り込むのに充分な空間が溝に形成
されるので、セラミック回路基板を放熱部材に伝熱性組
成物を介して接合する際に、この溝に半導体素子の直下
およびその周囲から充分な量の伝熱性組成物を侵入させ
ることができ、金属板の半導体素子の直下およびその周
囲の部分と放熱部材との間に介在する熱伝導率が相対的
に低い伝熱性組成物を充分に薄くして接合することが可
能となるため、金属板と放熱部材との間における熱抵抗
の増加を確実に防ぐことができる。また、金属板の厚み
が薄くなりすぎて強度が弱くなったり、セラミック回路
基板と金属板との接合時の熱負荷により変形して基板の
平坦度が保てなくなったりするということがない。
Further, according to the ceramic circuit board of the present invention, the depth T of the groove is 0.01 ≦ T ≦ 0.15 (mm) and the width S of the groove is relative to the length L of the outer side of the semiconductor element. , (0.18
-0.91T) × L ≦ S ≦ 0.4L (mm), a space is formed in the groove just below and around the semiconductor element of the metal plate, which is sufficient for the heat transfer composition to enter. Therefore, when joining the ceramic circuit board to the heat dissipation member via the heat conductive composition, a sufficient amount of the heat conductive composition can be made to enter into this groove from directly under the semiconductor element and its surroundings. Since it is possible to sufficiently thin and bond the heat conductive composition having a relatively low thermal conductivity, which is interposed between the heat dissipation member and the portion immediately below and around the semiconductor element, the metal plate and the heat dissipation member. It is possible to reliably prevent an increase in the thermal resistance between and. Further, the thickness of the metal plate does not become too thin and the strength thereof does not weaken, and the heat load at the time of joining the ceramic circuit board and the metal plate does not deform so that the flatness of the board cannot be maintained.

【0053】このような構成により、本発明のセラミッ
ク回路基板によれば、放熱特性が良好であり、金属回路
板上に搭載される半導体素子等の電子部品を長期にわた
り安定して作動させることができるものとなる。
With such a structure, according to the ceramic circuit board of the present invention, the heat dissipation characteristics are good, and electronic components such as semiconductor elements mounted on the metal circuit board can be stably operated for a long period of time. It will be possible.

【0054】[0054]

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明のセラミック回路基板を用いた半導体モ
ジュールの一例を示す断面図である。
FIG. 1 is a sectional view showing an example of a semiconductor module using a ceramic circuit board of the present invention.

【図2】図1に示すセラミック回路基板1を金属板4側
から見た場合の金属板4の平面図である。
FIG. 2 is a plan view of the metal plate 4 when the ceramic circuit board 1 shown in FIG. 1 is viewed from the metal plate 4 side.

【図3】従来のセラミック回路基板を用いた半導体モジ
ュールの一例を示す断面図である。
FIG. 3 is a sectional view showing an example of a semiconductor module using a conventional ceramic circuit board.

【符号の説明】[Explanation of symbols]

1:セラミック回路基板 2:セラミック基板 3:金属回路板 4:金属板 5:伝熱性組成物 6:放熱部材 7:半導体素子 8:溝 T:溝の深さ S:溝の幅 L:半導体素子の外辺の長さ 1: Ceramic circuit board 2: Ceramic substrate 3: Metal circuit board 4: Metal plate 5: Heat transfer composition 6: Heat dissipation member 7: Semiconductor element 8: Groove T: depth of groove S: Groove width L: Length of outer edge of semiconductor element

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 セラミック基板の上面に半導体素子が搭
載される金属回路板を、下面に金属板を取着して成り、
該金属板が伝熱性組成物を介して放熱部材に実装される
セラミック回路基板であって、前記金属板は、前記放熱
部材に実装される面に、前記半導体素子の外周からセラ
ミック回路基板の全厚みの距離の部位に溝が形成されて
いることを特徴とするセラミック回路基板。
1. A ceramic circuit board is provided with a metal circuit board on which a semiconductor element is mounted, and a lower surface with a metal plate.
A ceramic circuit board in which the metal plate is mounted on a heat dissipation member via a heat transfer composition, wherein the metal plate is formed on the surface mounted on the heat dissipation member from the outer periphery of the semiconductor element to the entire ceramic circuit board. A ceramic circuit board having a groove formed at a portion having a thickness distance.
【請求項2】 前記溝の深さTが0.01≦T≦0.1
5(mm)であり、かつ前記溝の幅Sが前記半導体素子
の外辺の長さLに対して、(0.18−0.91T)×
L≦S≦0.4L(mm)であることを特徴とする請求
項1記載のセラミック回路基板。
2. The depth T of the groove is 0.01 ≦ T ≦ 0.1.
5 (mm), and the width S of the groove is (0.18-0.91T) * with respect to the length L of the outer side of the semiconductor element.
The ceramic circuit board according to claim 1, wherein L ≦ S ≦ 0.4 L (mm).
JP2002081863A 2002-03-22 2002-03-22 Ceramic circuit board Expired - Fee Related JP3934966B2 (en)

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006128571A (en) * 2004-11-01 2006-05-18 Toyota Motor Corp Semiconductor device
JP2007243109A (en) * 2006-03-13 2007-09-20 Toyota Industries Corp Electronic apparatus
JP2008244118A (en) * 2007-03-27 2008-10-09 Hitachi Metals Ltd Semiconductor module
WO2012134028A1 (en) * 2011-03-30 2012-10-04 Cha Seung Jin Package for a light-emitting diode element having a heat-dissipating reflector plate, package assembly for a light-emitting diode element having a heat-dissipating reflector plate and a production method therefor
KR101207993B1 (en) 2010-11-09 2012-12-04 (주)엔비텍이앤씨 LED package having radiation function
JP2019140398A (en) * 2019-04-01 2019-08-22 ローム株式会社 Power module and method for manufacturing the same

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006128571A (en) * 2004-11-01 2006-05-18 Toyota Motor Corp Semiconductor device
JP2007243109A (en) * 2006-03-13 2007-09-20 Toyota Industries Corp Electronic apparatus
JP2008244118A (en) * 2007-03-27 2008-10-09 Hitachi Metals Ltd Semiconductor module
KR101207993B1 (en) 2010-11-09 2012-12-04 (주)엔비텍이앤씨 LED package having radiation function
WO2012134028A1 (en) * 2011-03-30 2012-10-04 Cha Seung Jin Package for a light-emitting diode element having a heat-dissipating reflector plate, package assembly for a light-emitting diode element having a heat-dissipating reflector plate and a production method therefor
KR101259052B1 (en) * 2011-03-30 2013-04-29 박재훈 Light emitting diode package with reflector having thermal radiation funtion, light emitting diode package assembly with reflector having thermal radiation funtion and method of manufacturing the same
JP2019140398A (en) * 2019-04-01 2019-08-22 ローム株式会社 Power module and method for manufacturing the same

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