JP2003249604A - Resin-sealed semiconductor device and method of the same, lead frame used in resin-sealed semiconductor device, and semiconductor module device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the cost of a double-side electrode type resin-sealed semiconductor device and to manufacture an extremely thin semiconductor device while preventing cracks in a wafer and a chip. <P>SOLUTION: A part of an inner lead 7 is exposed outside resin sealing material 5, and its surface and the backside are made to be external electrodes 8, 9. After the fixing of a semiconductor chip 1, the connection of bonding wires 3, the sealing by the sealing material 5, and the like are performed to a conductive lead frame 6 comprising an inner lead section 7p and a tie bar 6p, the backside of the lead frame 6 is ground thinly together with the semiconductor chip 1. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a stackable double-sided electrode type semiconductor device in which a semiconductor chip and internal leads electrically connected to the semiconductor chip are sealed with a sealing resin, a manufacturing method thereof, and a resin sealing. The present invention relates to a lead frame suitable for manufacturing a double-sided electrode type semiconductor device, and a semiconductor module device in which semiconductor devices are stacked.

[0002]

2. Description of the Related Art In recent years, in order to respond to the miniaturization of electronic equipment, it is required to mount semiconductor devices mounted on the electronic equipment at a high density, and accordingly, the miniaturization and thinning of semiconductor devices have been advanced. There is. Further, in order to further increase the density, it has become necessary to stack thin semiconductor devices in two or more stages.

A conventional resin-sealed semiconductor device will be described below. FIG. 15 is a cross-sectional view of a conventional double-sided electrode type resin-sealed semiconductor device 200. Conventional semiconductor device 200
Is a semiconductor chip 1 having an electrode pad, an interposer 26 spaced apart from the semiconductor chip 1, and an interposer 2
6, a front surface external electrode 8 provided therein, an inner lead 7 and a back surface external electrode 9 electrically connected thereto, and an inner bonding wire 3 electrically connecting an electrode pad of the semiconductor chip 1 and the inner lead 7. , A resin encapsulant 5 for encapsulating the internal lead, the bonding wire 3 and the semiconductor chip 1. The front surface external electrode 8 and the back surface external electrode 9 of the interposer 26 are the same as those of the interposer 2
It is electrically connected via a through hole 25 penetrating through 6.

Such a conventional resin-encapsulated semiconductor device 20
0, the external electrodes 8, which are electrically connected to each other,
Since 9 is formed on both front and back surfaces of the interposer 26, the structure is such that stacking is possible.

Next, a method of manufacturing the conventional semiconductor device 200 will be outlined (not shown). First, the interposer 26 having the internal leads 7 on which the front surface external electrode 8 and the back surface external electrode 9 are formed is prepared, and a tape or the like is attached to the back surface of the interposer 26. Interposer 2
A plurality of areas for mounting the semiconductor chip 1 are prepared in 6, and the semiconductor chip 1 is fixed to the areas to facilitate the subsequent handling.

Next, a silicon wafer (not shown) on which a semiconductor circuit is formed is thinly shaved to 130 μm to 350 μm, and the silicon wafer is divided by saw cutting or the like to prepare a semiconductor chip 1. Next, the semiconductor chip 1 is fixed by the chip fixing material 2 on the tape attached to the back surface of the interposer 26.

After that, the semiconductor chip 1 and the internal leads 7 are electrically connected by the bonding wires 3. The bonding wire 3 is made of thin aluminum wire or gold (Au).
A line or the like is used as appropriate. Next, the semiconductor chip 1, the chip fixing material 2, the bonding wires 3, the internal leads 7, and the internal lead portions of the interposer 26 are sealed with the sealing material 5. In this case, the interposer 26 to which a plurality of semiconductor chips 1 are fixed is housed in a sealing mold and transfer-molded.

Thereafter, the tape on the back surface of the interposer 26 is peeled off, and the interposer 26 is cut along the front-back direction by a saw-cut blade 21 or the like to divide it into individual pieces, whereby the semiconductor device 200 is obtained.

FIG. 16 shows a cross-sectional view of a module 201 in which a conventional resin-sealed double-sided electrode type semiconductor device 200 is mounted on a board substrate 24.

In the adjacent semiconductor devices 200, the front surface external electrode 8 and the back surface external electrode 9 which are opposed to each other are electrically connected to each other by a laminating bonding material 22 such as solder (which may be a conductive adhesive material such as silver paste). And is also electrically connected to the board substrate 24 by a board mounting joint material 23 such as solder (which may be a conductive adhesive such as silver paste).

[0011]

However, the conventional semiconductor device has a problem that the cost is very high because the interposer is used. As is well known, an interposer requires an electrode forming layer and an insulating layer, and bonding them, forming wiring, surface treatment of internal leads and electrode portions, and a process for electrically connecting front and back electrodes. Therefore, the manufacturing process is long and the cost is high.

On the other hand, in the conventional method of manufacturing a semiconductor device, the thickness of the semiconductor device is further reduced (0.10 to 0.
In the case of about 30 mm), it is necessary to thinly cut a silicon wafer (not shown) on which a semiconductor circuit is formed to 20 to 120 μm. In that case, it is necessary to handle a large-diameter silicon wafer thinly cut to 20 to 120 μm, which easily causes cracking of the silicon wafer, and also in handling after dividing into semiconductor chips, chip fixing or bonding wire. This is a problem because cracks are likely to occur at the stage of connection, etc. Especially in the latter case, it is necessary to use a certain amount of pressure, heat and, in some cases, ultrasonic waves in order to avoid the occurrence of voids in the fixing portion and insufficient connection when fixing the chip or connecting the bonding wire 3. The stress breaks the thin semiconductor chip.

Therefore, a main object of the present invention is to reduce the cost. Another object is to enable the manufacture of a remarkably thin semiconductor device while preventing the silicon wafer and the semiconductor chip from cracking during the manufacturing process.

[0014]

The present invention which has solved the above-mentioned problems is as follows. <Invention of Claim 1> A semiconductor chip having an electrode,
An internal lead spaced apart by the side, an internal wiring portion electrically connecting the electrode and the internal lead, and a resin sealing material for sealing the internal lead, the internal wiring portion and the semiconductor chip. A resin-encapsulated semiconductor device having:
A resin-encapsulated semiconductor device, wherein a part of the inner lead is exposed to the outside of the resin encapsulant, and both the front surface and the back surface of the exposed portion serve as external electrodes of the semiconductor chip.

(Function and Effect) Thus, by forming the external electrodes by the internal leads themselves, in other words, the conventional internal leads and the interposer having the front and back electrodes are formed of an integral conductive member. Thus, unlike the conventional interposer, the process of electrically connecting the electrodes on the front surface and the back surface is not required, and the manufacturing cost can be reduced.

<Invention of Claim 2> In the state after the resin sealing, the back surface of the semiconductor chip is cut, and the thickness of the semiconductor chip is reduced to 150 μm or less by this cutting. A resin-encapsulated semiconductor device characterized by an encapsulated semiconductor device.

(Operation and Effect) When the semiconductor chip is thinned by cutting after the resin sealing as described above, since the silicon wafer and the semiconductor chip in the previous stage can be handled in a thick state, a semiconductor device with less cracks can be obtained. Become.

<Invention of Claim 3> A step of manufacturing a semiconductor chip having an electrode from a silicon wafer, a pocket portion surrounded by a plurality of internal lead portions arranged at intervals, and a plurality of the plurality of pocket portions. A conductive lead frame having a tie bar portion that integrates the internal lead portions with each other across the pocket side and the opposite side of the internal lead is prepared, and the semiconductor chip is arranged in each pocket of the lead frame. A step of electrically connecting an electrode of the semiconductor chip and an internal lead portion of the lead frame with an internal wiring material, a portion except a part of the internal lead, the internal wiring material and the semiconductor chip being a resin Obtaining an individual resin-sealed semiconductor device by cutting the lead frame tie bar portion into a sealed state and cutting Method for manufacturing a resin-sealed semiconductor device which comprises the steps, a.

(Functions and Effects) Since the inner leads and the outer electrodes are formed by an integral conductive lead frame, there is no need for processing for electrically connecting the electrodes on the front surface and the back surface, and the manufacturing cost is low. .

<Invention of Claim 4> A method of manufacturing a resin-encapsulated semiconductor device according to claim 3, including a step of cutting the back surface side portion of the semiconductor chip to reduce the thickness after the resin encapsulation.

(Operation and Effect) In the invention according to claim 4,
After carrying out the sealing with the sealing material, a manufacturing method of cutting the semiconductor chip was adopted. As a result, most of the manufacturing process can be handled and connected in the state of a thick wafer or a thick semiconductor chip (for example, a thickness of 130 to 350 μm), in other words, it is not necessary to handle a thin wafer or a chip which is easily broken. As a result, it becomes possible to prevent cracks in silicon wafers and semiconductor chips. Therefore, a thin semiconductor device can be manufactured inexpensively and reliably.

<Invention of Claim 5> A semiconductor chip disposing pocket portion surrounded by a plurality of internal lead portions arranged at intervals and a portion of the plurality of internal leads on the side opposite to the pocket side. A lead frame having a tie bar portion that integrates the internal lead portions with each other, wherein at least one of a front-side corner portion and a back-side corner portion at a pocket end portion of the internal lead portion is notched, A lead frame used in a resin-encapsulated semiconductor device, wherein a lead frame is formed.

(Operation and Effect) As described above, when at least one of the corners on the front surface side and the corners on the back surface side of the pocket of the inner lead portion is cut out to form a step, the step is formed. There is an advantage that an internal wiring portion such as a bonding wire can be connected to and the internal wiring portion can be reliably sealed at a deeper position.

<Invention of Claim 6> A sealing material injecting groove is formed on the back surface of the tie bar portion so as to communicate from the pocket portion side to the opposite outer side, and the sealing material injecting groove is provided on the outer side of the tie bar portion. The lead frame according to claim 5, further comprising a sealing material reservoir portion communicating with the groove.

(Function and Effect) By providing the sealing material injection groove and the sealing material reservoir, it is possible to more efficiently and surely inject the resin sealing material.

<Invention of Claim 7> The double-sided electrode type resin-encapsulated semiconductor device according to claim 1 or 2 is laminated in two or more stages, and the external electrodes of the semiconductor devices are electrically connected to each other. A semiconductor module device characterized by the following.

(Operation and Effect) According to the invention described in claim 7, since the ones having a sufficient selection of electrical characteristics at the semiconductor device level and the screens for initial reliability failure can be vertically stacked, the module can be stacked. It is possible to reduce the occurrence of defects after assembly, and since it is a semiconductor package that is extremely thin, it is possible to supply infinitely thin electronic components even at the module level. By the way, as the semiconductor chip 1, a next-generation (four times integration) chip will be developed in three years, but if the present invention is used, four layers can be stacked easily, and three years ahead of time, Highly integrated electronic components can be obtained.

[0028]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the present invention will be described with reference to the drawings. (Example of Semiconductor Device) FIG. 1 is a sectional view showing an example of a double-sided electrode type resin-sealed semiconductor device 100 (hereinafter simply referred to as a semiconductor device) according to the present invention.

In the semiconductor device 1 of this embodiment, the semiconductor chip 1 having the surface electrode is arranged in the center, and a predetermined number of internal leads 7 are provided at regular intervals in the circumferential direction so as to surround the periphery thereof. About the same number of electrodes). Further, the semiconductor chip 1 and the internal lead 7 are separated from each other, and the electrode of the semiconductor chip 1 and the inner edge portion of the internal lead 7 (edge portion on the semiconductor chip 1 side) are bonded to each other by the bonding wire 3.
Are electrically connected by. The entire bonding wire 3, the entire surface of the semiconductor chip 1 and the bonding wire connection portion of the internal lead 7 are sealed with the resin sealing material 5. Thus, although the bonding wire connection portion of the inner lead 7 is embedded in the resin sealing material 5, the outer edge portion is exposed to the outside of the resin sealing material 5. In the present invention, both the front surface and the back surface of the externally exposed portion of the inner lead 7 are the front surface external electrode 8 and the back surface external electrode 9.

As described above, by adopting the structure in which the inner lead 7 is pulled out from the encapsulating material 5 and using the upper and lower surfaces thereof as the external electrodes (the front surface external electrode 8 and the back surface external electrode 9), the conventional example is obtained. The double-sided electrode type semiconductor device can be stacked in the vertical direction without using an expensive interposer.

Characteristically in this embodiment, the inner surface side corner of the inner lead 7 is formed as a step portion 7a which is one step lower by half etching or the like, and the bonding wire 3 is connected to this step portion 7a. It Step 7a
It is preferable that the surface of the internal lead 7 is located at the same height as the surface of the semiconductor chip 1 and that they are lower than the outer portion of the internal lead 7. With this configuration, when the resin is sealed, the bonding wire connection portion of the inner lead 7 is buried by the resin sealing material, but the outer portion of the inner lead 7 is not buried and exposed to the outside. You can

Further, after resin sealing, the back surface of the semiconductor chip 1 including the back surface of the exposed portion of the internal lead 7 is made substantially flush by cutting, and the thickness of the semiconductor chip is 120 μm by this cutting. The following is also a preferable form. This advantage will be described later.

Further, in the present embodiment, it is preferable to form the conductive protrusion 10 by solder ball or solder printing on either one of the front surface external electrode 8 and the back surface external electrode 9. By providing such conductive protrusions, stacking in the vertical direction is facilitated, and even when mounted on the board substrate 24 alone, a clearance with the board substrate 24 is ensured, facilitating flux cleaning and preventing entrapment of foreign matter. Like In addition, in the illustrated example, the semiconductor device 1 in which the protrusion is formed only on the back surface external electrode 9 is shown, but in the present invention, the conductive projection 10 includes both the surface external electrode 8 and the back surface external electrode 9, or the surface external electrode 9. It is also possible to form only eight.

On the other hand, FIG. 2 shows the semiconductor device example 10 described above.
The module 110 in which a plurality of 0s are vertically stacked is mounted on the board substrate 24.

The semiconductor devices 100 are electrically connected to each other by a laminating bonding material 22 such as solder (a conductive adhesive material such as silver paste may be used), and a board substrate 24 and a board such as solder. It is electrically connected by a mounting bonding material 23 (a conductive adhesive material such as silver paste may be used). Although the conductive protrusions 10 are not formed in the illustrated example, when forming the conductive protrusions 10, the conductive protrusions 10 may be formed by solder balls or solder printing during the stacking process of the semiconductor device 100. Thus, providing the conductive protrusions 10 not only facilitates the vertical stacking of the semiconductor device 100 as described above, but also secures a clearance with the board substrate 24 and facilitates flux cleaning even when the board is mounted alone. Since it is possible to prevent the foreign matter and foreign matter from being trapped, it is possible to provide a high quality semiconductor device.

FIG. 3 shows another form of a semiconductor device 101. In this configuration, the internal lead 7 does not have a step portion for connecting the internal wiring member 3, and since the internal wiring member 3 is electrically connected to the upper surface of the inner end portion of the internal lead 7, it is sealed. The thickness of the stopper 5 is slightly thicker than the thickness of the inner lead 7. Such a form is difficult to be thinned, but has an advantage that an expensive interposer as in the conventional example is unnecessary. Such forms are also included in the present invention. The surface external electrode 8 of the externally exposed portion of the internal lead 7 may be exposed by performing half-cutting with a diamond blade or the like after resin-encapsulating the entire portion including the relevant portion.

Yet another form 102 is shown in FIG. In the semiconductor device 102 of this embodiment, a step portion 7b is provided by cutting out a corner portion on the back surface side of the inner portion of the inner lead 7.
The stepped surface 7b is extended to above the electrode portion of the semiconductor chip 1, and the extended portion 7b and the electrode of the semiconductor chip 1 are electrically connected not by the bonding wire 3 but by the bump 4. This form has a merit that it can be thinned like the form shown in FIG. 1 described above and that an expensive interposer as in the conventional example is unnecessary. Such forms are also included in the present invention.

As can be easily understood from the above description, in the semiconductor device according to the present invention, the internal lead 7 is provided.
Since the back surface part and the front surface part of the semiconductor device become the external electrodes 8 and 9 when the semiconductor device 1 is mounted, a process for electrically connecting the front surface and the back surface electrodes 8 and 9 is unnecessary, and the manufacturing cost is low. It is possible. Moreover, since the resin sealing portion 5 can be formed within a thickness range substantially equal to the thickness of the external electrodes 8 and 9, the semiconductor device 1 can be thinned.

<Regarding Example of Manufacturing Method> Next, an example of the manufacturing method according to the present invention will be described by taking an example of manufacturing the above semiconductor device example. (Semiconductor Chip Manufacturing Step) Although not shown, first, the semiconductor chip 1 having electrodes is manufactured from a silicon wafer. In the present invention, when the semiconductor chip 1 is cut and thinned later, the final cutting and thinning at this point is unnecessary. Therefore, if necessary, cracks do not occur during handling, specifically 130 μm to 350 μm.
It should be cut to about m.

(Chip Arranging Step for Lead Frame) Thereafter, in the manufacturing method of the present invention, by using the lead frame made of a conductive material which is integrally molded in advance in a frame shape, the inner lead 7 is formed. The semiconductor chip 1 is arranged with respect to.

Specific examples of the lead frame 6 are shown in FIGS. The lead frame 6 of this example is a strip-shaped body in which pocket portions 17 (through holes in the illustrated example) for arranging the semiconductor chip 1 are formed in a matrix shape at predetermined intervals in the length direction and the width direction. Inner lead portions 7p arranged in a predetermined number at intervals in the circumferential direction so as to surround the outer frame portion 11 forming the end portion and the periphery of the pocket portion 17.
And a tie bar portion 12 that spans the portions of the internal lead portions 7p on the side opposite to the pocket side and connects the internal lead portions 7p to each other in the circumferential direction to integrate them. A portion surrounded by the tie bar portion 12 is an individualized portion 15 that becomes an individual semiconductor device. Adjacent individualization part 15
The inner lead portions 7p adjacent to each other are integrated by a common tie bar portion 12.

Thus, the tie bar portion 12 arranges the plurality of internal leads 7 toward the semiconductor chip 1 with their tips facing. Further, since the tie bar portion 12 is formed integrally with the outer frame portion 11 of the lead frame 6, it becomes possible to efficiently handle the plurality of semiconductor chips 1 and the inner lead portions 7p.

In order to reduce the thickness of the semiconductor device, as shown in the figure, the internal lead portion 7p is formed by notching the surface side corner portion at the end portion on the semiconductor chip 1 side and forming a step portion 7a. It is preferable that the bonding wire 3 can be connected to the portion 7a. As a result, in the subsequent resin sealing step, the resin can be sealed to a thickness substantially the same as the thickness of the lead frame 6, and the semiconductor device can be thinned.

Further, the semiconductor pocket 17 of the lead frame 6 may be a through hole as shown in the drawing, but may be a hollow hole. When the through hole is used, the lid member 16 is provided before the semiconductor chip 1 is placed in the pocket portion 17.
Can be attached to the back surface of the lead frame 6. As the lid member 16, a tape 16t having a pocket portion 16p in which the semiconductor chip 1 is arranged may be attached, or a metal plate with a pocket formed by etching or the like may be attached or temporarily fixed. In any case, it is recommended that the lid member 16 be peeled off or removed before cutting in order to reduce the load of cutting afterward.

On the other hand, on the back surface of each tie bar portion 12 (on the side where the lid member is attached), a sealing material injection groove 13 that communicates from the pocket portion 17 side to the opposite outside is formed, and the outside of the tie bar portion is sealed. Sealing material reservoir 14 communicating with the material injection groove 13
Is preferably formed. In particular, as shown in the figure, when the reservoir portion 14 is provided for the outer frame portion 11,
It is desirable to form each of the rows corresponding to the row of the pocket portions 17 along the width direction. The sealing material injection groove 13 is provided on the lower surface of the lead frame 6 as the lid material 1.
6, together with 6, forms a sealing material flow path that communicates with the semiconductor chip side and the opposite side, and the sealing material reservoir portion 14 serves to introduce the sealing material into the lead frame 6 from the outside. It forms an inlet. This function will be described in detail in the sealing step. On the other hand, the encapsulant injection groove 13 of the tie bar portion 12 is provided in large numbers at intervals in the extending direction of the tie bar portion 12 as shown in the figure, and is configured to communicate with the mutual gaps of the internal lead portions 7p. Is desirable.

The lead frame 6 described above is made of an alloy such as Cu or 42 alloy material and has a thickness of 0.1 to 0.
A strip-shaped material having a size of about 3 mm can be processed as shown by etching (full etching, half etching) or pressing. In addition, a known surface treatment can be applied to a predetermined portion to which the internal wiring member 3 such as a bonding wire is joined.

In this step, for example, as shown in FIG. 8, the lead frame 6 having the semiconductor chip mounting pocket 17 and the lid member 16 such as a tape with pocket provided on the back surface is prepared. As shown in FIG. 9, the semiconductor chip 1 is arranged in each semiconductor chip mounting pocket 17 and fixed by the chip fixing material 2.

(Wiring Step) After the semiconductor chip 1 is fixed in the pocket portion 17 of the lead frame 6, next, as shown in FIG.
As shown in 0, the electrodes of the semiconductor chip 1 and the internal lead portions 7p of the lead frame 6 are electrically connected by the internal wiring material 3 such as bonding wires.

(Resin Encapsulation Step) After such wiring, FIG.
As shown in, the individualized portion 15 (that is, the portion excluding a part of the internal lead, the internal wiring material and the semiconductor chip) is transfer-sealed with the resin sealing material 5 such as epoxy resin. In the illustrated example, neither the front surface nor the back surface of the outer portion of the inner lead portion 7p except the step portion 7a is sealed, and only the step portion is sealed. Such sealing can be performed by a known method, for example, by housing the lead frame 6 to which a plurality of semiconductor chips 1 are fixed in a sealing mold and performing transfer molding. The surface of the internal lead portion 7p (the portion that becomes the surface external electrode 8)
Alternatively, the required portion of the lead frame 6 including the relevant portion may be collectively resin-sealed, and may be half-cut and exposed by a diamond blade or the like in an appropriate step later.

FIG. 12 shows in detail how the encapsulating material 5 spreads when the above-mentioned preferred lead frame example 6 is used. That is, the encapsulating material 5 injected from the plurality of encapsulating material injecting means 18 (generally also referred to as gates) first flows into the encapsulating material reservoir 14 formed in the lead frame 6 and joins them, thereby being adjacent to each other. The injection timing for the individualizing unit 15 is synchronized. By this synchronization, the injection speed of the sealing material 5 in the molding die is averaged, and unfilled defects due to air bubbles are reduced.

After that, the sealing material 5 of the reservoir 14 is filled with the injection groove 1 formed on the lower surface of the tie bar 12 parallel to the injection direction.
3, and a tie bar portion 1 along a direction orthogonal to the injection direction
2 through the injection groove 13 provided on the lower surface,
While diving under the tie bar portion 12, all the individualized portions 15 are spread and filled. In particular, the injection groove 13 of the tie bar portion 12 in the direction parallel to the injection direction makes the entry speed of the sealing material 5 into the individual singulation parts 15 on the left and right in the injection direction of the sealing material uniform without variation, and the sealing material is parallel. It has the function of enabling injection. In this way, it is possible to successively seal a plurality of individualized portions 15 provided in a matrix, and as a result, uniform sealing is possible as a whole and high quality without voids (air traps) Can be sealed. At this time, the sealing material 5 that has passed the upper surface of the semiconductor chip 1
Since it passes through the encapsulating material injection groove 13 on the lower surface of the lead frame 6 and is sequentially sealed, a plurality of individualized portions 15 are sequentially sealed without a void trap defect (also referred to as unfilled). You can

(Semiconductor Cutting Thinning Step) After sealing with resin, in the present invention, as shown in FIG. 13, it is recommended to cut the back surface side portion of the semiconductor chip 1 to reduce the thickness to a desired degree. Of course, this step can be omitted.

The degree of thinning can be appropriately determined as needed. However, in the present invention, since the semiconductor chip 1 that is resin-sealed and reinforced is cut, the durability against cutting is higher than when the semiconductor wafer itself is thinned. For example, the thickness of the semiconductor chip 1 is 1
The thickness can be significantly reduced to 20 μm or less. This thinning means that the tie bar portion 12 is formed after the resin sealing step as shown in the figure.
The cutting may be performed prior to the cutting, or may be performed in the individualized state after the cutting of the tie bar portion 12. However, in the former case, the back surfaces of the plurality of semiconductor chips 1 fixed thereto together with the lead frame 6 can be ground at one time by using the grinder 20 that rotates around the vertical axis, so that efficient manufacturing is possible. Becomes In this case, the back surface of the semiconductor chip 1 and the back surface of the lead frame 6 are substantially flush with each other.

The lid member 16 is provided on the lower surface of the lead frame 6.
In the case where the above is provided, it is recommended to remove the lid material 16 prior to the cutting from the viewpoint of enabling good cutting,
It goes without saying that the back surface of the semiconductor chip can be thinly cut with the lid member 16 attached to the lower surface of the lead frame 6 as shown in the figure.

Thus, after the steps of assembling and resin sealing are completed, the lead frame 6 on which the semiconductor chips 1 are mounted in a matrix form is cut to 120 μm or less on the back surface of the semiconductor chip 1 so that the lead frame 6 is easily broken to 120 μm or less. It is not necessary to handle thin semiconductor chips 1 and wafers in the processes of assembling and resin sealing, and a large number of semiconductor chips 1 can be cut at the same time. Therefore, it is possible to supply a semiconductor device that is low in cost and has a thinness that has never been achieved.

(Individualization process) After the resin sealing,
In the manufacturing method of the present invention, as shown in FIG. 14, a saw-cut blade 21 that rotates around a lateral axis is used,
The tie bar portion 12 of the lead frame 6 is removed by cutting. As a result, the inner lead portions 7p are separated into the individual inner leads 7, and an individual resin-sealed semiconductor device is obtained.
In the semiconductor device thus formed, since the front surface and the rear surface of the outer portion of the inner lead 7 are not resin-sealed, the outer portion of the inner lead itself constitutes the front surface external electrode 8 and the back surface external electrode 9. It will be.

(Additional Step: Formation of Conductive Protrusion) Further, the surface external electrode 8 is formed during the step after the sealing or after the individualization is completed.
It is also possible to form a conductive protrusion 10 by solder balls, solder printing, or the like on either one of the back surface external electrode 9 and the back surface external electrode 9.

[0058]

As described above, according to the present invention, the cost can be reduced. Further, it becomes possible to manufacture a remarkably thin semiconductor device while preventing the silicon wafer and the semiconductor chip from being cracked in the manufacturing process.

[Brief description of drawings]

FIG. 1 is a vertical cross-sectional view of an example of a semiconductor device according to the present invention.

FIG. 2 is a vertical cross-sectional view of a module in which four layers of semiconductor device examples according to the present invention are vertically stacked and mounted on a board substrate of an electronic device.

FIG. 3 is a vertical sectional view of another embodiment according to the present invention.

FIG. 4 is a longitudinal sectional view of another embodiment according to the present invention.

FIG. 5 is a plan view of a main part of an example of a lead frame according to the present invention.

6 is a cross-sectional view taken along the line VI-VI of FIG.

7 is a sectional view taken along line VII-VII of FIG.

FIG. 8 is a longitudinal cross-sectional view of a main part showing a lead frame preparation step.

FIG. 9 is a longitudinal sectional view of a main part showing a semiconductor chip arranging step.

FIG. 10 is a longitudinal sectional view of an essential part showing a wiring process of an internal wiring material.

FIG. 11 is a longitudinal sectional view of an essential part showing a resin sealing step.

FIG. 12 is a main part plan view showing a resin sealing step.

FIG. 13 is a longitudinal sectional view of an essential part showing a cutting thinning step.

FIG. 14 is a longitudinal sectional view of an essential part showing an individualizing step.

FIG. 15 is a vertical sectional view of a conventional double-sided electrode type resin-sealed semiconductor device.

FIG. 16 is a vertical cross-sectional view of a module in which conventional semiconductor devices are stacked in four layers mounted on a board substrate of an electronic device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Semiconductor chip, 2 chip fixing material, 3 ... Bonding wire, 4 ... Bump, 5 ... Sealing material, 6 ... Lead frame, 7 ... Internal lead, 8 ... Front external electrode, 9 ... Back external electrode, 10 ... Conductivity Protrusion, 11 ... Outer frame part, 12 ... Tie bar part, 13 ... Sealing material injection groove, 14 ... Sealing material reservoir part, 15
... individualized part, 16 ... tape with pocket, 17 ... pocket part for mounting semiconductor chip, 18 ... encapsulant injection port, 19 ... encapsulant that passes through encapsulant pool, 20 ... grinder,
21 ... Blade, 22 ... Laminating bonding material, 23 ... Board mounting bonding material, 24 ... Board substrate, 25 ... Through hole, 2
6 ... Interposer.

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) H01L 23/50 H01L 23/50 G (72) Inventor Tomohiko Konno 6392 Kamiyoshida, Fujiyoshida City, Yamanashi Ka F-term in Fuji Electric Co., Ltd. (reference) 4M109 AA01 BA01 CA21 DA04 FA04 5F044 LL01 RR03 5F061 AA01 BA01 CA21 CB13 DD12 5F067 AA02 AB04 BC14 CB02 CB05

Claims (7)

[Claims] 1. A semiconductor chip having electrodes, internal leads spaced apart from the semiconductor chip, internal wiring portions for electrically connecting the electrodes to the internal leads, the internal leads, the internal wiring portions, and the internal leads. A resin-encapsulated semiconductor device having a resin encapsulating material for encapsulating a semiconductor chip, wherein a part of the internal lead is exposed to the outside of the resin encapsulating material, and both the front and back surfaces of the exposed portion are exposed. Is used as an external electrode of the semiconductor chip. 2. The back surface of the semiconductor chip is cut after the resin is sealed, and the thickness of the semiconductor chip is reduced to 1 by this cutting.
A resin-encapsulated semiconductor device having the resin-encapsulated semiconductor device according to claim 1 or 2 having a thickness of 20 μm or less. 3. A step of manufacturing a semiconductor chip having an electrode from a silicon wafer, a pocket portion surrounded by a plurality of internal lead portions arranged at an interval, and a pocket side of the plurality of internal leads. Preparing a conductive lead frame having a tie bar portion that integrates the inner lead portions with each other on the opposite side, and arranging the semiconductor chip in each of the pockets of the lead frame; A step of electrically connecting the electrode and the internal lead portion of the lead frame with an internal wiring member, and a portion excluding a part of the internal lead, the internal wiring member and the semiconductor chip being resin-sealed. And a step of cutting and removing the tie bar portion of the lead frame to obtain an individual resin-sealed semiconductor device. Method for manufacturing a resin-sealed semiconductor device according to claim. 4. After the resin sealing, prior to the cutting of the tie bar portion, the back side portion of the lead frame including the back side portion of the semiconductor chip is cut, and the semiconductor chip is thinned by this cutting. The method for manufacturing a resin-encapsulated semiconductor device according to claim 3. 5. A semiconductor chip arrangement pocket portion surrounded by a plurality of internal lead portions arranged at a distance from each other, and an internal lead mutual spanning between portions of the plurality of internal lead portions on the opposite side to the pocket side. And a tie bar portion that integrates the inner lead portion, wherein at least one of a front side corner portion and a back side corner portion of the pocket end portion of the inner lead portion is cut out to form a step portion. A lead frame used for a resin-encapsulated semiconductor device characterized by the above. 6. A sealing material injection groove is formed on the back surface of the tie bar portion and communicates from the pocket portion side to the opposite outside, and the sealing material injection groove is communicated on the outside of the tie bar portion with the sealing material injection groove. The lead frame according to claim 5, further comprising a material pool portion. 7. The double-sided electrode type resin-sealed semiconductor device according to claim 1 or 2 is laminated in two or more stages, and the external electrodes of the semiconductor devices are electrically connected to each other. The semiconductor module device.