JP2003229599A - Boron phosphide type semiconductor device, method of manufacturing it, light-emitting diode and boron phosphide type semiconductor layer - Google Patents
Boron phosphide type semiconductor device, method of manufacturing it, light-emitting diode and boron phosphide type semiconductor layerInfo
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Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、珪素(Si)単結
晶(シリコン)基板上に形成した、リン化硼素系半導体
素子を得るに好適となるリン化硼素系半導体層の結晶構
成と、それを具備したリン化硼素系半導体素子に関す
る。TECHNICAL FIELD The present invention relates to a crystal structure of a boron phosphide-based semiconductor layer, which is formed on a silicon (Si) single crystal (silicon) substrate and is suitable for obtaining a boron phosphide-based semiconductor element, and the same. The present invention relates to a boron phosphide-based semiconductor device having:
【0002】[0002]
【従来の技術】従来にあって、硼素(B)とリン(P)
とを構成元素として含むリン化硼素系半導体の一種であ
るリン化硼素(BP)を利用して発光ダイオード(LE
D)或いはレーザダイオード(LD)等の半導体発光素
子を形成する技術が知れている(米国特許第6、06
9、021号参照)。従来のリン化硼素系半導体発光素
子は、例えば、珪素単結晶(シリコン)からなる基板上
に形成されたリン化硼素層を緩衝層として含む積層構造
体を用いて構成されている(上記の米国特許第6、06
9、021号参照)。最近では、ワイドバンドギャップ
のリン化硼素層を障壁(クラッド)層とするpn接合型
二重ヘテロ構造を発光部を備えた半導体発光素子用途の
積層構造体も発明されている(特願2001−1582
82号参照)。2. Description of the Related Art Conventionally, boron (B) and phosphorus (P)
A light emitting diode (LE) is formed by using boron phosphide (BP), which is a kind of boron phosphide-based semiconductor containing
D) or a technique for forming a semiconductor light emitting device such as a laser diode (LD) is known (US Pat. No. 6,063).
9, 021). A conventional boron phosphide-based semiconductor light emitting device is configured using, for example, a laminated structure including a boron phosphide layer formed on a substrate made of silicon single crystal (silicon) as a buffer layer (see the above US Patent No. 6,06
9, 021). Recently, a laminated structure for a semiconductor light emitting device having a pn junction type double hetero structure having a wide bandgap boron phosphide layer as a barrier (cladding) layer has been also invented (Japanese Patent Application No. 2001-2001). 1582
82).
【0003】従来より、シリコン基板上には、基板表面
をなす結晶面と同一の結晶面からなるリン化硼素の単結
晶層が成長することが判明している。例えば表面を{1
00}結晶面とする{100}−Si単結晶基板上に
は、基板表面に平行に積重した{100}結晶面からな
るリン化硼素単結晶層が成長するのが知れている(庄野
克房著、「半導体技術(上)」(1992年6月25
日、(財)東京大学出版会発行第9刷、77頁参照)。
また、シリコン基板上には、双晶(twinning)
を全く含まないリン化硼素単結晶層が成長できることも
知れている(上記の「半導体技術(上)」、98頁参
照)。一方では双晶を含む{100}-リン化硼素単結
晶層も得られるのが知れている(上記の「半導体技術
(上)」、99〜100頁参照)。It has been conventionally known that a single crystal layer of boron phosphide having the same crystal plane as that of the substrate surface grows on a silicon substrate. For example, the surface is {1
It is known that a boron phosphide single crystal layer composed of {100} crystal planes stacked in parallel to the substrate surface grows on a {100} -Si single crystal substrate having a {00} crystal plane (Katsu Shono). Fusa, "Semiconductor Technology (above)" (June 25, 1992)
(See page 77, 9th edition, published by The University of Tokyo Press).
In addition, twinning on the silicon substrate
It is also known to be able to grow a boron phosphide single crystal layer that does not contain any element (see "Semiconductor Technology (above)", page 98). On the other hand, it is known that a {100} -boron phosphide single crystal layer containing twins can be obtained (see "Semiconductor Technology (above)", pages 99 to 100).
【0004】[0004]
【発明が解決しようとする課題】従来技術が開示すると
ころでは、リン化硼素層に含まれる双晶は、結晶格子間
の不整合率を緩和する様な特徴をもっているとされる
(上記の「半導体技術(上)」、100頁参照)。従っ
て、双晶を含むリン化硼素系半導体層を利用すれば特
性、例えば、発光強度に優れるLEDを得るに貢献でき
る。しかし、従来技術が開示する如く、双晶を含むリン
化硼素系半導体層を安定して得るのは困難となってい
る。即ち、従来は双晶を安定して含むリン化硼素系半導
体層を製造するための要件が明かとなってはいないた
め、例えば、発光の強度に優れる発光素子を安定して獲
得するに支障を来している。The prior art discloses that the twin crystals contained in the boron phosphide layer have a characteristic of relaxing the mismatch rate between the crystal lattices (the above-mentioned " Semiconductor Technology (above) ", p. 100). Therefore, the use of the boron phosphide-based semiconductor layer containing twins can contribute to obtaining an LED having excellent characteristics, for example, light emission intensity. However, as disclosed in the prior art, it is difficult to stably obtain a boron phosphide-based semiconductor layer containing twins. That is, conventionally, the requirements for producing a boron phosphide-based semiconductor layer that stably contains twins have not been clarified, so that, for example, it is difficult to stably obtain a light-emitting element having excellent emission intensity. Is coming.
【0005】本発明は、双晶を安定して含ませることが
できる結晶構成からなるリン化硼素系半導体層を提供す
ることを目的とする。また、本発明では、特定の結晶方
向を双晶面とする双晶を安定して含む多結晶のリン化硼
素系半導体層を備えることにより、特性の向上したリン
化硼素系半導体素子を提供する。ここで本発明の目的と
する結晶構造からなるリン化硼素系半導体層とは、従来
の膜状の単結晶からなるのではなく、双晶境界面(双晶
面)(C.W.バン著、「化学結晶学」(昭和45年6
月15日、(株)培風館発行初版、75〜76頁参照)
の結晶方向を相違する単結晶体を集合させてなる多結晶
からなるリン化硼素系半導体層である。An object of the present invention is to provide a boron phosphide-based semiconductor layer having a crystal structure capable of stably containing twins. The present invention also provides a boron phosphide-based semiconductor device having improved characteristics by including a polycrystalline boron phosphide-based semiconductor layer that stably contains twins having twin planes in a specific crystal direction. . Here, the boron phosphide-based semiconductor layer having a crystal structure, which is the object of the present invention, does not consist of a conventional film-like single crystal, but a twin boundary surface (twin crystal surface) (CW Van. , "Chemical Crystallography" (1965
(See page 75-76, the first edition published by Baifukan Co., Ltd. on March 15th.)
Is a boron phosphide-based semiconductor layer composed of a polycrystal formed by assembling single crystal bodies having different crystal directions.
【0006】[0006]
【課題を解決するための手段】即ち、本発明は、(1)
珪素(Si)単結晶からなる基板と、該基板の表面上に
形成された、基板の表面を構成する結晶面と同一の結晶
面を有するリン化硼素系半導体結晶からなるリン化硼素
系半導体層とを備えたリン化硼素系半導体素子に於い
て、前記の基板が、表面を{111}結晶面とする{1
11}−Si単結晶からなり、前記のリン化硼素系半導
体層は、基板の{111}結晶面に平行に配列したリン
化硼素系半導体結晶の{111}結晶面からなる底面を
有し、且つ{111}結晶面と等価な面で囲まれた、複
数の四角錘状のリン化硼素系半導体結晶の単結晶体を集
合させた多結晶層から構成され、さらに該単結晶体が、
基板の<110>結晶方向に対して60度の角度で傾い
た双晶境界面を有することを特徴とするリン化硼素系半
導体素子。である。Means for Solving the Problems That is, the present invention provides (1)
A substrate made of silicon (Si) single crystal, and a boron phosphide-based semiconductor layer formed of a boron phosphide-based semiconductor crystal formed on the surface of the substrate and having the same crystal plane as the crystal plane constituting the surface of the substrate In a boron phosphide-based semiconductor device having a surface of the substrate, the surface of the substrate is a {111} crystal plane {1
11} -Si single crystal, wherein the boron phosphide-based semiconductor layer has a bottom surface composed of the {111} crystal planes of the boron phosphide-based semiconductor crystal arranged in parallel with the {111} crystal planes of the substrate, Further, it is composed of a polycrystalline layer in which a plurality of tetragonal pyramidal boron phosphide-based semiconductor crystal single crystals are surrounded by a plane equivalent to the {111} crystal plane, and the single crystal is
A boron phosphide-based semiconductor device having a twin boundary surface inclined at an angle of 60 degrees with respect to the <110> crystal direction of the substrate. Is.
【0007】また本発明は、(2)前記リン化硼素系半
導体層の上にIII−V族化合物半導体層が積層されて
形成された異種(ヘテロ)接合を有し、該III−V族
化合物半導体層が、リン化硼素系半導体層をなす単結晶
体の表面に交差する結晶面の面間隔(格子間隔)に一致
する間隔で配列した結晶面から構成されることを特徴と
する上記(1)に記載のリン化硼素系半導体素子。
(3)前記リン化硼素系半導体結晶の単結晶体が、単量
体のリン化硼素(boron monophosphi
de)結晶からなることを特徴とする上記(1)または
(2)に記載のリン化硼素系半導体素子。The present invention also includes (2) a heterojunction formed by laminating a III-V group compound semiconductor layer on the boron phosphide-based semiconductor layer, wherein the III-V group compound is used. The semiconductor layer is composed of crystal planes arranged at an interval corresponding to the interplanar spacing (lattice spacing) of the crystal planes intersecting the surface of the single crystal body forming the boron phosphide-based semiconductor layer. ).
(3) The single crystal of the boron phosphide-based semiconductor crystal is a monomer boron phosphide (boron monophosphi).
de) A boron phosphide-based semiconductor device as described in (1) or (2) above, which is made of a crystal.
【0008】また本発明は、(4)前記リン化硼素系半
導体層を、{111}−Si単結晶基板上に950℃以
上1100℃以下の温度に於いて、有機金属熱分解気相
成長法(MOCVD法)により、成長速度を毎分20n
m以上60nm以下として形成することを特徴とする上
記(1)ないし(3)に記載のリン化硼素系半導体素子
の製造方法。(5)前記リン化硼素系半導体層を、{1
11}−Si単結晶基板上に1025℃以上1075℃
以下の温度に於いて、有機金属熱分解気相成長法(MO
CVD法)により、成長速度を毎分30nm以上40n
m以下として形成することを特徴とする上記(4)に記
載のリン化硼素系半導体素子の製造方法。である。The present invention also provides (4) the above-mentioned boron phosphide-based semiconductor layer on a {111} -Si single crystal substrate at a temperature of 950 ° C. or higher and 1100 ° C. or lower, and a metalorganic pyrolysis vapor phase epitaxy method. (MOCVD method), the growth rate is 20n / min
The method for manufacturing a boron phosphide-based semiconductor device according to any one of the above (1) to (3), characterized in that the boron phosphide-based semiconductor device is formed to have a thickness of m or more and 60 nm or less. (5) The boron phosphide-based semiconductor layer is replaced with {1
1125-Si single crystal substrate 1025 ° C or more 1075 ° C
Metalorganic pyrolysis vapor phase epitaxy (MO
The growth rate is 30 nm or more per minute and 40 n
The method for producing a boron phosphide-based semiconductor device according to (4) above, wherein the boron phosphide-based semiconductor device is formed with a thickness of m or less. Is.
【0009】また本発明は、(6)上記(1)ないし
(3)に記載のリン化硼素系半導体素子からなる発光ダ
イオード。である。The present invention also provides (6) a light emitting diode comprising the boron phosphide-based semiconductor device according to any one of (1) to (3) above. Is.
【0010】また本発明は、(7)珪素(Si)単結晶
からなる基板の表面上に形成された、基板の表面を構成
する結晶面と同一の結晶面を有するリン化硼素系半導体
結晶からなるリン化硼素系半導体層に於いて、前記の基
板が、表面を{111}結晶面とする{111}−Si
単結晶からなり、前記のリン化硼素系半導体層は、基板
の{111}結晶面に平行に配列したリン化硼素系半導
体結晶の{111}結晶面からなる底面を有し、且つ
{111}結晶面と等価な面で囲まれた、複数の四角錘
状のリン化硼素系半導体結晶の単結晶体を集合させた多
結晶層から構成され、さらに該単結晶体が、基板の<1
10>結晶方向に対して60度の角度で傾いた双晶境界
面を有することを特徴とするリン化硼素系半導体層。で
ある。Further, according to the present invention, (7) a boron phosphide-based semiconductor crystal formed on a surface of a substrate made of silicon (Si) single crystal and having the same crystal plane as the crystal plane constituting the surface of the substrate In the boron phosphide-based semiconductor layer, the substrate is {111} -Si having a surface of {111} crystal face.
The boron phosphide-based semiconductor layer is made of a single crystal, and has a bottom surface composed of the {111} crystal planes of the boron phosphide-based semiconductor crystal arranged in parallel with the {111} crystal plane of the substrate, and {111}. It is composed of a polycrystalline layer in which a plurality of quadrangular pyramid-shaped boron phosphide-based semiconductor crystal single crystals are surrounded by a plane equivalent to the crystal plane, and the single crystal is further provided with <1
10> A boron phosphide-based semiconductor layer having a twin boundary surface inclined at an angle of 60 degrees with respect to the crystal direction. Is.
【0011】[0011]
【発明の実施の形態】本発明では、リン化硼素系半導体
層は{111}結晶面を表面とするSi単結晶基板(本
明細書では、{111}−Si単結晶基板と記載す
る。)上に好適に形成できる。ダイヤモンド(diam
ond)結晶構造型のSi単結晶の{111}結晶面に
は、{100}或いは{110}結晶面よりも密に珪素
原子が存在している。従って、{111}−Si単結晶
基板では、その上に堆積するリン化硼素系半導体層の構
成元素の基板内部への拡散、浸透を抑制できる利点があ
り、明瞭な接合界面を構成するに効果を奏する。導電性
を有する{111}−Si単結晶基板ではまた、裏面に
正負、何れかの極性のオーミック(Ohmic)性電極
を裏面電極して敷設でき、例えば、発光素子を簡便に構
成するに効果を上げられる。特に、抵抗率を1ミリオー
ム(mΩ)以下、より望ましくは0.1mΩ以下とする
低い比抵抗(抵抗率)の導電性単結晶基板は、順方向電
圧(所謂、Vf)の低いLEDをもたらすに貢献する。
また、放熱性に優れるため安定した発振をもたらすLD
を構成するに有効となる。BEST MODE FOR CARRYING OUT THE INVENTION In the present invention, a boron phosphide-based semiconductor layer has a Si single crystal substrate having a {111} crystal face as a surface (in this specification, described as a {111} -Si single crystal substrate). It can be suitably formed on top. Diamond
on) In the {111} crystal plane of the Si single crystal of the crystal structure type, silicon atoms are denser than in the {100} or {110} crystal plane. Therefore, the {111} -Si single crystal substrate has the advantage of being able to suppress the diffusion and permeation of the constituent elements of the boron phosphide-based semiconductor layer deposited thereon into the substrate, and is effective in forming a clear bonding interface. Play. In the conductive {111} -Si single crystal substrate, an ohmic electrode having positive or negative polarity or any polarity can be laid as a back electrode on the back surface, and for example, it is effective to easily configure a light emitting element. Can be raised. In particular, a conductive single crystal substrate having a low specific resistance (resistivity) of 1 milliohm (mΩ) or less, and more preferably 0.1 mΩ or less has a low forward voltage (so-called Vf). To contribute.
In addition, the LD that has excellent heat dissipation provides stable oscillation.
Is effective in configuring.
【0012】好ましくは{111}−Si基板表面上に
積層する多結晶層のリン化硼素系半導体層は、硼素
(B)とリン(P)とを構成元素として含む例えば、B
αAlβGaγIn1- α - β - γP1- δAsδ層(0<α
≦1、0≦β<1、0≦γ<1、0<α+β+γ≦1、
0≦δ<1)とする。また、例えば、BαAlβGaγ
In 1- α - β - γP1- δNδ(0<α≦1、0≦β<1、
0≦γ<1、0<α+β+γ≦1、0≦δ<1)から構
成する。単量体のリン化硼素(boron monop
hosphide:BP)は、構成元素が硼素(B)と
リン(P)のみであり、多元混晶よりも構成元素が少な
く成膜が容易であるという利点があるため特に好まし
い。また、例えば、有機金属熱分解気相成長(MOCV
D)手段に依り、成長速度を毎分2nm以上で30nm
以下とし、リン等のV族元素と硼素等のIII族元素の
原料の供給比率(所謂、V/III比)を15以上で6
0以下の範囲として成長したリン化硼素は、室温での禁
止帯幅を約3eVとするワイドバンドギャップ(wid
e bandgap)半導体となる。この様な禁止帯幅
の広いリン化硼素半導体層は例えば、発光素子にあっ
て、発光層に対する障壁(clad)層として利用でき
る。Preferably on the surface of the {111} -Si substrate
The boron phosphide-based semiconductor layer of the polycrystalline layer to be laminated is boron.
Containing (B) and phosphorus (P) as constituent elements, for example, B
αAlβGaγIn1- α - β - γP1- δAsδLayer (0 <α
≦ 1, 0 ≦ β <1, 0 ≦ γ <1, 0 <α + β + γ ≦ 1,
0 ≦ δ <1). Also, for example, BαAlβGaγ
In 1- α - β - γP1- δNδ(0 <α ≦ 1, 0 ≦ β <1,
0 ≦ γ <1, 0 <α + β + γ ≦ 1, 0 ≦ δ <1)
To achieve. Monomeric boron phosphide (boron monop)
The constituent element of phosphide (BP) is boron (B).
Only phosphorus (P), with less constituent elements than multi-element mixed crystals
It is particularly preferable because it has the advantage of easy film formation.
Yes. In addition, for example, metal organic pyrolysis vapor deposition (MOCV)
D) Depending on the means, the growth rate is 2 nm per minute or more and 30 nm
The following is defined as a group V element such as phosphorus and a group III element such as boron.
Raw material supply ratio (so-called V / III ratio) of 15 or more is 6
Boron phosphide grown as a range of 0 or less is prohibited at room temperature.
Wide bandgap (wid) with a band width of about 3 eV
e bandgap) semiconductor. Bandwidth like this
For example, a wide boron phosphide semiconductor layer is used in a light emitting device.
And can be used as a clad layer for the light emitting layer.
It
【0013】多結晶層のリン化硼素系半導体層は、本発
明では、複数のリン化硼素系半導体結晶からなる単結晶
体を集合させて構成する。本発明に係わる多結晶層を構
成する単結晶体の形状を図1に模式的に示す。{11
1}−Si単結晶基板11上の各単結晶体13は、周囲
をリン化硼素系半導体結晶の{111}結晶面と等価な
面とする正四角錘体13b或いは正四角錘体の頂部を
{111}結晶面とする四角錐状体13cの外形をなし
ている。各単結晶体13の底面13aは、{111}−
Si単結晶基板の{111}結晶面に平行に配置された
リン化硼素系半導体結晶の{111}結晶面からなる。
底面13aとは、{111}−Si単結晶基板11の表
面に接地している結晶面である。In the present invention, the boron phosphide-based semiconductor layer of the polycrystal layer is formed by assembling a single crystal body composed of a plurality of boron phosphide-based semiconductor crystals. The shape of the single crystal body forming the polycrystalline layer according to the present invention is schematically shown in FIG. {11
Each single crystal body 13 on the 1} -Si single crystal substrate 11 has a regular tetragonal pyramid 13b or a top portion of the regular tetragonal pyramid having a periphery equivalent to the {111} crystal plane of the boron phosphide-based semiconductor crystal. It has an outer shape of a quadrangular pyramid 13c having a {111} crystal face. The bottom surface 13a of each single crystal body 13 is {111}-
It is composed of a {111} crystal plane of a boron phosphide-based semiconductor crystal arranged parallel to the {111} crystal plane of the Si single crystal substrate.
The bottom surface 13a is a crystal surface that is grounded on the surface of the {111} -Si single crystal substrate 11.
【0014】本発明の多結晶層は、図2の平面模式図に
示す如く、上記の複数の四角錐状の単結晶体13を相互
に結合させて構成されている。各単結晶体13は接合面
16を介して互いに連結している。各単結晶体13の内
部には、双晶15を存在させてある。各単結晶体13の
内部に含ませた双晶面14の存在する方向が画一的に一
定ではないため、その様な異なる結晶方向に双晶を含む
各々の単結晶体13から構成されているリン化硼素系半
導体層を、本発明では多結晶層と称している。本発明で
は特に、基板をなす{111}−Si単結晶の<110
>結晶方向に対し角度にして60度(°)の方向に双晶
面を規則的に含ませた単結晶体13を集合させて多結晶
層を構成する。ここで云う双晶面とは、具体的には、リ
ン化硼素系半導体結晶の{111}結晶面に等価な面で
ある。即ち、{111}、{−1.−1.−1.}、
{1.−1.1.}等の結晶面である。また、双晶面
は、四角錘状の単結晶体13の周囲を構成するリン化硼
素系半導体結晶の何れかの{111}結晶面に平行とな
っているのが特徴である。リン化硼素系半導体結晶の
{111}結晶面を双晶面14とする双晶15の発生に
因り、Si単結晶基板とリン化硼素系半導体結晶との格
子ミスマッチに起因するミスミット(misfit)転
位の発生、伝搬を効果的に抑制できる。リン化硼素系半
導体結晶では、{111}結晶面を双晶面とする双晶
は、他の結晶面を双晶面とする双晶に比較して安定して
且つ容易に形成することができる。従って、リン化硼素
系半導体結晶の{111}結晶面を双晶面とする双晶を
含む単結晶体を集合させて多結晶層を構成すれば、ミス
フィット転位の伝搬を安定して抑制するに効力を発揮で
きる。As shown in the schematic plan view of FIG. 2, the polycrystalline layer of the present invention is formed by bonding the above-mentioned plurality of quadrangular pyramid-shaped single crystal bodies 13 to each other. The single crystal bodies 13 are connected to each other via the joint surface 16. Twins 15 are present inside each single crystal body 13. Since the directions in which the twin planes 14 included in each single crystal body 13 exist are not uniformly uniform, each single crystal body 13 is composed of the single crystal bodies 13 containing twins in different crystal directions. The boron phosphide-based semiconductor layer is referred to as a polycrystalline layer in the present invention. In the present invention, in particular, <110} of the {111} -Si single crystal forming the substrate is <110.
> A single crystal body 13 having twin planes regularly included in a direction of 60 degrees (°) with respect to the crystal direction is assembled to form a polycrystalline layer. The twin plane referred to here is specifically a plane equivalent to the {111} crystal plane of the boron phosphide-based semiconductor crystal. That is, {111}, {-1. -1. -1. },
{1. -1.1. } And other crystal planes. Further, the twin plane is characterized in that it is parallel to any {111} crystal plane of the boron phosphide-based semiconductor crystal forming the periphery of the quadrangular pyramid-shaped single crystal body 13. Due to the generation of twins 15 having the {111} crystal planes of the boron phosphide-based semiconductor crystal as twin planes 14, a mismit dislocation resulting from a lattice mismatch between the Si single crystal substrate and the boron phosphide-based semiconductor crystal It is possible to effectively suppress the occurrence and propagation of. In a boron phosphide-based semiconductor crystal, a twin crystal having a {111} crystal plane as a twin plane can be formed more stably and easily than a twin crystal having another crystal plane as a twin plane. . Therefore, if a polycrystal layer is formed by assembling single crystal bodies containing twins having the {111} crystal planes of the boron phosphide-based semiconductor crystal as twin planes, the propagation of misfit dislocations can be suppressed stably. Can be effective.
【0015】双晶の存在は例えば、電子線回折技法によ
り撮像された電子線回折図形(パターン)上の異常回折
斑点(spot)の有無より知れる(坂 公恭著、「結
晶電子顕微鏡学」、1997年11月25日、(株)内
田老鶴圃発行第1版、111〜113頁参照)。また、
入射電子線をリン化硼素系半導体層の<110>結晶方
向に平行として撮像した回折図形上の<110>結晶方
向と双晶に起因する回折斑点とのなす角度を計測すれ
ば、<110>結晶方向と双晶とがなす角度を知ること
ができる。因みに、双晶はまた、一種の積層欠陥(st
acking fault)と見なすこともできる(上
記の「結晶電子顕微鏡学」、112頁参照)。The presence of twins is known, for example, from the presence or absence of anomalous diffraction spots on an electron beam diffraction pattern (pattern) imaged by an electron beam diffraction technique (Kankyu Saka, “Crystal Electron Microscopy”, (November 25, 1997, Uchida Old Crane Farm, First Edition, pp. 111-113). Also,
The angle formed between the <110> crystal direction on the diffraction pattern and the diffraction spots caused by twinning on the diffraction pattern obtained by imaging the incident electron beam parallel to the <110> crystal direction of the boron phosphide-based semiconductor layer is <110>. The angle between the crystal direction and the twin can be known. By the way, twins are also a kind of stacking fault (st
acking fault) (see "Crystal Electron Microscopy", page 112, above).
【0016】本発明に係わる双晶を含む単結晶体を集合
させた多結晶層を得るには、成膜時の条件を精密に制御
する必要がある。特に、{111}結晶面を双晶面とす
る双晶を含むリン化硼素系半導体結晶からなる四角錘状
の単結晶体は、例えば、トリエチル硼素((C2H5)3
B)/ホスフィン(PH3)/水素(H2)を原料系とす
る常圧の有機金属熱分解気相成長法(MOCVD法)に
よって、成長温度を精密に制御して形成する。上記MO
CVD手段にあって、リン化硼素系半導体多結晶層、特
に、単量体のリン化硼素の多結晶層を得るに好適な温度
の範囲は、950℃以上1100℃以下さらに好ましく
は1025℃〜1075℃の範囲である。インジウム
(In)を含むリン化硼素系半導体多結晶層の形成に
は、より低温の約950℃〜約1000℃が好適であ
る。アルミニウム(Al)を構成元素として含むリン化
硼素系半導体多結晶層は、比較的に高温の約1050℃
〜1100℃が好適である。約1200℃を越える高温
では、BP6、B13P2等のリン化硼素多量体が発生し易
くなり、組成的に均質なリン化硼素系半導体層を得るに
不都合となる。In order to obtain a polycrystalline layer in which single crystals containing twin crystals according to the present invention are assembled, it is necessary to precisely control the conditions during film formation. In particular, a tetragonal pyramidal single crystal made of a boron phosphide-based semiconductor crystal containing twins having a {111} crystal plane as a twin plane is, for example, triethylboron ((C 2 H 5 ) 3
B) / Phosphine (PH 3 ) / Hydrogen (H 2 ) is used as a raw material system by a normal pressure metalorganic pyrolysis vapor phase epitaxy method (MOCVD method) while precisely controlling the growth temperature. MO above
In the CVD method, a temperature range suitable for obtaining a boron phosphide-based semiconductor polycrystalline layer, particularly a monomer boron phosphide polycrystalline layer, is 950 ° C. or more and 1100 ° C. or less, and more preferably 1025 ° C. or less. It is in the range of 1075 ° C. A lower temperature of about 950 ° C. to about 1000 ° C. is suitable for forming the boron phosphide-based semiconductor polycrystalline layer containing indium (In). The boron phosphide-based semiconductor polycrystalline layer containing aluminum (Al) as a constituent element has a relatively high temperature of about 1050 ° C.
~ 1100 ° C is preferred. At a high temperature exceeding about 1200 ° C., boron phosphide multimers such as BP 6 and B 13 P 2 are easily generated, which is inconvenient to obtain a compositionally homogeneous boron phosphide-based semiconductor layer.
【0017】また、双晶を内在する単結晶体を効率的に
形成するには、成長の速度を毎分20nmから毎分60
nmの範囲とするのが望ましい。単量体のリン化硼素
(BP)にあっては、毎分30nm〜40nmの成長の
速度が特に好適である。60nmを越える速度で成長さ
せた単結晶体には、多量の双晶(積層欠陥)に加え、点
欠陥や転位等の他の結晶欠陥の密度が急激に増加する不
都合を生じ、結晶性に優れる多結晶層を得るに困難を来
す。逆に、成長速度を小さくすると、即ち、所望の層厚
のリン化硼素系半導体層を得るにより長時間を要する状
況とすると、成長時に於いて構成元素のリン(P)の揮
散する機会が増す。このため、20nm/分未満の小さ
な成長速度は、リン(P)の蒸発、揮散に起因するリン
化硼素系半導体層の構成元素間での化学的な当量比の不
均衡が急激に発生する。化学量論的に不均衡な組成のリ
ン化硼素系化合物半導体層には、点欠陥が多量に含まれ
ているため本発明に係わる多結晶層とするには不適であ
る。In order to efficiently form a single crystal body containing twins, the growth rate is 20 nm / min to 60 min / min.
It is desirable to set it in the range of nm. For monomeric boron phosphide (BP), a growth rate of 30 nm to 40 nm per minute is particularly suitable. A single crystal grown at a rate of more than 60 nm has excellent crystallinity because a large amount of twin crystals (stacking faults) and the density of other crystal defects such as point defects and dislocations are rapidly increased. It is difficult to obtain a polycrystalline layer. On the contrary, when the growth rate is reduced, that is, when it takes a longer time to obtain a boron phosphide-based semiconductor layer having a desired layer thickness, the opportunity for the constituent element phosphorus (P) to volatilize during the growth increases. . Therefore, at a small growth rate of less than 20 nm / min, a chemical equivalence ratio imbalance between the constituent elements of the boron phosphide-based semiconductor layer suddenly occurs due to evaporation and volatilization of phosphorus (P). The boron phosphide-based compound semiconductor layer having a stoichiometrically imbalanced composition is not suitable for the polycrystalline layer according to the present invention because it contains a large amount of point defects.
【0018】単結晶体の内部に含まれる双晶は、例え
ば、基板のSi単結晶と単結晶体を構成するリン化硼素
系半導体との格子ミスマッチに起因して発生するミスフ
ィット転位の伝搬を抑制する作用を有する。例えば、S
i基板と単結晶体との接合界面から発生したミスフィッ
ト転位は、単結晶体の内部に在る双晶により吸収され、
より上方への伝搬を抑制する作用を有する。これに依
り、単結晶体の上部に至るまで貫通する貫通転位の密度
は減ぜられる。The twin crystals contained in the single crystal body cause the propagation of misfit dislocations caused by the lattice mismatch between the Si single crystal of the substrate and the boron phosphide-based semiconductor forming the single crystal body. Has a suppressing effect. For example, S
Misfit dislocations generated from the bonding interface between the i substrate and the single crystal body are absorbed by twins inside the single crystal body,
It has the effect of suppressing upward propagation. As a result, the density of threading dislocations penetrating to the top of the single crystal body is reduced.
【0019】また、そもそもミスフィット転位の少ない
単結晶体を得るには、Si単結晶基板とリン化硼素系半
導体層との中間に緩衝層を設ける技術手段も有効とな
る。緩衝層は、非晶質または多結晶のリン化硼素系化合
物半導体層から構成するのが好適である。非晶質または
多結晶の緩衝層は、基板をなすSi単結晶との格子不整
合性を緩和して、ミスフィット転位等の結晶欠陥密度の
小さいリン化硼素系半導体層をもたらすに効果を発揮す
る。また、特に、緩衝層をリン化硼素系半導体から構成
すると、硼素とリンは成長を促進する「成長核」として
作用するため、その上に連続性のあるリン化硼素系半導
体層を形成するに効果を奏する。緩衝層をリン化硼素か
ら構成する場合、層厚は約1nm以上で50nm以下、
更には2nm以上で15nm以下とするのが好ましい。In order to obtain a single crystal body with few misfit dislocations, the technical means of providing a buffer layer between the Si single crystal substrate and the boron phosphide-based semiconductor layer is also effective. The buffer layer is preferably composed of an amorphous or polycrystalline boron phosphide-based compound semiconductor layer. The amorphous or polycrystalline buffer layer is effective in relaxing the lattice mismatch with the Si single crystal that forms the substrate and providing a boron phosphide-based semiconductor layer with a low density of crystal defects such as misfit dislocations. To do. Further, in particular, when the buffer layer is composed of a boron phosphide-based semiconductor, since boron and phosphorus act as “growth nuclei” for promoting growth, it is necessary to form a continuous boron phosphide-based semiconductor layer thereon. Produce an effect. When the buffer layer is composed of boron phosphide, the layer thickness is about 1 nm or more and 50 nm or less,
Further, it is preferable that the thickness is 2 nm or more and 15 nm or less.
【0020】双晶を含む単結晶体を集合させて構成した
多結晶層の表層部は、下方のSi単結晶基板側から貫通
して来るミスフィト転位が少なく、結晶性に優れる領域
となっている。従って、本発明の構成からなるリン化硼
素系半導体多結晶層上には、結晶性に優れる堆積層を成
長させることができる。特に、堆積層を、多結晶層の表
面をなすリン化硼素系半導体の単結晶体の表面に交差す
る結晶格子の面間隔(格子間隔)と同一の間隔に配列し
た結晶面から構成される結晶層とすると、ミスフィット
転位の少ない結晶性に優れる結晶層を得るに効果を上げ
られる。図3に模式的に示す如く、単結晶体の{11
1}結晶面からなる表面17に交差する低次のミラー指
数{hkl}面には、h=k=l=1の{111}の
他、{110}、{100}結晶面等がある。これら
{hkl}結晶面の単結晶体の{111}結晶面表面に
於ける間隔(=d)は、立方晶閃亜鉛鉱結晶のリン化硼
素系半導体結晶にあっては、d(Å)=a/{(h2+
k2+l2)1/2・sinθ}で与えられる。a(Å)は
リン化硼素系半導体結晶の格子定数であり、θは{11
1}結晶表面17とそれに交差する結晶面とがなす角度
(°)である。例えば、リン化硼素(BP)多結晶層の
表面上に、その表面を構成するBP単結晶体13の{1
11}結晶面と直角に交差する{110}結晶面と格子
間隔(≒3.21Å)に一致する、六方晶の(1.0.
0.0.)結晶面を配列したウルツ鉱結晶型(Wurt
zite)の窒化ガリウム・インジウム混晶(Ga0.94
In0.06N)結晶層を堆積する例が上げられる。この様
な結晶性に優れる結晶層は、例えば、発光素子にあっ
て、高強度の発光をもたらす発光層として好適に利用で
きる。The surface layer portion of the polycrystalline layer formed by assembling single crystal bodies containing twins has a small amount of misfito dislocations penetrating from the side of the Si single crystal substrate below and is a region having excellent crystallinity. . Therefore, a deposited layer having excellent crystallinity can be grown on the boron phosphide-based semiconductor polycrystalline layer having the structure of the present invention. In particular, a crystal composed of crystal planes in which the deposited layer is arranged at the same spacing as the lattice spacing of the crystal lattice intersecting the surface of the single crystal body of the boron phosphide-based semiconductor forming the surface of the polycrystalline layer. When the layer is used, it is possible to obtain an effect of obtaining a crystal layer having few misfit dislocations and excellent crystallinity. As shown schematically in FIG. 3, the single crystal {11
Low-order Miller index {hkl} planes intersecting the surface 17 made of 1} crystal planes include {110} and {100} crystal planes in addition to {111} where h = k = 1 = 1. The spacing (= d) in the {111} crystal plane surface of these {hkl} crystal plane single crystals is d (Å) = in the boron phosphide-based semiconductor crystal of cubic zinc blende crystal. a / {(h 2 +
k 2 + l 2 ) 1/2 · sin θ}. a (Å) is the lattice constant of the boron phosphide-based semiconductor crystal, and θ is {11
1} is the angle (°) formed by the crystal surface 17 and the crystal plane intersecting it. For example, on the surface of a boron phosphide (BP) polycrystal layer, {1 of the BP single crystal 13 constituting the surface is formed.
Hexagonal (1.0.11) that matches the lattice spacing (≈3.21Å) with the {110} crystal plane that intersects the 11} crystal plane at a right angle.
0.0. ) Wurtzite crystal type (Wurt)
Zite) gallium nitride / indium mixed crystal (Ga 0.94)
An example of depositing an In 0.06 N) crystal layer is given. Such a crystal layer having excellent crystallinity can be suitably used, for example, in a light emitting device as a light emitting layer that provides high intensity light emission.
【0021】本発明に係わるリン化硼素系半導体の多結
晶層を利用すれば、リン化硼素系半導体素子として例え
ばLEDを構成できる。LEDは例えば、p形{11
1}−Si単結晶基板と、基板上に硼素(B)とリン
(P)とを含む非晶質の緩衝層を介して成長した本発明
に係わるp形リン化硼素(BP)多結晶層と、多結晶層
上のn形発光層と、発光層上の成長させた本発明に係わ
るn形リン化硼素(BP)多結晶層とを備えた積層構造
体を基に構成できる。室温での禁止帯幅を約3eVとす
るリン化硼素の単結晶体から構成される多結晶層は、発
光層を挟持するクラッド(clad)層として利用でき
る。発光層はGaXIn1-XN(0≦X≦1)或いはリン
化窒化ガリウム(GaN1-YPY:0<Y≦1)等からな
る井戸(well)層を備えた単一或いは多重の量子井
戸(Quantum Well)構造から構成すること
もできる。因みに、井戸層に対するバリア(barri
er)層は窒化アルミニウム・ガリウム(AlXGa1-X
N:0≦X≦1)やGaN1-ZPZ(0≦Z<1、Z<
Y)等から構成できる。上記の積層構造体の表層をなす
n形リン化硼素多結晶層にn形オーミック(Ohmi
c)電極を設け、また、p形Si単結晶基板の裏面にp
形オーミック電極を配置して、pn接合型ヘテロ構造の
LEDを構成できる。By using the polycrystalline layer of the boron phosphide-based semiconductor according to the present invention, for example, an LED can be constructed as a boron phosphide-based semiconductor element. LEDs are, for example, p-type {11
1} -Si single crystal substrate and p-type boron phosphide (BP) polycrystalline layer according to the present invention grown on the substrate through an amorphous buffer layer containing boron (B) and phosphorus (P) And a n-type light emitting layer on the polycrystalline layer, and an n-type boron phosphide (BP) polycrystalline layer according to the present invention grown on the light emitting layer. A polycrystalline layer composed of a single crystal of boron phosphide having a bandgap of about 3 eV at room temperature can be used as a clad layer sandwiching a light emitting layer. The light emitting layer is a single layer provided with a well layer made of Ga x In 1 -X N (0 ≦ X ≦ 1) or gallium phosphide nitride (GaN 1-Y P Y : 0 <Y ≦ 1), or a single layer. It may be composed of a multiple quantum well structure. By the way, the barrier against the well layer (barri)
er) layer is aluminum gallium nitride (Al X Ga 1-X)
N: 0 ≦ X ≦ 1) or GaN 1-Z P Z (0 ≦ Z <1, Z <
Y) or the like. An n-type ohmic (Ohmi) layer is formed on the n-type boron phosphide polycrystal layer forming the surface layer of the above laminated structure.
c) An electrode is provided, and a p-type Si single crystal substrate is provided with a p
A pn junction type heterostructure LED can be constructed by arranging the ohmic ohmic electrodes.
【0022】また、アンドープ(undope)で高抵
抗の{111}−Si単結晶基板と、基板上に硼素
(B)とリン(P)とを含む多結晶の緩衝層を介して成
長した酸素(O)が添加された高抵抗のリン化硼素多結
晶層と、多結晶層上に高純度のn形窒化ガリウム(Ga
N)層を活性層(電子走行層)として備えた積層構造体
からは、ヘテロ接合型の電界効果トランジスタ(FE
T)等の電子デバイスを構成できる。FETは、活性層
上にショットキー(Schottky)接合型のゲート
(gate)電極を、また活性層上に積層したn形コン
タクト層の表面のゲート電極を挟んで対向する位置にソ
ース(source)及びドレイン(drain)オー
ミック電極を、それぞれ設けて構成する。In addition, an undoped and high resistance {111} -Si single crystal substrate and oxygen grown on the substrate through a polycrystalline buffer layer containing boron (B) and phosphorus (P) ( O) -doped high-resistance boron phosphide polycrystal layer, and high-purity n-type gallium nitride (Ga) on the polycrystal layer.
The heterojunction field effect transistor (FE) is formed from the laminated structure including the N) layer as an active layer (electron transit layer).
An electronic device such as T) can be configured. The FET has a Schottky junction type gate electrode on the active layer, and a source and a source on opposite sides of the gate electrode on the surface of an n-type contact layer laminated on the active layer. A drain ohmic electrode is provided and configured.
【0023】[0023]
【作用】本発明のリン化硼素系半導体結晶からなる双晶
を含む単結晶体は、Si単結晶基板とリン化硼素系半導
体との格子ミスマッチに起因するミスフィット転位の上
方への伝搬を抑制する作用を有する。The single crystal body containing a twin crystal of the boron phosphide-based semiconductor crystal of the present invention suppresses upward propagation of misfit dislocations due to lattice mismatch between the Si single crystal substrate and the boron phosphide-based semiconductor. Has the effect of
【0024】[0024]
【実施例】以下に、{111}−Si単結晶基板上に多
結晶層からなるリン化硼素(BP)層を備えた積層構造
体からLEDを作製した例を用いて、本発明を具体的に
説明する。EXAMPLES The present invention will be concretely described below by using an example in which an LED was produced from a laminated structure having a boron phosphide (BP) layer formed of a polycrystalline layer on a {111} -Si single crystal substrate. Explained.
【0025】本実施例に係わるLED1Bの平面模式図
を図4に示す。また、図4に示す破線X−X’に沿った
LED1Bの断面模式図を図5に示す。FIG. 4 shows a schematic plan view of the LED 1B according to this embodiment. Further, FIG. 5 shows a schematic cross-sectional view of the LED 1B taken along the broken line XX ′ shown in FIG.
【0026】LED1B用途の積層構造体1Aは、硼素
(B)ドープでp形の(111)面から2°オフ(of
f)した面を有するSi単結晶を基板101として構成
した。基板101上には、トリエチル硼素((C2H5)
3B)/ホスフィン(PH3)/水素(H2)系常圧MO
CVD法により、350℃で、as−grown状態で
非晶質を主体とするリン化硼素からなる緩衝層102を
堆積した。緩衝層102の層厚は約10nmとした。The laminated structure 1A used for the LED 1B is boron (B) -doped and is 2 ° off (of) from the p-type (111) plane.
The Si single crystal having the surface f) was formed as the substrate 101. On the substrate 101, triethyl boron ((C 2 H 5 )
3 B) / phosphine (PH 3 ) / hydrogen (H 2 ) system normal pressure MO
A buffer layer 102 made of boron phosphide mainly composed of amorphous material was deposited in an as-grown state at 350 ° C. by the CVD method. The layer thickness of the buffer layer 102 was about 10 nm.
【0027】緩衝層102の表面には、上記のMOCV
D気相成長手段を利用して、1050℃で多結晶層から
なるp形のリン化硼素(BP)層103を積層した。成
長速度は毎分40nmに設定した。p形リン化硼素層1
03のキャリア濃度は1×10 19cm-3とし、また、層
厚は約400nmとした。p形リン化硼素層103の室
温での禁止帯幅は大凡、3.0eVであった。The above MOCV is formed on the surface of the buffer layer 102.
D from the polycrystalline layer at 1050 ° C using vapor phase growth means
Then, a p-type boron phosphide (BP) layer 103 is laminated. Success
The long speed was set to 40 nm / min. p-type boron phosphide layer 1
03 carrier concentration is 1 x 10 19cm-3And also layer
The thickness was about 400 nm. Chamber for p-type boron phosphide layer 103
The band gap at high temperature was about 3.0 eV.
【0028】透過型電子顕微鏡(TEM)を利用した断
面TEM像と電子線回折図形から、p形リン化硼素層1
03の内部の結晶構造を解析した。図6にSi単結晶基
板101の<110>結晶方向に平行に電子線を入射さ
せて得たp形リン化硼素層103の回折パターンの模写
図を示す。図6に示す様に、多結晶層からなるp形リン
化硼素層103をなす各単結晶体103aの{111}
結晶面に由来する回折斑点19は、<111>結晶方向
に平行に、Si単結晶基板101の(111)結晶面に
由来する回折斑点20に隣接して位置していた。これよ
り、単結晶体103aは、Si単結晶基板表面の<11
1>結晶方向に平行に、リン化硼素の{111}結晶面
が積重した結晶体であるのが示された。また、図6の回
折図形に示す如く、基板101のSi単結晶の<111
>結晶方向に整列した単結晶体103aの回折斑点を点
対称の中心として、近隣に{111}結晶面を双晶面と
する双晶からの回折斑点21も確認された。これより、
単結晶体103aは{111}結晶面を双晶面とする双
晶を含んでいると確認された。双晶に起因する回折斑点
21の位置から、双晶面はBP結晶の<110>結晶方
向に対し角度にして60度の方向に存在しているのが示
された。A p-type boron phosphide layer 1 was obtained from a cross-sectional TEM image and an electron diffraction pattern using a transmission electron microscope (TEM).
The internal crystal structure of 03 was analyzed. FIG. 6 shows a copy of a diffraction pattern of the p-type boron phosphide layer 103 obtained by making an electron beam incident parallel to the <110> crystal direction of the Si single crystal substrate 101. As shown in FIG. 6, {111} of each single crystal body 103a forming the p-type boron phosphide layer 103 composed of a polycrystalline layer
The diffraction spots 19 originating from the crystal plane were located parallel to the <111> crystal direction and adjacent to the diffraction spots 20 originating from the (111) crystal face of the Si single crystal substrate 101. As a result, the single crystal body 103a has a surface roughness of <11
It was shown that the {111} crystal faces of boron phosphide were stacked in parallel with the 1> crystal direction. Further, as shown in the diffraction pattern of FIG. 6, <111 of Si single crystal of the substrate 101 is formed.
> Diffraction spots 21 from twins having a {111} crystal plane as a twin plane were also confirmed in the vicinity with the diffraction spots of the single crystal body 103a aligned in the crystal direction as the center of point symmetry. Than this,
It was confirmed that the single crystal body 103a contained a twin crystal having a {111} crystal plane as a twin crystal plane. From the position of the diffraction spots 21 caused by twinning, it was shown that the twinning plane exists in the direction of 60 degrees in the angle with respect to the <110> crystal direction of the BP crystal.
【0029】p形リン化硼素層103の表面には、トリ
メチルガリウム((CH3)3Ga)/トリメチルインジ
ウム((CH3)3In/アンモニア(NH3)/H2系常
圧MOCVD法により、850℃で六方晶のn形の窒化
ガリウム・インジウム(Ga0. 90In0.10N)からなる
発光層104を積層した。発光層104の層厚は約10
nmとした。On the surface of the p-type boron phosphide layer 103, trimethylgallium ((CH 3 ) 3 Ga) / trimethylindium ((CH 3 ) 3 In / ammonia (NH 3 ) / H 2 system atmospheric pressure MOCVD method is used. , the layer thickness of the laminated light-emitting layer 104 made of hexagonal n-type gallium indium nitride crystallization (Ga 0. 90 in 0.10 n) at 850 ° C.. emitting layer 104 is about 10
nm.
【0030】発光層104の表面上には、多結晶層から
なるアンドープでn形のリン化硼素層105を積層させ
た。n形リン化硼素層105は、上記のMOCVD気相
成長手段を利用して、1050℃で積層した。成長速度
は毎分30nmに設定した。n形リン化硼素層105
は、上記のp形リン化硼素層103と同様に、BPの
(111)結晶面からなる正四面体状の単結晶体105
aの集合体から構成されるものとなった。n形リン化硼
素層のキャリア濃度は8×1018cm-3とし、また、層
厚は約300nmとした。n形リン化硼素層105の室
温での禁止帯幅は大凡、3.0eVであった。An undoped n-type boron phosphide layer 105 made of a polycrystalline layer was laminated on the surface of the light emitting layer 104. The n-type boron phosphide layer 105 was deposited at 1050 ° C. using the MOCVD vapor phase growth means described above. The growth rate was set to 30 nm / min. n-type boron phosphide layer 105
Is a regular tetrahedral single crystal 105 composed of the (111) crystal plane of BP, like the p-type boron phosphide layer 103.
It is composed of the aggregate of a. The carrier concentration of the n-type boron phosphide layer was 8 × 10 18 cm −3, and the layer thickness was about 300 nm. The band gap of the n-type boron phosphide layer 105 at room temperature was about 3.0 eV.
【0031】電子線回折図形より、n形リン化硼素層1
05をなす各単結晶体105aの{111}結晶面は、
(111)−Si単結晶基板101の<111>結晶方
向に平行に配列していた。また、単結晶体105aの内
部には、BP結晶の{111}結晶面を双晶面とする双
晶の存在が確認された。双晶面はBP結晶の<110>
結晶方向に対し角度にして60度の方向に存在した。From the electron diffraction pattern, the n-type boron phosphide layer 1
The {111} crystal face of each single crystal body 105a forming
They were arranged in parallel with the <111> crystal direction of the (111) -Si single crystal substrate 101. In addition, it was confirmed that twin crystals having a {111} crystal plane of the BP crystal as a twin plane were present inside the single crystal body 105a. Twin plane is <110> of BP crystal
It was present in a direction of 60 degrees with respect to the crystal direction.
【0032】室温禁止帯幅をおよそ3.0eVとするp
形リン化硼素層103及びn形リン化硼素層105と、
それに同一の格子面間隔を有する材料からなる発光層1
04とからpn接合型ダブルヘテロ(DH)構造の発光
部106を構成した。P at which the room temperature bandgap is approximately 3.0 eV
-Type boron phosphide layer 103 and n-type boron phosphide layer 105,
A light emitting layer 1 made of a material having the same lattice spacing
04 to form a light emitting portion 106 having a pn junction double hetero (DH) structure.
【0033】n形リン化硼素層105の表面の中央部に
は、台座電極を兼ねる円形のn形オーミック電極107
を配置した。n形オーミック電極107は、金(Au)
・ゲルマニウム(Ge)合金/ニッケル(Ni)/金の
真空蒸着膜を重層させた多層構造から構成した。n形オ
ーミック電極107の直径は約120μmとした。ま
た、p形のSi単結晶基板101の裏面の略全面には、
p形オーミック電極108を配置してLED1Bを構成
した。p形のオーミック電極108は、アルミニウム
(Al)真空蒸着膜から構成した。Si単結晶基板10
1を[211]方向に平行及び垂直な方向に裁断して、
一辺を約300μmとする正方形のLED1Bとした。At the center of the surface of the n-type boron phosphide layer 105, a circular n-type ohmic electrode 107 also serving as a pedestal electrode is formed.
Was placed. The n-type ohmic electrode 107 is gold (Au)
A multilayer structure in which vacuum-deposited films of germanium (Ge) alloy / nickel (Ni) / gold are stacked. The diameter of the n-type ohmic electrode 107 was about 120 μm. In addition, on the substantially entire back surface of the p-type Si single crystal substrate 101,
The LED 1B was constructed by arranging the p-type ohmic electrode 108. The p-type ohmic electrode 108 was composed of an aluminum (Al) vacuum deposition film. Si single crystal substrate 10
Cut 1 in the direction parallel and perpendicular to the [211] direction,
A square LED 1B having a side of about 300 μm was used.
【0034】n形オーミック電極107に金(Au)線
を結線した後、n形オーミック電極107及びp形オー
ミック電極108との間に順方向に20ミリアンペア
(mA)の動作電流を通流して発光特性を調査した。発
光中心波長は約420nmとなった。発光スペクトルの
半値幅(FWHM)は32nmとなった。本発明では、
ミスフィット転位の密度の低いp形リン化硼素層103
を下地層として発光層104を形成する構成としたた
め、発光領域には非発光の暗線(dark line)
(米津、宏雄著、「光通信素子工学−発光・受光素子」
(平成7年5月20日、工学図書(株)発行5版、15
5〜156頁参照)は視認されず、発光領域の全面から
略均等の強度の発光がもたらされた。このため、一般的
な積分球を利用して測定されるチップ(chip)状態
での輝度は8ミリカンデラ(mcd)となり、高発光強
度のLEDが提供されることとなった。また、LED1
Bの電流−電圧(I−V)特性には、転位の影響に因る
局所的な耐圧不良(localbreakdown)の
発生は認められず、本発明の構成からは、良好なpn接
合特性(整流性)を呈するpn接合型の発光部106が
もたらされることが示された。I−V特性から求めた順
方向電圧(所謂、Vf)は3.6V(順方向電流=20
mA)で、また、逆方向電圧は6V(逆方向電流=10
μA)であり、高耐圧であるLEDが提供された。After connecting a gold (Au) wire to the n-type ohmic electrode 107, a forward working current of 20 milliamperes (mA) is passed between the n-type ohmic electrode 107 and the p-type ohmic electrode 108 to emit light. The characteristics were investigated. The emission center wavelength was about 420 nm. The full width at half maximum (FWHM) of the emission spectrum was 32 nm. In the present invention,
P-type boron phosphide layer 103 having a low density of misfit dislocations
Since the light emitting layer 104 is formed using as a base layer, a non-light emitting dark line is formed in the light emitting region.
(Yonezu, Hiroo, "Optical Communication Device Engineering-Light-Emitting / Light-Receiving Device"
(May 20, 1995, Engineering Book Co., Ltd. 5th edition, 15
(See pages 5 to 156) was not visually recognized, and light emission of approximately uniform intensity was provided from the entire surface of the light emitting region. Therefore, the luminance in a chip state measured by using a general integrating sphere is 8 millicandelas (mcd), and an LED with high emission intensity is provided. In addition, LED1
In the current-voltage (IV) characteristic of B, no local breakdown voltage failure (local breakdown) due to the influence of dislocation was observed, and from the configuration of the present invention, good pn junction characteristics (rectifying property) were obtained. It is shown that a pn junction type light emitting unit 106 exhibiting The forward voltage (so-called Vf) obtained from the IV characteristic is 3.6 V (forward current = 20).
mA, and the reverse voltage is 6 V (reverse current = 10
μA) and a high withstand voltage LED is provided.
【0035】[0035]
【発明の効果】本発明では、表面を{111}−結晶面
とするSi単結晶基板上に設けるリン化硼素系半導体層
を、ミスフィット転位を吸収して、転位の伝搬を抑制で
きる双晶を含む単結晶体を集合させた多結晶層から構成
することとしたので、転位密度の少ない結晶性に優れる
リン化硼素系半導体層を構成することができ、これを利
用すれば特性に優れるリン化硼素系半導体素子、例え
ば、発光強度、整流性及び耐圧性に優れるリン化硼素系
半導体発光素子を提供できる効果がある。INDUSTRIAL APPLICABILITY According to the present invention, a twin phosphide capable of absorbing misfit dislocations and suppressing the propagation of dislocations in a boron phosphide-based semiconductor layer provided on a Si single crystal substrate whose surface is a {111} -crystal plane. Since it is composed of a polycrystal layer in which single crystal bodies containing is included, it is possible to form a boron phosphide-based semiconductor layer having low dislocation density and excellent crystallinity. There is an effect that a boron phosphide-based semiconductor light emitting device, for example, a boron phosphide-based semiconductor light emitting device excellent in light emission intensity, rectifying property, and pressure resistance can be provided.
【図1】本発明に係る多結晶層を構成する単結晶体の形
状を示す模式図である。FIG. 1 is a schematic view showing a shape of a single crystal body forming a polycrystalline layer according to the present invention.
【図2】本発明に係る多結晶層の構成を示す平面模式図
である。FIG. 2 is a schematic plan view showing the structure of a polycrystalline layer according to the present invention.
【図3】本発明に係るリン化硼素系半導体層の{11
1}結晶面に交差する結晶面を表す模式図である。FIG. 3 shows the boron phosphide-based semiconductor layer according to the present invention {11.
It is a schematic diagram showing the crystal plane which intersects a 1} crystal plane.
【図4】本発明の実施例に係るLEDの平面模式図であ
る。FIG. 4 is a schematic plan view of an LED according to an example of the present invention.
【図5】図3の破線X−X’に沿ったLEDの断面模式
図である。5 is a schematic cross-sectional view of the LED taken along the broken line XX ′ of FIG.
【図6】本発明の実施例に係るリン化硼素層の電子線回
折パターンの模写図である。FIG. 6 is a copy of an electron diffraction pattern of a boron phosphide layer according to an example of the present invention.
1A 積層構造体 1B LED 11 Si単結晶基板 12 リン化硼素系半導体多結晶層 13 単結晶体 13a 単結晶体の底面 14 双晶面 15 双晶 16 単結晶体の接合面 17 単結晶体の{111}結晶面 18 {hkl}面 19 リン化硼素単結晶体の回折スポット 20 Si単結晶基板の回折スポット 21 双晶の回折スポット 101 Si単結晶基板 102 緩衝層 103 p形リン化硼素層 103a 単結晶体 104 発光層 105 n形リン化硼素層 105a 単結晶体 106 発光部 107 n形オーミック電極 108 p形オーミック電極 1A laminated structure 1B LED 11 Si single crystal substrate 12 Boron phosphide-based semiconductor polycrystalline layer 13 Single crystal 13a Bottom surface of single crystal body 14 twin planes 15 twins 16 Bonding surface of single crystal 17 {111} crystal face of single crystal 18 {hkl} plane 19 Boron phosphide single crystal diffraction spot 20 Si single crystal substrate diffraction spot 21 twinned diffraction spot 101 Si single crystal substrate 102 buffer layer 103 p-type boron phosphide layer 103a single crystal 104 light emitting layer 105 n-type boron phosphide layer 105a single crystal 106 light emitting unit 107 n-type ohmic electrode 108 p-type ohmic electrode
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Claims (7)
板の表面上に形成された、基板の表面を構成する結晶面
と同一の結晶面を有するリン化硼素系半導体結晶からな
るリン化硼素系半導体層とを備えたリン化硼素系半導体
素子に於いて、前記の基板が、表面を{111}結晶面
とする{111}−Si単結晶からなり、前記のリン化
硼素系半導体層は、基板の{111}結晶面に平行に配
列したリン化硼素系半導体結晶の{111}結晶面から
なる底面を有し、且つ{111}結晶面と等価な面で囲
まれた、複数の四角錘状のリン化硼素系半導体結晶の単
結晶体を集合させた多結晶層から構成され、さらに該単
結晶体が、基板の<110>結晶方向に対して60度の
角度で傾いた双晶境界面を有することを特徴とするリン
化硼素系半導体素子。1. A phosphor made of a substrate made of silicon (Si) single crystal and a boron phosphide-based semiconductor crystal formed on the surface of the substrate and having the same crystal plane as the crystal plane constituting the surface of the substrate. In a boron phosphide-based semiconductor device including a boron phosphide-based semiconductor layer, the substrate comprises a {111} -Si single crystal having a surface of {111} crystal face, and the boron phosphide-based semiconductor The layer has a plurality of bases each having a bottom surface composed of {111} crystal planes of a boron phosphide-based semiconductor crystal arranged parallel to the {111} crystal planes of the substrate and surrounded by a plane equivalent to the {111} crystal planes. Of a quadrangular pyramid-shaped boron phosphide-based semiconductor crystal, which is composed of a polycrystalline layer in which the single crystals are tilted at an angle of 60 degrees with respect to the <110> crystal direction of the substrate. Boron phosphide-based semiconductor element characterized by having twin boundaries .
V族化合物半導体層が積層されて形成された異種(ヘテ
ロ)接合を有し、該III−V族化合物半導体層が、リ
ン化硼素系半導体層をなす単結晶体の表面に交差する結
晶面の面間隔(格子間隔)に一致する間隔で配列した結
晶面から構成されることを特徴とする請求項1に記載の
リン化硼素系半導体素子。2. III- on the boron phosphide-based semiconductor layer
It has a heterojunction formed by stacking group V compound semiconductor layers, and the group III-V compound semiconductor layer has a crystal plane intersecting the surface of a single crystal body forming a boron phosphide-based semiconductor layer. 2. The boron phosphide-based semiconductor device according to claim 1, wherein the boron phosphide-based semiconductor device is composed of crystal planes arranged at intervals corresponding to the interplanar spacing (lattice spacing).
が、単量体のリン化硼素(boron monopho
sphide)結晶からなることを特徴とする請求項1
または2に記載のリン化硼素系半導体素子。3. A single crystal of the boron phosphide-based semiconductor crystal is a monomeric boron phosphide (boron monopho).
A sphere) crystal.
Alternatively, the boron phosphide-based semiconductor device according to item 2.
−Si単結晶基板上に950℃以上1100℃以下の温
度に於いて、有機金属熱分解気相成長法(MOCVD
法)により、成長速度を毎分20nm以上60nm以下
として形成することを特徴とする請求項1ないし3に記
載のリン化硼素系半導体素子の製造方法。4. The boron phosphide-based semiconductor layer is {111}
On a -Si single crystal substrate at a temperature of 950 ° C or higher and 1100 ° C or lower, a metalorganic thermal decomposition vapor deposition method (MOCVD).
4. The method for producing a boron phosphide-based semiconductor device according to claim 1, wherein the growth rate is 20 nm or more and 60 nm or less per minute by the method).
−Si単結晶基板上に1025℃以上1075℃以下の
温度に於いて、有機金属熱分解気相成長法(MOCVD
法)により、成長速度を毎分30nm以上40nm以下
として形成することを特徴とする請求項4に記載のリン
化硼素系半導体素子の製造方法。5. The boron phosphide-based semiconductor layer is {111}
On a -Si single crystal substrate at a temperature of 1025 ° C or higher and 1075 ° C or lower, a metalorganic thermal decomposition vapor deposition method (MOCVD).
5. The method for producing a boron phosphide-based semiconductor device according to claim 4, wherein the growth rate is 30 nm or more and 40 nm or less per minute.
導体素子からなる発光ダイオード。6. A light emitting diode comprising the boron phosphide-based semiconductor device according to claim 1.
に形成された、基板の表面を構成する結晶面と同一の結
晶面を有するリン化硼素系半導体結晶からなるリン化硼
素系半導体層に於いて、前記の基板が、表面を{11
1}結晶面とする{111}−Si単結晶からなり、前
記のリン化硼素系半導体層は、基板の{111}結晶面
に平行に配列したリン化硼素系半導体結晶の{111}
結晶面からなる底面を有し、且つ{111}結晶面と等
価な面で囲まれた、複数の四角錘状のリン化硼素系半導
体結晶の単結晶体を集合させた多結晶層から構成され、
さらに該単結晶体が、基板の<110>結晶方向に対し
て60度の角度で傾いた双晶境界面を有することを特徴
とするリン化硼素系半導体層。7. A boron phosphide-based semiconductor formed of a boron phosphide-based semiconductor crystal, which is formed on the surface of a substrate made of silicon (Si) single crystal and has the same crystal plane as the crystal plane constituting the surface of the substrate. In the layer, the substrate has a surface of {11
The boron phosphide-based semiconductor layer is made of a {111} -Si single crystal having a 1} crystal face, and the boron phosphide-based semiconductor layer is arranged in parallel to the {111} crystal face of the substrate.
It is composed of a polycrystal layer which has a bottom surface composed of crystal planes and is surrounded by a plane equivalent to a {111} crystal plane, and which is an aggregate of a plurality of quadrangular pyramidal boron phosphide-based semiconductor crystal single crystals. ,
Further, the boron phosphide-based semiconductor layer, wherein the single crystal body has a twin boundary surface inclined at an angle of 60 degrees with respect to the <110> crystal direction of the substrate.
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002026271A JP4100493B2 (en) | 2002-02-04 | 2002-02-04 | Semiconductor device including boron phosphide semiconductor layer, method for manufacturing the same, light emitting diode, and boron phosphide semiconductor layer |
EP03703063A EP1470592B1 (en) | 2002-01-28 | 2003-01-28 | Boron phosphide based semiconductor device |
AU2003206129A AU2003206129A1 (en) | 2002-01-28 | 2003-01-28 | Boron phosphide-based semiconductor device, production method thereof, light-emitting diode and boron phosphide-based semiconductor layer |
DE60334282T DE60334282D1 (en) | 2002-01-28 | 2003-01-28 | Boronphosphid semiconductor component |
PCT/JP2003/000798 WO2003065465A2 (en) | 2002-01-28 | 2003-01-28 | Boron phosphide-based semiconductor device, production method thereof, light-emitting diode and boron phosphide-based semiconductor layer |
US10/502,597 US7465499B2 (en) | 2002-01-28 | 2003-01-28 | Boron phosphide-based semiconductor device, production method thereof, light-emitting diode and boron phosphide-based semiconductor layer |
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Cited By (6)
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WO2005093863A1 (en) * | 2004-03-29 | 2005-10-06 | Showa Denko K.K | Compound semiconductor light-emitting device and production method thereof |
JP2005286322A (en) * | 2004-03-05 | 2005-10-13 | Showa Denko Kk | Boron phosphide-based semiconductor light emitting device |
JP2005317941A (en) * | 2004-03-29 | 2005-11-10 | Showa Denko Kk | Pn-junction compound semiconductor light-emitting device and method of producing same |
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KR100802451B1 (en) * | 2004-03-05 | 2008-02-13 | 쇼와 덴코 가부시키가이샤 | Boron phosphide-based semiconductor light-emitting device |
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JP2005286322A (en) * | 2004-03-05 | 2005-10-13 | Showa Denko Kk | Boron phosphide-based semiconductor light emitting device |
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JP4658641B2 (en) * | 2004-03-05 | 2011-03-23 | 昭和電工株式会社 | Boron phosphide-based semiconductor light emitting device |
US8026525B2 (en) | 2004-03-05 | 2011-09-27 | Showa Denko K.K. | Boron phosphide-based semiconductor light-emitting device |
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JP2005317941A (en) * | 2004-03-29 | 2005-11-10 | Showa Denko Kk | Pn-junction compound semiconductor light-emitting device and method of producing same |
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US7790481B2 (en) | 2004-03-29 | 2010-09-07 | Showa Denko K.K. | Compound semiconductor light-emitting device and production method thereof |
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JP2005317947A (en) * | 2004-03-30 | 2005-11-10 | Showa Denko Kk | Compound semiconductor element, manufacturing method of compound semiconductor element, diode element |
US7573075B2 (en) | 2004-03-30 | 2009-08-11 | Showa Denko K.K. | Compound semiconductor device, production method of compound semiconductor device and diode |
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