JP2003158258A5 - - Google Patents

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JP2003158258A5
JP2003158258A5 JP2001358654A JP2001358654A JP2003158258A5 JP 2003158258 A5 JP2003158258 A5 JP 2003158258A5 JP 2001358654 A JP2001358654 A JP 2001358654A JP 2001358654 A JP2001358654 A JP 2001358654A JP 2003158258 A5 JP2003158258 A5 JP 2003158258A5
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field
semiconductor device
field plate
limiting ring
semiconductor substrate
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JP2001358654A
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JP4684505B2 (en
JP2003158258A (en
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Publication of JP2003158258A5 publication Critical patent/JP2003158258A5/ja
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Claims (9)

電流を通電するアクティブ領域と、アクティブ領域に隣接して形成され、電界を緩和するターミネーション領域とを備えた半導体装置において、
前記ターミネーション領域には、フィールドリミッティングリングと、
該フィールドリミッティングリングに接触形成され、電界を緩和するフィールドプレートとが形成され、前記フィールドプレートが抵抗体であることを特徴とする半導体装置。In a semiconductor device comprising an active region through which a current is passed and a termination region that is formed adjacent to the active region and relaxes an electric field,
The termination region includes a field limiting ring,
The field is formed in contact limiting ring, a field plate for relaxing the electric field is formed, the semi-conductor device you wherein the field plate is a resistor. 請求項１に記載の半導体装置において、前記フィールドプレートの抵抗率が、５×10-3Ωcm以上であることを特徴とする半導体装置。2. The semiconductor device according to claim 1, wherein the field plate has a resistivity of 5 × 10 −3 Ωcm or more. 請求項１または請求項２のいずれかに記載の半導体装置において、前記フィールドプレートが多結晶シリコンであることを特徴とする半導体装置。3. The semiconductor device according to claim 1, wherein the field plate is polycrystalline silicon. 請求項１から請求項３のいずれかに記載の半導体装置において、
前記フィールドプレートとフィールドリミッティングリングとの間に絶縁物層を形成して、フィールドリミッティングリングとフィールドプレートとを絶縁したことを特徴とする半導体装置。The semiconductor device according to any one of claims 1 to 3,
A semiconductor device, wherein an insulating layer is formed between the field plate and the field limiting ring to insulate the field limiting ring and the field plate. 一対の主表面を有する一方導電型の半導体基体と、前記半導体基体の一方の主表面に隣接して形成され、電流を通電するアクティブ領域と、前記半導体基体の一方の主表面に隣接し、前記アクティブ領域を包囲して前記半導体基体内に形成された他方導電型のフィールドリミッティング層とを備えた半導体装置において、
前記フィールドリミッティング層に接触し、前記半導体基体の一方の主表面上で前記フィールドリミッティング層に接触形成され、前記半導体基体上に絶縁膜を介して延在する抵抗体からなるフィールドプレートとを有するフィールドプレートを備えたことを特徴とする半導体装置。A one-conductivity-type semiconductor substrate having a pair of main surfaces; an active region formed adjacent to one main surface of the semiconductor substrate; and adjacent to one main surface of the semiconductor substrate; In a semiconductor device including an active region and a field limiting layer of the other conductivity type formed in the semiconductor substrate,
A field plate made of a resistor that is in contact with the field limiting layer, is formed in contact with the field limiting layer on one main surface of the semiconductor substrate, and extends on the semiconductor substrate via an insulating film; A semiconductor device comprising a field plate. 請求項５に記載の半導体装置において、前記フィールドプレートの抵抗率が、５×10-3Ωcm以上であることを特徴とする半導体装置。6. The semiconductor device according to claim 5, wherein the resistivity of the field plate is 5 × 10 −3 Ωcm or more. 請求項５または請求項６のいずれかに記載の半導体装置において、前記フィールドプレートが多結晶シリコンであることを特徴とする半導体装置。7. The semiconductor device according to claim 5, wherein the field plate is polycrystalline silicon. 請求項５から請求項７のいずれかに記載の半導体装置において、前記フィールドプレートとフィールドリミッティングリングとの間に絶縁物層を形成して、フィールドリミッティングリングとフィールドプレートとを絶縁したことを特徴とする半導体装置。8. The semiconductor device according to claim 5, wherein an insulating layer is formed between the field plate and a field limiting ring to insulate the field limiting ring from the field plate. A featured semiconductor device. 一対の直流端子と、交流出力の相数と同数の交流端子と、一対の直流端子間に接続され、それぞれスイッチング素子と逆極性のダイオードの並列回路を２個直列接続した構成からなり、並列回路の相互接続点が異なる交流端子に接続された交流出力の相数と同数のインバータ単位とを具備する電力変換装置において、
前記スイッチング素子が請求項１乃至８に記載の半導体装置であることを特徴とする電力変換装置。It consists of a pair of DC terminals, AC terminals of the same number as the number of phases of AC output, and a pair of DC terminals connected to each other, each consisting of two parallel circuits of switching elements and reverse polarity diodes. In the power conversion device comprising the same number of inverter units as the number of phases of AC output connected to AC terminals having different interconnection points,
The power conversion device, wherein the switching element is the semiconductor device according to claim 1.
JP2001358654A 2001-11-26 2001-11-26 Semiconductor device and power conversion device Expired - Fee Related JP4684505B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001358654A JP4684505B2 (en) 2001-11-26 2001-11-26 Semiconductor device and power conversion device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001358654A JP4684505B2 (en) 2001-11-26 2001-11-26 Semiconductor device and power conversion device

Related Child Applications (1)

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JP2010287438A Division JP2011103478A (en) 2010-12-24 2010-12-24 Semiconductor device and power converter

Publications (3)

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JP2003158258A JP2003158258A (en) 2003-05-30
JP2003158258A5 true JP2003158258A5 (en) 2005-01-20
JP4684505B2 JP4684505B2 (en) 2011-05-18

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JP4935192B2 (en) * 2006-05-31 2012-05-23 三菱電機株式会社 Semiconductor device
JP2011165924A (en) * 2010-02-10 2011-08-25 Mitsubishi Electric Corp Semiconductor device
JP2016187006A (en) * 2015-03-27 2016-10-27 日本碍子株式会社 Semiconductor device
JP6726505B2 (en) 2016-03-31 2020-07-22 ローム株式会社 Method of manufacturing semiconductor device
US10347714B2 (en) 2016-11-10 2019-07-09 Rohm Co., Ltd. Semiconductor device
JP6637012B2 (en) 2016-11-10 2020-01-29 ローム株式会社 Semiconductor device
CN110603645B (en) 2017-05-08 2023-09-19 罗姆股份有限公司 Semiconductor device with a semiconductor device having a plurality of semiconductor chips
JP7190256B2 (en) 2018-02-09 2022-12-15 ローム株式会社 semiconductor equipment
US11508638B2 (en) * 2018-08-17 2022-11-22 Mitsubishi Electric Corporation Semiconductor device and power converter
CN111554677B (en) * 2020-05-06 2024-02-27 四川立泰电子有限公司 Terminal structure of power device with low electromagnetic interference
DE112021002247B4 (en) 2020-06-26 2023-09-07 Rohm Co., Ltd. SEMICONDUCTOR DEVICE
JP7094611B2 (en) * 2020-09-18 2022-07-04 サンケン電気株式会社 Semiconductor device

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JPS5227032B2 (en) * 1974-01-22 1977-07-18
JP2549834B2 (en) * 1982-10-06 1996-10-30 財団法人 半導体研究振興会 Semiconductor device
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JP2975614B2 (en) * 1989-09-29 1999-11-10 富士電機株式会社 Planar type semiconductor device
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