JP2003142521A - Semiconductor device and method for manufacturing the same - Google Patents

Semiconductor device and method for manufacturing the same

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Publication number
JP2003142521A
JP2003142521A JP2001336622A JP2001336622A JP2003142521A JP 2003142521 A JP2003142521 A JP 2003142521A JP 2001336622 A JP2001336622 A JP 2001336622A JP 2001336622 A JP2001336622 A JP 2001336622A JP 2003142521 A JP2003142521 A JP 2003142521A
Authority
JP
Japan
Prior art keywords
film
bonding
semiconductor device
bonding pad
insulating film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001336622A
Other languages
Japanese (ja)
Inventor
Atsushi Oga
淳 大賀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
NEC Corp
Original Assignee
NEC Electronics Corp
NEC Corp
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Filing date
Publication date
Application filed by NEC Electronics Corp, NEC Corp filed Critical NEC Electronics Corp
Priority to JP2001336622A priority Critical patent/JP2003142521A/en
Publication of JP2003142521A publication Critical patent/JP2003142521A/en
Pending legal-status Critical Current

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    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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    • H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
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Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device with its bonding pad surfaces protected from deterioration, corrosion, or the like, and to provide a method for manufacturing the same. SOLUTION: An insulating film such as a silicon oxide film is deposited on surfaces of bonding pads each made of a conductive film such as an Al film. Bonding wires each made of a metal such as Au are brought into contact with the insulating film and ultrasonic bonding is carried out. In bonding, metal such as Au constituting the bonding wires penetrates part of the insulating film for the electrical connection of the wires and the pads.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【発明の属する技術分野】本発明は、半導体装置及びそ
の製造方法、特に、ボンディングパッド表面の変質、腐
食等を防止した半導体装置及びその製造方法に関するも
のである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a semiconductor device in which deterioration and corrosion of a bonding pad surface are prevented and a method of manufacturing the same.

【０００２】[0002]

【従来の技術】半導体装置においては、一般に、配線用
金属としてアルミニウム（Ａｌ）を主体とした材料（Ａ
ｌ、Ａｌ−Ｃｕ 、Ａｌ−Ｓｉ−Ｃｕなど）や銅（Ｃ
ｕ）等が多く使用される。このような半導体装置におい
て、外部との電気的接続をとるためのボンディングパッ
ドは、上記配線用金属上に形成された絶縁膜に開口を形
成し、配線用金属の一部を露出させて形成される。この
ようにボンディングパッドを形成した状態、つまりボン
ディングパッド表面が剥き出しになった状態では、パッ
ド表面が、室温で空気中の水分と比較的容易に反応し、
変質してしまう。このようなパッド表面の変質は、温度
及び湿度の管理を行っていない場所では２週間程度で生
じることもある。2. Description of the Related Art Generally, in a semiconductor device, a material mainly composed of aluminum (Al) (A
1, Al-Cu, Al-Si-Cu, etc.) and copper (C
u) etc. are often used. In such a semiconductor device, a bonding pad for electrical connection with the outside is formed by forming an opening in an insulating film formed on the wiring metal and exposing a part of the wiring metal. It In such a state where the bonding pad is formed, that is, in the state where the bonding pad surface is exposed, the pad surface reacts relatively easily with moisture in the air at room temperature,
It will be altered. Such deterioration of the pad surface may occur in about 2 weeks in a place where temperature and humidity are not controlled.

【０００３】このように、ボンディングパッド表面が変
質してしまうと、後工程のボンディング工程において、
ボンディングパッドとリードフレーム等の外部リードと
がボンディングワイヤで接続されるとき、ボンディング
パッドを形成しているアルミニウム等の金属とＡｕ等の
ボンディングワイヤーとの共晶が阻害され、ボンディン
グ歩留りが低下するという問題がある。When the surface of the bonding pad is altered in this way, in the subsequent bonding step,
When the bonding pad and an external lead such as a lead frame are connected by a bonding wire, the eutectic of the metal such as aluminum forming the bonding pad and the bonding wire such as Au is obstructed, and the bonding yield is lowered. There's a problem.

【０００４】このため、半導体装置の製造においては、
通常、ボンディングパッド表面の変質を最小限に留める
べく、前工程終了後（ボンディングパッド形成工程の終
了後）は、温湿度の管理された雰囲気中で保管、または
ドライエアーで封止して保管し、反応生成物の形成を防
止している。Therefore, in the manufacture of semiconductor devices,
Generally, in order to minimize the deterioration of the bonding pad surface, after the previous process is completed (after the bonding pad formation process), it should be stored in a controlled temperature / humidity atmosphere or sealed with dry air. , Prevents the formation of reaction products.

【０００５】また、このように保管した後、後工程に移
り、ボンディング工程において金属ワイヤがボンディン
グパッドにボンディングされるが、このボンディング工
程後、金属ワイヤで覆われずにボンディングパッドが露
出した部分が変質、腐食等を生じ、半導体装置の諸特性
を劣化させてしまうという問題も生じる。Further, after the storage as described above, the process moves to a subsequent process, and the metal wire is bonded to the bonding pad in the bonding process. After the bonding process, a portion where the bonding wire is exposed without being covered with the metal wire is exposed. There is also a problem that alteration, corrosion, etc. occur and various characteristics of the semiconductor device are deteriorated.

【０００６】この問題を解決するものとして、特開昭５
９−１５０４６０号公報、特開昭６３−２７２０４２号
公報等がある。これらの公報では、ボンディング後にお
けるボンディングパッドの露出面に水蒸気処理等により
アルミナを形成し、接続面に変質等が生じるのを防止し
ている。As a means for solving this problem, Japanese Patent Laid-Open No. Sho 5
9-150460 and JP-A-63-272042. In these publications, alumina is formed on the exposed surface of the bonding pad after bonding by steam treatment or the like to prevent deterioration of the connection surface.

【０００７】[0007]

【発明が解決しようとする課題】しかしながら、従来の
半導体装置の製造方法では、ボンディングパッド形成
後、上述のように、温湿度の管理された雰囲気中で保管
するかドライエアーで封止して保管する必要があり、搬
送手段や保管設備等の施設、保管スペース等を必要とす
るほか、保管場所への搬送時間等が必要になる。However, in the conventional method for manufacturing a semiconductor device, after the bonding pad is formed, as described above, it is stored in an atmosphere in which the temperature and humidity are controlled or sealed with dry air. In addition to the need for transportation means, facilities such as storage facilities, storage space, etc., transportation time to the storage location is also required.

【０００８】また、上述の各公報では、アルミナの形成
はワイヤボンディング後であるため、ボンディングパッ
ドの形成工程（前工程）終了後、ワイヤボンディング工
程までの間は、やはり、上記したように保管場所に保管
する必要がある。Further, in the above-mentioned respective publications, since the formation of alumina is performed after wire bonding, after the bonding pad forming step (preceding step) and before the wire bonding step, the storage place is also as described above. Need to be stored in.

【０００９】したがって、本発明の目的は、ボンディン
グパッドの表面の変質を防止することのできる半導体装
置及びその製造方法を提供することにある。Therefore, it is an object of the present invention to provide a semiconductor device capable of preventing the surface of the bonding pad from being deteriorated and a method of manufacturing the same.

【００１０】[0010]

【課題を解決するための手段】本発明による半導体装置
は、ボンディングパッドと、上記ボンディングパッドの
一部上に設けられたボンディングワイヤとを備え、上記
ボンディングパッドと上記ボンディングワイヤの界面の
少なくとも一部に上記ボンディングパッド上に堆積され
た絶縁膜を有することを特徴としている。A semiconductor device according to the present invention comprises a bonding pad and a bonding wire provided on a part of the bonding pad, and at least a part of an interface between the bonding pad and the bonding wire. In addition, it has an insulating film deposited on the bonding pad.

【００１１】また、本発明による半導体装置の製造方法
は、半導体基板上に形成された導電膜のボンディングパ
ッドに絶縁膜を堆積する工程と、上記絶縁膜上にボンデ
ィングワイヤを接触させてボンディングを行ない上記ボ
ンディングパッドと上記ボンディングワイヤとを接続す
る工程とを備えることを特徴としている。Further, in the method of manufacturing a semiconductor device according to the present invention, a step of depositing an insulating film on a bonding pad of a conductive film formed on a semiconductor substrate and a bonding wire contacting the insulating film for bonding are performed. And a step of connecting the bonding pad and the bonding wire.

【００１２】上記ボンディングパッド上に形成される絶
縁膜は、ＳｉＯ２膜、Ｓｉ３Ｎ４膜、ＳｉＯＮ膜のいず
れかとすることができる。また、この絶縁膜の厚さは１
０〜２０ｎｍとされるとよい。The insulating film formed on the bonding pad can be any one of a SiO 2 film, a Si 3 N 4 film and a SiON film. The thickness of this insulating film is 1
The thickness may be 0 to 20 nm.

【００１３】また、上記ボンディングは、超音波ボンデ
ィングで行なうことができる。The above-mentioned bonding can be performed by ultrasonic bonding.

【００１４】このように、本発明では、ボンディングを
行なう前に、ボンディングパッド表面が絶縁膜で覆われ
るため、ボンディング工程までの間、長期間保管する必
要が生じても、ボンディングパッドの表面が変質するこ
とを防止できる。従って、特別に温湿度の管理された雰
囲気中で保管する必要がない。As described above, according to the present invention, since the surface of the bonding pad is covered with the insulating film before the bonding, even if it is necessary to store it for a long time until the bonding step, the surface of the bonding pad is deteriorated. Can be prevented. Therefore, it is not necessary to store it in an atmosphere where the temperature and humidity are controlled.

【００１５】なお、上記のようにボンディングパッド上
に絶縁膜を堆積するのに代えて、ボンディングパッド全
面に水蒸気処理によりアルミナを形成する方法も考えら
れるが、このような形成方法では、膜厚を制御し難く、
また膜質の均一性もあまりよくないため、ボンディング
パッド表面の変質を防ぐのに不充分となる場合が生じ
る。これに対し、本発明のように絶縁膜を堆積する方法
によれば、膜厚制御性がよく、均一な膜質の絶縁膜が得
られるため、パッドの変質をより確実に防止することが
可能となる。Note that, instead of depositing the insulating film on the bonding pad as described above, a method of forming alumina by steam treatment on the entire surface of the bonding pad may be considered, but in such a forming method, the film thickness is changed. Difficult to control,
Further, since the film quality is not so uniform, it may be insufficient to prevent the deterioration of the bonding pad surface. On the other hand, according to the method of depositing the insulating film as in the present invention, since the insulating film having good film thickness controllability and uniform film quality can be obtained, it is possible to more reliably prevent the deterioration of the pad. Become.

【００１６】ここで、「絶縁膜を堆積する」とは、ＣＶ
Ｄ法やスパッタ法等によって、ボンディングパッドの上
に絶縁膜を積むことを意味しており、ボンディングパッ
ドそのものを酸化したり窒化したりして絶縁膜を形成す
ることとは異なる。Here, "depositing an insulating film" means CV
This means depositing an insulating film on the bonding pad by the D method, the sputtering method, or the like, and is different from forming the insulating film by oxidizing or nitriding the bonding pad itself.

【００１７】また、特開平２−１８００３５号公報に示
されるように、ボンディングパッド全面を覆うようにタ
ングステン等の金属保護膜を形成して耐湿性を向上する
という方法もあるが、金属膜であるため、他の導電部と
短絡させないために、選択ＣＶＤ等、特殊な方法を用い
る必要が生じ、製造コストの増加につながるため好まし
くない。一方、本発明によれば、絶縁膜を用いるため、
通常のＣＶＤ法等を用いることができる。As disclosed in Japanese Patent Laid-Open No. 2-180035, there is also a method of forming a metal protective film of tungsten or the like so as to cover the entire surface of the bonding pad to improve the moisture resistance, but it is a metal film. Therefore, it is necessary to use a special method such as selective CVD in order to prevent short circuit with other conductive parts, which is not preferable because it leads to an increase in manufacturing cost. On the other hand, according to the present invention, since the insulating film is used,
A normal CVD method or the like can be used.

【００１８】[0018]

【発明の実施の形態】以下、本発明の上記および他の目
的、特徴および利点を明確にすべく、添付した図面を参
照しながら、本発明の実施の形態を以下に詳述する。BEST MODE FOR CARRYING OUT THE INVENTION In order to clarify the above and other objects, features and advantages of the present invention, embodiments of the present invention will be described below in detail with reference to the accompanying drawings.

【００１９】〔第１実施例〕図１〜７に本発明の第１実
施例による半導体装置の製造方法を示す。[First Embodiment] FIGS. 1 to 7 show a method of manufacturing a semiconductor device according to a first embodiment of the present invention.

【００２０】まず、図１に示すように、半導体基板１上
の層間絶縁膜２上に、スパッタリングにより５００〜８
００ｎｍのＡｌＣｕ膜３および２０〜３０ｎｍのＴｉＮ
膜４を積層する。First, as shown in FIG. 1, 500 to 8 are deposited on the interlayer insulating film 2 on the semiconductor substrate 1 by sputtering.
00 nm AlCu film 3 and 20-30 nm TiN
Laminate the membrane 4.

【００２１】次に、図２に示すように、リソグラフィー
技術によりＴｉＮ膜４およびＡｌＣｕ膜３をパターニン
グする。ここで、ＴｉＮ膜４は、リソグラフィーにおけ
る露光の際の反射防止膜となる。Next, as shown in FIG. 2, the TiN film 4 and the AlCu film 3 are patterned by the lithography technique. Here, the TiN film 4 becomes an antireflection film at the time of exposure in lithography.

【００２２】次に、ＳｉＯ２膜、ＳｉＯＮ膜およびポリ
イミド膜からなるパッシベーション膜を形成する。ポリ
イミド膜のみでは、耐湿性があまりよくないため、その
下にＳｉＯＮ膜を設け、また、ＳｉＯＮ膜のカバレッジ
を改善するためにその下に薄くＳｉＯ２膜を設ける。ま
ず、図３に示すように、パターニングされたＴｉＮ膜４
およびＡｌＣｕ膜３を覆うように、ＣＶＤ（Ｃｈｅｍｉ
ｃａｌ ＶａｐｏｒＤｅｐｏｓｉｔｉｏｎ）法により全
面にＳｉＯ２膜５を１００〜１５０ｎｍ形成する。続い
て、図４に示すようにＳｉＯ２膜５上にＳｉＯＮ膜６を
ＣＶＤ法により５００〜６００ｎｍ形成する。さらに、
図５に示すように、ＳｉＯＮ膜６上に感光性ポリイミド
を塗布し、フォトリソグラフィーにより図６に示すよう
にポリイミド膜をパターニングし、１５０〜４００℃の
窒素雰囲気でベークを施しポリイミド膜７を硬化させ
る。Next, a passivation film made of a SiO 2 film, a SiON film and a polyimide film is formed. Since the moisture resistance is not so good only with a polyimide film, a SiON film is provided below it and a thin SiO 2 film is provided below it to improve the coverage of the SiON film. First, as shown in FIG. 3, a patterned TiN film 4 is formed.
And CVD (Chemi) so as to cover the AlCu film 3 and
A SiO 2 film 5 having a thickness of 100 to 150 nm is formed on the entire surface by a cal vapor deposition method. Subsequently, as shown in FIG. 4, a SiON film 6 is formed on the SiO 2 film 5 by the CVD method to a thickness of 500 to 600 nm. further,
As shown in FIG. 5, a photosensitive polyimide is applied on the SiON film 6, the polyimide film is patterned by photolithography as shown in FIG. 6, and baked in a nitrogen atmosphere at 150 to 400 ° C. to cure the polyimide film 7. Let

【００２３】続いてポリイミド膜７をマスクとして、図
７に示すように、ＳｉＯＮ膜６、ＳｉＯ２膜５およびＴ
ｉＮ膜４をドライエッチングして、開口８を形成し、開
口８の底部にＡｌＣｕ膜３を露出させ、ボンディングパ
ッド９を形成する。なお、この後、ドライエッチングに
よるデポ（反応生成物）を除去する目的で、O2プラズマ
処理やアルカリ水溶液に浸す処理を行うとよい。Then, using the polyimide film 7 as a mask, as shown in FIG. 7, a SiON film 6, a SiO 2 film 5 and a T film are formed.
The iN film 4 is dry-etched to form the opening 8, the AlCu film 3 is exposed at the bottom of the opening 8, and the bonding pad 9 is formed. After that, for the purpose of removing the deposit (reaction product) by dry etching, O 2 plasma treatment or immersion treatment in an alkaline aqueous solution may be performed.

【００２４】次に、本発明に従って、図８に示すよう
に、ＣＶＤ法により、開口８の底面および内壁面とポリ
イミド膜７上に厚さ２０ｎｍのＳｉＯ２膜１０を堆積す
る。Next, according to the present invention, as shown in FIG. 8, a SiO 2 film 10 having a thickness of 20 nm is deposited on the bottom surface and the inner wall surface of the opening 8 and the polyimide film 7 by the CVD method.

【００２５】本実施例によれば、ボンディングパッド９
がＳｉＯ２膜１０で覆われるため、この後、後工程（ワ
イヤボンディング工程以降）までの間、長期間の保管が
必要となった場合でも、保管する雰囲気の湿度・温度を
特別に管理する必要はなくなるという効果が得られる。According to this embodiment, the bonding pad 9
Since it is covered with the SiO 2 film 10, it is necessary to specially control the humidity and temperature of the atmosphere to be stored, even if it is necessary to store it for a long period of time until the subsequent process (after the wire bonding process). The effect of disappearing is obtained.

【００２６】この後、後工程に移り、図９に示すよう
に、Ａｕからなるボンディングワイヤ１１により、外部
リード（図示せず）とボンディングパッド９とを接続す
る。After that, the process proceeds to the subsequent step, and as shown in FIG. 9, the external lead (not shown) and the bonding pad 9 are connected by the bonding wire 11 made of Au.

【００２７】このボンディング工程は、ボンディングパ
ッド９上にボンディングワイヤ１１を接触させ、超音波
を加えることにより行なわれる。このとき、ボンディン
グパッド９は絶縁膜であるＳｉＯ２膜１０で覆われてい
るが、超音波を加えることにより、ＳｉＯ２膜１０の間
に部分的にボンディングパッド９表面のＡｌＣｕ膜が露
出し、ボンディングワイヤであるＡｕと接触して、共晶
層１２が形成されるため、ボンディングパッド９とボン
ディングワイヤ１１との電気的接続が可能となる。This bonding step is performed by bringing the bonding wire 11 into contact with the bonding pad 9 and applying ultrasonic waves. At this time, the bonding pad 9 is covered with the SiO 2 film 10 which is an insulating film, but by applying ultrasonic waves, the AlCu film on the surface of the bonding pad 9 is partially exposed between the SiO 2 film 10, Since the eutectic layer 12 is formed in contact with Au which is a bonding wire, the bonding pad 9 and the bonding wire 11 can be electrically connected.

【００２８】ここで、ＳｉＯ２膜１０の厚さは、あまり
厚すぎると超音波を加えてもＳｉＯ ２膜１０の間からボ
ンディングパッド９の表面が露出せず、ボンディングワ
イヤ１１とボンディングパッド９とが接触できなくなっ
てしまうため、超音波ボンディングによりワイヤ１１と
パッド９とを確実に接続できる厚さとする必要がある。
このため、ＳｉＯ２膜１０の厚さは、２０ｎｍ以下とす
るのが好ましい。また、ボンディングパッド表面の変質
を十分に防止するために、１０ｎｍ以上が好ましい。Here, SiOTwoThe thickness of the film 10 is too much
If it is too thick, even if ultrasonic waves are added, SiO TwoFrom between the membranes 10
The surface of the bonding pad 9 is not exposed,
The ear 11 and the bonding pad 9 cannot contact each other.
Therefore, the wire 11 is connected to the wire 11 by ultrasonic bonding.
It is necessary to have a thickness that enables reliable connection with the pad 9.
Therefore, SiOTwoThe thickness of the film 10 should be 20 nm or less.
Is preferred. Also, the quality of the bonding pad surface
In order to sufficiently prevent the above, the thickness is preferably 10 nm or more.

【００２９】このように、本実施例によれば、ボンディ
ングパッド９形成後、長期間保管を行なってもパッド９
表面が変質したり腐食したりすることがない。また、ワ
イヤボンディング後も、ボンディングパッド９上のボン
ディングワイヤ１１で覆われない部分は、ＳｉＯ２膜１
０で覆われているため、その後においてもパッド９が変
質することが防止される。As described above, according to this embodiment, even after the bonding pad 9 is formed, the pad 9 can be stored for a long period of time.
The surface does not deteriorate or corrode. Even after the wire bonding, the portion of the bonding pad 9 not covered with the bonding wire 11 is the SiO 2 film 1.
Since it is covered with 0, the pad 9 is prevented from being deteriorated even after that.

【００３０】〔第２実施例〕図１０〜１３に本発明の第
２実施例による半導体装置の製造方法を示す。[Second Embodiment] FIGS. 10 to 13 show a method of manufacturing a semiconductor device according to a second embodiment of the present invention.

【００３１】本実施例では、ボンディングパッド表面の
変質を防止するためのＳｉＯ２膜の形成工程が上記第１
実施例と異なる。In this embodiment, the step of forming the SiO 2 film for preventing the deterioration of the surface of the bonding pad is the above-mentioned first step.
Different from the embodiment.

【００３２】まず、図１０に示すように、半導体基板１
上の層間絶縁膜２上に、ＡｌＣｕ膜３を形成する。続い
て、ＡｌＣｕ膜３上に、ＣＶＤ法により、厚さ２０ｎｍ
のＳｉＯ２膜１０を堆積する。さらにＳｉＯ２膜１０上
に反射防止膜としてＴｉＮ膜４を形成する。First, as shown in FIG. 10, the semiconductor substrate 1
An AlCu film 3 is formed on the upper interlayer insulating film 2. Then, the thickness of 20 nm is formed on the AlCu film 3 by the CVD method.
SiO 2 film 10 is deposited. Further, a TiN film 4 is formed as an antireflection film on the SiO 2 film 10.

【００３３】次に、図１１に示すように、リソグラフィ
ー技術によりＴｉＮ膜４、ＳｉＯ２膜１０およびＡｌＣ
ｕ膜３をパターニングする。Next, as shown in FIG. 11, the TiN film 4, the SiO 2 film 10 and the AlC film are formed by the lithography technique.
The u film 3 is patterned.

【００３４】続いて、第１実施例と同様にして、図１２
に示すように、パッシベーション膜として、ＳｉＯ２膜
５、ＳｉＯＮ膜６およびポリイミド膜を形成し、ポリイ
ミド膜をパターニングする。Subsequently, as in the first embodiment, FIG.
As shown in, a SiO 2 film 5, a SiON film 6 and a polyimide film are formed as a passivation film, and the polyimide film is patterned.

【００３５】続いてポリイミド膜７をマスクとして、図
１３に示すように、ＳｉＯＮ膜６、ＳｉＯ２膜５および
ＴｉＮ膜４をドライエッチングして、開口８を形成す
る。このとき、本実施例では、ＳｉＯ２膜１０でエッチ
ングを止め、開口８の底部にボンディングパッド９表面
を露出させないようにする。Subsequently, using the polyimide film 7 as a mask, as shown in FIG. 13, the SiON film 6, the SiO 2 film 5 and the TiN film 4 are dry-etched to form an opening 8. At this time, in this embodiment, the etching is stopped by the SiO 2 film 10 so that the surface of the bonding pad 9 is not exposed at the bottom of the opening 8.

【００３６】このように、本実施例においても、ボンデ
ィングパッド９上面がＳｉＯ２膜１０で覆われているた
め、実施例１と同様、この後、後工程（ワイヤボンディ
ング工程以降）までの間、長期間の保管が必要となった
場合でも、保管する雰囲気の湿度・温度を特別に管理す
る必要がない。As described above, also in this embodiment, since the upper surface of the bonding pad 9 is covered with the SiO 2 film 10, as in the case of the first embodiment, thereafter, until the subsequent steps (after the wire bonding step), Even if long-term storage is required, there is no need to specially control the humidity and temperature of the atmosphere in which it is stored.

【００３７】なお、本実施例においても、この後、実施
例１と同様に、ドライエッチングによるデポを除去する
処理を行うとよい。In the present embodiment as well, after this, similarly to the first embodiment, it is preferable to carry out a treatment for removing the deposit by dry etching.

【００３８】図１３の工程の後は、実施例１の図９と同
様、超音波ボンディングにより、ボンディングワイヤを
ボンディングパッドに接続する。After the step of FIG. 13, the bonding wire is connected to the bonding pad by ultrasonic bonding, as in FIG. 9 of the first embodiment.

【００３９】本実施例でも、第１実施例と同様、ワイヤ
ボンディング後もボンディングパッド９表面が露出する
ことがないため、パッド９表面の変質を防止できる。Also in this embodiment, as in the first embodiment, the surface of the bonding pad 9 is not exposed even after wire bonding, so that the deterioration of the surface of the pad 9 can be prevented.

【００４０】なお、第１および第２実施例において、超
音波ボンディング時の振動等により、ワイヤボンディン
グ後、ボンディングワイヤで覆われない部分の絶縁膜の
膜質が、パッドの保護膜として不充分となる場合には、
ワイヤで覆われない部分に改めて耐湿性の保護膜を形成
してもよい。In the first and second embodiments, due to vibration during ultrasonic bonding or the like, the film quality of the insulating film, which is not covered with the bonding wire after wire bonding, becomes insufficient as a pad protective film. in case of,
A moisture resistant protective film may be formed again on the portion not covered with the wire.

【００４１】以上、本発明の実施の形態につき説明して
きたが、本発明は上記各実施例に限定されず、本発明の
技術思想の範囲内において、各実施例は適宜変更され得
ることは明らかである。Although the embodiments of the present invention have been described above, the present invention is not limited to the above-mentioned embodiments, and it is apparent that the respective embodiments can be appropriately modified within the scope of the technical idea of the present invention. Is.

【００４２】例えば、上記実施例では、ボンディングパ
ッドの材料として、ＡｌＣｕ膜を用いているが、これに
限らず、Ａｌ膜やＡｌ−Ｓｉ−Ｃｕ膜、あるいはＣｕ膜
等を用いてもよい。For example, in the above embodiment, the AlCu film is used as the material of the bonding pad, but the material is not limited to this, and an Al film, an Al-Si-Cu film, a Cu film or the like may be used.

【００４３】また、ボンディングパッド上に形成する絶
縁膜として、ＳｉＯ２膜を例にあげているが、耐湿性の
高い膜であれば他の膜を用いてもよく、例えば、Ｓｉ３
Ｎ４膜やＳｉＯＮ膜を用いることが可能である。なお、
Ｓｉ３Ｎ４膜やＳｉＯＮ膜を用いる場合も、ボンディン
グパッドに影響を与えないような温度で形成する。例え
ば、ボンディングパッドが実施例と同様ＡｌＣｕ膜の場
合は、４００℃以下とするのが好ましい。このような低
温で絶縁膜を形成するためには、プラズマＣＶＤを用い
るとよい。Although the SiO 2 film is used as an example of the insulating film formed on the bonding pad, another film may be used as long as it has a high moisture resistance. For example, Si 3 film may be used.
It is possible to use an N 4 film or a SiON film. In addition,
Even when a Si 3 N 4 film or a SiON film is used, it is formed at a temperature that does not affect the bonding pad. For example, when the bonding pad is an AlCu film as in the embodiment, the temperature is preferably 400 ° C. or lower. Plasma CVD may be used to form the insulating film at such a low temperature.

【００４４】また、ボンディングパッドを覆う絶縁膜の
厚さは、その絶縁膜の材質およびボンディングパッドの
材質に応じて、ボンディングワイヤーとボンディングパ
ッドとを確実に接続でき、且つパッド表面の変質を防止
できるよう、適宜設定される。例えば、Ｃｕ膜からなる
ボンディングパッド上に絶縁膜としてＳｉ３Ｎ４膜また
はＳｉＯＮ膜を形成する場合は、絶縁膜の厚さは１０ｎ
ｍ程度にするとよい。Further, the thickness of the insulating film covering the bonding pad can surely connect the bonding wire and the bonding pad depending on the material of the insulating film and the material of the bonding pad, and can prevent the deterioration of the surface of the pad. Is set appropriately. For example, when a Si 3 N 4 film or a SiON film is formed as an insulating film on a bonding pad made of a Cu film, the insulating film has a thickness of 10 n.
It is good to set it to about m.

【００４５】[0045]

【発明の効果】以上説明した通り、本発明の半導体装置
及びその製造方法によれば、ボンディングパッド上面が
ＳｉＯ２膜等の絶縁膜で覆われているため、ボンディン
グ工程前にパッド表面が変質してしまうことを防止する
ことが可能となる。As described above, according to the semiconductor device and the method of manufacturing the same of the present invention, since the upper surface of the bonding pad is covered with the insulating film such as the SiO 2 film, the surface of the pad is deteriorated before the bonding process. It is possible to prevent it from being lost.

【図面の簡単な説明】[Brief description of drawings]

【図１】本発明の第１実施例による半導体装置の製造方
法を示す工程図である。FIG. 1 is a process drawing showing a method of manufacturing a semiconductor device according to a first embodiment of the present invention.

【図２】本発明の第１実施例による半導体装置の製造方
法を示す工程図である。FIG. 2 is a process drawing showing the method for manufacturing the semiconductor device according to the first embodiment of the present invention.

【図３】本発明の第１実施例による半導体装置の製造方
法を示す工程図である。FIG. 3 is a process drawing showing the method of manufacturing the semiconductor device according to the first embodiment of the present invention.

【図４】本発明の第１実施例による半導体装置の製造方
法を示す工程図である。FIG. 4 is a process drawing showing the method of manufacturing the semiconductor device according to the first embodiment of the present invention.

【図５】本発明の第１実施例による半導体装置の製造方
法を示す工程図である。FIG. 5 is a process drawing showing the method of manufacturing the semiconductor device according to the first embodiment of the present invention.

【図６】本発明の第１実施例による半導体装置の製造方
法を示す工程図である。FIG. 6 is a process drawing showing the method of manufacturing the semiconductor device according to the first embodiment of the present invention.

【図７】本発明の第１実施例による半導体装置の製造方
法を示す工程図である。FIG. 7 is a process chart showing the manufacturing method of the semiconductor device according to the first embodiment of the invention.

【図８】本発明の第１実施例による半導体装置の製造方
法を示す工程図である。FIG. 8 is a process drawing showing the method of manufacturing the semiconductor device according to the first embodiment of the present invention.

【図９】本発明の第１実施例による半導体装置の製造方
法を示す工程図である。FIG. 9 is a process drawing showing the method of manufacturing the semiconductor device according to the first embodiment of the present invention.

【図１０】本発明の第２実施例による半導体装置の製造
方法を示す工程図である。FIG. 10 is a process drawing showing the manufacturing method of the semiconductor device according to the second embodiment of the present invention.

【図１１】本発明の第２実施例による半導体装置の製造
方法を示す工程図である。FIG. 11 is a process drawing showing the manufacturing method of the semiconductor device according to the second embodiment of the present invention.

【図１２】本発明の第２実施例による半導体装置の製造
方法を示す工程図である。FIG. 12 is a process drawing showing the manufacturing method of the semiconductor device according to the second embodiment of the present invention.

【図１３】本発明の第２実施例による半導体装置の製造
方法を示す工程図である。FIG. 13 is a process drawing showing the manufacturing method of the semiconductor device according to the second embodiment of the present invention.

【符号の説明】[Explanation of symbols]

１ 半導体基板 ２ 層間絶縁膜 ３ ＡｌＣｕ膜 ４ ＴｉＮ膜 ５ ＳｉＯ２膜 ６ ＳｉＯＮ膜 ７ ポリイミド層 ８ 開口 ９ ボンディングパッド １０ ＳｉＯ２膜 １１ ボンディングワイヤ １２ 共晶層1 Semiconductor Substrate 2 Interlayer Insulation Film 3 AlCu Film 4 TiN Film 5 SiO 2 Film 6 SiON Film 7 Polyimide Layer 8 Opening 9 Bonding Pad 10 SiO 2 Film 11 Bonding Wire 12 Eutectic Layer

Claims (14)

【特許請求の範囲】[Claims] 【請求項１】 ボンディングパッドと、 前記ボンディングパッドの一部上に設けられたボンディ
ングワイヤと、 前記ボンディングパッドと前記ボンディングワイヤの界
面の少なくとも一部に前記ボンディングパッド上に堆積
された絶縁膜とを有することを特徴とする半導体装置。1. A bonding pad, a bonding wire provided on a part of the bonding pad, and an insulating film deposited on the bonding pad on at least a part of an interface between the bonding pad and the bonding wire. A semiconductor device having. 【請求項２】 前記ボンディングパッドと前記ボンディ
ングワイヤの界面の少なくとも一部に前記ボンディング
ワイヤを構成する第１導電物と前記ボンディングワイヤ
を構成する第２導電物との共晶層を有することを特徴と
する半導体装置。2. A eutectic layer of a first conductive material forming the bonding wire and a second conductive material forming the bonding wire is provided on at least a part of an interface between the bonding pad and the bonding wire. Semiconductor device. 【請求項３】 前記ボンディングパッドの前記ボンディ
ングワイヤで覆われた領域を除く領域は、前記絶縁膜で
覆われていることを特徴とする請求項１または２記載の
半導体装置。3. The semiconductor device according to claim 1, wherein a region of the bonding pad other than the region covered with the bonding wire is covered with the insulating film. 【請求項４】 前記絶縁膜は、ＳｉＯ２膜、Ｓｉ３Ｎ４
膜、ＳｉＯＮ膜のいずれかであることを特徴とする請求
項１乃至３のいずれかに記載の半導体装置。4. The insulating film is a SiO 2 film or Si 3 N 4 film.
4. The semiconductor device according to claim 1, wherein the semiconductor device is a film or a SiON film. 【請求項５】 前記絶縁膜の膜厚は１０〜２０ｎｍであ
ることを特徴とする請求項１乃至４のいずれかに記載の
半導体装置。5. The semiconductor device according to claim 1, wherein the insulating film has a thickness of 10 to 20 nm. 【請求項６】 半導体基板上に形成された導電膜のボン
ディングパッドに第１絶縁膜を堆積する工程と、 前記第１絶縁膜上にボンディングワイヤを接触させてボ
ンディングを行ない前記ボンディングパッドと前記ボン
ディングワイヤとを接続する工程とを備えることを特徴
とする半導体装置の製造方法。6. A step of depositing a first insulating film on a bonding pad of a conductive film formed on a semiconductor substrate; and a bonding wire contacting the first insulating film to perform bonding, and the bonding pad and the bonding. And a step of connecting to a wire. 【請求項７】 前記導電膜を覆う第２絶縁膜に開口を形
成することにより前記ボンディングパッドを形成し、そ
の後前記第１絶縁膜を堆積することを特徴とする請求項
６記載の半導体装置の製造方法。7. The semiconductor device according to claim 6, wherein the bonding pad is formed by forming an opening in a second insulating film that covers the conductive film, and then the first insulating film is deposited. Production method. 【請求項８】 前記第１絶縁膜は前記ボンディングパッ
ドから前記第２絶縁膜上に延在して形成されることを特
徴とする請求項７記載の半導体装置の製造方法。8. The method of manufacturing a semiconductor device according to claim 7, wherein the first insulating film is formed to extend from the bonding pad onto the second insulating film. 【請求項９】 前記ボンディングパッド上に前記第１絶
縁膜を堆積し、その上にさらに第２絶縁膜を形成し、前
記ボンディングパッドに対応する大きさの開口を前記第
２絶縁膜に形成することを特徴とする請求項６記載の半
導体装置の製造方法。9. The first insulating film is deposited on the bonding pad, a second insulating film is further formed thereon, and an opening having a size corresponding to the bonding pad is formed in the second insulating film. 7. The method for manufacturing a semiconductor device according to claim 6, wherein. 【請求項１０】 前記１絶縁膜は、ＳｉＯ２膜、Ｓｉ３
Ｎ４膜、ＳｉＯＮ膜のいずれかであることを特徴とする
請求項６乃至９いずれかに記載の半導体装置の製造方
法。10. The one insulating film is a SiO 2 film or a Si 3 film.
10. The method for manufacturing a semiconductor device according to claim 6, wherein the N 4 film or the SiON film is used. 【請求項１１】 前記第１絶縁膜の膜厚は１０〜２０ｎ
ｍであることを特徴とする請求項６乃至１０いずれかに
記載の半導体装置の製造方法。11. The film thickness of the first insulating film is 10 to 20 n.
11. The method for manufacturing a semiconductor device according to claim 6, wherein m is m. 【請求項１２】 前記第１絶縁膜はＣＶＤ法で形成され
ることを特徴とする請求項６乃至１１いずれかに記載の
半導体装置の製造方法。12. The method of manufacturing a semiconductor device according to claim 6, wherein the first insulating film is formed by a CVD method. 【請求項１３】 前記導電膜は、ＡｌＣｕ膜、Ａｌ膜、
Ａｌ−Ｓｉ−Ｃｕ膜およびＣｕ膜のいずれかであること
を特徴とする請求項６乃至１２いずれかに記載の半導体
装置の製造方法。13. The conductive film is an AlCu film, an Al film,
13. The method for manufacturing a semiconductor device according to claim 6, wherein the method is one of an Al-Si-Cu film and a Cu film. 【請求項１４】 前記ボンディングは超音波ボンディン
グであることを特徴とする請求項６乃至１３いずれかに
記載の半導体装置の製造方法。14. The method of manufacturing a semiconductor device according to claim 6, wherein the bonding is ultrasonic bonding.
JP2001336622A 2001-11-01 2001-11-01 Semiconductor device and method for manufacturing the same Pending JP2003142521A (en)

Priority Applications (1)

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Applications Claiming Priority (1)

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JP2003142521A true JP2003142521A (en) 2003-05-16

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Country Link
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013118310A (en) * 2011-12-05 2013-06-13 Jjtech Co Ltd Semiconductor device
JP2017034192A (en) * 2015-08-05 2017-02-09 株式会社東芝 Semiconductor device and method of manufacturing the same
EP3182443A4 (en) * 2014-08-11 2017-08-23 Panasonic Intellectual Property Management Co., Ltd. Semiconductor device
CN107785343A (en) * 2016-08-25 2018-03-09 英飞凌科技股份有限公司 Semiconductor device and the method for forming semiconductor device
JP2018148090A (en) * 2017-03-07 2018-09-20 エイブリック株式会社 Semiconductor device and manufacturing method of the same

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013118310A (en) * 2011-12-05 2013-06-13 Jjtech Co Ltd Semiconductor device
EP3182443A4 (en) * 2014-08-11 2017-08-23 Panasonic Intellectual Property Management Co., Ltd. Semiconductor device
JP2017034192A (en) * 2015-08-05 2017-02-09 株式会社東芝 Semiconductor device and method of manufacturing the same
CN107785343A (en) * 2016-08-25 2018-03-09 英飞凌科技股份有限公司 Semiconductor device and the method for forming semiconductor device
US10867893B2 (en) 2016-08-25 2020-12-15 Infineon Technologies Ag Semiconductor devices and methods for forming a semiconductor device
JP2018148090A (en) * 2017-03-07 2018-09-20 エイブリック株式会社 Semiconductor device and manufacturing method of the same

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