JP2003133698A - Method for manufacturing board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a board manufacturing method capable of surely forming a via conductor of a prescribed shape independently of the position of the via conductor on a board requiring the via conductor. SOLUTION: The method for manufacturing a wiring board 1 is provided with an electrolytic Cu plating process for dipping a board 51 having a via hole 19 opened on the surface 53 of the board 51 into an electrolytic Cu plating solution 105, allowing a current to flow into the solution 105, and forming a field via 21 in the via hole 19. In the process, the board 51 is dipped into the solution 105 in an erected state so that the surface 53 is turned to the horizontal direction, bubbles 109 generated lower than the board 51 are allowed to rise from the lower part 53d of the surface 53 to the upper part 53u while touching the surface 53, and bubbling is continued so that the bubbles 109 are allowed to rise up to the upper part of the board 51 to execute electrolytic plating.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a substrate, and more particularly to a method for manufacturing a substrate having a via conductor.

[0002]

2. Description of the Related Art Conventionally, a substrate having a via conductor has been known. The via conductor is formed as follows, for example. That is, a substrate in which a via hole is formed is manufactured, and electroless plating is first performed on this substrate to form an electroless plating layer on the inner peripheral surface of the via hole. Then, next, the substrate is immersed in an electrolytic plating solution and subjected to electrolytic plating to form an electrolytic plated conductor on the electroless plated layer on the inner peripheral surface of the via hole to form a via conductor.

[0003]

However, even if electrolytic plating is applied to the substrate, a via conductor having a predetermined shape cannot be formed in the via hole in some cases. That is, a via conductor may be formed in which the electrolytic plated conductor is not sufficiently formed on the inner peripheral surface of the via hole. In particular, when the via conductor to be formed is not a bowl-shaped via conductor that follows the shape of the inner peripheral surface of the via hole, but a filled via that fills the via hole with an electrolytic plating conductor,
There is a high frequency that a via conductor having a form in which the via hole is sufficiently filled cannot be formed.

The reason is as follows. That is, since the via hole is recessed from the surface of the substrate, when the substrate is immersed in the plating solution, the air in the via hole may not escape or bubbles may easily adhere to the via hole later. Particularly in the case of a filled via, the electrolytic plated conductor is formed in the via hole and the shape of the hole changes, so that depending on the shape of the hole, the adhered bubbles may be difficult to remove from the hole. If the air bubbles are adhered in this way, the plating solution is not sufficiently supplied to the inner peripheral surface of the via hole, so that the electrolytic plated conductor is hard to grow. As a result, it is considered that a via conductor in which the electrolytic plated conductor is not sufficiently formed on the inner peripheral surface of the via hole is formed.

The present invention has been made in view of the above circumstances, and for a substrate having a via conductor, a method for manufacturing a substrate capable of reliably forming a via conductor having a predetermined shape regardless of the place in the substrate. The purpose is to provide.

[0006]

[Means for Solving the Problems, Actions and Effects] The solution is to immerse a substrate having a via hole opened on the surface of the substrate in an electrolytic plating solution and pass an electric current to form a via conductor in the via hole. In the electrolytic plating step, the substrate is erected so that the substrate surface faces the horizontal direction, and bubbles are generated below the substrate, and the bubbles are generated from the lower portion to the upper portion of the substrate surface. It is a method of manufacturing a substrate including an electrolytic plating step of performing electrolytic plating while bubbling so as to rise while hitting the surface of the substrate and rising above the substrate.

According to the present invention, when manufacturing a substrate having a via conductor, a substrate having a via hole is prepared, and an electrolytic plating process is performed to form the via conductor. This electrolytic plating process is not limited to simply immersing a substrate in an electrolytic plating solution to perform electrolytic plating. The substrate is erected so that the substrate surface faces the horizontal direction, that is, the substrate is erected so that the substrate surface is parallel to the vertical direction and immersed in the plating solution. Then, the bubbles generated below the substrate rise while uniformly hitting the entire substrate surface from the lower part to the upper part of the substrate surface, and while bubbling so as to rise above the substrate.

If electrolytic plating is carried out while bubbling in this way, bubbles will successively hit the surface of the substrate, so that even if there is air bubbles left in the via holes of the dipped substrate that could not be exhausted, Removed with bubbling bubbles.
Alternatively, even if bubbles are later attached to the via holes of the substrate being immersed, these bubbles are also removed together with the bubbles of bubbling. As a result, the plating solution is supplied to the entire inner peripheral surface of the via hole, so that the electrolytic plated conductor is formed on the entire inner peripheral surface of the via hole. Therefore, according to the present invention, the via conductor having a predetermined shape can be reliably formed. Further, according to the present invention, bubbles are successively applied to the lower part to the upper part of the substrate surface, that is, the entire substrate surface. Therefore, even if the via hole is formed anywhere on the substrate surface, the via hole has a predetermined shape. The via conductor can be reliably formed. After the via conductor is formed, the substrate may be sequentially manufactured by further performing subsequent steps such as forming a wiring layer by a known method.

The bubbling bubbles may be generated, for example, as follows. That is, a pipe having many holes is arranged below the substrate. Then, air is sent into the pipe. Then, bubbles can be generated upward from the pipe. When via holes are formed on the two front and back surfaces of the substrate, bubbling is performed so that bubbles hit the surfaces of both substrates. In this case, for example, two pipes for generating bubbles may be arranged at intervals so that the bubbles generated from each pipe may hit the surface of each substrate.

Further, in the above method for manufacturing a substrate,
In the electrolytic plating step, a method for manufacturing a substrate may be used in which filled vias are formed by filling the via holes with electrolytic plating.

If the via conductor formed by electrolytic plating is not a bowl-shaped via conductor that follows the shape of the inner peripheral surface of the via hole but a filled via that fills the via hole with electrolytic plated conductor, the via hole is There is a high frequency that a sufficiently filled via conductor having a predetermined shape cannot be formed. Since the via hole is gradually filled with electrolytic plating, the shape of the hole (recess) also changes in the process. For this reason, it is considered that, depending on the shape of the holes, it becomes difficult to remove bubbles once attached. But,
In the present invention, as described above, the substrate is stood upright and immersed in the plating solution, and electrolytic plating is performed while bubbling so that bubbles rise from the bottom to the top while hitting the surface of the substrate. Therefore, even when a filled via is formed in the via hole, electrolytic plating can be performed without bubbles continuing to adhere to the via hole. As a result, the via hole can be filled with the electroplated conductor to reliably form the filled via having a predetermined shape. Needless to say, in order to form the filled via in the via hole, it is necessary to change the plating solution, the plating conditions, and the like from the case of forming the bowl-shaped via conductor.

Further, in the method for manufacturing a substrate according to any one of the above, the substrate includes a lower layer, and a plating resist layer forming a surface of the substrate having a through hole through which the lower layer is exposed, The via hole is preferably formed in the lower layer and is exposed in the through hole.

The substrate used in the present invention comprises a lower layer and a plating resist layer forming a substrate surface having a through hole through which the lower layer is exposed. The via hole forming the via conductor is formed in the lower layer and is exposed in the through hole of the plating resist layer. Therefore, the depth of the via hole measured from the surface of the substrate (the surface of the plating resist layer) is deeper than when the plating resist layer is not provided. Therefore, when the substrate is dipped in the plating solution, the air in the via hole cannot be completely exhausted, and bubbles easily form in the via hole. Alternatively, it becomes difficult to remove bubbles when they are attached to the via holes later. As a result, compared to the case where there is no plating resist layer, the via conductor having a predetermined shape cannot be formed in many cases.

However, in the present invention, as described above, the substrate is stood upright and immersed in the plating solution, and the bubbling is performed so that the bubbles rise uniformly from the lower part to the upper part of the substrate surface, and the electrolytic plating is performed. To do. For this reason,
Even if the plating resist layer is formed and the via hole is relatively deep, it effectively removes the bubbles adhering to the via hole,
Electrolytic plating can be performed. Therefore, the via conductor having a predetermined shape can be reliably formed.

As a case where electrolytic plating is performed on a substrate having a plating resist layer, there is a case where it is desired to form a wiring layer or the like on the surface of the lower layer by a so-called semi-additive method. That is, on the lower layer surface having a via hole,
First, electroless plating is performed to form an electroless plated layer on the inner peripheral surface of the via hole and substantially the entire surface of the lower layer. Then, a plating resist layer having a predetermined pattern opening corresponding to the wiring layer is formed on the lower layer on which the electroless plating layer is formed. The substrate in this state is the substrate to be electroplated in the present invention.
When electrolytic plating is performed by applying the present invention, a via conductor is formed and an electrolytic plated conductor is also formed on a portion such as a wiring layer. Therefore, after that, if the plating resist layer is peeled off and etching is performed, the thin electroless plating layer can be removed, and a wiring layer or the like having a predetermined pattern can be formed.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS (Embodiment) An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a partially enlarged sectional view of the wiring board 1 manufactured in this embodiment. The wiring board 1 has a substantially rectangular plate shape having a main surface 3 and a back surface 5. The size is 400mm × 40
It is 0 mm. At the center of the wiring substrate 1, a substantially plate-shaped core substrate (resin insulating layer) 7 (thickness: about 800 μm) is provided.
A resin insulation layer 9 (thickness: about 35 μm) made of epoxy resin or the like is laminated on each of the both surfaces.
Further, on the resin insulation layer 9, a solder resist layer (resin insulation layer) 11 (having a thickness of about 25 μm) made of epoxy resin or the like is used.
m) are respectively laminated.

Of these, a plurality of through holes 13 (diameter about 350 μm) penetrating the core substrate 7 are formed at predetermined positions, and a substantially cylindrical through hole conductor 15 (having a thickness of about 30 μm) is formed on the inner peripheral surface thereof. 25 μm) are formed respectively. The through-hole conductor 15 is filled with a substantially columnar resin filling body 17. Further, a plurality of via holes 19 having an opening diameter of about 85 μm penetrating the resin insulating layer 9 are formed at predetermined positions, and filled vias 21 are formed in each via hole 19. Further, the solder resist layer 11 has a pad opening 2 penetrating therethrough.
A plurality of 3 are formed at predetermined positions.

Between the core substrate 7 and the resin insulation layer 9,
First wiring layers 25 (thickness of about 25 μm) are respectively formed. The first wiring layer 25 is connected to the through hole conductor 15 and the filled via 21. The second wiring layer 27 is also provided between the resin insulating layer 9 and the solder resist layer 11.
(Thickness of about 15 μm) are formed. The second wiring layer 27 is connected to the filled via 21. Further, some pads 27p of the second wiring layer 27 are exposed in the pad openings 23 of the solder resist layer 11.
A Ni plating layer is formed on the pad 27p to prevent oxidation, and an Au plating layer is further formed on the Ni plating layer (not shown).

Such a wiring board 1 is manufactured as follows. First, a double-sided copper-clad core substrate 7 is prepared. Then, a plurality of through holes 13 are drilled at predetermined positions with a drill (see FIG. 2). Then, electroless Cu plating and electrolytic Cu plating are sequentially applied to this core substrate 7 to form a Cu plating layer on substantially the entire surface of the copper foil, and a substantially cylindrical through hole conductor 15 is formed on the inner peripheral surface of the through hole 13. Form.

Then, the through hole conductor 15 is filled with the resin filling body 17. Specifically, through-hole conductor 1
A resin paste is printed and filled in the through-hole conductor 15 using a mask having a predetermined pattern having holes corresponding to positions 5 and openings, and then the resin paste is thermally cured to form the resin filling body 15. And the resin filling body 1
The end of 5 is removed by polishing to make the surface of the core substrate 7 flush. After the resin filling body 17 is formed, the Cu layer including the copper foil and the Cu plating layer is patterned to form the first wiring layer 25 on both surfaces of the core substrate 7. Specifically, a semi-cured etching resist layer is formed on this Cu layer, and exposed and developed using a mask having a predetermined pattern corresponding to the first wiring layer 25. Then, it is further heated and cured to form the etching resist layer into a predetermined pattern. Then, the Cu layer exposed from this resist layer is removed by etching. After etching, the etching resist layer is peeled off.

Next, a resin insulating layer 9 having a via hole 19 with an opening diameter of about 85 μm is formed on the core substrate 7 and the first wiring layer 25. Specifically, a semi-cured resin insulating layer is formed on the core substrate 7 and the first wiring layer 25, and is exposed and developed using a mask having a predetermined pattern corresponding to the via hole 19.
Then, it is further heat-treated and cured to form the resin insulating layer 9 having the via hole 19 at a predetermined position. The via holes 19 may be opened by laser processing. Then, electroless Cu plating is performed to form an electroless Cu plated layer 31 having a thickness of about 0.7 μm, which is indicated by a thick line in FIG. 2, on the surface of the resin insulating layer 9 and the inner peripheral surface of the via hole 19.

Next, on the electroless Cu plating layer 31,
A plating resist layer 33 having a predetermined pattern having a plurality of through holes 35 is formed. Specifically, the electroless Cu plating layer 3
A semi-cured plating resist layer is formed on the first layer 1, and is exposed and developed using a mask having a predetermined pattern corresponding to the second wiring layer 27 and the via hole 19. After that, it is further heated and cured, and the plating resist layer 3 having the through holes 35 at predetermined positions.
3 is formed. Since the through holes 35 correspond to the second wiring layer 27 and the via holes 19, they have various shapes. In this way, the substrate 51 shown in FIG. 2 is obtained.

Next, in the electrolytic Cu plating step, the substrate 51 is subjected to electrolytic Cu plating. First, this electrolytic Cu
FIG. 3 shows the plating apparatus 101 used in the plating process.
Will be described with reference to. The plating apparatus includes a moving device (not shown) that holds and moves the substrate 51. The moving device 101 includes a rack that holds the substrate 51 and a moving mechanism that moves the rack horizontally or vertically.

Further, the plating apparatus 101 includes a Cu plating bath 10 for forming an electrolytic Cu plating conductor on the substrate 51.
3 is provided. In the Cu plating bath 103, the filled via 2
The electrolytic Cu plating solution 105 for forming No. 1 is stored. Further, two pipes 107 having a length of about 800 mm and having a large number of holes for generating bubbles 109 are installed near the bottom surface 103t of the Cu plating bath 103. These pipes are parallel to each other with an interval H of about 60 mm, and the bottom surface 103 of the Cu plating bath 103.
It is arranged parallel to t. Therefore, these pipes 10
When air is sent to 7, innumerable bubbles 1
09 occurs and rises to the water surface of the electrolytic Cu plating solution 105.

Next, the electrolytic Cu plating step will be described. First, the substrate 51 set in the rack is horizontally moved to a position above the Cu plating bath 103 by the moving device.
Then, the rack is lowered and the substrate 51 is immersed in the electrolytic Cu plating solution 105 in the Cu plating bath 103. At that time, the substrate 51 is erected so that the substrate surface 53 of the substrate 51 faces the horizontal direction. Then, it is dipped for a predetermined time, and as shown in FIG.
An electrolytic Cu-plated conductor is formed on. As a result, the filled via 21 and the second wiring layer 27 are formed on the substrate surface 53.

This electrolytic Cu plating step simply involves electrolytic Cu plating.
The substrate 51 is not immersed in the plating solution 105 for electrolytic Cu plating. Air is sent to the pipe 107 installed below the substrate 51 to generate a large number of bubbles 109 (see FIG. 3). At that time, 40 to 40 for the two pipes 107
Inflow 60 l / min of air. Therefore, from each of the pipes 107, air of 20 to 30 l / min flows out as bubbles 109. And that bubble 109
Rise from the lower portion 53d of the substrate surface 53 to the upper portion 53u while hitting the substrate surface 53, and
Electrolytic Cu plating is performed while bubbling so as to rise higher than above. That is, the bubbles 109 are made to hit at any position on the substrate surface 53 regardless of the location, and the bubbles 109 do not stay in the upper portion 53u and rise above the substrate 51. .

The substrate 51 has both substrate surfaces 53.
A via hole 19 is formed in the. Therefore, bubbling is performed so that the bubbles 109 hit both the substrate surfaces 53. Cu
Since two pipes 107 are installed in the plating tank 103 with a gap H, the bubbles 109 generated from one pipe 107B hit the one substrate surface 53B of the substrate 51,
The bubbles 109 generated from the other pipe 107C hit the other substrate surface 53C. Length of each pipe 107 (about 800 m
Since m) is about twice the size of the substrate 51 (400 mm), about one half (10 to 10 l / min) of the amount of bubbles 109 (20 to 30 l / min) generated from each pipe 107 on one substrate surface 53. 15 l / min).

If electrolytic Cu plating is performed while bubbling in this way, even if bubbles are left in the via holes 19 of the immersed substrate 51 because the air in the holes could not be completely exhausted and the bubbles 109 for bubbling are present. To be removed. Alternatively, even if bubbles are attached to the via holes 19 of the substrate 51 during the immersion, they are removed together with the bubbling bubbles 109. As a result, the electrolytic Cu plating solution 105 is supplied to the entire inner peripheral surface of the via hole 19, and the electrolytic Cu plated conductor is formed on the entire inner peripheral surface of the via hole 19. Therefore, the via conductor 21 can be reliably formed into a predetermined shape. Furthermore, since the bubbles 109 continuously hit the substrate surface 53 from the lower portion 53d to the upper portion 53u, that is, the entire substrate surface 53, even if the via hole 109 is formed anywhere on the substrate surface 53, the via hole 109 is formed. 19
It is possible to reliably form the filled via 21 having a predetermined shape.

In this embodiment, the via conductor 21 formed by electrolytic Cu plating is the filled via 21 in which the via hole 19 is filled with electrolytic Cu plated conductor. Therefore, it is generally difficult to form the via hole 19 into a predetermined shape that is completely filled with the electrolytic Cu-plated conductor. Since the via hole 19 is gradually filled with the electrolytic Cu-plated conductor, the shape of the hole (recess) also changes in the process. For this reason, it is considered that, depending on the shape of the holes, it becomes difficult to remove bubbles once attached. However, in the present embodiment, as described above, the substrate 51 is erected and immersed in the plating solution, and electrolytic Cu plating is performed while bubbling so that the bubbles 109 rise from the bottom to the top while hitting the substrate surface 53. Therefore, even when the filled via 21 is formed in the via hole 19, electrolytic Cu plating can be performed without the bubbles 109 continuing to adhere to the via hole 19. As a result, the via hole 19 can be reliably filled with the electrolytic Cu-plated conductor, and the filled via 21 can be formed in a predetermined shape.

The substrate 51 on which electrolytic Cu plating is performed in the present embodiment includes a resin insulating layer (lower layer) 9 and a plating resist layer 33 having a through hole 35 that forms the substrate surface 53 and exposes the resin insulating layer 9. Prepare The via hole 19 forming the filled via 21 is formed in the resin insulating layer 9 and is exposed in the through hole 35 of the plating resist layer 33. For this reason, the depth of the via hole 19 measured from the substrate surface 53 (the surface of the plating resist layer 33) is deeper than when the plating resist layer 33 is not provided. Therefore, when the substrate 51 is dipped in the electrolytic Cu plating solution 105, the air in the via hole 19 cannot be completely exhausted and bubbles are particularly likely to be generated in the via hole 19. Alternatively, it is particularly difficult to remove bubbles when bubbles are formed in the via holes 19 later. As a result, in general, the filled vias 21 having a predetermined shape cannot be formed more often than when the plating resist layer 33 is not provided.

However, in the present embodiment, as described above, the substrate 51 is stood upright and immersed in the electrolytic Cu plating solution 105, and bubbles 109 are bubbled so as to rise from the bottom to the top while hitting the substrate surface 53. Electrolytic Cu plating is performed. Therefore, even if the plating resist layer 33 is formed and the via hole 19 is relatively deep, the via hole 1
Electrolytic Cu plating can be performed without the bubbles 109 continuing to adhere to the surface 9. Therefore, the filled via 21 can be reliably formed in a predetermined shape.

After a predetermined time has elapsed (after the filled via 21 has been formed) after electrolytic Cu plating, the rack is pulled up from the Cu plating tank 103 by the moving mechanism and horizontally moved to the next step. In this way, the electrolytic Cu plating process is completed.

Next, the plating resist layer 33 is peeled off from the substrate 51 on which the electrolytic Cu plating conductor is formed, and the electroless Cu plating layer 31 covered with the plating resist layer 33 is exposed. Then, etching (so-called quick etching) is performed to remove the exposed electroless Cu plating layer 31, and the second wiring layer 27 is formed in a predetermined pattern. After that, the solder resist layer 11 having the pad openings 23 is formed on the resin insulating layer 9 and the second wiring layer 27. Specifically, a semi-cured solder resist layer is formed on the resin insulating layer 9 and the second wiring layer 27, and is exposed and developed using a mask having a predetermined pattern corresponding to the pad opening 23.
Then, it is further heat-treated and cured to form the solder resist layer 11 having a predetermined pattern. Then, a Ni plating layer is formed on the pad 27p exposed from the solder resist layer 11, and an Au plating layer is further formed thereon. As described above, the wiring board 1 shown in FIG. 1 is completed.

Although the present invention has been described with reference to the embodiments, the present invention is not limited to the above embodiments and can be appropriately modified and applied without departing from the scope of the invention. Nor. For example, in the above embodiment, the method for manufacturing the multilayer resin wiring substrate 1 in which the resin insulating layers 7, 9, 11 and the wiring layers 25, 27 are laminated is described. The present invention can be applied to any substrate as long as the substrate has a via conductor formed in the via hole by plating.
Alternatively, a multilayer core substrate having wiring inside may be used as the core substrate. Further, in the above embodiment, a filled via is formed as the via conductor 21, but a conformal via in which the via hole 19 is not completely filled with plating may be formed. Further, in the above embodiment, the via conductor (filled via) 21 is formed by Cu plating.
The present invention can be applied to the case of forming by other metal plating.

[Brief description of drawings]

FIG. 1 is a partially enlarged cross-sectional view of a wiring board according to an embodiment.

FIG. 2 is an explanatory diagram showing a substrate used in an electrolytic Cu plating step in the method for manufacturing a wiring substrate according to the embodiment.

FIG. 3 is an explanatory view showing an electrolytic Cu plating step of forming a filled via in the method for manufacturing a wiring board according to the embodiment.

FIG. 4 is an explanatory view showing a state of the substrate after forming filled vias by electrolytic Cu plating in the method for manufacturing a wiring substrate according to the embodiment.

[Explanation of symbols]

1 Wiring Substrate 9 Resin Insulation Layer (Lower Layer) 19 Via Hole 21 Filled Via 33 Plating Resist Layer 35 Through Hole 51 (Formed in Plating Resist Layer) Substrate 53 (Via Hole Used for Electrolytic Cu Plating) Substrate 53 Substrate Surface 103 Cu plating tank 105 Electrolytic Cu plating solution (electrolytic plating solution) 107 Piping 109 Bubble

Continued front page    F term (reference) 4K024 AA09 AB17 BA12 BB11 BC10                       CB02 CB12 CB26 DA10 DB10                       FA05 GA16                 5E317 BB02 BB13 BB15 CC25 CC32                       CC33 CC42 CD15 GG09                 5E343 AA07 AA17 BB24 BB72 DD02                       DD33 DD43 DD76 EE32 EE37                       ER11 ER26 FF16 GG13

Claims (3)

[Claims] 1. An electrolytic plating step of immersing a substrate having a via hole opening on the surface of the substrate in an electrolytic plating solution and passing a current to form a via conductor in the via hole, wherein the substrate surface is horizontal. Immerse the substrate upright so that it faces in the direction,
Bubbles generated below the substrate rise from the lower part to the upper part of the substrate surface while hitting the substrate surface, and while bubbling so as to rise above the substrate, electrolytic plating is performed. A method of manufacturing a substrate including a plating step. 2. The method for manufacturing a substrate according to claim 1, wherein in the electrolytic plating step, a filled via is formed in which the via hole is filled with electrolytic plating. 3. The method for manufacturing a substrate according to claim 1, wherein the substrate comprises a lower layer and a plating resist layer forming a surface of the substrate having a through hole through which the lower layer is exposed. The method of manufacturing a substrate, wherein the via hole is formed in the lower layer and is exposed in the through hole.