JP2003115578A - Nonvolatile solid magnetic memory, its manufacturing method and multichip package - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a nonvolatile solid state memory capable of high speed recording/reproduction by protecting an MRAM appropriate to a WLP age from an external magnetic field thereby preventing an erroneous operation due to the external magnetic field and enhancing stability in the recording/ reproducing operation of the memory element. SOLUTION: An MRAM chip 100 is covered with an insulation layer 101 and further covered with a magnetic shield structure 102 except parts of electrode pads 103a and 103b becoming the interface with the outside (fig. (a)). An MRAM chip 111 and a second device 112 are stacked through die connection layers 113 and 114, respectively. The MRAM chip 111 is connected with the device 112 by means of a bonding wire 116 and connected with a semiconductor mounting substrate 110 by means of a bonding wire 117. An interposer 119 is formed on the semiconductor mounting substrate 110 and connected with an external circuit through solder balls 120 on the rear surface. The entirety is sealed with a resin package 115 (fig. (b)).

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a nonvolatile solid-state memory device using a magnetoresistive effect, a memory, a magnetic shield package for them, and a manufacturing method thereof.

[0002]

2. Description of the Related Art Recently, mobile terminals, such as mobile phones and PDAs, have been actively developed. The need for a large-capacity non-volatile high-speed access memory as a storage memory in mobile devices is being emphasized. In recent years, a magnetoresistive film having a nonmagnetic layer sandwiched between ferromagnetic layers has a giant magnetoresistive effect.
nc) was discovered, and magnetic sensors and magnetic memory devices (hereinafter referred to as “MRAM”) that utilize this phenomenon have been attracting attention. The change in electric resistance when a current is passed in the direction perpendicular to the film of a ferromagnetic layer / non-magnetic insulating layer / ferromagnetic layer is due to the difference in spin polarizability of the ferromagnetic layer. It is detected as a change in the tunnel current used as the tunnel barrier layer and is called the tunnel magnetoresistance effect (TMR effect). Since a high magnetoresistive ratio can be obtained in the TMR element, development is accelerating toward practical application of MRAM and magnetic head.

In MRAM, two ferromagnetic layers and a thin non-magnetic layer sandwiched between them serve as a basic structure for storing information. Utilizing the phenomenon that the resistance value is different between when the magnetization directions of the ferromagnetic layers sandwiching the nonmagnetic layer are aligned and when they are antiparallel,
The states of "0" and "1" are stored.

Information is read by an absolute detection method in which the absolute value of resistance is used for judgment, and a weaker magnetic field is applied during writing to reverse the magnetization of only the ferromagnetic layer having a lower coercive force to "0" or "0". A differential detection method for reading the 1 "state is known.

Information is written in two by the absolute detection method.
This is done by changing the magnetization direction of one of the two ferromagnetic layers, which has a lower coercive force, by an external magnetic field. The differential detection method is performed by changing the magnetization direction of one of the two ferromagnetic layers, which has a higher coercive force, by an external magnetic field. A method is known in which a current is caused to flow in a wiring arranged near a magnetoresistive element and a generated magnetic field is used.

Since the MRAM is magnetically stored, it has excellent radiation resistance, is non-volatile in principle, has a high speed, and has no limitation on the number of times of writing. High-density recording can be easily done by diverting existing semiconductor technology, so DRAM replacement is expected in the future.

In the magnetic memory, the recorded information may be disturbed by an external magnetic field. The stored information is rewritten by the current magnetic field of the wiring arranged near the memory cell, but the magnitude of the magnetic field required for rewriting is 10 to 50.
It is set to about [Oe] (790 to 3950 [A / m]).
Therefore, if a magnetic field exceeding this is applied due to an unexpected factor, erroneous recording or malfunction will occur, and the reliability of the memory will be significantly impaired.

In recent years, in particular, the number of devices mounting devices having higher functions with higher density, such as mobile phones, notebook personal computers, and PDAs, has increased explosively. In these devices, surface mounting is realized by using the backside of the chip, such as chip size package or system in package, as a technology that dramatically increases the degree of integration compared to the conventional method of arranging devices on the substrate. Alternatively, a method of reducing the mounting density by packaging a plurality of different process chips into one package is adopted.

With the increase in the number of input / output (I / O) points, the mounting technology has evolved from the era of wire bonding to the era of surface mounting using thick film metal protrusions called bumps. It is expected that such wafer-level packaging (WLP) technology will spread widely.

Further, as a future development, a technique called system-on-chip in which a plurality of functional devices are mixedly mounted on the same wafer is being researched and developed. MRAM is also used by incorporating it in the above-mentioned applications where a high-density package is required.

Among them, a mobile phone is considered as a case where a magnetic field from the outside is large. A vibration function is widely used in mobile phones to notify the user of incoming calls and device operating states by vibration. As a vibrator, an electromagnetic motor with an eccentric weight is widely used, and various types including a core or not are used. Higher than usual around this motor 10 [Oe] (79
Since a magnetic field of about 0 [A / m] exists, a highly fluctuating magnetic field is applied to the inside of the package when the packaging is performed at high density.

FIG. 19 shows a stack MCP (multi-chip package) for packaging different process chips into one package.
FIG. In the figure, reference numeral 110 indicates a semiconductor mounting substrate, reference numeral 111 indicates a first device, and reference numeral 112 indicates a second device. The first device 111 and the second device 112 are overlaid via the die connection layers 113 and 114, respectively. Bonding wires 116 connect the contact pads between the first device 111 and the second device 112. Bonding wires 117 connect the contact pads between the first device 111 and the semiconductor mounting substrate 110. The semiconductor mounting board 110 has an interposer 119.
Are formed, and are connected to an external circuit through the solder balls 120 on the back surface. The whole is sealed with a resin package 115. In such a structure, it is exposed to a very harsh electromagnetic environment, which is incomparable to the conventional one. In other words, it is necessary to have a structure that can withstand not only the EMI environment from the outside of the package but also the EMI generated from other chips.

An overview of the magnetic shield structure proposed here will be given.

In a magnetic disk head using a magnetoresistive film, as shown in FIG. 20 of Japanese Patent Laid-Open No. 2000-188435, a magnetic shield for avoiding the influence of a write magnetic field is applied to the head part of the magnetic disk. Is installed so as to surround the reading unit.

There are also many proposals for increasing the utilization efficiency of the current magnetic field by utilizing local magnetic shielding.
For example, Japanese Patent Application Laid-Open No. 09-204770 discloses that a magnetic material is used to concentrate a magnetic field in a magnetic memory cell element to reduce the current required for recording / reproducing.
As shown in FIG. 21, a magnetic body made of a high magnetic permeability material is arranged in the vicinity of the memory element so that the magnetic field generated by the write line is concentrated in the corresponding memory cell.

[0016]

In order to implement the MRAM as a product in the future, it is necessary to save power. Generally, a magnetic field induced by a current flowing in a wiring is often used for recording / reproducing information in / from the MRAM. Therefore, in order to save power, it is preferable to reduce the value of the flowing current.

However, in order to achieve this,
It is necessary to reduce the coercive force of the magnetic film of the magnetoresistive element. As a result, a malfunction such as erroneous writing due to a magnetic field from the outside may be induced, and this may be particularly remarkable in the case of a multi-package in which a plurality of circuits are provided close to each other.

Therefore, a first problem (objective) to be solved by the present invention is to protect an MRAM suitable for the WLP era from an external magnetic field and prevent malfunction due to the external magnetic field.

A second problem (objective) is to improve the stability of the recording / reproducing operation of the memory element and to realize a nonvolatile solid-state magnetic memory capable of high-speed recording / reproducing.

[0020]

As a result of intensive studies, the present inventor has found that the following means can solve the problems.

That is, a magnetoresistive element including a first magnetic layer, a second magnetic layer, and a nonmagnetic layer laminated between the magnetic layers laminated on a substrate, and a bit provided above the magnetoresistive element. An MRAM chip in which a line, a write line for changing the magnetization direction of the first magnetic layer or the second magnetic layer by a magnetic field generated by an electric current, and a memory element including a field effect transistor are provided in a matrix.
The magnetic shield structure is characterized in that a high magnetic permeability material is arranged in the vicinity of the chip.

Here, it is preferable that the high-permeability material covers the periphery of the MRAM chip except for the electrode pad portion that serves as an interface between the MRAM chip and an external circuit.

It is preferable that the high magnetic permeability material is arranged in a region where the memory elements are arranged in a matrix.

It is preferable that the high-permeability material is arranged at positions vertically sandwiching a region where the memory elements are arranged in a matrix.

It is preferable that the high magnetic permeability material is connected to a ground circuit.

The periphery of the high magnetic permeability material is preferably covered with an insulating layer.

The high magnetic permeability material preferably contains at least one element of Ni, Fe and Co and has a relative magnetic permeability of 5000 or more.

The width of one side of the MRAM chip is c, and the thickness is
where p is the thickness of the high-permeability material and d is the horizontal direction and q is the vertical direction on the chip surface, then c / (c + d) or p /
It is preferable that (p + q) is 0.9997 or less.

The nonmagnetic layer is preferably an insulator.

The axes of easy magnetization of the first magnetic layer and the second magnetic layer are preferably perpendicular to the film surface.

It is preferable that the axes of easy magnetization of the first magnetic layer and the second magnetic layer are horizontal to the film surface.

It is preferable that the first magnetic layer or the second magnetic layer is made of a rare earth iron group alloy.

Among the rare earth iron group alloys, the rare earth element is
Contains at least one element of Gd, Tb, Dy,
It is preferable to contain at least one element of Fe and Co.

At least one of the first magnetic layer and the non-magnetic layer and the second magnetic layer and the non-magnetic layer has Fe,
It is preferable that a magnetic layer containing at least one element of Co is provided.

Further, an MRAM chip having the magnetic shielding structure, one or more other chips, a connecting means for electrically connecting the chips, and a die connection layer for fixing the chips,
It is composed of a semiconductor mounting board, a terminal for electrically connecting the semiconductor mounting board and an external circuit, a terminal for electrically connecting the external circuit, an interposer for connecting with the semiconductor mounting board, and a sealing material. In a multi-chip package, an MRAM chip having the magnetic shielding structure and one or more other chips are superposed on a semiconductor mounting substrate to
The present invention also includes a multi-chip package characterized by being packaged.

In the multi-chip package, it is preferable that the one or more other chips are located closer to the semiconductor mounting substrate than the MRAM chip having the magnetic shield structure.

In the multi-chip package, the connecting means for electrically connecting the chips is preferably wire bonding.

In the multi-chip package, the connecting means for electrically connecting the chips are connected by solder balls.

In the multi-chip package, the connecting means for electrically connecting the chips is preferably flip chip bonding.

In the multi-chip package, the terminals for electrically connecting the semiconductor mounting board and the external circuit are preferably solder balls.

Further, a magnetoresistive effect element comprising a first magnetic layer and a second magnetic layer laminated on a substrate and a nonmagnetic layer laminated between the magnetic layers, and provided on the magnetoresistive effect element. Non-volatile solid-state magnetic memory having a bit line, a write line for changing the magnetization direction of the first magnetic layer or the second magnetic layer by a magnetic field generated by an electric current, and an MRAM chip in which memory elements including field effect transistors are arranged in a matrix. A method of manufacturing a device, wherein a magnetic shield structure for shielding an external scattered magnetic field is provided around the MRAM chip except for a portion of an electrode pad serving as an interface between the MRAM chip and an external circuit. The present invention also includes methods.

[0042]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a sectional view showing an embodiment of the magnetic shield structure of the present invention. In FIG. 1A, the MRAM chip 10
0 is covered with an insulating layer 101. Further, it has a structure in which the periphery is covered by a magnetic shield structure 102 except for the electrode pads 103a and 103b which are interfaces with the outside. With the above structure, it becomes possible to shield the single MRAM chip from the external magnetic field.

By applying the basic structure shown in FIG. 1A to the stack MCP shown in FIG. 1B, not only the magnetic field from the outside of the package but also the other chip generates.
It is possible to make the structure resistant to EMI.

In FIG. 1B, reference numeral 110 is a semiconductor mounting substrate, reference numeral 111 is an MRAM chip having a magnetic shield structure,
Reference numeral 112 indicates the second device. The MRAM chip 111 and the second device 112 are overlaid via the die connection layers 113 and 114, respectively. Bonding wires 116 connect the contact pads between the MRAM chip 111 and the device 112. Bonding wires 117 connect the contact pads between the MRAM chip 111 and the semiconductor mounting substrate 110. An interposer (interconnect portion) 119 is formed on the semiconductor mounting substrate 110, and is connected to an external circuit via the solder balls 120 on the back surface. The whole is resin package 115
It is sealed with.

Here, the MRAM chip 111 has a structure in which the periphery is covered with a magnetic shield structure as in FIG. 1A.
A high magnetic permeability material is suitable for the magnetic shield structure. Figure 1
In (b), the image covered with the high magnetic permeability material is indicated by a thick line. Therefore, the structure in which the single MRAM chip is shielded from the external magnetic field makes it possible to obtain a remarkably strong resistance to the EMI environment generated from the adjacent second device 112 and other peripheral circuits.

The MRAM chip refers to a substrate on which a magnetoresistive effect film serving as a memory cell is mounted. It includes a basic structure as a memory element such as a magnetoresistive film formed by connecting to a select transistor, a sense line and a word line. Further, a peripheral circuit for recording / reproducing information may be provided in one chip.

Further, in the form in which the periphery of the high magnetic permeability material 102 shown in FIG. 1 (a) is exposed, the high magnetic permeability material 102 exhibits conductivity, which may cause insulation failure between other devices. For example, depending on the material of the die connection layers 103 and 104 of the stack MCP shown in FIG. 1B, there is a risk of causing a short circuit with another device 112 or the mounted circuit board 110 to destroy the circuit.

As shown in FIG. 3, it is possible to adopt a structure in which the periphery of the high magnetic permeability material 102 is further covered with an insulating layer 104. On the contrary, if the high magnetic permeability material 102 maintains a sufficient insulating property, the high magnetic permeability material 102 may be covered around the periphery except the electrode pads 103a and 103b as shown in FIG.

In FIG. 1A, electrode pads 103a and 103b are provided.
The reason why the structure is covered with the high magnetic permeability material 102 except for the part is to make it close to the ideal magnetic shield structure. However, in practice, as shown in FIG. 5, the effect can be recognized even by omitting the end portion of the chip and arranging the high magnetic permeability material around the region where a large number of memory elements are arranged in a matrix. Alternatively, as shown in FIG. 6, the high-permeability material 102 may be used, and the regions where the memory elements are arranged in a matrix may be sandwiched vertically. In particular, in the case of an MRAM chip using a perpendicular magnetization film, the effect is high because the magnetization is recorded in the direction perpendicular to the substrate surface.

As the high magnetic permeability material used for the magnetic shielding structure, various materials such as permalloy, ferrite, Co type amorphous material, sendust (Fe-Al-Si alloy), and Fe-Co-B ternary system are used. A magnetic material is used. The 42Ni-Fe-based material that has been conventionally known as a lead frame material is also applicable because it is a ferromagnetic material and contains Ni having a relatively high magnetic permeability. As a form, it may be a composite having a thin film and a plurality of layers. The method of making high permeability material is dry film formation,
Various methods such as plating can be used. A high magnetic permeability material is defined as a material having a relative magnetic permeability μ _s of 5000 or more.

The Ni-Fe alloy plating belongs to the abnormal eutectoid type, and Fe is more likely to precipitate than Ni. Fe ²⁺ and Ni
^{If the 2+} ion concentration is not controlled, the composition and film quality will vary. Further, Fe ²⁺ ions are converted into Fe ³⁺ by air oxidation.
Since they become ions, it is necessary to control Fe ²⁺ ions and total iron ions. In the case of permalloy, the addition of saccharin makes it possible to easily make the particles finer. Further, it becomes possible to make a high-quality high-permeability material homogeneously by making a uniform flow on the wafer surface with good reproducibility and controlling the current density. The details regarding the film thickness will be described later.

The high magnetic permeability material 102 shown in FIG. 1A is a magnetic material and often has conductivity. Therefore, a so-called solid earth can be formed by connecting the ground circuit 105 and the high magnetic permeability material 102 as shown in FIG. It is also possible to function as an electromagnetic wave noise shield by obtaining a large ground area around the MRAM chip.

The structure of the present invention shown in FIG. 1 (a) is an image of a sectional structure, and it is possible to turn it upside down depending on the structure of the electrode pads 103a and 103b. Specifically, by using the solder pads or bumps as the electrode pads, the MRAM chip is pressed against the target object and the solder reflow process at about 250 ° C. is performed to obtain a bond that becomes a chip size package. In this case,
It is possible to reduce the electrode pad space of the bonding wire shown in (b) and increase the size of the second device 112. However, since the pitch of solder balls used in BGA (ball grid array) structure is limited to about 0.4 mm, it is necessary to consider that the wiring pitch will be wider than when using bonding wires.

Further, FIG. 1B is only an application example of the present invention, and is not limited by the MCP structure or the connection method between chips. It is also applicable to flip chip methods that can handle high frequencies other than wire bonding methods and other MCP structures.

The film thickness required for the high magnetic permeability material used for the magnetic shield structure is the in-plane magnetization film type in which the MRAM has a magnetization component parallel to the film surface or the perpendicular magnetization film type in which the MRAM has a magnetization component perpendicular to the film surface. It is very different. Ferromagnetic materials such as NiFe and Co are in-plane magnetized film types in which the magnetization direction is parallel to the film surface, and are TbFe and Tb.
When a ferrimagnetic material made of a rare earth-transition metal such as FeCo or GdFe is used, it is of a perpendicular magnetization film type. From the principle of magnetic shielding, it is possible to calculate the required film thickness of the high magnetic permeability material.

[Detailed explanation on magnetic shielding] "Electromagnetics exercise" (edited by Kenichi Goto and Shuichiro Yamazaki, Kyoritsu Shuppan Co., Ltd.)
Inner radius as described in ISBN4-320-03022-2)
a, a hollow sphere with an outer radius b and a relative permeability μ _s , and a uniform magnetic field H0
When the magnetic field is generated in the hollow part of the sphere when it is placed in the inside of the sphere, it is explained by the formula (1 ) And equation (2) are obtained (FIG. 7). Further, from the same continuous condition at any point A on the inner spherical surface, equations (3) and (4) are obtained (FIG. 7). From these 4 formulas, H1, H2, M1, M2
Is calculated, and the magnetic field H2 generated in the hollow portion inside the sphere is expressed by the equation (5) (FIG. 7). In short, if the relative permeability μ _s is increased, the magnetic field H2 generated in the hollow portion inside the sphere becomes much smaller than the external magnetic field H0. At this time, the smaller a / b, the higher the effect. That is, it is desirable to cover the space to be magnetically shielded with a thick wall made of a material having a large relative magnetic permeability μ _s .

FIG. 8 is a graph showing the relationship between a / b and H2 / H0. The relative permeability μ _s is permendur (μ _s = 5000), 78permalloy (μ _s ), which are known as high permeability materials.
= 10000) and sendust (μ _s = 120000). a / b
= 1, that is, when the film thickness of the high-permeability material is zero, the magnetic field H2 generated in the hollow portion inside the sphere becomes equal to the external magnetic field H0, so all the curves converge to H2 / H0 = 1. The method of convergence is
As described above, the larger the value of μ _{s, the} more rapidly a / b approaches 1 and then the more rapidly converges. That is, it indicates that the film thickness of the high magnetic permeability material may be small.

In the relationship of FIG. 8, how much H2 / H0 must be lowered depends on the external magnetic field and the coercive force of the magnetic film forming the magnetoresistive element. The internal magnetic field H2 is the magnitude of the magnetic field (10 to 50 [Oe] (790 to 395) required for rewriting described above.
0 [A / m])), the external magnetic field H0 cannot be unconditionally defined because it depends on the environment. However, for example, in the vicinity of an electromagnetic motor used in a mobile phone for an incoming call or a vibration function for notifying the user of the operating state of the device by vibration, the number is higher than usual by several tens [Oe] (790 [A /
It is expected that a magnetic field of around m]) is present in the surroundings. Therefore, it is appropriate that H2 / H0 is 0.5, that is, 50% of the external magnetic field.

Regarding a / b satisfying the above-mentioned μ _s > 5000 and H2 / H0 <0.5, a result of examination on an ideal spherical magnetic shield structure shows that a / b <0.9997 or less. By that,
It was found that it has sufficient performance to remove the influence of the external magnetic field. This means that a spherical magnetic shield structure with a radius of 1 mm is covered with a high magnetic permeability material having a thickness of 0.3 μm.
Furthermore, in order to reduce the influence of the external magnetic field, H2 / H0 <0.2 and a / b <0.9988 or less are desirable. According to the same expression as above, this is 1.2 mm for a spherical magnetic shield structure with a radius of 1 mm.
Means covering with a high permeability material of μm.

As described above, from the study on the magnetic shield structure in the ideal spherical shape, it was found that a / b <0.9997 or less is required to obtain a sufficient magnetic shield structure. Next, the results of studying how much film thickness is required for more specific shapes such as device chips are shown.

FIG. 9 is a sectional view of a shape for calculating the film thickness of the high magnetic permeability material required for the magnetic shield structure of the present invention.
In the figure, reference numeral 100 indicates an MRAM chip, and reference numeral 102 indicates a high magnetic permeability material. Here, it is assumed that the MRAM chip is square in plan view, the width and thickness of the MRAM chip are c and d, and the width and thickness of the high magnetic permeability material are p and q, respectively. For simplification, the insulator 101 shown in FIG. 1A is omitted, and in FIG. 9, it is considered to be included in the MRAM chip 100.

In order to provide the magnetic shield structure for the MRAM chip using the in-plane magnetized film, it is necessary to suppress the invasion of the magnetic field in the in-plane direction as described above. Therefore, the width (dimension p) of the high-permeability material is laterally aligned with the width (dimension c) of the MRAM chip.
Is required to be secured.

On the other hand, in the case of the magnetic memory using the perpendicular magnetization film, it is necessary to deal with the magnetic field applied in the direction perpendicular to the substrate. However, in this case, as is clear from FIG. 9, the thickness of the high magnetic permeability material (dimension q) is aligned with the thickness (dimension d) of the MRAM chip sufficiently thinner than the width (dimension c) of the MRAM chip. ) Is determined, it is not necessary to use a thick film.

The effect of the present invention will be specifically verified with reference to FIG. FIG. 10 is a graph in which the ratio of the external magnetic field H0 to the internal magnetic field H2 of the magnetic shield structure is calculated by using the above-described equation (5) with the width W of the object and the film thickness of the high magnetic permeability material as parameters. As the high magnetic permeability material, μ _s = 5000 was set. When the width W of the object is 1 mm, the external magnetic field is rapidly attenuated, and the thickness of the high-permeability material is 0.15 μm and the transmission amount is 50% or less (H2 / H0 is 0.5 or less).
On the other hand, as the width W of the object increases to 25 mm and 50 mm, the external magnetic field is not easily attenuated, and the required thickness of the high magnetic permeability material increases. When the width W of the object is 50 mm, H2 / H0 becomes 0.5 or less at last when the thickness of the high magnetic permeability material is 8 μm.

The above calculation is for a spherical shape and differs from the actual chip shape. However, this calculation shows that the thickness of the high magnetic permeability material for suppressing the magnetic field in the direction perpendicular to the film surface can be made smaller than the thickness of the high magnetic permeability material for suppressing the magnetic field in the in-plane direction with respect to the chip. It is shown that.

The width of the MRAM chip varies depending on the microfabrication device used for manufacturing. Assuming that a state-of-the-art exposure device is used to achieve high density, the field size that can be exposed in one shot is approximately 25 mm square when the reduction optical system is a 5: 1 stepper. Recent integrated circuits have become large in scale, and connection exposure is performed including peripheral circuits,
Since it is often manufactured by mix & match in combination with other exposure equipment that has a large exposure area, the chip area has expanded to about 50 mm square.

On the other hand, the thickness of the MRAM chip depends on the thickness of the wafer used for manufacturing. The standard for 8-inch (200 mm) wafers is 0.725 mm for both JEIDA and SEMI, and the size is less than 1 mm for 300 mm wafers.

As described above, the magnitude of the magnetic field required to rewrite the information stored in the magnetic memory is 10 to 50 [Oe] (790
˜3950 [A / m]), and it depends on the design how much the magnetic field from the adjacent device or the external field is applied to the MRAM.
However, if one criterion that H2 / H0 is 0.5 or less is set, in the case of an MRAM chip using an in-plane magnetized film, in order to sufficiently reduce the external magnetic field, a high permeability material of 8 μm per 50 mm square is used. Need to cover. However, when the film thickness is so thick, the tact time is too long in the dry film formation.
Also, although electrodeposition and plating are used, a large amount of raw materials are required, and it is difficult to control the liquid concentration and control the current density. It is difficult to control the stress caused by the difference, ensure the durability against peeling, and ensure the film thickness uniformity.

On the other hand, from the viewpoint of shielding the external magnetic field in the vertical direction, it suffices to consider the thickness in the film thickness direction.
A sufficient effect can be obtained at 0.15 μm under the same conditions as the in-plane film. In other words, it is clear that the MRAM using the perpendicular magnetization film is very advantageous in forming the magnetic shield structure. The difference between the two is about 50 times.

Therefore, as the thickness of the high magnetic permeability material required for the MRAM package, the MRAM using the perpendicular magnetization film is used.
Is about 0.2 μm, and about 10 μm for MRAM using an in-plane magnetized film.

The combination of the first magnetic layer and the second magnetic layer, which is a constituent element of the magnetoresistive film, is made of a soft magnetic material and a hard magnetic material. The first magnetic layer is the soft magnetic layer and the second magnetic layer is the hard magnetic layer. In addition to the above combination, a combination in which the first magnetic layer is a hard magnetic layer and the second magnetic layer is a soft magnetic layer may be used.
In the differential detection method, the soft magnetic material easily reverses the magnetization and thus functions as a reproducing layer. The hard magnetic material functions as a memory layer because the magnetization is less likely to be reversed than the soft magnetic material. In the present invention, the distinction between the soft magnetic material and the hard magnetic material is defined by the magnitude relationship of the coercive force between the two ferromagnetic layers, and the material having a relatively large coercive force is defined as the hard magnetic material.

The first magnetic layer and the second magnetic layer have a function, and each magnetic layer itself may be a single layer made of a single element, but may have a multilayer structure of various alloys. For example, as the first (or second) magnetic layer for functioning as a hard magnetic material, Co having a thickness of 5 nm and FeMn having a thickness of 30 nm are used.
The two-layered structure may be pinned. As the first magnetic layer and the second magnetic layer, TbFe,
A ferrimagnetic material such as TbFeCo or GdFe is used. The composition of these two magnetic layers is appropriately adjusted so that their coercive forces are different. The thickness of the first magnetic layer and the second magnetic layer is 2
It is preferable to select in the range of -100 nm.

In the case of a perpendicularly magnetized film, the direction of magnetization is in the direction perpendicular to the film surface, which has the largest demagnetizing field in terms of shape,
The maximum diamagnetic field coefficient is already overcome when the perpendicular magnetic anisotropy is exhibited. Therefore, curling does not easily occur even when the element is miniaturized. Also, like an in-plane magnetized film,
Since it is not necessary to make the planar shape rectangular so as to prevent curling, the perpendicular magnetization film is more advantageous than the in-plane magnetization film in improving the integration degree of the memory cell portion.

As described above, the resistance of the magnetoresistive film in the stacking direction is determined by the relative angle of magnetization of the first magnetic layer and the second magnetic layer. When both are parallel, the resistance is low, and when antiparallel, the resistance is high. The larger the difference between the state densities of up-spin and down-spin, the greater the magnetic resistance,
Since the reproduction signal becomes large, it is desirable to use a magnetic material having a high spin polarizability in the vicinity of the interface of the insulating layer between the first magnetic layer and the second magnetic layer. Specifically, by sandwiching a magnetic material containing Fe, Co, or the like as a main component in the vicinity of the interface, a theoretical resistance change of 50% can be obtained.

Many of these magnetic materials containing Fe and Co are in-plane magnetized films, but the first magnetic layer and the second magnetic layer made of perpendicularly magnetized films can be formed by reducing the film thickness to several nm or less. It exchange-couples with and functions as a perpendicular magnetization film. Therefore, the direction of magnetization is unified in the direction perpendicular to the film surface, and the signal does not decrease.

[0077]

EXAMPLES The present invention will be further described with reference to more specific examples.

(Embodiment 1) FIG. 1B shows an embodiment of the present invention and shows a sectional structure in which an MRAM chip using a perpendicular magnetization film and a logic device are integrated into one chip. Figure 1
In (b), reference numeral 110 is a semiconductor mounting substrate, and reference numeral 111 is
MRAM chip, reference numeral 112 indicates a logic device. MRAM
Chip 111 and logic device 112 are die connection layers
Overlapping via 113 and 114. Bonding wires 116 connect the contact pads between the MRAM chip 111 and the logic device 112. Bonding wires 117 connect the contact pads between the MRAM chip 111 and the semiconductor mounting substrate 110. Semiconductor mounting board
An interposer (interconnection portion) 119 is formed on the 110, and is connected to an external circuit via the solder ball 120 on the back surface. The whole is sealed with a resin package 115.

The MRAM chip 111 using the perpendicular magnetization film is shown in FIG.
As shown in (a), the structure is such that the periphery is covered with the high magnetic permeability material 102. Here, FIG. 15 shows a sectional structure of an MRAM memory element using a perpendicular magnetization film. In this embodiment,
The write line is shared with the adjacent memory cell. The parts without symbols are basically insulators. In the figure, two memory elements are shown, and portions having the same function and unique to each are shown separately as a and b. Drain regions 2a and 2b and source regions 3a and 3b are formed on the semiconductor substrate 1, and gate electrodes 4a and 4b are further formed via an insulating film, which form a MOSFET (field effect transistor). . The field effect transistors are insulated from each other by a LOCOS field oxide film 21.

The drain region 2a of the field effect transistor,
2b is connected to the drain region 2 via the plug electrodes 5a and 5b.
Magnetoresistive films 9a and 9b magnetized in the direction perpendicular to the film surface are connected to positions directly above a and 2b, and further connected to the bit line 6. Although not shown, the source electrodes 22a and 22b are provided with ground wiring. Further, the write lines 10, 11 (10, 15) are provided on both sides of the magnetoresistive film 9a (9b) below the side portion of the magnetoresistive film 9a (9b) via an insulator. Writing line 1
The ground wirings connected to 0, 11, 15 and the gate line 4 and the source electrode extend in the direction perpendicular to the paper surface. The bit line 6 extends in the direction parallel to the paper surface.

The write line 10 has a structure that can be used for both the left magnetoresistive film 9a and the right magnetoresistive film 9b. Therefore, the write lines 10 and 11 are used to record information on the magnetoresistive film 9a, and the write lines 10 and 15 are used to record information on the magnetoresistive film 9b.

Referring to FIG. 15, the magnetoresistive films 9a and 9b and the drain regions 2a and 2b of the field effect transistor are plugged.
Connected only with 5a and 5b. In the memory element of FIG. 15, since the magnetoresistive film used is a perpendicular magnetization film, recording and reproduction are performed by using the component perpendicular to the film surface of the magnetic field generated by the write line 10. In the case of a memory element that uses an in-plane magnetized film, it is necessary to place a write line above or below the magnetic layer to apply a current magnetic field in the in-plane direction, so the magnetic field is offset laterally from the plug. It was necessary to arrange a resistive film. In the case of a memory element using a perpendicular magnetization film, this is not necessary, and therefore a simpler design with a wider process processing margin is possible.

By using a perpendicular magnetization film,
Even when the size of the memory element is reduced, spin does not curl due to the influence of the demagnetizing field, and the magnetization can be stably maintained. Therefore, compared with the memory element using the in-plane magnetized film, the magnetoresistive film The width / length ratio of can be set to 1,
The memory cell area can be reduced and the degree of integration can be increased. If the feature size in processing is F, the cell area can be reduced to a minimum of 4F x 2F = 8F ² .

11 to 14 show the first embodiment shown in FIG.
FIG. 6 is a process step diagram until the memory element of FIG.

First, the MOSFET shown in FIG. 11 is formed by using a semiconductor process. Drain regions 2a and 2b and source regions 3a and 3b are formed on the semiconductor substrate 1, and gate electrodes 4a and 4b are further formed via an insulating film, which form a MOSFET (field effect transistor). . The field effect transistors are insulated from each other by a LOCOS field oxide film 21.

The drain region 2a of the field effect transistor,
Plug electrodes 5a and 5b are formed on 2b, and write lines 10, 11 and 15 are provided on both sides of the plug electrodes 5a and 5b via an insulator below the side portions thereof.

Next, the magnetoresistive film 9 is formed by using magnetron sputtering (FIG. 12). On the way, Al ₂ which is a non-magnetic layer
O ₃ undergoes plasma oxidation to be tempered. Table 1 shows the layer structure of the magnetoresistive film (perpendicular magnetization film).

[0088]

[Table 1]

Further, processing is performed to define a region to be a memory cell connected to the plug electrode, and the periphery is electrically isolated by an insulating layer (FIG. 13). Bit lines 6 are formed in the direction parallel to the paper surface so as to be connected to the magnetoresistive films 9a and 9b, and embedded with an insulating layer (FIG. 14).

Finally, NiFe is 0.2 as the high magnetic permeability material 30 of the present invention except for the contact pad (not shown).
Film formation on both sides of the substrate by μm sputtering (Fig. 1
5). This completes the MRAM chip.

The process for making this a stack MCP shown in FIG. 1B is as follows. Referring to FIG. 1B, the die connection layer 114 is first pressure-bonded to the back surface of the logic chip 112 to connect the logic device 112 and the MRAM chip 111. Next, the die connection layer 113 is pressure-bonded to the back surface of the MRAM chip to connect the interposer 119 and the semiconductor mounting substrate 110. Next, a wire bonding process is performed, and a bonding wire 116 is provided between the MRAM chip 111 and the logic device 112.
A bonding wire 117 connects the MRAM chip 111 and the semiconductor mounting substrate 110. Further, after undergoing a cleaning step, attachment of a heat spreader (not shown), etc., transfer molding is performed to form a resin package 115.
Finally, the solder balls 120 for the BGA array are formed and completed.

By adopting the structure of the present invention, it was possible to obtain an MRAM which is strong against magnetic confusion and excellent in EMI resistance.

(Embodiment 2) FIG. 1B shows an embodiment of the present invention and shows a sectional structure in which an MRAM chip using an in-plane magnetized film and a logic device are integrated into one chip. Example 1
The main difference is that the in-plane magnetized film is used for the MRAM chip, and the manufacturing process of the MRAM chip, the method of stacking MCP, and the like are the same as those in the first embodiment. Table 2 shows the layer structure of the in-plane magnetized film.

[0094]

[Table 2]

Further, since the in-plane magnetized film is used for the MRAM chip, the high permeability material 102 needs to be formed thicker than in the first embodiment. The thickness was 10 μm, and NiFe was formed by an electroless plating process.

By adopting the structure of the present invention, it was possible to obtain an MRAM which is strong against magnetic confusion and excellent in EMI resistance.

(Embodiment 3) FIG. 1B shows an embodiment of the present invention and shows a sectional structure in which an MRAM chip using a perpendicular magnetization film and a logic device are integrated into one chip. Example 1
The main difference is that the MRAM chip 111 using a perpendicular magnetization film has a structure in which an insulator is arranged around the high magnetic permeability material 102 as shown in FIG. The manufacturing process of the MRAM chip, the method of forming the stack MCP, and the like are the same as those in the first embodiment. Table 1 shows the layer structure of the perpendicular magnetization film.

By adopting the structure of the present invention, the MRA excellent in EMI resistance that is strong against magnetic confusion at a level comparable to that of the first embodiment.
I was able to call it M.

(Embodiment 4) FIG. 1B shows an embodiment of the present invention and shows a sectional structure in which an MRAM chip using a perpendicular magnetization film and a logic device are integrated into one chip. Example 1
The main difference between the MRAM chip 111 and the MRAM chip 111 is that the MRAM chip 111 using a perpendicular magnetization film is covered with the high magnetic permeability material 102 except for the chip end portion as shown in FIG. The manufacturing process of the MRAM chip, the method of forming the stack MCP, and the like are the same as those in the first embodiment. Table 1 shows the layer structure of the perpendicular magnetization film.

By adopting the structure of the present invention, the MRA excellent in EMI resistance that is strong against magnetic confusion at a level comparable to that of the first embodiment.
I was able to call it M.

(Embodiment 5) FIG. 1B shows an embodiment of the present invention and shows a sectional structure in which an MRAM chip using a perpendicular magnetization film and a logic device are integrated into one chip. Example 1
The main difference with the structure is that the MRAM chip 111 using the perpendicular magnetization film has a structure in which the high magnetic permeability material 102 is arranged at a position sandwiched above and below a region where memory elements are arranged in a matrix as shown in FIG. That is the point. The manufacturing process of the MRAM chip, the method of forming the stack MCP, and the like are the same as those in the first embodiment. Table 1 shows the layer structure of the perpendicular magnetization film.

By adopting the structure of the present invention, the MRA excellent in EMI resistance that is strong against magnetic confusion at a level comparable to that of the first embodiment.
I was able to call it M.

(Embodiment 6) FIG. 16 shows an embodiment of the present invention and shows a sectional structure in which an MRAM chip and a DRAM chip using a perpendicular magnetization film are integrated into one chip. In this example, the MRAM chip using the perpendicular magnetization film is superposed on the DRAM chip. In FIG. 16, reference numeral 110 is a semiconductor mounting substrate, reference numeral 111 is a DRAM chip, and reference numeral 112 is an MRAM chip. DRAM
Chip 111 and MRAM chip 112 have die connection layers 113, 1 respectively.
Superimposed through 14. DRAM chip 111 and MRAM chip 1
Contact pads are connected to each other by a bonding wire 116 between the contact pads 12. Bonding wires 117 connect the contact pads between the DRAM chip 111 and the semiconductor mounting substrate 110. An interposer (interconnection) 119 is formed on the semiconductor mounting substrate 110, and is connected to an external circuit via the solder balls 120 on the back surface. The whole is sealed with a resin package 115. High permeability material is NiF
It was formed by 0.2 μm sputtering using e.

The main difference from the first embodiment is that the MRAM chip is a DRAM
The manufacturing process of the MRAM chip, the method of stacking the MCP, and the like are the same as those of the first embodiment in that the structure is superimposed on the chip.

By adopting the structure of the present invention, it was possible to obtain an MRAM which is strong against magnetic confusion and excellent in EMI resistance.

(Embodiment 7) FIG. 17 shows an embodiment of the present invention and shows a sectional structure in which an MRAM chip using a perpendicular magnetization film and a DRAM are integrated into one chip. This example is an MR using a perpendicular magnetization film.
It has a structure in which the AM chip is superimposed on the DRAM chip. Moreover, since the electrode pads of the MRAM chip are solder balls, surface mounting is possible, and the size is almost the same as the DRAM chip. That is, it can be mounted on the DRAM chip in a vertically inverted form in FIG. In FIG. 17, reference numeral 110 indicates a semiconductor mounting substrate, reference numeral 111 indicates a DRAM chip, and reference numeral 112 indicates an MRAM chip. DRAM
Chip 111 and MRAM chip 112 have die connection layers 113, 1 respectively.
Superimposed through 14. DRAM chip 111 and MRAM chip 1
The 12's are connected by solder balls (not shown). DRAM
Bonding wires 117 connect the contact pads between the chip 111 and the semiconductor mounting substrate 110. The semiconductor mounting board 110 has an interposer 119.
Are formed, and are connected to an external circuit through the solder balls 120 on the back surface. The whole is sealed with a resin package 115. The high-permeability material was formed by NiFe using 0.2 μm sputtering.

The main difference from the first embodiment is that the MRAM chip is a DRAM
Since the structure is such that it is superimposed on the chip and the electrode pads of the MRAM chip are solder balls, surface mounting is possible.
It is about the same size as a DRAM chip. MR
The AM chip manufacturing process is the same as that of the first embodiment except that the electrode pad manufacturing method is different. Further, the stack MCP method is the same as that of the first embodiment except that the connection method between the DRAM chip and the MRAM chip is changed to a method of connecting contact pads with solder balls (not shown). Is.

By adopting the structure of the present invention, it was possible to obtain an MRAM excellent in EMI resistance which is strong against magnetic confusion.

(Embodiment 8) FIG. 18 shows an embodiment of the present invention and shows a sectional structure in which an MRAM chip using a perpendicular magnetization film and a DRAM are integrated into one chip. The main difference from the first embodiment is MRAM
The point that the chip is superposed on the DRAM chip and MR
The high permeability material of the AM chip is connected to the DRAM chip as a solid earth. Ground wire 121 is MRAM chip 1
The 12 high-permeability materials and the DRAM chip 111 are commonly used. The manufacturing process of the MRAM chip, the method of forming the stack MCP, and the like are the same as those in the first embodiment.

By adopting the structure of the present invention, it was possible to obtain an MRAM which is strong against magnetic confusion and excellent in EMI resistance.

[0111]

As described above, according to the present invention, the WL
In a non-volatile fixed magnetic memory device having an MRAM chip suitable for the P era, it is assumed that the MRAM chip has a magnetic shielding structure for shielding it from an external scattered magnetic field, and the magnetic shielding structure is made of a high magnetic permeability material or is provided around the MRAM chip. By configuring the provided package with the magnetic shield structure, a nonvolatile solid-state memory device using the magnetoresistive effect can be realized at low cost. Further, even when the coercive force of the magnetic film of the magnetoresistive element is reduced to save power, the stability of the recording / reproducing operation of the memory element is enhanced and the nonvolatile memory capable of high-speed recording / reproducing is also used. A solid-state magnetic memory can be realized.

[Brief description of drawings]

FIG. 1A is a cross-sectional view showing a magnetic shield structure of the present invention,
(B) is a stack as an example of use of the magnetic shielding structure of the present invention
It is sectional drawing which set it as the MCP structure.

FIG. 2 is a cross-sectional view of a magnetic shield structure in which a high-permeability material is grounded as one form of the present invention.

FIG. 3 is a cross-sectional view of a structure in which an outer side of a high magnetic permeability material is covered with an insulating layer as one embodiment of the present invention.

FIG. 4 is a structural cross-sectional view in the case where a high magnetic permeability material has a high insulating property as one embodiment of the present invention.

FIG. 5 is a cross-sectional view of a magnetic shield structure in which a high magnetic permeability material is omitted at an end portion of an MRAM chip as one embodiment of the present invention.

FIG. 6 is a cross-sectional view of a magnetic shield structure in which a high-permeability material is arranged only in a region where memory elements are arranged in a matrix as one embodiment of the present invention.

FIG. 7 is an inset for theoretical calculation of a magnetic shield structure.

FIG. 8 is a graph showing the correlation between the film thickness of a high-permeability material and a magnetic field in a dimensionless amount by theoretical calculation.

FIG. 9 is a cross-sectional view for defining the dimensions of the chip structure and the high-permeability material.

FIG. 10 is a graph showing a correlation between a film thickness of a high magnetic permeability material and a magnetic field transmittance based on theoretical calculation.

FIG. 11 is a process diagram of an MRAM chip described in an embodiment of the present invention.

FIG. 12 is a process diagram of an MRAM chip described in an embodiment of the present invention.

FIG. 13 is a process diagram of an MRAM chip described in an embodiment of the present invention.

FIG. 14 is a process diagram of an MRAM chip described in an embodiment of the present invention.

FIG. 15 is a process diagram of an MRAM chip described in an embodiment of the present invention.

FIG. 16 is a cross-sectional view showing a stack MCP structure which is an embodiment of the present invention.

FIG. 17 is a cross-sectional view showing a stacked MCP structure which is an embodiment of the present invention.

FIG. 18 is a cross-sectional view showing a stack MCP structure which is an embodiment of the present invention.

FIG. 19 is a cross-sectional view showing a conventional stacked MCP structure.

FIG. 20 is a cross-sectional view showing a magnetic shield structure of JP 2000-188435 A as a conventional example.

FIG. 21 is a cross-sectional view showing a magnetic field concentration structure of JP-A-09-204770, which is a conventional example.

[Explanation of symbols]

1 semiconductor substrate 2a, 2b drain region 3a, 3b source region 4a, 4b gate electrode 5a, 5b plug electrode 6 bit line 9, 9a, 9b magnetoresistive film 10 write line 21 LOCOS field oxide film 22a, 22b source electrode 25 insulating layer 30 high magnetic permeability material 100 MRAM chip 101 insulating layer 102 high magnetic permeability material 103a, 103b electrode pad 110 semiconductor mounting substrate 111 first device (MRAM chip, DRAM chip) 112 second device (logic device, MRAM chip) 113, 114 Die connection layer 115 Resin package 116, 117 Bonding wire 119 Interposer (interconnecting part) 120 Solder ball 121 Ground wire

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) H01L 43/08 H05K 9/00 Q H05K 9/00 H01L 27/10 447

Claims (21)

[Claims] 1. A plurality of magnetoresistive elements arranged in a matrix on a substrate, bit lines connected to the magnetoresistive elements, write lines for applying a magnetic field to the magnetoresistive elements, and field effect transistors. In a non-volatile solid-state magnetic memory device having an MRAM chip having a memory element of, and a package provided around the MRAM chip, a magnetic shielding structure for shielding the MRAM chip from an external scattered magnetic field is characterized. Nonvolatile solid-state magnetic memory device. 2. The non-volatile solid-state magnetic memory device according to claim 1, wherein the magnetic shield structure is made of a high magnetic permeability material. 3. The nonvolatile solid-state magnetic memory device according to claim 1, wherein the magnetic shield structure also serves as the package. 4. The nonvolatile solid-state magnetic memory device according to claim 2, wherein the high-permeability material covers the entire periphery of the MRAM chip except for electrode pad portions which serve as an interface between the MRAM chip and an external circuit. 5. The non-volatile solid-state magnetic memory device according to claim 2, wherein the high magnetic permeability material is arranged in a region where the memory element is arranged. 6. The high-permeability material is arranged at positions vertically sandwiching a region where the memory element is arranged.
A nonvolatile solid-state magnetic memory device as described. 7. The non-volatile solid-state magnetic memory device according to claim 2, wherein the high magnetic permeability material is grounded. 8. The non-volatile solid-state magnetic memory device according to claim 2, wherein the periphery of the high magnetic permeability material is covered with an insulating layer. 9. The nonvolatile solid-state magnetic memory device according to claim 1, wherein the high magnetic permeability material contains at least one element of Ni, Fe and Co and has a relative magnetic permeability of 5000 or more. 10. The width of one side of the MRAM chip is c, the thickness is p, the thickness of the high-permeability material is d in the horizontal direction with respect to the chip surface,
C / (c + d) or p / when the vertical direction is q
The nonvolatile solid-state magnetic memory device according to claim 2, wherein (p + q) is 0.9997 or less. 11. The non-volatile solid-state magnetic memory device according to claim 1, wherein the magnetoresistive element has a structure having a first magnetic layer, a second magnetic layer, and an insulator between the magnetic layers. 12. The nonvolatile solid-state magnetic memory device according to claim 11, wherein easy axes of magnetization of the first magnetic layer and the second magnetic layer are perpendicular to the film surface. 13. The non-volatile solid-state magnetic memory device according to claim 11, wherein easy axes of magnetization of the first magnetic layer and the second magnetic layer are parallel to a film surface. 14. The non-volatile solid-state magnetic memory device according to claim 12, wherein the first magnetic layer or the second magnetic layer is made of a rare earth iron group alloy. 15. The rare earth iron group alloy contains at least one element selected from Gd, Tb, and Dy, and the iron group element contains at least one element selected from Fe and Co. A nonvolatile solid-state magnetic memory device as described. 16. The first magnetic layer and the non-magnetic layer,
At least one of the second magnetic layer and the non-magnetic layer,
The nonvolatile solid-state magnetic memory device according to claim 11, wherein a magnetic layer containing at least one element of Fe and Co is provided. 17. An MRAM chip, another chip, a connecting means for electrically connecting the chips, a die connection layer for fixing the chips, a semiconductor mounting substrate, and an electrical connection between the semiconductor mounting substrate and an external circuit. A multi-chip package comprising a terminal for connection, a terminal for electrical connection with an external circuit, an interposer for connection with a semiconductor mounting board, and a sealing material, wherein the MRAM chip and one or more A multi-chip package, characterized in that another chip is superposed on a semiconductor mounting substrate. 18. The multi-chip package according to claim 17, wherein the one or more other chips are located closer to the semiconductor mounting substrate than the MRAM chip. 19. The multi-chip package according to claim 17, wherein the connecting means for electrically connecting the chips is wire bonding. 20. The terminal for electrically connecting the semiconductor mounting substrate and the external circuit is a solder ball.
The described multi-chip package. 21. A first magnetic layer and a second layer laminated on a substrate.
A magnetoresistive effect element including a magnetic layer and a non-magnetic layer laminated between the magnetic layers, a bit line provided on the magnetoresistive effect element, a magnetization direction of the first magnetic layer or the second magnetic layer is changed to a current. In a method for manufacturing a non-volatile solid-state magnetic memory device having a MRAM chip in which a memory element composed of a field effect transistor and a write line which is changed by a magnetic field generated by the MRAM chip are provided, an electrode pad serving as an interface between the MRAM chip and an external circuit is provided. A method for manufacturing a non-volatile solid-state magnetic memory device, characterized in that a magnetic shield structure for shielding an external scattered magnetic field is provided around the MRAM chip except for the portion.