JP2003092515A5 - - Google Patents

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Publication number
JP2003092515A5
JP2003092515A5 JP2001282036A JP2001282036A JP2003092515A5 JP 2003092515 A5 JP2003092515 A5 JP 2003092515A5 JP 2001282036 A JP2001282036 A JP 2001282036A JP 2001282036 A JP2001282036 A JP 2001282036A JP 2003092515 A5 JP2003092515 A5 JP 2003092515A5
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JP
Japan
Prior art keywords
signal
power supply
pulse width
switching
bit
Prior art date
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Pending
Application number
JP2001282036A
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English (en)
Japanese (ja)
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JP2003092515A (ja
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Priority to JP2001282036A priority Critical patent/JP2003092515A/ja
Priority claimed from JP2001282036A external-priority patent/JP2003092515A/ja
Publication of JP2003092515A publication Critical patent/JP2003092515A/ja
Publication of JP2003092515A5 publication Critical patent/JP2003092515A5/ja
Pending legal-status Critical Current

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JP2001282036A 2001-09-17 2001-09-17 増幅器 Pending JP2003092515A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001282036A JP2003092515A (ja) 2001-09-17 2001-09-17 増幅器

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001282036A JP2003092515A (ja) 2001-09-17 2001-09-17 増幅器

Publications (2)

Publication Number Publication Date
JP2003092515A JP2003092515A (ja) 2003-03-28
JP2003092515A5 true JP2003092515A5 (https=) 2005-03-17

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ID=19105746

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001282036A Pending JP2003092515A (ja) 2001-09-17 2001-09-17 増幅器

Country Status (1)

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JP (1) JP2003092515A (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7116168B2 (en) * 2004-12-01 2006-10-03 Creative Technology Ltd Power multiplier system and method
JP4809070B2 (ja) * 2006-02-03 2011-11-02 エム・アンド・エスファインテック株式会社 デジタルアナログ変換装置
WO2014042205A1 (ja) 2012-09-14 2014-03-20 日本電気株式会社 送信機、信号合成回路、信号合成方法
KR101491658B1 (ko) * 2013-04-25 2015-02-09 주식회사 피에스텍 스위칭 증폭기 장치 및 그 제어 방법

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