JP2003092515A5 - - Google Patents

Description

[0011]
A first power supply, a second power supply, the digital input signal is divided into upper bit signal and a lower bit signal to generate a high-order bit pulse width modulated signal into a high-order bit signal to the pulse width modulated signal, the lower signal processing means and the first switching amplifier for switching amplifier the upper bit pulse width modulated signal by using the first power supply for generating a low-order bit pulse width modulated signal into a bit signal to the pulse width modulation signal When a second switching amplifier for switching amplifier the lower bit pulse width modulated signal by using the second power supply, the output signal of the output signal and the second switching amplifier circuit of the first switching amplifier and And adding means for adding and outputting.

[0012]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 1 is a diagram for explaining the outline of the amplifier of the present invention. In the figure, S1, S2, S3, and S4 are switching elements, E2 is a low voltage power supply (for example, 3.5 V), and El is a high voltage power supply (for example, 28 V). The switching elements Sl and S2 and the high voltage power supply El constitute a first switching amplification circuit Al, and the switching elements S3 and S4 and the low voltage power supply E2 constitute a second switching amplification circuit A2.

[Description of the code]
1 the digital input signal 2 signal processing unit 3 and 4 high voltage power supply 5 low voltage power supply 6,7,8,9,10 switching device 11 the low pass filter 12 speaker 13 digital information Houtt stage Al first switching amplifier circuit A2 Second switching amplifier circuit

Claims (4)

A first power supply, a second power supply, divide the digital input signal into an upper bit signal and a lower bit signal to generate a high-order bit pulse width modulated signal by converting the upper bit signal to the pulse width modulation signal a signal processing means for generating a low-order bit pulse width modulated signal by converting the low-order bit signal to the pulse width modulation signal, a first switching amplifying the upper bit pulse width modulated signal by using the first power supply a switching amplifier circuit, a second switching amplifier for switching amplifier the lower bit pulse width modulated signal by using the second power supply, the output signal and the second switching amplifier circuit of the first switching amplifier circuit An amplifier comprising: addition means for adding an output signal and outputting the result. The amplifier according to claim 1, wherein the first output voltage of the power amplifier, which is a larger than the output voltage of the second power supply. The amplifier according to any one of claims 1 to 2 , wherein the first switching amplification circuit comprises first and second switching elements and a power supply connecting the positive side and the negative side of the power supply to the output end, respectively. An amplifier comprising: a third switching element connecting a middle point of the two to the output end. A plurality of power supply, the digital input signal is divided into a plurality of bit order, and a signal processing means for generating a plurality of divided bit pulse width modulation signal and converts the divided bit signal to each pulse width modulated signal, dividing the respective a plurality of switching amplifier circuit for switching amplifier using a power supply having a voltage corresponding bit pulse width modulated signal to a bit order that the divided respectively, the addition means for and outputting adding the output signal of the switching amplifier of said plurality of An amplifier characterized by comprising.

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