JP2003078146A - Method for manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for obtaining a silicon oxide film at a low temperature which is durable against a use as a gate insulating film and which has good reliability. SOLUTION: A method for manufacturing a semiconductor device comprises the steps of reducing an alkali element from the silicon oxide film obtained, by mixing a hydrocarbon (e.g. a trichloroethylene) having a hydrogen chloride or a chlorine or a fluorine-containing gas of preferably 0.01 to 1 mol% of an atmosphere, in the case of forming the silicon oxide film by covering an insular non-crystal silicon region by a plasma CVD method with an organic silane (e.g. a TEOS) having an ethoxy group and an oxygen as raw materials. Thus, its reliability is enhanced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for obtaining a gate insulating film used in a thin film device such as an insulating gate type field effect transistor at a low temperature of 650 ° C. or lower, and an insulating coating film thus obtained. .

[0002]

2. Description of the Related Art Conventionally, in a thin film device such as a thin film type insulating gate type field effect transistor (TFT), after forming crystalline silicon, the surface thereof is 900 to 1100.
It has been made that silicon oxide having good characteristics is produced by thermal oxidation at a high temperature of ° C, and this is used as a gate insulating film.

The characteristics of such a thermal oxide film are summarized in that the interface state density is extremely low and that it can be formed with a uniform thickness on the surface of crystalline silicon. That is, the former provides good on / off characteristics and long-term reliability against bias / temperature, and the latter reduces short-circuiting between the gate electrode and the semiconductor region (active layer) at the edge of the island-shaped semiconductor region. This has improved the yield.

[0004]

However, when such a thermal oxide film is used, it is necessary to select a material that can withstand high temperatures as a substrate material. In this regard, it is not possible to use an inexpensive glass material (alkali-free glass such as Corning 7059), and therefore it is disadvantageous in that the cost increases especially when a large-area substrate is used. In recent years, a technique for forming a TFT on a non-alkali glass substrate is under development, but a thermal oxide film cannot be used in such a technique, and a physical method such as a sputtering method, a plasma CVD method, or a low pressure CVD method cannot be used. The gate insulating film was formed by a chemical or chemical vapor deposition method.

However, the characteristics of the silicon oxide film formed by such means are inferior to those of the thermal oxide film. That is, the interface state density is generally large,
In addition, there has always been a risk that alkali ions such as sodium will enter during film formation. Further, since the step coverage (step coverage) is not so good, a short circuit frequently occurs between the gate electrode and the active layer at the edge of the island-shaped semiconductor region. Therefore, it has been extremely difficult to obtain a material that satisfies all of the characteristics, reliability, and yield.

The present invention addresses at least one of these problems.
It was made as a solution. That is, the present invention provides a method for producing a silicon oxide film having good step coverage, and in the present invention,
Provided is a silicon oxide film having resistance to alkali ions and other undesirable impurities, and a method for producing the same.

[0007]

A first aspect of the present invention uses, as a gate insulating film, a mixed gas containing an organic silane having an ethoxy group, oxygen, and a hydrocarbon containing hydrogen chloride or chlorine as a material gas. A film containing silicon oxide as a main component, which is obtained by a plasma CVD method, is used. A second aspect of the present invention is a plasma CVD method using a mixed gas containing an organic silane having an ethoxy group, oxygen, and a fluorine-containing gas (eg, NF ₃ , C ₂ F ₆ ) as a material gas for the gate insulating film. It is characterized in that a film containing silicon oxide as a main component obtained by the above is used.

Here, an organic silane having an ethoxy group and
Then, the chemical formula Si (OC₂H_Five) _Four(Tetra Etoki
Si silane (hereinafter referred to as TEOS), Si₂O (OC
₂H _Five)₆, Si₃O₂(OC₂H_Five)₈, Si_FourO₃
(OC₂H_Five)_Ten, Si_FiveO _Four(OC₂H_Five)₁₂Expressed in
The substances mentioned are preferred. Such an organosilane material is
It takes a long time to migrate on the substrate surface, and
Since a silicon oxide film is formed, it is easy to get around the recess.
A film with excellent step coverage is obtained.

Hydrocarbons containing chlorine include chemical formulas C ₂ HCl ₃ (trichloroethylene) and C ₂ H ₃ Cl.
Substances represented by ₃ (trichloroethane) and CH ₂ Cl ₂ (dichloromethane) are preferable. Such a gas containing chlorine is decomposed mainly in the gas phase, and is combined with an alkali element such as sodium existing in the film forming atmosphere to leave the substrate to promote the release of the alkali element from the silicon oxide film. To do. Although some chlorine atoms remain in the silicon oxide film, they function as a barrier against an alkali element that subsequently enters from the outside. As a result, it becomes possible to improve the reliability of the TFT. The concentration of the hydrocarbon containing chlorine is preferably 0.01 to 1% of the whole. 1%
Addition of the above concentrations will adversely affect the characteristics.

In the insulating coating containing silicon oxide as the main component obtained by the above method, halogen element (for example, fluorine or chlorine) as an impurity element by secondary ion mass spectrometry is 1 × 10 ^{17 to} 5 ×. 10 ²⁰ cm ^{−3 was} detected, while carbon also had a concentration of 5 × 10 ¹⁹ cm ⁻³ or less. In particular, in order to lower the interface state density, the carbon concentration should be 1 × 10 ¹⁸ cm
^-3 or less is desirable. In order to reduce the carbon concentration, the substrate temperature during film formation is 200 ° C. or higher, preferably 3
The temperature may be set to 00 ° C or higher.

Further, since the dangling bonds tend to be deposited in the early stage of the formation of the insulating film thus formed, the underlying semiconductor (which preferably contains silicon as a main component) in advance is preferable. The film may be exposed to a plasma atmosphere containing oxygen. As a result, the interface state density is lowered and the fluctuation of the flat band voltage in the bias / temperature test is reduced, so that the reliability is improved. In this case, further effects can be obtained by mixing hydrogen chloride or a material having chlorine such as trichloroethylene, trichloroethane, or dichloromethane in addition to oxygen.

On the other hand, it is possible to reduce the fluctuation of the flat band voltage by heat-treating at 200 to 650 ° C. after forming the insulating film containing silicon oxide as the main component by the above method. At this time, it was preferable to perform the treatment in an atmosphere having no oxygen such as argon or nitrogen. The fluctuation of the flat band voltage is especially 450 ° C
It was significantly reduced by the above heat treatment and saturated at 600 ° C. or higher.

In a third aspect of the present invention, the island-shaped non-single crystal semiconductor region containing silicon as a main component is exposed to a plasma atmosphere containing oxygen and a hydrocarbon containing hydrogen chloride or chlorine, and then the non-single crystal semiconductor is formed. It is characterized in that a film containing silicon oxide as a main component is formed by plasma CVD using an organic silane having an ethoxy group and oxygen as materials to cover the region.

In this case, a hydrocarbon containing hydrogen chloride or chlorine is mainly accumulated in the chamber during the plasma treatment, and during the subsequent film formation of silicon oxide, the hydrocarbon containing hydrogen chloride or chlorine is contained in the first invention. Has the same effect as mixing in. Further, the improvement in reliability by the plasma treatment is the same as described above. Further, good results were obtained when the concentrations of chlorine and carbon in the obtained silicon oxide film were set to the same values as in the case of the first invention. Further, even better results were obtained by heat treatment at 200 to 650 ° C., preferably 450 to 600 ° C., after forming the film containing silicon oxide as the main component.

Plasma CV used in the present invention
The D device is a commonly used parallel plate type (that is, 1
A pair of flat plate-shaped electrodes may be opposed to each other in the chamber, and a sample substrate may be arranged on one or both electrodes), or a positive column type may be used as shown in the examples.

The latter has two major advantages over the former.
That is, firstly, in the former, the amount of substrate that can be processed at one time is determined by the area of the electrode, whereas in the latter, it is determined by the discharge volume, so the latter can process a large amount at the same time. Secondly, in the former case, the plasma damage on the substrate surface is large, whereas in the latter case, since there is almost no potential gradient, the plasma damage is extremely small and the uniformity is good, which adversely affects the TFT characteristics and yield. Is less likely to affect.

The chamber of the plasma CVD apparatus used for film formation is required to be sufficiently cleaned to reduce the amount of alkali elements such as sodium. For cleaning the chamber, plasma may be generated after introducing chlorine, hydrogen chloride, or a hydrocarbon containing chlorine as described above and oxygen into the chamber. Further, in that case, if the inside of the chamber is heated to 150 ° C. or higher, preferably 300 ° C. or higher, further effects can be obtained.

[0018]

EXAMPLE This example is a method of forming a silicon oxide film as a gate insulating film on an island-shaped non-single-crystal semiconductor film of silicon by a positive column type plasma CVD method, and the obtained silicon oxide film. Is mainly related to electrical characteristics. The plasma CVD apparatus used has a vertical cross section (cross sectional view shown in FIG. 1) and a horizontal cross section (top view shown in FIG. 1 lower) as shown in FIG. The positive column method is characterized in that a substrate is arranged in a positive column region in plasma discharge to form a film.

The power for generating plasma is the RF power source 10.
2 and 103. A radio wave represented by 13.56 MHz is generally used as a frequency. The electric powers supplied from these two power sources are adjusted by the phase shifter 104 and the matching boxes 105 and 106 so that the state of the plasma is optimized.
The electric power supplied from the RF power source is arranged in parallel inside the chamber 101, reaches the pair of electrodes 107 and 108 protected by the electrode covers 112 and 113, and a discharge is generated between the electrodes. A substrate is set between the electrodes 107 and 108. In order to improve mass productivity, the substrate 111 is put in the container 109 and set on both sides of the sample holder 110 in the container. The substrate is characterized in that it is horizontally arranged between the electrodes. The substrate is an infrared lamp 1
It is heated by 14 and kept at a suitable temperature. Although not shown in the drawing, this device is also provided with an exhaust device and a gas supply device.

First, the film forming conditions and the characteristics of the obtained film will be described. The substrate temperature was 300 ° C. In the chamber, oxygen is 300 SCCM and TEOS is 15S.
2 SCCM of CCM and trichlorethylene (hereinafter referred to as TCE) were introduced. RF power is 75W, total pressure is 5P
a. After film formation, annealing was performed in a hydrogen atmosphere at 350 ° C. for 35 minutes.

FIG. 3 shows the result of a dielectric breakdown test of a 1000 Å thick silicon oxide film formed by using this apparatus on a high resistance silicon wafer. An aluminum electrode of 1 mmφ was formed on the silicon oxide film, and the voltage-current relationship was plotted. In FIG. 3C, the substrate is not subjected to any special treatment and is formed into a film, which has a low withstand voltage. However, after the substrate was set in the chamber, the substrate temperature was 300 ° C., oxygen was 400 SCCM, TCE was 0 to 5 SCCM, and the atmosphere was exposed to a plasma atmosphere at a total pressure of 5 Pa and an RF power of 150 W for 10 minutes (in this process, gas phase reaction No film is formed), and a silicon oxide film is subsequently deposited. As a result, a silicon oxide film having a good breakdown voltage was obtained as shown in FIG. However, TCE when forming a silicon oxide film
When the flow rate of 4 is increased to 4 SCCM or more, for example, 5 SCCM, the film has a poor withstand voltage as shown in FIG. 3 (B). From this result, it became clear that the concentration of TCE has an optimum value.

FIG. 4A shows, as one of the reliability tests,
Flat band voltage (V
_FB ) fluctuation (ΔV _FB ) and substrate pretreatment. Bias / Temperature test + 150 ° C on sample
After applying a voltage of 17V for 1 hour, its C-V characteristic was measured at room temperature, and further, after applying a voltage of -17V at 150 ° C for 1 hour, its C-V characteristic was measured at room temperature.
The difference between the V _FB at the times of measurement was evaluated as ΔV _FB.

Samples that were not pretreated (see FIG. 4A)
(Displayed as (a)), ΔV _FBCompare at around 5V
It showed a large value. However, in preprocessing
So it improved. 4 (a), (b), (c)
The pretreatment conditions for are shown below. Sample (b) (c) Substrate temperature 300 ℃ 300 ℃ TCE / Oxygen 0/400 0.5 / 400 RF power 150W 150W Processing time 10 minutes 10 minutes From FIG. 4, pre-treating the substrate using TCE
Confirmed that further improvement was seen
It was

Similar improvements can be obtained by annealing after film formation. The annealing was performed at 300 to 570 ° C. for 1 hour in an argon atmosphere of 1 atm. The relationship between the annealing temperature and ΔV _FB is shown in FIG. Especially 450
A decrease in ΔV _FB is observed at a temperature of ℃ or below, and it can be seen that it approaches a constant value as it approaches 600 ℃. From this, it was clarified that annealing after film formation contributes to improvement of reliability.

Using the results obtained from the above experiments, T
An FT was made. The process is shown in FIG. First, an underlying silicon oxide film 202 having a thickness of 2000Å was formed on a substrate (Corning 7059) 201 by a positive column plasma CVD method using TEOS, oxygen and TCE as raw materials.
The apparatus used is the same as that shown in FIG. The main conditions are as follows. Substrate temperature: 300 ° C. Total pressure: 5 Pa Gas TEOS: 15 SCCM Oxygen: 300 SCCM TCE: 2 SCCM RF power: 75 W

Thereafter, an amorphous silicon film having a thickness of 500 nm was deposited by the plasma CVD method and patterned to form an island-shaped silicon region 203. Further, hydrogen was discharged by leaving it in a nitrogen atmosphere at 400 ° C. for 30 minutes. And FIG.
Laser annealing was performed as shown in FIG. A KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) was used as the laser.
The energy density was 200 to 350 mJ / cm ² .
Also, the substrate temperature is 300 to 500 during laser irradiation.
It was kept at ℃, for example 450 ℃.

Then, as shown in FIG. 2B, a silicon oxide film 204 having a thickness of 1000 Å is formed as a gate insulating film to cover the island-shaped silicon region 203 with TEOS, oxygen and T.
It was formed by positive column plasma CVD method using CE as a raw material. Prior to film formation, the substrate was pretreated. The apparatus used is the same as that shown in FIG. The main conditions of pretreatment are shown below. Substrate temperature: 300 ° C. Total pressure: 5 Pa gas Oxygen: 400 SCCM TCE: 0.5 SCCM RF power 150 W Treatment time 10 minutes Subsequently, film formation was performed. The main film forming conditions are as follows. Also, after the film formation, the atmosphere is 1 at 550 ° C.
Annealed for time. Substrate temperature: 300 ° C. Total pressure: 5 Pa Gas TEOS: 15 SCCM Oxygen: 300 SCCM TCE: 2 SCCM RF power: 75 W

Next, an aluminum film doped with 2% of silicon was deposited at 6000Å and patterned to form a gate electrode 205. Then, as shown in FIG. 2C, impurity ions (phosphorus or boron) were introduced by plasma doping using the gate electrode 205 as a mask in a self-aligned manner to form impurity regions 206 and 207.
The region where no impurities are formed is the channel formation region 20.
It becomes 8. Since the doping is performed through the gate insulating film, an accelerating voltage of 80 kV is required for phosphorus and 65 kV for boron. Further, the dose amount was appropriately 1 × 10 ¹⁵ to 4 × 10 ¹⁵ cm ⁻² .

After that, as shown in FIG. 2D, the impurities were activated again by the laser annealing method. The laser is a KrF excimer laser (wavelength 24
8 nm, pulse width 20 nsec) was used. The energy density was 200 to 350 mJ / cm ² . The substrate temperature may be kept at 300 to 500 ° C. during laser irradiation. After completion of laser irradiation, annealing was performed at 350 ° C. for 35 minutes in a hydrogen atmosphere with a partial pressure of 0.1 to 1 atm.

Next, a 5000 Å-thick silicon oxide film 209 was deposited as an interlayer insulator. The silicon oxide film 209 is TE
Positive column type plasma C made of OS, oxygen and TCE
It was formed by the VD method. The apparatus used is the same as that shown in FIG. The main film forming conditions are as follows. Substrate temperature: 300 ° C. Total pressure: 5 Pa Gas TEOS: 30 SCCM Oxygen: 300 SCCM RF power: 100 W

Then, the contact hole 2 is formed in the interlayer insulator.
10 and 211 were formed, and electrodes 212 and 213 were formed on the source and drain of the TFT using aluminum. Titanium or titanium nitride may be used instead of aluminum. With the above, a TFT could be completed. The yield of the obtained TFT was remarkably improved because the step coverage of the gate insulating film was improved and the reliability of the gate insulating film was improved.

[0032]

As described above, according to the present invention, the silicon oxide film obtained is sufficiently reliable as a gate insulating film. And not only reliability,
It became clear that it also contributes to the improvement of yield. In addition, a positive column type plasma C as shown in the embodiment is used.
Mass productivity can also be improved by using the VD device. As described above, the present invention is an industrially useful invention.

[Brief description of drawings]

FIG. 1 is a conceptual diagram of a positive column type CVD apparatus used in Examples.

2A to 2D are views showing a process of manufacturing a TFT in an example.

FIG. 3 shows the withstand voltage characteristics of the insulating coatings obtained in the examples.

FIG. 4 shows ΔV _FB characteristics of insulating coatings obtained in the examples.

[Explanation of symbols]

101 ... Chamber 102, 103 ... RF power source 104 ... Phase shifter 105, 106 ... Matching box 107, 108 ... Electrodes 109 ・ ・ ・ Container 110 ・ ・ ・ Board holder 111 ... Substrate 112, 113 ... Electrode holder 114, 115 ... Heater (infrared lamp)

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Mitsunori Sakama             398 Hase, Atsugi City, Kanagawa Prefecture, Ltd.             Conductor Energy Laboratory (72) Inventor Yukiko Uehara             398 Hase, Atsugi City, Kanagawa Prefecture, Ltd.             Conductor Energy Laboratory (72) Inventor Hiroshi Uehara             398 Hase, Atsugi City, Kanagawa Prefecture, Ltd.             Conductor Energy Laboratory F term (reference) 5F058 BA05 BA09 BB04 BB07 BC02                       BF07 BF24 BF25 BF27 BF29                       BF37 BF39 BF80                 5F110 AA17 AA30 CC02 DD02 DD13                       EE06 FF02 FF30 FF35 FF36                       FF40 GG02 GG13 GG24 HJ01                       HJ04 HJ12 HJ23 HL01 HL03                       HL04 NN02 NN23 NN35 PP03                       PP35 PP40 QQ11

Claims (11)

[Claims] 1. A semiconductor region is formed on a substrate, silicon oxide is a main component on the semiconductor region, carbon concentration is 5 × 10 ¹⁹ cm ⁻³ or less, and halogen element concentration is 1 × 1.
A gate insulating film of 0 ^{17 to} 5 × 10 ²⁰ cm ⁻³ is formed, a gate electrode is formed on the gate insulating film, and an interlayer insulating film containing silicon oxide as a main component is formed on the gate electrode. The method of manufacturing a semiconductor device, wherein the gate insulating film and the interlayer insulating film are formed by using organic silane. 2. A base insulating film is formed on a substrate, a semiconductor region is formed on the base insulating film, silicon oxide is a main component on the semiconductor region, and a carbon concentration is 5 × 10 ¹⁹ cm ^−3. Below, the concentration of halogen element is 1 × 1
A gate insulating film of 0 ^{17 to} 5 × 10 ²⁰ cm ⁻³ is formed, a gate electrode is formed on the gate insulating film, and an interlayer insulating film containing silicon oxide as a main component is formed on the gate electrode. The method of manufacturing a semiconductor device, wherein the gate insulating film and the interlayer insulating film are formed by using organic silane. 3. A base insulating film containing silicon oxide as a main component is formed on a substrate, a semiconductor region is formed on the base insulating film, and silicon oxide is the main component on the semiconductor region, and the concentration of carbon is 5 × 10 ¹⁹ cm ^-3 or less, the concentration of halogen element is 1 × 1
A gate insulating film of 0 ^{17 to} 5 × 10 ²⁰ cm ⁻³ is formed, a gate electrode is formed on the gate insulating film, and an interlayer insulating film containing silicon oxide as a main component is formed on the gate electrode. The method for manufacturing a semiconductor device, wherein the base insulating film, the gate insulating film, and the interlayer insulating film are formed by using organic silane. 4. A base insulating film containing silicon oxide as a main component is formed on a substrate, a semiconductor region is formed on the base insulating film, and silicon oxide is a main component so as to be in close contact with the semiconductor region. A gate insulating film having a carbon concentration of 5 × 10 ¹⁹ cm ⁻³ or less and a halogen element concentration of 1 × 10 ^{17 to} 5 × 10 ²⁰ cm ⁻³ is formed, and a gate electrode is formed on the gate insulating film. An interlayer insulating film containing silicon oxide as a main component is formed on the gate electrode, and the base insulating film, the gate insulating film, and the interlayer insulating film are formed by using organic silane. Method for manufacturing device. 5. A base insulating film containing silicon oxide as a main component is formed on a substrate, a semiconductor region is formed on the base insulating film, and silicon oxide is a main component so as to be in close contact with the semiconductor region. A gate insulating film having a carbon concentration of 5 × 10 ¹⁹ cm ⁻³ or less and a halogen element concentration of 1 × 10 ^{17 to} 5 × 10 ²⁰ cm ⁻³ is formed, and a gate electrode is formed on the gate insulating film. An interlayer insulating film containing silicon oxide as a main component is formed on the gate electrode, and the base insulating film, the gate insulating film, and the interlayer insulating film are formed by plasma CVD using organic silane. And a method for manufacturing a semiconductor device. 6. A base insulating film containing silicon oxide as a main component is formed on a substrate, a semiconductor region is formed on the base insulating film, and silicon oxide is a main component on the semiconductor region, and the concentration of carbon is 5 × 10 ¹⁹ cm ^-3 or less, the concentration of halogen element is 1 × 1
A gate insulating film of 0 ^{17 to} 5 × 10 ²⁰ cm ⁻³ is formed, a gate electrode is formed on the gate insulating film, and an interlayer insulating film containing silicon oxide as a main component is formed on the gate electrode. The method for manufacturing a semiconductor device, wherein the base insulating film, the gate insulating film, and the interlayer insulating film are formed in a mixed atmosphere containing organic silane, oxygen, and a halogen-containing gas. 7. A base insulating film containing silicon oxide as a main component is formed on a substrate, a semiconductor region is formed on the base insulating film, and silicon oxide is a main component on the semiconductor region, and the concentration of carbon is 5 × 10 ¹⁹ cm ^-3 or less, the concentration of halogen element is 1 × 1
A gate insulating film of 0 ^{17 to} 5 × 10 ²⁰ cm ⁻³ is formed, a gate electrode is formed on the gate insulating film, and an interlayer insulating film containing silicon oxide as a main component is formed on the gate electrode. The method for manufacturing a semiconductor device, wherein the base insulating film, the gate insulating film, and the interlayer insulating film are formed in a mixed atmosphere containing organic silane, hydrocarbon containing oxygen and chlorine. 8. The method for manufacturing a semiconductor device according to claim 1, wherein the halogen element is chlorine or fluorine. 9. The method for manufacturing a semiconductor device according to claim 1, wherein the substrate is a glass substrate. 10. The semiconductor device according to claim 1, wherein the concentrations of carbon and the halogen element are values detected by secondary ion mass spectrometry. Manufacturing method. 11. The organic silane according to claim 1, wherein the organosilane is Si (OC ₂ H ₅ ) ₄ , S.
i ₂ O (OC ₂ H ₅ ) ₆ , Si ₃ O ₂ (OC ₂ H ₅ ) ₈ , Si ₄ O
₃ (OC ₂ H ₅ ) ₁₀ or Si ₅ O ₄ (OC ₂ H ₅ ) _{12 A} method for manufacturing a semiconductor device.