JP2003068748A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device including a bipolar transistor which can operate at high speed by forming an oxide film between an intrinsic transistor part and a collector extraction part under appropriate control, and has excellent characteristics at high frequency by reducing parastic capacitance between the passive component and the substrate. SOLUTION: In this manufacture of a semiconductor device, a field oxidation is performed under the state that a single crystal silicon film 3 having a high dopant concentration is exposed in the region other than where a transistor is formed, and a single crystal silicon epitaxial film 21 having a low dopant concentration is partially left in the separation region between the intrinsic transistor part 15 and the collector extraction electrode part 16. Hereby, an element separating oxide silicon film 12 around the transistor part, and a separating oxide silicon film 17 between the intrinsic transistor part 15 and the collector extraction electrode part 16, are simultaneously formed in one process.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly to SOI (Silicon On Insulat).
or)) for manufacturing a monolithic integrated circuit including a bipolar transistor.

[0002]

2. Description of the Related Art In a semiconductor device using an SOI substrate and having an integrated circuit including a bipolar transistor, especially when forming wirings or passive elements of the integrated circuit, coupling occurs between these and the substrate, and parasitic capacitance is generated. There is a problem that becomes large. Therefore, in order to prevent this, a structure is known in which a thick silicon oxide film is formed under the wiring or passive element formation region and only the single crystal silicon layer in the transistor formation region remains in the silicon oxide film in an island shape. ing.

7 (a) to 7 (d) are process sectional views showing the manufacturing method in order. SIMO for SOI substrates
In FIG. 7A, reference numeral 101 is a silicon substrate, and 102 is a silicon substrate, which is formed by the X method or the substrate bonding method.
Is a silicon oxide layer and 103 is a single crystal silicon layer.
The single crystal silicon layer 103 is composed of an n ⁺ buried layer 103a and an n-type epitaxial layer 103b.
Then, a silicon nitride film 104 is formed as an etching stopper in a later step on the single crystal silicon layer 103, and then the silicon nitride film 104 and the single crystal silicon layer in the non-element region 106 are formed by using ordinary photolithography and etching techniques. 103 is removed, and an island-shaped single crystal silicon layer 103 is formed in the element region 105.

Next, as shown in FIG. 7B, a silicon oxide film 108 is formed over the entire surface so as to be thicker than twice the film thickness of the single crystal silicon layer 103. Then, chemical mechanical polishing (Chem
icalMechanical Polishing, hereinafter abbreviated as CMP)
The silicon oxide film 108 is removed by the method shown in FIG.
It is flattened as shown in (c). At this time, the silicon nitride film 104 is used as a stopper when polishing the silicon oxide film 108. Then, after removing the silicon nitride film 104, as shown in FIG. 7D, a bipolar transistor (emitter region 103c, base region 103d, A collector region 103e) is formed.

[0005]

In the conventional semiconductor device of this type, since the intrinsic transistor portion and the collector extraction portion are not insulated from each other, the parasitic capacitance of the collector-base junction cannot be reduced. It was difficult to increase the speed of the transistor. Moreover, it is difficult to control C when forming the region of the island-shaped single crystal silicon layer.
Since the MP method is used, controllability of the process has been a problem, such as unevenness in film thickness of the silicon oxide film caused by this process.

The present invention has been made in order to solve the above-mentioned problems, and increases the speed of a transistor by forming an oxide film between the intrinsic transistor portion and the collector extraction portion by a process with good controllability. Therefore, it is an object of the present invention to provide a semiconductor device including a bipolar transistor, which is excellent in high frequency characteristics in general, and a method for manufacturing the same by reducing the parasitic capacitance between the wiring of the integrated circuit and the passive element and the substrate.

[0007]

In order to achieve the above object, a semiconductor device of the present invention is a bipolar transistor having a collector region made of a single crystal silicon film remaining in an island shape on the surface of a silicon oxide film on a substrate. And an intrinsic transistor portion and a collector extraction electrode portion of the bipolar transistor are insulated and separated by a silicon oxide film formed on the surface of the single crystal silicon film.

In the semiconductor device of the present invention, since the intrinsic transistor portion is embedded in the silicon oxide film, the parasitic capacitance between the intrinsic transistor portion and the substrate can be reduced and the bipolar transistor can be speeded up. be able to. Furthermore, since the intrinsic transistor portion and the collector extraction electrode portion are insulated and separated by the silicon oxide film, the collector-base junction capacitance can be reduced and the speed can be further increased.

Further, it is desirable that the cross-sectional shape of the edge portion of the silicon oxide film that insulates and separates the intrinsic transistor portion and the collector extraction electrode portion is bird's beak.

The semiconductor device of the present invention is manufactured by a manufacturing method which will be described later, and a silicon oxide film which insulates and separates an intrinsic transistor portion and a collector extraction electrode portion is also called a field oxidation method (Local Oxidation of Silicon, LOCOS method). ), The cross-sectional shape of the edge portion of the silicon oxide film necessarily becomes Bird's Beak (bird's beak) shape.

Further, it is preferable that an insulating film covering the bipolar transistor is provided and a passive element is formed on the insulating film. In this configuration, passive elements such as resistors, capacitors, and inductors are formed on the silicon oxide film around the bipolar transistor, and when forming an integrated circuit, the substrate and each passive element and wiring are separated by a thick insulating film. Therefore, the parasitic capacitance in the passive element region can be reduced, and a high gain and high speed integrated circuit can be realized.

Further, it is desirable that the base region of the bipolar transistor is composed of a SiGe film or a SiGeC film.

The base region of the bipolar transistor is S
By using an iGe film or a SiGeC film to form a heterojunction bipolar transistor, it is possible to improve the direct current characteristics and high frequency characteristics of the transistor without impairing the effects of the present invention described above. It is possible to improve the performance of the integrated circuit.

Further, it is desirable that the film thickness of the silicon oxide film on the substrate is 5 μm or more. As a result, the distance between the passive element and the substrate can be set to 5 μm or more, and the Q value is high enough to be used for a high frequency of 2 GHz or more.
It is possible to form passive elements with values.

The method of manufacturing a semiconductor device according to the present invention comprises (1)
An SO in which a first silicon oxide film and a single crystal silicon film into which an impurity of the first conductivity type is introduced are sequentially stacked on a substrate.
A step of sequentially forming a first-conductivity-type single crystal silicon epitaxial film, a second silicon oxide film, and an oxidation resistant film serving as a mask during later field oxidation on the single crystal silicon film of the I substrate; Patterning the oxidation resistant film, the second silicon oxide film, and the single crystal silicon epitaxial film to leave these films only in the bipolar transistor formation region and remove the other parts. ) Of the bipolar transistor formation region, the oxidation resistant film and the second silicon oxide film in the isolation region between the intrinsic transistor portion and the collector extraction electrode portion are all removed, and the film of the single crystal silicon epitaxial film is removed. A step of leaving a part in the thickness direction,
(4) forming a third silicon oxide film in a region other than the isolation region and the bipolar transistor formation region by performing field oxidation using the oxidation resistant film as a mask.

In the method of manufacturing a semiconductor device of the present invention, the single crystal silicon film portion of the SOI substrate in which the first silicon oxide film and the first conductivity type single crystal silicon film are sequentially stacked on the substrate is buried as it is. By using it as a layer, the process of forming the buried layer can be shortened. Further, through the steps (1) to (4), that is, in the region other than the bipolar transistor formation region, the oxidation resistant film, the second silicon oxide film and the single crystal silicon epitaxial film are removed to form the single crystal. The silicon film is exposed, and in the isolation region between the intrinsic transistor portion and the collector extraction electrode portion in the bipolar transistor formation region, the oxidation resistant film and the second silicon oxide film are all removed and the single crystal silicon epitaxial film is formed. By performing field oxidation while leaving a part in the film thickness direction,
The element isolation silicon oxide film around the transistor and the isolation silicon oxide film between the intrinsic transistor portion and the collector extraction electrode portion can be simultaneously formed in one step, and planarization can be performed at the same time. This takes advantage of the difference in the film formation rate of the thermal oxide film due to the difference in the concentration of the dopant in the portion to be oxidized.
This is because the isolation oxide film between the intrinsic transistor portion and the collector extraction electrode portion can be controlled to have an appropriate thickness while the entire film is thermally oxidized. By this method, the element isolation silicon oxide film around the transistor and the isolation silicon oxide film between the intrinsic transistor portion and the collector extraction electrode portion can be formed with a simple process and good controllability.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of the present invention will be described below with reference to FIGS. 1 (a) to 5 (n)
FIG. 7A is a process cross-sectional view showing a step-by-step method for manufacturing a semiconductor device of the present embodiment.

FIG. 5 (n) is a sectional view showing a completed state of the semiconductor device of this embodiment. The semiconductor device of the present embodiment uses an SOI substrate in which a silicon oxide film 2 and a single crystal silicon film 3 are stacked on a silicon substrate 1, and the portion where the single crystal silicon film 3 remains is the bipolar transistor 4. The subcollector layer 5 is formed. In the bipolar transistor 4, a collector layer 6, a base layer 7 and an emitter layer 8 are laminated on the sub-collector layer 5 to form an npn transistor, and in addition, a collector extraction electrode 9 and a base extraction electrode are provided. 10 and an emitter extraction electrode 11, respectively.

The periphery of the bipolar transistor 4 is buried in the element isolation silicon oxide film 12 and remains in an island shape, and the element isolation oxidation on the right side of the bipolar transistor 4 in FIG. A capacitor 14, which is one of passive elements, is formed on a thick silicon oxide film having a film thickness of about 5 to 6 μm, which is composed of the silicon film 12 and the interlayer insulating film 13. Then, a silicon oxide film 17 for isolation that insulates and separates the intrinsic transistor portion 15 of the bipolar transistor 4 from the collector extraction electrode portion 16 is formed. The cross-sectional shape of the edge portion of the separating silicon oxide film 17 is a bird's beak shape.

Next, a method of manufacturing the semiconductor device having the above structure will be described in detail with reference to FIGS. 1 (a) to 5 (n). First, as shown in FIG. 1A, an SOI substrate 20 in which a silicon oxide film 2 (first silicon oxide film) and a single crystal silicon film 3 are stacked on a silicon substrate 1 is prepared. The film thickness of the silicon oxide film 2 is about 3 μm. The single crystal silicon film 3 contains 1 × 10 ¹⁹ cm ^{−3 of} an n-type impurity (first conductivity type impurity) such as phosphorus in the (100) -oriented single crystal silicon.
It is doped at the above concentration and has a sheet resistance of 20.
It is adjusted to about Ω / □.

Next, as shown in FIG. 1B, the phosphorus concentration is 3 × 1 on the SOI substrate 20 by the epitaxial method.
0 ^{16 to} 5 × 10 ¹⁷ cm ⁻³ , a single crystal silicon epitaxial film 21 having a film thickness of about 800 nm (hereinafter, simply referred to as a silicon epitaxial film), a film thickness of 50 n by a thermal oxidation method.
A silicon oxide film 22 (second silicon oxide film) having a thickness of about m and a silicon nitride film 23 (oxidation resistant film) having a thickness of about 100 nm are formed by the CVD method. Then, using a well-known photolithography technique, the photoresist 24 is patterned so as to remain in the bipolar transistor formation region, and the silicon nitride film 23 and the silicon oxide film 22 in regions other than the bipolar transistor formation region are dry-etched using this as a mask. And the silicon epitaxial film 21 is removed by wet etching. At this time, when the silicon epitaxial film 21 is etched, the single crystal silicon film 3 therebelow does not serve as an etching stopper, and is controlled by the etching time.
Just etching is preferable, but there is no particular problem as long as it is slightly over-etched or under-etched.

After the photoresist 24 is once removed, as shown in FIG. 1 (c), the photolithography technique is used again, and between the intrinsic transistor portion 15 and the collector extraction electrode portion 16 in the bipolar transistor formation region. The photoresist 27 having an opening in the isolation region is patterned, and using this as a mask, the silicon epitaxial film 21 is removed by wet etching to about half the total thickness (about 400 nm), leaving the rest. In this wet etching process, the etching time is calculated from the film thickness to be removed and the etching rate, and is controlled by the etching time.

After removing the photoresist 27, FIG.
As shown in (d), local thermal oxidation, that is, so-called field oxidation is performed using the silicon nitride film 23 as an oxidation resistant mask. Here, the single crystal silicon film 3 (SOI film) is exposed in the area other than the bipolar transistor formation area, and the silicon epitaxial film 21 with a film thickness of about half is exposed in the bipolar transistor formation area. Therefore, the silicon film is thermally oxidized.

At this time, the dopant concentration of the single crystal silicon film 3 is as high as 1 × 10 ¹⁹ cm ⁻³ or more, and the dopant concentration of the silicon epitaxial film 21 is 3 × 10 ^{16 to} 5 × 10 5.
^Since it is as low as ¹⁷ cm ⁻³ , the oxidation rate of the single crystal silicon film 3 is about twice that of the silicon epitaxial film 21. Therefore, the single crystal silicon film 3 outside the bipolar transistor formation region is thermally oxidized, and the intrinsic transistor is grown to about the height of the original silicon oxide film 22 while the element isolation silicon oxide film 12 is grown to about 2 μm. The silicon epitaxial film 21 in the isolation region between the portion 15 and the collector extraction electrode portion 16 is also entirely thermally oxidized, and the isolation silicon oxide film 17 is grown to approximately the height of the original silicon oxide film 22 in this isolation region by about 1 μm. As a result, the entire substrate is almost flattened. Further, as is well known, by performing the field oxidation, the isolation silicon oxide films 12 and 17 are formed.
The cross-sectional shape of the edge portion is a bird's beak shape.

A circle A indicated by a one-dot chain line in FIG. 1 (d)
FIG. 6 is an enlarged view of the inside. As shown in FIG.
The end portion of the isolation silicon oxide film 12 grows slightly under the silicon nitride film 23 that serves as an oxidation resistant mask during field oxidation, forming a bird's beak 50.

The following steps are the same as the conventional manufacturing steps. After removing the silicon nitride film 23 used as the oxidation resistant mask at the time of field oxidation, as shown in FIG. 2E, an external base layer 28 used for taking out the base of the bipolar transistor 4 is formed by a polycrystalline silicon film. .

Next, as shown in FIG. 2F, the photoresist 29 having only the collector extraction electrode portion 16 opened is patterned, and ion implantation is performed using this as a mask.
An impurity diffusion layer 30 for collector compensation is formed. This is because the dopant concentration of the silicon epitaxial film 21 remaining in the collector extraction electrode portion 16 is low and the resistance is high as it is, which is inconvenient for extraction of the collector.
This is done for the purpose of lowering the resistance.

After removing the photoresist 29, FIG.
As shown in (g), a silicon germanium (SiGe) film 31 (or SiGeC) into which a p-type impurity has been introduced.
Film), a silicon oxide film 32, and a silicon film 33 into which an n-type impurity is introduced, are sequentially formed, and then patterned,
A base layer 7 made of a silicon germanium film 31 and an emitter layer 8 made of a silicon film 33 are formed respectively.
After that, the interlayer insulating film 34 is formed on the entire surface.

Next, as shown in FIG. 2H, the photoresist 35 having an opening only in the collector extraction electrode portion 16 is patterned, and using this as a mask, the interlayer insulating film 34 is exposed until the surface of the impurity diffusion layer 30 is exposed. Is etched to form a contact hole 40 for taking out the collector.

After removing the photoresist 35, FIG.
As shown in (i), the photoresist 37 in which only the emitter extraction electrode portion 36 is opened is patterned, and the interlayer insulating film 34 is etched using the photoresist 37 as a mask until the surface of the emitter layer 8 is exposed. The hole 41 is formed. When the photoresist 35 is removed, the state shown in FIG.

Next, as shown in FIG. 3K, a polycrystalline silicon film 38 is formed and patterned to form a polycrystalline silicon film 38.
The collector extraction electrode 9 is electrically connected to the collector layer 6 via the impurity diffusion layer 30 and the sub-collector layer 5 at the contact hole 40, and the emitter extraction electrode is electrically connected to the emitter layer 8 at the contact hole 41. 11 are formed respectively.

Next, as shown in FIG. 4L, a titanium salicide layer 42 for reducing the resistance is formed on the collector extraction electrode 9, the emitter extraction electrode 11, and the external base layer 28.

Next, as shown in FIG. 4 (m), after the interlayer insulating film 43 is formed, metal electrodes 44, 45, 46 for taking out the collector, taking out the emitter, and taking out the base are formed, respectively.

Finally, as shown in FIG. 5 (n), after forming the interlayer insulating film 13, the capacitor 14 is formed to complete the semiconductor device of the present embodiment.

In the semiconductor device of this embodiment, since the intrinsic transistor portion 15 of the bipolar transistor 4 is embedded in the silicon oxide film, the parasitic capacitance between the intrinsic transistor portion 15 and the silicon substrate 1 is reduced. It is possible to reduce the number of transistors and increase the speed of the bipolar transistor 4. Furthermore, since the intrinsic transistor portion 15 and the collector extraction electrode portion 16 are insulated and separated by the silicon oxide film 17, the collector-base junction capacitance can be reduced and the speed can be further increased.

An interlayer insulating film 13 covering the bipolar transistor 4 is provided, and a capacitor 14 which is one of passive elements is formed on the interlayer insulating film 13. The silicon substrate and the passive element are separated by a thick insulating film. Because it has been
Parasitic capacitance in the passive element region can be reduced, and a high gain and high speed integrated circuit can be realized. Further, the base layer 7 of the bipolar transistor 4 is a SiGe film or Si.
Since the GeC film, the collector layer 6 and the emitter layer 8 are formed of a Si film to form a heterojunction bipolar transistor, it is possible to improve the direct current characteristics and high frequency characteristics of the transistor, and an integrated circuit using the same. It is possible to improve the performance of.

The capacitor 14 and the silicon substrate 1 are separated by a thick silicon oxide film, and the distance between them is 5 μm.
Since there is a certain degree, it becomes possible to form a capacitor having a sufficiently high Q value to be used for a high frequency of 2 GHz or more.

According to the method of manufacturing the semiconductor device of the present embodiment, the process of forming the buried layer can be shortened by using the single crystal silicon film 3 portion of the SOI substrate 20 as it is as the buried layer. . Further, the element isolation silicon oxide film 12 around the bipolar transistor and the isolation silicon oxide film 17 between the intrinsic transistor portion 15 and the collector extraction electrode portion 16 can be simultaneously formed in one step, and planarization is also possible. Can be done at the same time. By this method, the element isolation silicon oxide film around the transistor and the isolation silicon oxide film between the intrinsic transistor portion and the collector extraction electrode portion can be formed by a simple process with good controllability.

The technical scope of the present invention is not limited to the above embodiment, and various modifications can be made without departing from the spirit of the present invention. For example, the specific description of the materials of various films, the film thickness, the impurity concentration, and the like described in the above embodiment is merely an example, and can be appropriately changed.

[0040]

As described above in detail, according to the present invention, the oxide film is formed between the intrinsic transistor portion and the collector extraction portion of the bipolar transistor by a simple process with good controllability, so that the transistor can operate at high speed. By reducing the parasitic capacitance between the wiring of the integrated circuit and the passive element and the substrate, it is possible to provide a semiconductor device including a bipolar transistor having excellent high frequency characteristics.

[Brief description of drawings]

1A to 1C are process cross-sectional views sequentially showing a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a continuation of the process cross-sectional view of the same.

FIG. 3 is a continuation of the process cross-sectional view of the same.

FIG. 4 is a continuation of the process cross-sectional view of the same.

FIG. 5 is a continuation of the process cross-sectional view of the same.

FIG. 6 is an enlarged view of a circle A in FIG.

7A to 7C are process cross-sectional views sequentially showing a method of manufacturing a conventional semiconductor device including a bipolar transistor.

[Explanation of symbols]

1 Silicon substrate 2 Silicon oxide film (first silicon oxide film) 3 Single crystal silicon film 4 bipolar transistors 6 Collector layer 7 Base layer 8 Emitter layer 12 Silicon oxide film for element isolation 13 Interlayer insulation film 14 Capacitor (passive element) 15 Intrinsic transistor section 16 Collector extraction electrode 17 Silicon oxide film for separation 20 SOI substrate 21 Single crystal silicon epitaxial film 22 Silicon oxide film (second silicon oxide film) 23 Silicon nitride film (oxidation resistant film) 50 Birds Beak

Claims (6)

[Claims] 1. A bipolar transistor having a collector region made of a single crystal silicon film remaining in an island shape on a surface of a silicon oxide film on a substrate, wherein an intrinsic transistor portion and a collector extraction electrode portion of the bipolar transistor are the single crystal. A semiconductor device characterized by being insulated and separated by a silicon oxide film formed on the surface of a silicon film. 2. The semiconductor device according to claim 1, wherein a cross-sectional shape of an edge portion of a silicon oxide film that insulates and separates the intrinsic transistor portion and the collector extraction electrode portion is a bird's beak shape. 3. The semiconductor device according to claim 1, wherein an insulating film is provided to cover the bipolar transistor, and a passive element is formed on the insulating film. 4. The semiconductor device according to claim 1, wherein the base region of the bipolar transistor is formed of a SiGe film or a SiGeC film. 5. The film thickness of the silicon oxide film on the substrate is 5
The semiconductor device according to claim 1, wherein the semiconductor device has a thickness of at least μm. 6. An SOI substrate in which a first silicon oxide film and a single crystal silicon film into which an impurity of the first conductivity type is introduced are sequentially stacked on a substrate
A step of sequentially forming a conductivity type single crystal silicon epitaxial film, a second silicon oxide film, and an oxidation resistant film serving as a mask at the time of field oxidation later, the oxidation resistant film, the second silicon oxide film, and the single silicon oxide film. A step of patterning the crystalline silicon epitaxial film to leave these films only in the bipolar transistor formation region and remove the other portions, and the intrinsic transistor part and the collector extraction electrode part in the bipolar transistor formation region. Removing all of the oxidation resistant film and the second silicon oxide film in the isolation region between and leaving a part of the single crystal silicon epitaxial film in the film thickness direction,
A step of forming a third silicon oxide film in a region other than the isolation region and the bipolar transistor formation region by performing field oxidation using the oxidation resistant film as a mask.