JP2003059290A5 - - Google Patents

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Publication number
JP2003059290A5
JP2003059290A5 JP2002145210A JP2002145210A JP2003059290A5 JP 2003059290 A5 JP2003059290 A5 JP 2003059290A5 JP 2002145210 A JP2002145210 A JP 2002145210A JP 2002145210 A JP2002145210 A JP 2002145210A JP 2003059290 A5 JP2003059290 A5 JP 2003059290A5
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JP
Japan
Prior art keywords
data
read
error detection
correction
bit
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Application number
JP2002145210A
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English (en)
Japanese (ja)
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JP4050091B2 (ja
JP2003059290A (ja
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Priority to JP2002145210A priority Critical patent/JP4050091B2/ja
Priority claimed from JP2002145210A external-priority patent/JP4050091B2/ja
Publication of JP2003059290A publication Critical patent/JP2003059290A/ja
Publication of JP2003059290A5 publication Critical patent/JP2003059290A5/ja
Application granted granted Critical
Publication of JP4050091B2 publication Critical patent/JP4050091B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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JP2002145210A 2001-06-04 2002-05-20 半導体メモリ装置 Expired - Fee Related JP4050091B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002145210A JP4050091B2 (ja) 2001-06-04 2002-05-20 半導体メモリ装置

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2001168706 2001-06-04
JP2001-168706 2001-06-04
JP2002145210A JP4050091B2 (ja) 2001-06-04 2002-05-20 半導体メモリ装置

Publications (3)

Publication Number Publication Date
JP2003059290A JP2003059290A (ja) 2003-02-28
JP2003059290A5 true JP2003059290A5 (ko) 2005-08-04
JP4050091B2 JP4050091B2 (ja) 2008-02-20

Family

ID=26616317

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002145210A Expired - Fee Related JP4050091B2 (ja) 2001-06-04 2002-05-20 半導体メモリ装置

Country Status (1)

Country Link
JP (1) JP4050091B2 (ko)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005025827A (ja) 2003-06-30 2005-01-27 Toshiba Corp 半導体集積回路装置およびそのエラー検知訂正方法
EP1657723B1 (en) 2003-08-18 2013-03-06 Fujitsu Semiconductor Limited Semiconductor memory and operation method of semiconductor memory
JP2006099911A (ja) 2004-09-30 2006-04-13 Toshiba Corp 半導体集積回路装置
JP2006190425A (ja) * 2005-01-07 2006-07-20 Nec Electronics Corp 半導体記憶装置
JP4703220B2 (ja) * 2005-03-04 2011-06-15 株式会社東芝 半導体記憶装置
JP4643334B2 (ja) * 2005-03-31 2011-03-02 富士通セミコンダクター株式会社 半導体記憶装置
JP4547313B2 (ja) * 2005-08-01 2010-09-22 株式会社日立製作所 半導体記憶装置
JP2007066423A (ja) * 2005-08-31 2007-03-15 Toshiba Corp 半導体集積回路装置
JP4820795B2 (ja) 2007-10-04 2011-11-24 パナソニック株式会社 半導体記憶装置
JP2010020839A (ja) * 2008-07-10 2010-01-28 Panasonic Corp 半導体記憶装置
JP2013033560A (ja) 2009-12-03 2013-02-14 Panasonic Corp 半導体記憶装置
JP7016332B2 (ja) * 2019-07-05 2022-02-04 華邦電子股▲ふん▼有限公司 半導体メモリ装置

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