JP2003058126A - Display device and its driving method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem in which still picture data that have been displayed in a previous still picture display interval are displayed when still picture display is switched to a normal display on a liquid crystal display device that is provided with a digital memory (hereafter called a DM) resulting in deterioration in the display quality. SOLUTION: In a still picture writing frame in which still picture display is switched to normal display, an off-level control signal is supplied to a DM output control signal line 20 and a DM output switch element 25 is put into its off state. In the other lines excluding the lines into which new still picture data are written, the still picture data which have been displayed in a previous still picture display interval are not outputted from a DM18.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device having a digital memory for each pixel and a driving method thereof.

[0002]

2. Description of the Related Art In recent years, liquid crystal display devices have been used as displays for small information terminals such as mobile phones and electronic books by taking advantage of their light weight, thinness and low power consumption. Since these small information terminals are generally battery-powered, low power consumption is an important issue. For example, a mobile phone is required to be capable of displaying with low power consumption during a standby period, and as a technique for realizing this, there is, for example, JP-A-58-23091. The image display device disclosed herein has a digital memory in each pixel, and operates only an AC drive circuit for AC-driving the liquid crystal during standby (hereinafter, still image display period), and By stopping the peripheral drive circuit, the power consumption is greatly reduced.

[0003]

By the way, in the liquid crystal display device having the above-mentioned digital memory, even after switching from the still image display to the normal display, the digital memory displays video data (hereinafter , Still image data is retained, so the next time you display a still image, the still image that was displayed in the previous still image display period will be displayed until the writing of new still image data to the digital memory is completed. Image data was output, and for a very short time, completely different still image data that was previously displayed was displayed. Therefore, the observer feels a sense of discomfort in the change of the image, and there is a problem that it is recognized as a disorder of the image.

An object of the present invention is to provide a display device and a driving method thereof which can improve the change of an image at the time of switching the display and obtain an excellent display quality at the time of switching the display.

[0005]

In order to achieve the above-mentioned object, the invention of claim 1 is arranged such that a plurality of scanning lines and a plurality of signal lines arranged in a matrix form, and each intersection of these two lines. ON / OFF control is performed by a scanning signal supplied from the pixel electrode and the scanning line, and a first switch element that writes the image data supplied to the signal line to the pixel electrode when the pixel electrode is electrically connected to the pixel electrode. A digital memory capable of holding the video data supplied to the signal line, a second switch element for controlling conduction between the pixel electrode and the digital memory, and a second switch element between the digital memory and the second switch element. A first electrode substrate having a third switch element for controlling conduction; a second electrode substrate having a counter electrode arranged to face the pixel electrode;
In a display device including a display layer sandwiched between an electrode substrate and a second electrode substrate, a control signal for controlling conduction of the third switch element is a digital signal formed on the first electrode substrate. It is characterized in that it is supplied from a memory output control signal line.

According to a second aspect of the invention, in the first display period, the conduction between the pixel electrode and the digital memory is turned off by the second switching element, while the conduction of the first switching element is turned on at a predetermined interval. Display is performed by writing the first video data supplied to the signal line to the pixel electrode, and during the second display period, the second switch element is turned on to turn on the first image data supplied to the signal line. After storing the two video data in the digital memory, the conduction between the signal line and the pixel electrode is turned off by the first switch element, and the second video data stored in the digital memory is stored in the pixel electrode. The display is performed by writing.
In the method for driving a display device described in (1), during the second display period, the conduction of the second switch element is turned on and the second video data supplied to the signal line is held in the digital memory. The third switch element is turned off to disconnect the electrical connection between the digital memory and the second switch element.

In a preferred form, the digital memory switch circuit includes at least a first DM switch element connected to a non-inverting output terminal of the digital memory,
The second DM connected to the inverting output terminal of the same digital memory
And a switch element.

As a preferred mode, the first DM switch element and the second DM switch element are connected to independent control signal lines.

In a preferred form, the digital memory is composed of at least two inverter circuits and the third switch element.

[0010]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments in which the display device and the driving method thereof according to the present invention are applied to an active matrix type liquid crystal display device having a digital memory will be described below.

FIG. 3 is a circuit diagram of the liquid crystal display device according to this embodiment, and FIG. 4 is a schematic sectional view of FIG.

The liquid crystal display device 100 is composed of a display pixel section 110 in which a plurality of display pixels 10 are formed, a scanning line drive circuit 120 and a signal line drive circuit 130.

Here, the scanning line drive circuit 120 and the signal line drive circuit 13 are provided on the array substrate 101 (FIG. 4).
0 is a signal line 11, a scanning line 12 and a pixel electrode 13 described later
However, the scanning line driving circuit 120 and the signal line driving circuit 130 may be arranged on an external driving substrate (not shown).

In the display pixel section 110, a plurality of signal lines 11 and a plurality of scanning lines 12 intersecting with the signal lines 11 are arranged in a matrix on an array substrate 101 with an insulating film (not shown) interposed therebetween. A display pixel 10 is arranged at each intersection.

The display pixel 10 includes a pixel electrode 13, a pixel switch element 14, a counter electrode 15, a liquid crystal layer 16, a digital memory switch circuit 17 (hereinafter, DM switch circuit) and a digital memory (hereinafter, DM) 18. There is.

In the display pixel 10, the source of the pixel switch element 14 is the signal line 11, the gate is the scanning line 12, and
The drains are connected to the pixel electrodes 13, respectively. In addition, the pixel electrode 13 is DM-connected via the DM switch circuit 17.
It is connected to 18. The gate of the DM switch circuit 17 is connected to the control signal line 19, the source is connected to the pixel electrode 13, and the drain is connected to the DM 18. The configurations of the DM switch circuits 17 and DM 18 will be described later.

An auxiliary capacitance electrode (not shown) is electrically connected to each pixel electrode 13 in parallel, and an auxiliary capacitance Cs is formed between the pixel electrode 13 and the auxiliary capacitance electrode line (not shown). A predetermined auxiliary capacitance potential is applied to the auxiliary capacitance electrode line from a controller IC (not shown). Although two control signal lines 19 are arranged as 19a and 19b as described later, they are shown as one control signal line 19 in FIG. 3 for ease of explanation.

The pixel switch element 14 and the DM switch circuit 17 respectively form a first switch element and a second switch element in this embodiment. The array substrate 101 and the counter substrate 102 respectively form a first electrode substrate and a second electrode substrate in this embodiment.

The pixel electrode 13 is formed on the array substrate 101, and the counter electrode 15 facing the pixel electrode 13 is formed on the counter substrate 102 (FIG. 4). Counter electrode 15
Is supplied with a predetermined counter potential from a controller IC (not shown).

The scanning line drive circuit 120 is composed of a shift register 121 and a buffer circuit (not shown), and a control signal (horizontal clock / start signal) and power supply voltage are supplied from a controller IC (not shown).

In the scanning line driving circuit 120, during a halftone display or a moving image display (hereinafter, normal display) period, a scanning signal is output at a predetermined cycle similarly to a normal active matrix type liquid crystal display device, and the scanning line 12 is output. Is turned on, and all the scanning lines 12 are turned off during the still image display period. Further, the scanning line drive circuit 120 supplies an ON or OFF level control signal to the control signal line 19 and a DM output control signal line 20 described later according to the display period. However, a control signal may be directly supplied to the control signal line 19 and a DM output control signal line 20 described below from a controller IC (not shown) without using the scanning line drive circuit 120.

The normal display period and the still image display period correspond to the first display period and the second display period in this embodiment, respectively. However, in this embodiment, the still image display period is a period including a still image writing frame.

The signal line driving circuit 130 is composed of a shift register 131, an ASW (analog switch) 132, etc., and is stationary from a controller IC (not shown) through a control signal (vertical clock / start signal), a power supply voltage and a video bus 133. Image data or moving image data (video data during normal display) is supplied. In the signal line drive circuit 130, the shift register 131 to the ASW 132 are driven based on the vertical clock / start signal.
By outputting the opening / closing signal of, the still image data or the moving image data supplied to the video bus 133 is sampled on the signal line 11 at a predetermined timing.

A liquid crystal layer 16 as a display layer is held between the array substrate 101 and the counter substrate 102, and the periphery thereof is sealed by a sealing material 103 (FIG. 4).

Here, the basic operation of the liquid crystal display device 100 configured as described above will be briefly described.

When a scanning signal is output from the scanning line driving circuit 120 and each scanning line 12 is turned on sequentially from the top, and video data is sampled on the signal line 11 in synchronization with this, the scanning line 12 is turned on. All connected pixel switch elements 14 are turned on for one horizontal scanning period,
The video data sampled on the signal line 11 is written to the pixel electrode 13 through the pixel switch element 14. This video data is used for the pixel electrode 13 and the counter electrode
(And a storage capacitor electrode and a storage capacitor electrode line (not shown) are charged as a signal voltage, and the liquid crystal layer 16 responds according to the magnitude of the signal voltage, thereby controlling the amount of transmitted light from each display pixel 10. To be done. By carrying out such an operation for all the scanning lines 12 within one frame period, one screen image is completed.

Next, the circuit configuration of the display pixel 10 in this embodiment will be described with reference to FIG. FIG. 2 is a circuit configuration diagram of the display pixel 10, and the same parts as those in FIG. 3 are denoted by the same reference numerals.

The DM switch circuit 17 is composed of two DM switch elements 21 and 22, and is inserted between the non-inverting output terminal 27 and the inverting output terminal 28 of the DM 18 and the pixel electrode 13. In the DM switch circuit 17, D
The gate of the M switch element 21 is connected to the control signal line 19a, and the gate of the DM switch element 22 is connected to the control signal line 19a.
connected to b. The control signal lines 19a and 19b are connected to the scanning line drive circuit 120, and an ON or OFF level potential is supplied as a control signal according to a display period, whereby the two DM switch elements are independently controlled. It The DM switch circuit 17 and the pixel switch element 14
Are both composed of MOS transistors.

The DM 18 has two inverter circuits 23,
24 and a DM output switch element 25. The gate of the DM output switch element 25 is connected to the DM output control signal line 20. DM output control signal line 2
0 is connected to the scanning line drive circuit 120, and is supplied with an ON or OFF level potential as a control signal in accordance with the display period, so that the pixel switch element 14 is controlled independently.

The DM output switch element 25 constitutes the third switch element in this embodiment.

Next, the operation of the liquid crystal display device 100 having the above-described structure for normal display and still image display will be described with reference to the timing chart of signal waveforms shown in FIG.

In FIG. 1, X clock and X start represent horizontal clock signals and horizontal start signals, and Y
Clock and Y start represent a vertical clock signal and a vertical start signal. Further, the data represents full-color video data for normal display or multi-color video data for still image display. Here, the full-color video data for normal display and the multi-color video data for still image display correspond to the first video data and the second video data in this embodiment, respectively.

In the normal display period, the control signal lines 19a, 1
Both 9b are turned off and the DM switch circuit 17 is turned off. During this period, the scanning line drive circuit 120 and the signal line drive circuit 130 are supplied with control signals and video data, respectively, and are normally driven to perform full-color, high-quality halftone / moving image display. In this case, full-color display is performed by writing the moving image data sampled on the signal line 11 to the pixel electrode 13 and the auxiliary capacitance electrode 19, similarly to a general active matrix type liquid crystal display device having no DM 18. The 1H period shown in FIG. 1 is one horizontal scanning period, and in synchronization with the X start signal output every 1H period,
A scanning signal is output from the scanning line driving circuit 120.

During the normal display period, the DM output control signal line 20 is supplied with an on-level control signal from the scanning line drive circuit 120. However, during the normal display period, since the electrical connection between the DM 18 and the pixel electrode 13 is cut off, an off-level control signal may be supplied.

Next, when switching from the normal display to the still image display, in the last one frame (still image writing frame) transitioning from the normal display period to the still image display period,
The control signal line 19a is turned on and the control signal line 19b is turned off. Then, while the pixel switch element 14 is turned on by the scanning signal, the binarized still image data is sampled on the signal line 11, and this is sampled through the pixel switch element 14 and the DM switch element 22 of the DM switch circuit 17. Write to the non-inverting output terminal 27 of the DM 18. Here, the binarized still image data is video data for a multi-color image displayed during the still image display period.

By the way, in the conventional liquid crystal display device having a digital memory, the DM output switch element 25 of the DM 18 is a switch element having a channel opposite to that of the pixel switch element 14, and is a complementary MOS transistor with the pixel switch element 14. Was configured. The gate of the DM output switch element 25 was connected to the same scanning line 12 as the gate of the pixel switch element 14. Therefore, in the still image writing frame following the normal display period, the DM output switch element 25 remains in the ON state in the lines other than the line in which the new still image data is written. Therefore, during this period, the still image data displayed in the previous still image display period is output from the non-inversion output terminal 27 of the DM 18 through the DM switch element 21, and although it is a very short time, it is a completely different still image displayed previously. The image data was displayed.

However, in the present embodiment, as shown in FIG. 1, the DM output control signal line is supplied until the writing of new still image data on all lines is completed, that is, during the still image writing frame. An off-level control signal is supplied to 20 to turn off the DM output switch element 25. Therefore, in the lines other than the line in which the new still image data is written, the still image data displayed in the previous still image display period is DM18.
No non-inverted output terminal 27 outputs the still image data that was previously displayed during the still image writing frame.

After the binarized video data is written to the DM 18 through the still image writing frame, the pixel switch element 14 is turned off and the DM output switch element 25 is turned on, so that the DM 18 is turned off. Inversion output terminal 2
The video data written in 7 has two inverter circuits 2
It is held in a loop around 4,25. Furthermore, when the control signal line 19a is turned off and the control signal line 19b is turned on in this state, the binarized video data held in the DM 18 is output through the DM switch element 22 of the DM switch circuit 17, Data is written in the pixel electrode 13, and binary multicolor display is thereby performed. During this period, the supply of control signals and video data from the controller IC (not shown) to the scanning line driving circuit 120 and the signal line driving circuit 130 is stopped.

During this still image display period, DM
The video data written in 18 can be held in this state for a short time, but if it is held for a long time, the liquid crystal layer 16 is deteriorated by the DC component, so it is necessary to drive the AC data. Therefore, the control signal lines 19a and 19b are alternately turned on at a constant cycle, and the DM switch circuit 17 is turned on.
The two DM switch elements 21 and 22 are alternately turned on, and the potential of the counter electrode 15 is inverted in accordance with this, thereby performing AC driving.

Thus, the two DM switch elements 2
By alternately turning on 1 and 22, the power source / ground potential is alternately output as the potential of the pixel electrode 13, and in synchronization with this, the potential of the counter electrode 15 is shifted between the power source / ground potential, and In the display pixel 10 having the same polarity as the electrode 15, no voltage is applied to the liquid crystal layer 16, and in the display pixel 10 having the opposite polarity, the voltage is applied to the liquid crystal layer 16, so that binary display (black and white display) can be performed. At this time, the operation of the signal line drive circuit 130 for sampling the video data on the signal line 11 is stopped, and the liquid crystal display device and the controller IC only have to perform the low frequency operation for AC driving the liquid crystal layer 16. It is possible to display in black and white with low power consumption.

Further, when switching from the still image display to the normal display, both of the two control signal lines 19a and 19b are turned off again after the final frame of the still image, and the scanning line drive circuit 120 and the scanning line drive circuit 120 from the controller IC (not shown). A control signal or video data is supplied to the signal line drive circuit 130. The still image final frame is a preparatory period set when transitioning from still image display to normal display. During this period, driving of the scanning line driving circuit 120 and the signal line driving circuit 130 is restarted, but No data is written.

The DM output switch element 25 may be composed of a p-ch TFT in addition to the n-ch TFT as shown in FIG. In this case, the DM output control signal line 20
Is supplied with a control signal having a level opposite to that in FIG.

According to the above embodiment, in the still image writing frame in which the normal display is switched to the still image display, the DM
Since the output switch element 25 is turned off, the still image data displayed in the previous still image display period during this period is not output from the non-inverting output terminal 27 of the DM 18. Therefore, compared to the case where the previous unrelated still image data is displayed when switching the display as in the past,
The viewer does not feel a sense of incongruity in the change in the image, and the change in the image at the time of switching the display is not recognized as the disorder of the image, so that excellent display quality can be obtained even at the time of switching the display.

[0044]

As described above, according to the display device and the driving method thereof according to the present invention, irrelevant previous still image data is displayed when the normal display is switched to the still image display. Since it is not present, the observer does not feel uncomfortable with the change in the image, and it is possible to obtain excellent display quality even when the display is switched.

[Brief description of drawings]

FIG. 1 is a timing chart of signal waveforms showing an operation of a liquid crystal display device according to an embodiment.

FIG. 2 is a circuit configuration diagram of a display pixel.

FIG. 3 is a circuit configuration diagram of a liquid crystal display device according to an embodiment.

4 is a schematic cross-sectional view of FIG.

[Explanation of symbols]

10 ... Display pixel, 11 ... Signal line, 12 ... Scan line, 13 ...
Pixel electrode, 14 ... Pixel switch element, 15 ... Counter electrode,
16 ... Liquid crystal layer, 17 ... DM switch circuit, 18 ... DM
(Digital memory), 19 (19a, 19b) ... Control signal line, 20 ... DM output control signal line, 21, 23 ... DM
Switch element, 23, 24 ... Inverter circuit, 25 ... D
M output switch element, 101 ... Array substrate, 102 ... Counter substrate, 110 ... Display pixel section, 120 ... Scan line drive circuit, 130 ... Signal line drive circuit

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) G09F 9/35 G09F 9/35 5C094 G09G 3/20 624 G09G 3/20 624B 631 631M 660 660U H04N 5/907 H04N 5/907 B (72) Inventor Takashi Maeda 1-9-2, Harara-cho, Fukaya-shi, Saitama F-term in Toshiba Fukaya Plant (reference) 2H092 JA21 JB42 NA01 2H093 NA16 NC22 NC32 NC40 ND60 5C006 AA02 AB03 BB16 BC06 BC20 BF09 5C052 AA17 GA03 GE04 GF00 5C080 AA10 BB05 DD01 DD26 FF11 JJ02 JJ03 JJ04 JJ06 5C094 AA01 AA22 BA03 BA09 BA43 CA19 EA04 EA07

Claims (2)

[Claims] 1. A plurality of scanning lines and a plurality of signal lines arranged in a matrix, pixel electrodes arranged at intersections of these lines, and on / off control by a scanning signal supplied from the scanning lines. A first switch element for writing the video data supplied to the signal line to the pixel electrode when turned on,
A digital memory electrically connected to the pixel electrode and capable of holding video data supplied to the signal line; a second switch element for controlling conduction between the pixel electrode and the digital memory; and the digital memory. A first electrode substrate having a third switch element for controlling conduction with the second switch element; a second electrode substrate having a counter electrode arranged to face the pixel electrode; In a display device including a display layer sandwiched between a two-electrode substrate, a control signal for controlling conduction of the third switch element is a digital memory output control signal formed on the first electrode substrate. A display device characterized by being supplied from a line. 2. In the first display period, the conduction between the pixel electrode and the digital memory is turned off by the second switch element, while the conduction of the first switch element is turned on at a predetermined interval, and the signal line is turned on. Display is performed by writing the first video data supplied to the pixel electrode to the pixel electrode, and during the second display period, the conduction of the second switch element is turned on to display the second video data supplied to the signal line. After the data is held in the digital memory, the conduction between the signal line and the pixel electrode is turned off by the first switch element, and the second video data held in the digital memory is written in the pixel electrode for display. The method for driving a display device according to claim 1, wherein during the second display period, the second video data supplied to the signal line is turned on in the second switch element. Is held in the digital memory until the third switch element is turned off,
The method of driving a display device according to claim 1, wherein an electrical connection between the digital memory and the second switch element is cut off.