JP4754064B2 - Driving method of display device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a display device with high image quality and low power consumption used for a mobile phone, an electronic book, and the like, and more particularly to a method for driving a display device including a digital memory.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, liquid crystal display devices have been used as displays for small information terminals such as mobile phones and electronic books, taking advantage of light weight, thinness, and low power consumption. Since such a small information terminal generally employs a battery drive system, low power consumption is an important issue.
[0003]
In particular, mobile phones are required to be able to display with low power consumption during the standby time. For example, Japanese Patent Laid-Open No. 58-23091 can be cited as a technique for realizing this. The image display device disclosed herein includes a digital memory in a pixel, and operates only an AC driving circuit for AC driving a liquid crystal during standby (hereinafter, still image display). By stopping the peripheral drive circuit, the power consumption is greatly reduced.
[0004]
[Problems to be solved by the invention]
However, in the conventional liquid crystal display device having the digital memory as described above, even after switching from the still image display to the normal display, the video data at the time of still image display (hereinafter, still image data) remains in the digital memory. Therefore, when the still image display is performed next time, the still image data that was previously displayed is displayed until the writing of new still image data to the digital memory is completed. In this way, in a liquid crystal display device equipped with a conventional digital memory, when switching from normal image display to still image display, completely different still image data that was displayed last time is displayed for a moment. The person feels uncomfortable with the change in the image, and in some cases, the image is perceived as a disturbance of the image.
[0005]
An object of the present invention is to provide a driving method of a display device that can improve an image change at the time of display switching and obtain an excellent display quality even at the time of display switching.
[0006]
[Means for Solving the Problems]
In order to achieve the above object, the invention according to claim 1 is formed so as to face the pixel electrode, a first electrode substrate having a plurality of scanning lines, signal lines, pixel electrodes and a digital memory arranged in a matrix. For a display device comprising a second electrode substrate having a counter electrode formed and a display layer sandwiched between the two electrode substrates, the first signal supplied to the signal line in a normal display period In the still image display period, the second video data supplied to the signal line is held in the digital memory and the digital memory holds the second video data. a method of driving a display device for displaying by writing a second image data to the pixel electrode, when switching from the still image display period to the normal display period, to the plurality of digital memories, all black And wherein the binarized image data of all white, or to switch to the normal display period after holding the third image data of the same binarized image data for each of RGB colors To do.
[0007]
As a preferred mode, a digital memory reset period is set for one frame at the end of the still image display period, and the third video data is held in the plurality of digital memories within this period.
[0008]
According to a second aspect of the present invention, in the first aspect, the pixel electrode and the signal line are connected via a first switch element, and the pixel electrode and the digital memory are connected via a second switch element. In the normal display period, the first switch element is intermittently turned on and the second switch element is turned off. In the still image display period, the first switch element is turned off. The second switch element is turned on.
[0009]
According to a third aspect of the present invention, in the display according to the second aspect, the second switch element includes two switch elements that connect between the output terminal and the inverted output terminal of the digital memory and the pixel electrode. The device is characterized in that, during the still image display period, the two switch elements are alternately turned on and the polarity of the potential of the counter electrode is inverted in synchronization with the two switch elements.
[0011]
As a preferred mode, the pixel electrode is a light reflection type pixel electrode formed of a metal thin film.
[0012]
As a preferred mode, the digital memory is constituted by two inverter circuits and a third switch element, and the third switch element is a switch element having a channel opposite to that of the first switch element, The gate of the switch element is connected to the same scanning line as the gate of the first switch element.
[0013]
As a preferred mode, the third video data is the same binarized video data for each color of RGB.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, an embodiment in which the driving method of the display device according to the present invention is applied to the driving method of an active matrix liquid crystal display device provided with a digital memory will be described.
[0015]
FIG. 3 is a circuit configuration diagram of the active matrix liquid crystal display device according to this embodiment, and FIG. 4 is a schematic sectional view of FIG.
[0016]
The liquid crystal display device 100 includes a display pixel portion 110 in which a plurality of display pixels 10 are formed, a scanning line driving circuit 120, and a signal line driving circuit 130.
[0017]
In this embodiment, on the array substrate 101 (FIG. 4), a column in which the scanning line driving circuit 120 and the signal line driving circuit 130 are integrally formed with a signal line 11, a scanning line 12, a pixel electrode 13, and the like which will be described later. Although shown, the scanning line driving circuit 120 and the signal line driving circuit 130 may be arranged on an external driving substrate (not shown).
[0018]
In the display pixel unit 110, a plurality of signal lines 11 and a plurality of scanning lines 12 intersecting with the signal lines 11 are arranged on the array substrate 101 in a matrix form through an insulating film (not shown). The display pixel 10 is arranged in the area.
[0019]
The display pixel 10 includes a pixel electrode 13, a first switch element 14, a counter electrode 15, a liquid crystal layer 16, a second switch element 17, and a digital memory (hereinafter, DM) 18.
[0020]
In the display pixel 10, the source of the first switch element 14 is connected to the signal line 11, the gate is connected to the scanning line 12, and the drain is connected to the pixel electrode 13. The pixel electrode 13 is connected to the DM 18 via the second switch element 17. The gate of the second switch element 17 is connected to the control signal line 19, the source is connected to the pixel electrode 13, and the drain is connected to the DM 18. Has been. The configurations of the second switch element 17 and the DM 18 will be described later. Each pixel electrode 13 is connected to an auxiliary capacitor (not shown) electrically in parallel, and a capacitor Cs is formed between the auxiliary capacitor and the pixel electrode 13. In addition, two control signal lines 19 are arranged as 19a and 19b as will be described later, but in FIG. 3, the control signal line 19 is shown as one control signal line 19 for ease of explanation.
[0021]
The pixel electrode 13 is formed on the array substrate 101, and the counter electrode 15 opposite to the pixel electrode 13 is formed on the counter substrate 102 (FIG. 4). The counter electrode 15 is given a predetermined counter potential from a control IC arranged on an external drive substrate (not shown). For example, a liquid crystal layer 16 is sandwiched between the pixel electrode 13 and the counter electrode 15 as a display layer, and the periphery of the array substrate 101 and the counter substrate 102 is sealed with a sealing material 103.
[0022]
The scanning line driving circuit 120 includes a shift register 121, a buffer circuit (not shown), and the like, and a Y clock signal (vertical clock signal) and a Y start signal (vertical start signal) supplied as control signals from an external driving circuit (not shown). ), An on-level scanning signal is sequentially output to the scanning line 12 every horizontal scanning period.
[0023]
In the scanning line driving circuit 120, the control signal line 19 is turned off during halftone display or moving image display (hereinafter, normal display), and the scanning lines 12 are sequentially scanned from the top in the same manner as in a normal active matrix liquid crystal display device. Output a signal. At the time of still image display, all the scanning lines 12 are set to the off level and the control signal lines 19 are set to the on level. Note that a control signal may be directly input to the control signal line 19 from an external drive circuit (not shown) without going through the scanning line drive circuit 120.
[0024]
The signal line driving circuit 130 includes a shift register 131, an ASW (analog switch) 132, and the like. An X clock signal (horizontal clock signal) and an X start signal (horizontal start signal) are supplied as control signals from a control IC (not shown). At the same time, still image data or moving image data (video data during normal display) is also supplied from the control IC through the video bus 133. In the signal line driver circuit 130, on / off signals are supplied from the shift register 131 to the ASW 132 based on the X clock / X start signal, so that still image data or moving image data supplied from the video bus 133 is given timing. Then, the signal line 11 is sampled.
[0025]
Here, a basic operation in the case of driving as a normal active matrix liquid crystal display device will be briefly described.
[0026]
When an on-level scanning signal is output from the scanning line driving circuit 120, each scanning line 12 is scanned sequentially from the top every horizontal scanning period, and moving image data is sampled on the signal line 11 in synchronization with this, scanning is performed. All the first switch elements 14 connected to the scanning line 12 are turned on for one horizontal scanning period, and the moving image data sampled on the signal line 11 is written to the pixel electrode 13 through the first switch element 14. This moving image data is charged as a signal voltage between the pixel electrode 13 and the counter electrode 15 (and an auxiliary capacitor (not shown)), and the liquid crystal layer 16 responds according to the magnitude of the signal voltage, so that each display pixel 10 The amount of transmitted light is controlled. By performing such an operation for all the scanning lines 12 within one frame period, an image of one screen is completed.
[0027]
Next, the circuit configuration of the DM 18 and each switch element included in the display pixel 10 will be described.
[0028]
FIG. 2 is a circuit configuration diagram of the display pixel 10, and the same parts as those in FIG. 3 are denoted by the same reference numerals. The second switch element 17 includes two switch elements 21 and 22 inserted between the output terminal and inverted output terminal of the DM 18 and the pixel electrode 13. Among these, the gate of the switch element 21 is connected to the control signal line 19a, and the gate of the switch element 22 is connected to the control signal line 19b. The control signal line is turned on or off from the scanning line driving circuit 120. By supplying the level control signal, the two switch elements 21 and 22 are controlled independently. Both the second switch element 17 and the first switch element 14 are composed of MOS transistors.
[0029]
The DM 18 includes two inverter circuits 23 and 24 and a third switch element 25. Among these, the third switch element 25 is a switch element having a channel opposite to that of the first switch element 14, and is composed of a MOS transistor complementary to the first switch element 14. The gate of the third switch element 25 is connected to the same scanning line 12 as the gate of the first switch element 14.
[0030]
Next, the operation of the liquid crystal display device 100 configured as described above will be described with reference to a timing chart of signal waveforms shown in FIG.
[0031]
First, at the time of normal display, the two control signal lines 19a and 19b are both turned off, and the function of the second switch element 17 is stopped. During this period, an X / Y clock signal, a start signal, and moving image data are supplied to the scanning line driving circuit 120 and the signal line driving circuit 130, respectively, and driving is performed in the same manner as a normal active matrix liquid crystal display device. As a result, high-quality halftone / moving image display in full color is performed. The 1V period in the figure is one vertical scanning period, and an on-level scanning signal is output from the scanning line driving circuit 120 in synchronization with the Y start signal output every 1V period.
[0032]
On the other hand, when switching from the normal display to the still image display, the control signal line 19a is turned on (the control signal line 19b is turned off) in the last frame (still image writing period) of the transition from the normal display to the still image display. level). Then, while the first switch element 14 is turned on by the on-level scanning signal, the binarized still image data is sampled on the signal line 11, and this is sampled and the first switch element 14 and the switch element 21 are sampled. To DM18. This binarized still image data is video data for a multi-color image that is displayed when a still image is displayed.
[0033]
The video data written in the DM 18 can be held in this state for a short time, but if held for a long time, the liquid crystal layer 16 deteriorates due to a direct current component, and thus it is necessary to drive the video data. In this embodiment, in the still image display period, the control signal lines 19a and 19b are alternately turned on at regular intervals, whereby the switch elements 21 and 22 are alternately turned on, and at the same time, the potential of the corresponding electrode 15 ( AC driving is realized by inverting (not shown in FIG. 1).
[0034]
In this way, by alternately turning on the two switch elements 21 and 22, the high power / low power supply is alternately output as the potential of the pixel electrode 13, and the potential of the counter electrode 15 is set to the high power / By shifting between the low power sources, no voltage is applied to the liquid crystal layer 16 in the display pixel 10 having the same polarity as the counter electrode 15, and voltage is applied to the liquid crystal layer 16 in the display pixel 10 having the opposite polarity. Multi-color display). At this time, since only the low-frequency control signal line 19 and the counter electrode 15 are operating in the display pixel unit 110, multi-color display can be performed with low power consumption in the still image display period.
[0035]
Note that when the pixel electrode 13 is a light-reflective pixel electrode made of a metal thin film, a backlight is not necessary, and therefore driving with lower power consumption is possible compared to a transmissive configuration using a backlight. Is possible. Incidentally, when a still image was displayed at a frame frequency of 60 Hz on a liquid crystal panel with a diagonal of 5 cm and 250,000 pixels, the power consumption could be reduced to 5 mW.
[0036]
Next, when switching from still image display to normal display, the control signal line 19a is turned on in the digital memory reset period set for one frame at the end of the still image display period, as in the still image writing period ( The control signal line 19b is off level), while the first switch element 14 is turned on by the on-level scanning signal, all of one screen on the signal line 11 becomes all black display or all white display. The obtained video data (hereinafter, all black / white data) is sampled and written into the DM 18 through the first switch element 14 and the switch element 21. Here, the still image data previously written in the DM 18 is updated to all black / all white data.
[0037]
Subsequently, with the start of the normal display period, the two control signal lines 19a and 19b are both turned off again, and the X / Y clock signal, the start signal, and the scanning line driving circuit 120 and the signal line driving circuit 130 are respectively set. Supply video data.
[0038]
The all black / all white data written in the DM 18 in the previous digital memory reset period is held in the DM 18 until the next display is switched to the still image display. Here, in order to maintain the potential of the all black / all white data written in the DM 18, the charge may be written every certain time.
[0039]
When all black / all white data is written in the DM 18 as described above, when switching from normal display to still image display, new still image data is written to the DM 18 during the still image writing period. Until the writing is completed, the previously written all black / white data is displayed. The all-black / all-white data is displayed only during the still image writing period, and in the subsequent still image display period, multicolor display is performed using the newly written still image data.
[0040]
According to the driving method as described above, when switching from normal display to still image display, one screen is displayed in all black or all white, and the previous still image data is not displayed. Therefore, compared with the case where unrelated previous still image data is displayed at the time of display switching, the observer does not feel uncomfortable with the image change, and the image change at the time of display switching is recognized as an image disturbance. Therefore, excellent display quality can be obtained even when the display is switched.
[0041]
In the above embodiment, all black / all white data that has been binarized is written in all DMs 18 in the digital memory reset period, and all black or all white is displayed in the still image writing period. Alternatively, the same binarized video data may be written for each color of RGB, and color raster (striped pattern) display may be performed during the still image writing period.
[0042]
【The invention's effect】
As described above, according to the driving method of the display device according to the present invention, when the display is switched from the normal display to the still image display, the irrelevant previous still image data is not displayed. There is no sense of incongruity in the change in the image, and the change in the image at the time of switching the display is not recognized as a disturbance of the image, so that an excellent display quality can be obtained even at the time of switching the display.
[Brief description of the drawings]
FIG. 1 is a signal waveform timing chart showing the operation of a liquid crystal display device.
FIG. 2 is a circuit configuration diagram of a display pixel.
FIG. 3 is a circuit configuration diagram of an active matrix liquid crystal display device according to the embodiment.
4 is a schematic sectional view of FIG. 3;
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 10 ... Display pixel, 11 ... Signal line, 12 ... Signal line, 13 ... Pixel electrode, 14 ... 1st switch element, 15 ... Counter electrode, 17 ... 2nd switch element, 18 ... Digital memory (DM), 19 ... Control signal lines, 21, 22 ... Switch elements, 23, 24 ... Inverter circuit, 25 ... Third switch element, 110 ... Display pixel unit, 120 ... Scan line drive circuit, 130 ... Signal line drive circuit

Claims (3)

A first electrode substrate having a plurality of scanning lines, signal lines, pixel electrodes, and a digital memory arranged in a matrix; a second electrode substrate having a counter electrode formed to face the pixel electrodes; For a display device including a display layer sandwiched between two electrode substrates, display is performed by writing the first video data supplied to the signal line to the pixel electrode in a normal display period. In the still image display period, the second video data supplied to the signal line is held in the digital memory, and the second video data held in the digital memory is written to the pixel electrode for display. In a display device driving method to be performed,
When switching from the still image display period to the normal display period, the plurality of digital memories are binarized video data of all black or all white, or the same binarized for each color of RGB. A method for driving a display device, characterized by switching to the normal display period after holding third video data as video data. For the display device in which the pixel electrode and the signal line are connected via a first switch element, and the pixel electrode and the digital memory are connected via a second switch element,
In the normal display period, the first switch element is intermittently turned on and the second switch element is turned off. In the still image display period, the first switch element is turned off and the second switch element is turned on. The method for driving a display device according to claim 1, wherein: For the display device in which the second switch element is composed of two switch elements that connect between the output terminal and the inverted output terminal of the digital memory and the pixel electrode,
3. The method of driving a display device according to claim 2, wherein the two switch elements are alternately turned on during the still image display period, and the polarity of the potential of the counter electrode is inverted in synchronization with the two switch elements. .

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