JP2003047729A - Game machine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make displaying processing of pattern variation look like performing it above a discriminating information switching and displaying processability. SOLUTION: A CPU 80 receives image displaying command data from a main control circuit and renews and stores them in an RAM 86 and transmits displaying and controlling data to a VDP 82. The VDP 82 reads out image data to be displayed on an LCD 91 from an ROM 83 for the image data based on the received displaying and controlling data and designates coordinates on a displaying region so as to display them at a specified position of the LDC 91 and temporarily stores them in a VRAM 84. When all the image data to be displayed by the LDC 91 are stored in the VRAM 84 from the ROM 83 for the image data, a VDP 82 reads out the image data stored in the VRAM 84 with transmission of a vertical synchronous signal to the LCD 91 as a turning point and they are converted to an RGB analogue signal by means of a D/A converter 89 and are transmitted to the LCD 91 and a pattern image is displayed on the LCD 91.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a gaming machine such as a pachinko gaming machine, a coin gaming machine, a slot machine or the like having a variable display device having a variable display section for changing and displaying identification information.

[0002]

2. Description of the Related Art Among currently popular slot machines and pachinko game machines, for example, in a pachinko game machine, a player plays a game ball in a game area on a game board provided with various winning holes and obstacle nails. A predetermined number of prize balls by hitting (obtaining) the game balls that have fallen into the winning area while changing the course of the hit game balls hitting obstacle nails etc. The game is played under the mechanism that is paid out.

Pachinko gaming machines in which games are played by such a mechanism are roughly classified into the first type (so-called fever type) and the second type (so-called airplane type) depending on the specifications of the pachinko gaming machine and the difference in the gaming state produced. ) Etc. These pachinko gaming machines are provided with various devices for producing their gaming states, and these devices operate under complicated control to provide various gaming states to the player. Is made.

Among these pachinko gaming machines, the first class pachinko gaming machine is equipped with a variable display device, and this variable display device is usually mounted on the gaming board or on the main body of the pachinko gaming machine. It is composed of a drum device and a liquid crystal display device. The variable display has letters, numbers,
A variable display unit for displaying identification information (design information) such as figures and patterns is provided. By changing (changing) the identification information in various modes, stopping and displaying it on the variable display unit, display is made. It is possible to inform the player whether or not the identified information has become a predetermined combination.

For example, with such a variable display device, when a predetermined condition is satisfied, a variation (design variation) of the identification information determined to display a so-called “win” or “miss” is started, and then this design A display control circuit for stopping the fluctuation and displaying the variable display portion of the variable display device, and displaying a combination (for example, “777”) of identification information forming a special prize mode on the variable display device, 2. Description of the Related Art There is known a gaming machine that causes a player to play a special game with a high profit (produces a special game state).

In this type of gaming machine, usually, the display of the identification information on the variable display device becomes monotonous, and in order to prevent the player from getting tired of the game, a plurality of symbol variations displayed on the variable display portion are prevented. Of these, the combination of the identification information (stop identification information) displayed by the other symbol variations except the identification information displayed by the symbol variation that stops at the end is a combination that may form the special prize mode. When it becomes (so-called "reach state"), the symbol variation stop process for reach different from the symbol variation stop process (display process from symbol variation to stop) of the stop identification information that has already been stopped and displayed It has been devised so that it will not be overwhelming with interest. For this reason, it is general to prepare a plurality of types of fluctuation patterns having different fluctuation speeds, fluctuation times, etc. of the symbol fluctuations for the identification information to be displayed on the variable display device. It should be noted that displaying the identification information on the variable display device is
It is often a display control circuit of a display control unit that performs overall display control.

[0007]

However, for example, when the cycle of the basic operation clock of the display control circuit for performing display control for each processing unit (sequence) and the switching display cycle of the symbol variation of the variable display device are different, A deviation occurs in the pattern variation display processing, and for example, the cycle of the operation clock of the display control circuit is 2 ms (milliseconds) and the switching display cycle of the variable display device is 1/60 sec (seconds) (≈16.666 ... m
s), the processing capability of the display control circuit is dragged (affected) by the switching display cycle (speed) of the variable display device,
It will not be able to exert sufficient processing capacity that it should be able to exert. In other words, since the switching display process at the time of the variable display of the variable display device is performed in accordance with the switching display cycle, the variable display is performed in accordance with the processing capability and the processing unit of the display control circuit. It cannot be performed in a state where the display processing capacity of the device is exceeded, and no matter how the processing capacity of the display control circuit is increased, it is possible to speed up the display speed of the symbol fluctuation based on the display performance (switching display cycle) of the variable display device. There is a problem that there is. Further, in most gaming machines, as described above, since the cycle of the operation clock of the display control circuit and the switching display cycle of the variable display device are different, it is difficult to synchronize the display processing of both. There are also facts.

The present invention has been made in an attempt to solve such a problem, and seems to perform the display processing of the symbol variation at a display speed higher than the switching display processing capacity of the identification information of the variable display device. It is an object of the present invention to provide a game machine that can be disguised as.

[0009]

A gaming machine according to the present invention (see, for example, 1 in FIG. 1) has a variable display section (31), which is displayed on the variable display section based on the gaming state of the gaming machine. A variable display device (3) for variably displaying the identification information (for example, the symbols displayed in 19a to 19c in FIG. 1) to be displayed.
0), the game machine further includes display control means (for example, see 63 in FIG. 3) for controlling the display state of the identification information displayed on the variable display section, and the display control means includes the identification information. In the variable display from the first identification information to the second identification information (for example, the display in which one symbol “0” displayed in 19a of FIG. 1 changes to another symbol “1”), Each display pattern data forming a series of variation pattern data displayed on the variable display portion and indicating identification information that changes in time series (for example, each image data for displaying the frame image shown in FIG. 10 on the variable display device 30. (These are stored in the ROM 83 for image data shown in FIG. 3) are sequentially transmitted to the variable display device for a predetermined number of times every predetermined time, thereby performing the variable display of the identification information at the predetermined variable speed. In addition, by setting the number of times of transmission of the display pattern data to be transmitted to the variable display device to a number smaller than the predetermined number of times, the second identification information is changed from the first identification information at a change rate faster than the predetermined change rate. The feature is that variable display is performed on the identification information.

According to the present invention, the display control means causes the variable display device to send each display pattern data forming a series of variation pattern data which is displayed on the variable display section and which shows identification information which changes in time series. In addition to performing variable display of identification information at a predetermined fluctuating speed by sequentially transmitting a predetermined number of times (for example, low-speed symbol fluctuation), the number of times of transmitting display pattern data to the variable display device is a predetermined number at a predetermined fluctuating speed By setting the number of times smaller than that, the fluctuation display is performed at a fluctuation speed faster than a predetermined fluctuation speed. Therefore, it is possible to perform the display processing of the pattern variation at high speed as quickly as if the display processing capability of the variable display device is improved, and the variation display of the identification information is performed at the display speed higher than the display processing capability of the variable display device. It will be possible to pretend to be going.

When the display control means performs variable display from the first identification information of the identification information to the second identification information, the number of times the display pattern data is transmitted to the variable display device is determined. The identification information may be variably displayed and controlled at two or more different changing speeds that are different from the predetermined changing speed. By doing so, it is possible to further improve the versatility of the design of the display program, because the variation display of the identification information can be further prevented from being restricted by the switching display cycle (speed) of the variable display device. is there.

Further, the game machine further comprises game control means (for example, refer to 71 in FIG. 2) for integrally controlling the entire game machine, and the display control means is a basic operation clock of the game control means. The minimum common multiple cycle of the cycle and the switching display cycle of the variable display of the variable display device is the synchronization time, and this synchronization time or an integral multiple thereof is set as the unit time, and a series of variation pattern data that can be displayed in the unit time. It is desirable to have a variable speed determining means (for example, refer to 80 in FIG. 3) that sets the number and determines the variable display speed. This is because it is possible to freely change the variable display speed of the identification information.

In this case, the display control means can display on the variable display device per the unit time in the case of performing the variable display of the identification information based on the variation speed determined by the variation speed determination means. An image in which transmission of a predetermined number of display pattern data out of the display pattern data to be transmitted to the variable display device is omitted when performing switching display of each display pattern data forming the series of variation pattern data more than the number of switching display times Thinning means (8
0) is desirable. This makes it possible to make it appear as if the variable display of the identification information is being performed at a display speed higher than the switching display processing capability of the variable display device.

The display control means sets a counter update value (for example, shown in FIG. 10) according to the number of series of fluctuation pattern data which can be displayed per unit time, which is determined by the fluctuation speed determining means. Offset counter addition value) and a counter for updating the value within a preset range based on the set counter update value for each switching display cycle (for example, a range of 0 to 89 shown in FIG. 4) A display image code (for example, shown in FIG. 10) for specifying each display pattern data transmitted to the variable display device, and a value in the same range as the counter. A variation pattern data table (for example, 1 in FIG. 10) that correlates with an offset value (for example, the one illustrated in FIG. 10) that is set.
00)), the counter value read from the counter and the offset value are compared and collated, and predetermined display pattern data based on the display image code associated with the offset value is sent to the variable display device. It is desirable to further include an image selecting means (80) for transmitting.

The image selecting means associates each of the offset values with a predetermined number of integer values as a reference range with the display image code of each display pattern data, and a surplus is generated in the offset value. In this case, this surplus is given by a predetermined display image code (for example, the image code “03” corresponding to the frame number 4 shown in FIG. 10 or FIG. 16).
In addition to the integer value associated with the image code “00” corresponding to the frame number 1 shown in FIG. 2), the numerical value obtained as a result of addition may be associated with the reference range of the predetermined display image code. good. In this case, it is preferable that the image selection means associates the predetermined display image code with the minimum offset value. This is because the display pattern data can be easily managed.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the accompanying drawings. In this example,
A pachinko gaming machine will be described as an example of the gaming machine. First,
The configuration of the entire pachinko gaming machine will be described. Figure 1
It is a front view showing a pachinko gaming machine according to an embodiment of the present invention. The pachinko gaming machine 1 is a machine frame 2 installed in, for example, a pachinko machine, which plays a role of a guide when attaching to a so-called island facility and the like, and is fitted and mounted in the frame of the machine frame 2. The gaming board 3 and the various devices and units for driving the pachinko gaming machine 1, a back mechanism plate (not shown) to which various wirings are attached, and the like. Of these, for example, game board 3
Is directly attached to the inner frame 5 attached to the machine frame 2 by the upper hinge 4a and the lower hinge 4b, and further, the openable and closable glass frame 15 mounted with, for example, transparent glass is attached to the inner frame 5. Thus, the front side of the game board 3 is covered with transparent glass or the like to be protected.

The pachinko gaming machine 1 includes a gaming board 3 having various winning structures, obstacle nails, and other structures described later on the board.
It has a position slightly closer to the upper center of the front face, and at the lower part of this game board 3, while receiving a prize ball discharged through a prize ball payout device and a prize ball gutter (not shown) attached to the back surface of the pachinko game machine 1. A first tray (upper plate) 6 for supplying a game ball to a game ball launching device described later is attached to a mounting plate 7. A sound emission port 8 that is opened to emit a sound is provided in the lower portion of the upper plate 6, and a sound output unit that outputs a sound such as a sound effect is provided on the back side of the sound emission port 8. A speaker 10 forming a part thereof is built in, and further, at a lower portion of the speaker 10, a second tray (lower plate) for receiving and storing prize balls (gaming balls) overflowing from the upper plate 6. 9 are provided. The prize balls (gaming balls) stored in the lower plate 9 can be discharged below the lower plate 9 by an operation lever 9b provided in the center front of the lower part of the lower plate 9.

On the other hand, on the right side of the lower plate 9, the game balls supplied from the upper plate 6 are provided in the game area 20 on the game board 3.
A game ball launching operation unit 11 forming a part of the game ball launching means to be launched is provided, and on the back side of this game ball launching operation unit 11, the player inputs to the game ball launching operation unit 11. A game ball launching device (not shown) for actually launching the game ball supplied from the upper plate 6 into the game area 20 in accordance with the change in the rotation operation angle accompanying is attached. Thus, the upper plate 6 and this game ball launching device are connected inside the pachinko gaming machine 1 via a game ball sending mechanism (not shown), and are stored in the upper plate 6 by this game ball sending mechanism. The game ball has a mechanism for being supplied to the game ball launching device.

In addition, in a part of the game ball launching operation section 11,
For example, a push-type stop switch 12 is provided,
Push this stop switch 12 to turn it on (O
By setting the state N), it is possible to temporarily stop the firing of the game ball even during the rotation operation of the game ball firing operation unit 11. In addition, the game ball launching operation unit 11 has a touch sensor and a launch switch (not shown) built therein, and this touch sensor operates the game ball launching operation unit 11 when the player is actually playing a game. Be present (for example,
When it does not sense that it is touching the game ball launching operation unit 11, the launch switch is turned off, and the launch of the game ball from the game ball launching device is temporarily stopped. Accordingly, after the player rotationally operates the game ball firing operation unit 11, the player has a structure capable of effectively preventing so-called unmanned hitting, in which the player leaves the game table while being fixed at a predetermined launch position. ing.

The inner frame 5 around the game board 3 of the pachinko gaming machine 1 is provided with a key hole 13 on the right side for unlocking the lock for locking the inner frame 5 to the machine frame 2. , An upper frame lamp 14c is arranged on the upper side, a left frame lamp 14a is arranged on the left side, and a right frame lamp 14b is arranged on the right side. These frame lamps 14a to 14c make it possible to clearly display various game states such as "hit" and "big hit" during the game. Further, an upper left front plate lamp 16a is arranged on the upper left side of the glass frame 15, and an upper right front plate lamp 16b is arranged on the upper right side thereof, and a lower left lamp 17a is arranged on the lower left side of the lower part of the game board 3. A lower right lamp 17b is provided on the lower right side, and various left and right upper front plate lamps 16a, 16b and lower left and right lamps 17a, 17b are used to display various game states and the like like the frame lamps 14a to 14c. It has a structure that allows it.

On the other hand, the game board 3 is made of, for example, a plate material having a predetermined thickness, and various structures such as winning holes and guide rails 21 are arranged on the game board 3. A game area 20 is formed. Guide rail 21
Forms a guide ball path 22 for guiding the game ball launched from the game ball launching device into the game area 20 by a normal game operation, and passes along the guide ball path 22 along the guide rail 21 to play the game. A limit step 23 is formed in the upper right portion of the game board 3 for limiting the progress of the game ball that is driven into the area 20 at a predetermined position within the game area 20. A repulsive rubber 24 for repelling a game ball hit in the game area 20 toward the center of the game area 20 is attached to the restricted step portion 23 via a restricted step portion shaft 25.

A variable display device 30 is arranged near the center of the game board 3, and the variable display device 3 is provided.
Reference numeral 0 denotes a variable display portion 31 formed of, for example, a liquid crystal display for variably displaying a plurality of types of symbols, and a movable start winning opening (hereinafter referred to as “starting opening”) 27, which will be described later. Left and right ordinary symbol display LEDs 3 for displaying a lottery result by an internal determination process regarding whether or not the piece 38 is driven
3 and 34 are provided. In this example, the variable display section 31 has three symbol display areas 19a and 19 horizontally divided into, for example, "left", "middle", and "right".
b, 19c are provided, and these symbol display areas 19a-
The identification information is displayed on 19c in a predetermined variation mode (stereoscopic horizontal rotation display, etc.). For example, in FIG.
“0” is displayed in the “left” symbol display area 19a, “1” is displayed in the “middle” symbol display area 19c, and “6” is displayed in the “right” symbol display area 19b by three-dimensional lateral rotation variation. ing. In these symbol display areas 19a to 19c, different symbols or symbols that are combined into one are displayed, or a character image that produces the game state in a so-called "big hit" game state is stereoscopically displayed. It is possible to do so (hereinafter, the identification information such as the symbols displayed in these symbol display areas 19a to 19c will be collectively referred to as "symbols").

On both left and right sides of the variable display device 30,
Left and right warp path entrances 34, 35 for guiding the game balls are formed, and the game balls entering these left and right warp path entrances 34, 35 cannot be confirmed from the front side of the pachinko gaming machine 1, for example, a warp path (not shown). ) And is discharged from the game ball outlet 26. Since the starting opening 27 is arranged at the lower part of the game ball outlet 26, the game balls passing through the warp passage are won in the starting opening 27 more than the game balls passing through other routes in the game area 20. It is designed to be easy to do. Further, on both sides of the variable display device 30, passage chuckers 28a and 28b having gate switches (not shown) for detecting passage of the game balls are provided, and the gate switches of these passage chuckers 28a and 28b pass the game balls. When detecting the, a main control unit (not shown) for integrally controlling the entire gaming machine mounted on the pachinko gaming machine 1.
Left and right ordinary symbol display LEDs 32, with respect to a display control unit (not shown) that controls the display of symbols on the variable display device 30.
The display control command 33 is transmitted.

When the display control unit receives the display control command from the main control unit, the left and right ordinary symbol display LEDs 32, 3
3 is controlled to be alternately turned on, and when the lottery result (internal determination result) of the main control unit is “win”,
For example, the left normal symbol display LED 32 is turned on to indicate to the player or the like that "hit". On the contrary, if the lottery result is "miss", for example, the right ordinary symbol display LED 33 is turned on to display that "miss". Such a display can be expected to facilitate the identification of the player's “hit” or “miss”. When the lottery result by the main control unit is “win”, the main control unit drives a starting opening solenoid (not shown) to operate the movable piece 38 of the starting opening 27,
The control is performed so that the starting opening 27 is opened for a predetermined time (for example, 0.5 seconds), and a gaming state in which a game ball is easily won in the starting opening 27 is produced. From these things, a certain game ball passes through the checkers 28a, 28b.
If a game situation in which other game balls are discharged from the game ball discharge port 26 is established when passing, the game ball is most likely to win the starting hole 27 in which the movable piece 38 is open. It can be said that the state can be produced.

The game ball that has won the starting opening 27 is guided to the back side of the game board 3 as a prize ball and detected by a start winning switch (not shown). A special electric accessory 40 is disposed below the starting opening 27, and the special electric accessory 40 is a so-called "big hit" by a special winning opening solenoid (not shown) provided on the back side of the game board 3. The opening / closing plate 42 of the special winning opening 41 that is opened only in the game state is provided, and the game ball winning the big winning opening 41 is detected as the big winning opening winning ball by a big winning opening count switch (not shown). To be done. Of the special winning opening winning balls that have won the special winning opening 41, those that have passed through a specific area (not shown) arranged in the special winning opening 41 are detected by a specific area detection switch (not shown). . When the special area detection switch detects that the special winning opening winning ball has passed through the specific area, a so-called round repeating condition is satisfied, and the main control unit performs one round (a series of special winning opening 41).
After the (opening / closing operation of) is completed, the repetitive continuation control process of executing the next round again is executed.

Left and right big winning hole LEDs 43a and 43b are provided on both sides of the special winning hole 41 of the special electric accessory 40, lower big winning hole LEDs 43c are provided on the lower side, and an upper part is provided on the upper part of the variable display device 30. A prize hole 44 is provided, and left and right windmill lamps 45a, 45 are provided on both sides of the upper prize hole 44.
Left and right windmills 46a and 46b having b are arranged respectively. Also, below the upper prize hole 44, the left and right center LEDs 47a and 47b and the center center LED 47c are provided.
Are provided respectively. Central center LED 47c
On the lower side, there is provided a winning storage LED section 48 including four winning storage LEDs for displaying the number of winning balls won in the starting opening 27.

In this pachinko gaming machine 1, for example, each time there is a winning in the starting opening 27, the winning memory LE is set with an upper limit of four.
The player etc. are increased by increasing the lit prize memory LEDs of the D section 48 one by one and decreasing the lit prize memory LEDs by one each time the variable display of the symbols on the variable display unit 31 is started. The number of winning balls is displayed against. Left and right side lamps 49a and 49b are provided on both sides of the game area 20, and left and right illuminations LE are provided on both sides of the starting opening 27.
Left and right lower stage winning openings 51a, 51 having D50a, 50b
b is provided. In addition, in the game area 20 configured as described above, a plurality of obstacle nails (not shown) are driven together with the above-mentioned components, and form a complicated falling path of the game ball. Further, the game balls that have not won any of the winning openings provided in the game board 3 are absorbed in the game ball discharging opening (out opening) 52.

The standard game operation in the pachinko gaming machine 1 configured as described above is as follows. That is, the player operates the game ball launching operation unit 11 and the launch ball (game ball) launched from the game ball launching device is the guide ball path 2
It enters into the game area 20 through 2 and falls in the game area 20. When the game ball falls, a passing chucker 28a
When passage is detected by the gate switch through (28b), the left and right normal symbol display LEDs 32 and 33 are alternately turned on. In addition, when the game ball wins the starting opening 27 and the winning is detected by the starting winning switch, the variable display device 3
If the variable display portion 31 of 0 is in a state where variable display of the symbol is possible, the symbol displayed on the variable display portion 31 starts to change. On the other hand, if the variable display portion 31 is in a state in which variable display of symbols is impossible, one winning storage LED of the winning storage LED portion 48 is turned on, and one internal winning storage is increased (the winning storage LED must be turned on. For example, increase only the internal winning memory by 1). When the symbol displayed on the variable display unit 31 matches a preset combination of the conditions for the occurrence of the "big hit" game state, and the result of the internal determination processing in the main control unit indicates the "big hit" game state. When the condition for producing is satisfied, the "big hit" game state is produced.

When the production of the "big hit" game state is started, for example, the opening / closing plate 42 of the special winning opening 41 elapses for a predetermined time (for example, 30 seconds), or the special winning opening 4
The number of special winning hole count switches in 1 is a predetermined number (for example,
It is in an open state until it detects (10) winning balls. When the game ball enters the specific area within the special winning opening 41 and is detected by the specific area detection switch while the opening / closing plate 42 is open, it is determined that the "big hit" game state is continued, and the opening / closing plate 4 is opened.
After 2 is closed, a continuous control process of opening again is performed. A series of "big hits" from opening to closing of the opening / closing plate 42
When the gaming state is "1 round", the continuation of the "big hit" gaming state is performed, for example, up to 16 rounds. In addition, during the continuation of the "big hit" game state, if the specific area detection switch does not detect a winning in the particular area, the "big hit" game state ends in the round. In addition, the symbol displayed on the variable display section 31 is
For example, when it coincides with the design of the combination that is the condition for the occurrence of the "big hit" gaming state with so-called probability variation, and the result of the internal determination processing in the main control section directs the "big hit" gaming state with this probability variation. When the conditions are met, the probability that the next "big hit" game state will be higher than usual,
A more advantageous game state is produced for the player.

Next, the configuration of the control device of the pachinko gaming machine 1 will be described. FIG. 2 is a block diagram showing an electrical configuration of the pachinko gaming machine 1. The winning of the game balls into the respective winning openings 60 provided on the game board 3 includes a winning switch (including a starting winning switch, a special winning opening count switch, a specific area detecting switch, etc.) provided within each winning opening 60. The winning signal from the winning switch 61 is detected by the CPU 61, and the CPU (Central Processi) provided in the main control circuit 72 in the main control board 71 constituting the main control unit.
ng Unit) 73. The CPU 73 that has received the winning signal from the winning switch 61 is a ROM (Read Only).
Memory) 75 reads the control data of the pachinko gaming machine 1 stored in advance, and this winning signal is displayed on the variable display device 3
It is determined whether or not the prize has been won in the starting opening 27 in order to start the fluctuation of the symbol displayed on the variable display section 31 of 0.

If this winning signal is due to winning in a winning opening other than the starting opening 27, the CPU 73 sends a prize ball payout control command to the payout control unit 62, and receives the prize ball payout control command. The payout device (motor) until the control unit 62 reaches the number corresponding to the number of prize balls paid out from the CPU 73.
69 is driven and the prize balls are paid out. On the other hand, if the winning signal is due to the winning of the starting opening 27, the CPU
73 performs an internal determination process of the "big hit" lottery, determines a pattern to be displayed on the variable display device 30 and a variation pattern that determines the variation display speed based on the determination result (lottery result), and based on this determination Each symbol display area 19a of the variable display unit 31 is transmitted to the display control unit 63 which transmits the display control command to the display control unit 63 and receives this display control command.
The symbols displayed in 19c are changed, and the variable display device 30 is caused to perform variable display and stop display of the symbols.

By the winning of the starting opening 27, the CPU 73
However, if you generate a so-called "big hit" gaming state,
In the variable display device 30, the symbols displayed in the variable display section 31 are displayed so as to satisfy certain conditions after being changed (for example, “7” is displayed in each of the symbol display areas 19a to 19c, and the final display is performed). Stop the fluctuation of the symbol so that "777" is stopped and displayed. When the "big hit" game state occurs, the CPU 73 transmits an opening / closing control command for the opening / closing plate 42 of the special winning opening 41 to the special winning opening control unit 68 after the fluctuation of the symbol displayed on the variable display unit 31 is stopped, Upon receiving the opening / closing control command, the special winning opening control unit 68 causes the special winning opening opening / closing device 67 having the special winning opening solenoid to open / close the opening / closing plate 42 a predetermined number of times.
The payout control unit 62 drives the motor 69 based on the number of winning balls to the special winning opening 41 transmitted from the CPU 73 to execute a payout operation of a predetermined number of winning balls.

The CPU 73 also sends a lamp control command to a lamp control unit 66, which will be described later, in association with such a game state, and the lamp control unit 66 that has received the lamp control command sends the lamp control command to the front side of the pachinko gaming machine 1. The various lamps (lamps, LEDs, etc.) 65 attached to the lamp are turned on / off, the voice control command is transmitted to the voice control unit 64, and the voice control unit 64 receives the voice control command.
The speaker 10 attached to the lower part of the upper plate 6 described above.
Various game states (such as a specific game state and a normal game state) are produced by outputting a predetermined sound effect from the.

A RAM (Random Access Memory) 74 is
It is used as a sequential storage device for the award ball number information from the CPU 73, operation data from various devices and parts, and also as a temporary calculation work area in the calculation processing of the CPU 73. The selection circuit 76 functions as an operation designating unit that designates a circuit to be operated, and the CPU 7
3 decodes the address signal based on the information from 3 and selects an I / O port such as a circuit that permits the transmission of a command signal, and outputs a selection signal to output a control command from the CPU 73. Select and operate the equipment required for the occasional operation. The oscillation control circuit 77 outputs the oscillation pulse input from the crystal oscillator 78 to the CPU 73 as a clock pulse having a predetermined time width, and the output clock pulse determines the operation speed of the CPU 73. The power supply circuit 79 appropriately distributes and supplies the power from the power supply 70 to each device and the like. The display control unit 63, the voice control unit 64, the lamp control unit 66, and the payout control unit 62 are
It may be mounted on the same board as the main control board 71, or may be mounted on a sub-control board (not shown) independent of the main control board 71.

Next, the display control unit 63 of each device and each unit in the pachinko gaming machine 1 configured as described above will be described. FIG. 3 is a block diagram showing an internal configuration of the display control unit 63. As shown in FIG.
Is a CPU 80 that mainly controls the entire display control unit, a display control ROM 81 of a storage device, and a VDP (Video Display Processor) 82 that generates an image display signal of a symbol,
An image data ROM 83 in which data relating to the symbols to be displayed (display pattern data for the symbols, etc.) is stored;
VRAM (Video RAM) 8 serving as a work area of the VDP 82
4 and the pulse signal of constant frequency at all times is sent to the CPU 80 and VD
It is composed of crystal oscillators 85a and 85b for transmitting to P82. When the CPU 80 receives the display control command data from the CPU 73 of the main control circuit 72 of the main control board 71, the CPU 80 analyzes the received display control command data, and displays the display control program based on this on the display control ROM 81.
Read from the VDP 82, execute the VDP 82, and send, for example, an address signal, a data signal, and a control signal to the VDP 82.
Various kinds of data are transmitted to and received from the display control unit 82, and the display control unit 63 is wholly and centrally controlled in order to generate the image display signal of the symbol displayed on the variable display unit 31 of the variable display device 30.

The CPU 80 includes a RAM 86 as a volatile storage device and a clock frequency dividing circuit 8 as a clock circuit.
7 is built in. The RAM 86 is used as a temporary storage area in the arithmetic processing process of the CPU 80, while updating and storing work data necessary for the CPU 80 to display a design or the like based on the received display control command data. The clock frequency dividing circuit 87 receives the pulse signal output from the crystal oscillator 85a, counts it, and determines a calculation processing speed of the CPU 80. A CPU clock pulse, a system clock pulse for executing a program from the beginning, and a data Machine cycle clock pulses for timing external input / output are generated at predetermined intervals.

The display control ROM 81 of the non-volatile storage device stores display control program data for the CPU 80 to display a pattern and the like, and the image data ROM 83 displays the variable display section 31. Image data of the design (display pattern data, etc.) is stored. The VRAM 84 is a type of DRAM (Dynamic Random Access Memory) that has been improved for graphics, and is 2 or more so that the writing of image data from the VDP 82 and the display of image data on the variable display unit 31 can be performed at the same time. It is a graphics memory with input / output channels. The VRAM 84 collectively manages a plurality of image data read from the image data ROM 83 by the VDP 82 and processed into a predetermined state.

The variable display section 31 for displaying the image data from the VDP 82 is an LCD (Liquid Crystal D) in this example.
isplay) 91. This LCD 91
Receives an RGB analog signal as an image display signal for displaying the image data output from the VDP 82,
By scanning based on this RGB analog signal, a pattern or the like is displayed. In addition to this, the variable display unit 31 includes a CRT (Cathode Ray Tube), a dot matrix display, an LED (Light Emitting Diode), a 7-segment LED, and an ELD (Electro Luminescence Display).
And a display device such as a fluorescent display tube can be used.

On the other hand, when the VDP 82 receives the display control data for displaying the symbol from the CPU 80, the VDP 82 performs a process of displaying the image data on the variable display section 31 based on the display control data. Note that the display control data transmitted from the CPU 80 includes an image code that is address data for reading out predetermined image data (variation pattern data, display pattern data, etc.) from the image data ROM 83. . The VDP 82 includes an image calculation unit 8
8, a D / A converter 89, and a sync signal timing controller 90. Image calculation unit 88
Reads the image data to be displayed on the variable display section 31 from the image data ROM 83 based on the image code of the display control data received from the CPU 80, converts the read image data into image map data, and stores it in the VRAM 84. . It should be noted that the image calculation unit 88 uses the variable display device 30.
When the image to be displayed is enlarged / reduced, inverted, or rotated, the image data is processed based on the parameters included in the display control data transmitted from the CPU 80. The D / A converter 89 reads the image map data stored in the VRAM 84, and displays the read image map data on the variable display unit 31 in order to display RG.
B converted into analog signal and output.

The sync signal timing controller 90
The pulse signal is received from the crystal oscillator 85b, and VDP82
The VDP clock pulse that determines the arithmetic processing speed of is generated. In addition, the LCD 91 of the variable display unit 31
Send the vertical sync signal (generated every 1/60 seconds),
An interrupt enable signal for requesting the transmission of display control data is sent to the CPU 80. LCD 91 of variable display section 31
Displays a symbol by performing scanning when the vertical synchronizing signal is input from the synchronizing signal timing controller 90, for example. Further, when the vertical synchronizing signal is input again after 1/60 seconds, the LCD 91 updates the currently displayed symbol and displays the symbol to be displayed next. This allows
The LCD 91 will update the pattern 60 times per second to display a symbol, and the VDP 82 will transmit an interrupt permission signal to the CPU 80 upon the transmission of the vertical synchronizing signal to the variable display section 31.

The RAM 86 built in the CPU 80
The work area built in is constructed as shown in FIG. That is, as shown in the figure, the work area includes a command reception control area, a symbol display control area, and a data storage area. The command reception control area is an area for storing the display control command data received from the CPU 73 of the main control circuit 72. The symbol display control area is divided into "left symbol", "middle symbol" and "right symbol" areas corresponding to the symbol display areas 19a to 19c of the variable display section 31, and display control is performed for each symbol area. The code, display control timer, symbol number, offset counter, and offset counter addition value are stored. The display control code determines the variation mode of the symbol, and the display control timer measures the switching timing of the display control code. In this example, the symbol number stores the symbol numbers ([00H] to [09H]) of the numbers (“0” to “9”) displayed on the LCD 91 of the variable display unit 31,
When the offset counter is carried up, this symbol number is +
1 (+ 01H). When the symbol number is [09H] and there is a carry in the offset counter, the symbol number [00H] is set. The offset counter is
In this example, the value is added and updated in the range of 0 to 89, and the display pattern of the symbol displayed on the LCD 91 of the variable display unit 31 is determined based on the symbol number and the offset counter value. The offset counter addition value determines the value to be added to the offset counter, and the value stored in the offset counter addition value changes depending on the display control code. In the data storage area, the variable display unit 31
The LCD 91 stores the data necessary for displaying the symbols.

The image data stored in the image data ROM 83 is configured as shown in FIG. That is, in this example, each symbol (symbol number [00
H] to [09H]) are each display pattern ([00H] to [0FH]) of the symbol divided into 16 parts.

Next, the symbol display control of the pachinko gaming machine 1 configured as described above will be described. Display control unit 63
CPU 80 is a main control circuit 7 that controls the operation of the entire gaming machine.
When the command data relating to the symbol display is received from the CPU 73 of 2, the data necessary for displaying the symbol on the LCD 91 of the variable display unit 31 is updated and stored in the RAM 86 at any time,
VDP8 based on the data stored in RAM86
Display control data for displaying a predetermined display pattern is transmitted to 2. Upon receiving the display control data from the CPU 80, the VDP 82 reads out the image data to be displayed on the LCD 91 of the variable display section 31 from the image data ROM 83 based on the received display control data and displays it on the display area so as to display it at a predetermined position on the LCD 91. Specify the coordinates of VRA
Temporarily store in M84. In this way, when all the image data to be displayed on the LCD 91 is stored in the VRAM 84 from the image data ROM 83, the VDP 82 displays the LCD
Simultaneously with the transmission of the vertical synchronizing signal to 91, the image data stored in the VRAM 84 is read out, and the D / A converter 89
Convert to RGB analog signal with and send to LCD91,
The design is displayed on the LCD 91.

Next, the variable display of symbols in the display control will be described. In addition, here, the variation of each symbol of "0", "1" and "6" displayed in the symbol display areas 19a to 19c shown in FIG. 1 will be described. FIG. 6 is a flowchart showing the symbol variation display processing. First, the CPU 80 of the display control unit 63 receives command data (including variation pattern data and each stop display symbol data) relating to symbol variation from the CPU 73 of the main control circuit 72 (S1), and the received command data. Is stored in the command receiving area in the RAM86, a display control code for determining the variable display speed of the symbol and the like, and a display control timer for determining the switching timing of this display control code, the symbol display control in the RAM86. Set in each symbol area in the area (S2).

Here, the command data relating to the symbol variation has the following structure. That is, as shown in FIG. 7, the command data 200 is 1) at the start of fluctuation, 2) at the time of high speed fluctuation, 3) at the time of low speed (normal speed) fluctuation, 4) at the time of temporary stop, and 5) at the time of fixed stop. It consists of a code and a display control timer. For example, when the command data (80H00H) at the time of normal fluctuation is received, the display control unit 63
Based on the command data (80H00H), the left symbol displayed in the symbol display areas 19a to 19c is "0" →
"1" → "2", etc., and the middle pattern is "1" → "2" →
"3", etc., and right symbol "6" → "7" → "8", etc., for example, high-speed variable display such as horizontal rotation in which each symbol is switched stereoscopically while being visible in three dimensions 330F
(Frame) (1 frame = 1/60 sec) (550
0ms (milliseconds) is performed, and then low-speed fluctuation display is performed for the left symbol in the symbol display area 19a at 30F (500m).
s) minutes, 90F in the symbol display area 19b for the right symbol
(1500ms) minutes and after the symbol display area 19c120F (2000ms) for the middle symbol, the temporary stop display is in the order of the left symbol, the right symbol and the middle symbol in the symbol display area 19a for the left symbol 120F (2000ms),
About the right symbol 60F (100 in the symbol display area 19b
0 ms) minutes and 30 F (500 ms) minutes in the symbol display area 19c for the symbols, and finally 30F in the symbol display areas 19a to 19c for the fixed stop display for each symbol.
(500ms) total 510F (8500ms)
Variable display.

The display control timer set during high speed fluctuation, low speed fluctuation and temporary stop can be changed according to the content of the command data received from the CPU 73 of the main control circuit 72. For example, the unit time is 500m
s and the unit frame is 30F, the command data (80H
36H), the symbol display areas 19a to 19 are received.
2) In the display control timer for each symbol displayed in c, 2) At the time of high speed fluctuation (display control code = 1), the time 45 for 270F
00ms is set to 3) Low-speed fluctuation (display control code = 2) for 30F time 500ms, and 4) Temporary stop (display control code = 3) for 30F time 500ms. If it is performed for 30 F (500 ms), a total of 360 F (6000 ms) variable display can be performed.

In this case, the display control code stored in the RAM 86 has the following configuration. (1) “0” ... The symbol is stopped and displayed. (2) “1” ... Image switching display control is performed so that the symbols are variably displayed for 3 symbols per 30 F (500 ms) (high-speed variability display). (3) "2" ... The image switching display control is performed so that the symbols are variably displayed per 30F (500 ms) (low-speed variability display). (4) "3" ... Image switching display control is performed so as to swing the symbol vertically on the LCD 91 (temporary stop display).

Subsequently, the CPU 80 of the display controller 63
An offset counter addition value is set and set based on the display control code set in each symbol area in the RAM 86 (S3). As the offset counter addition value, as shown in FIG. 8, each numerical value corresponding to the display control code is selected. For example, when the display control code is "0", the offset counter addition value "0" is selected, and when the display control code is "1", the offset counter addition value "9" is selected. The offset counter of each symbol area in the RAM 86 is the LCD as described above.
This is for determining the display pattern of the symbol to be displayed on 91, and is added and updated based on the value of the set offset counter addition value.

When the offset counter addition value is set in this way, the CPU 80 adds and updates the offset counter of each symbol area in the RAM 86 based on the set offset counter addition value (S4). The offset counter is added and updated within a value range of 0 to 89 for each variable display pattern, and the CPU 80 determines whether or not the offset counter value added and updated in the next step exceeds 89. (S5). When the offset counter value does not exceed 89, the CPU 80 determines VDP 82
The system waits to receive the interrupt enable signal from. When the offset counter value exceeds 89 (carrying a carry), the CPU 80 adds one (+1 (+ 01H)) to the symbol number of each symbol area in the RAM 86 and sets the offset counter value 0 to the offset counter. Do (S
6).

At this time, the CPU 80 determines whether or not the added symbol number exceeds [09H] (S).
7). If the design number does not exceed [09H], CP
U80 performs VDP8 as in step S5 above.
It is in a waiting state for receiving the interrupt enable signal from 2. When the symbol number exceeds [09H], the CPU 80 determines RA
[00H] is set to the symbol number of each symbol area in M86 (S8). From these things, when the offset counter value is updated by carry, if the symbol number is [09H], the symbol number will be updated to [00H] and set.

After such processing, the CPU 80 waits for reception of the interrupt enable signal from the VDP 82 as described above, and determines whether or not there is any reception (S9). C
The PU 80 continues the reception waiting state when there is no reception, but when there is reception, reads the symbol number and the offset counter value stored from each symbol area of the symbol display control area in the RAM 86 (S10). , R for display control based on the read symbol number and offset counter value
By referring to the offset table stored in the OM 81, a code (image code) relating to the image displayed on the LCD 91 is selected and transmitted to the VDP 82 (S11).

Specifically, for example, the symbol display area 19a
When the symbol number read from the RAM 86 for the left symbol displayed on the screen is [01H] and the offset counter value of the offset counter is 38, the CPU 80 sets the offset value corresponding to the offset counter value (the offset counter value is 38 If so, the offset value is also set to 38), and the offset table 3 as shown in FIG.
00, the image number of the display pattern data is set. In this case, since the offset value is 38, the corresponding image number is [05H]. Therefore, CPU8
0 transmits the image code [01H05H] corresponding to the image number [05H] of the design number [01H] to the VDP 82. VD that received the image code [01H05H]
In P82, the corresponding display pattern data is read from the image data as shown in FIG. 5, and the frame image of the read display pattern is sequentially updated and displayed in a predetermined area (symbol display area 19a) of the LCD 91 (for example, image number [05
H] → [06H] → [07H] are displayed in this order.

When the transmission of the image code to the VDP 82 is completed in this way, the CPU 80 counts the display control timer of each symbol area in the RAM 86 (S12). If it is determined that the time is up as a result of counting, the process proceeds to step S2 to update and store the display control code and the display control timer. If it is determined that the time is not up, the process proceeds to step S4 and the offset counter is added. Update is performed (S13). The variable display of the symbols is performed by such processing.

In this pachinko gaming machine 1, in the above-described symbol variation display processing, more efficient symbol variation display is realized by the following method. For example, the cycle of the basic operation clock of the CPU 80 of the display control unit 63 is 2 ms.
Thus, the switching display cycle (speed) of the variable display device 30 is 1/6.
In the case of 0 sec (seconds) (≈16.666 ... ms), the processing speed of the display control unit 63 is dragged by the switching display cycle (display speed) of the variable display device 30, so the variable display processing is 1/60 sec. Switching display of each display pattern is the limit. For example, when changing and displaying the changing state of one symbol in a display pattern divided into 16, 48/60 sec (= 16/6) in order to variably display the three symbols
The display control unit 63 cannot request the variable display device 30 to perform a variable display process in a switching display period longer than this, because a display time of 0 sec × 3 symbols) is required. Therefore, in the present invention, by making the variable display device 30 appear to be performing variable display at a higher speed than the switching display cycle, the variable display device 30 performs variable display of symbols at a display speed higher than the display processing capacity of the variable display device 30. It is possible to display high-speed fluctuations as if they were running.

In order to prevent such a difference between the cycle of the operation clock and the display cycle from affecting the display processing, in this example, the switching display cycle of the variable display device 30 and the main control circuit 72. CPU 73 and C of the display controller 63
The least common multiple cycle of the synchronization timing with the cycle of the basic operation clock of the PU 80 is set as the unit time. The variable display device 30 can be set by setting the unit time.
This is because it is possible to easily achieve operational synchronization between the main control circuit 72 and the like. For example, the cycle in which the cycle of the basic operation clock of the CPU 73 (2 ms) and the switching display cycle of the variable display device 30 (1/60 sec) are synchronized is calculated as 250 ms (15/60 sec) (synchronization time).
Therefore, an integer multiple (twice) of this synchronization time is set as a unit time (500 ms (30
/ 60 sec)). Then, by setting the number of symbols that are variably displayed per unit time and determining the fluctuating display speed, the main control circuit 72 and the like are not restricted by the switching display cycle of the variable display device 30. As a result, it becomes possible to design a game program freely.

That is, as described above, in the case of performing variable display of symbols by switching and displaying by using image data obtained by dividing one symbol into 16 display patterns, for example, a unit time of 5
To display 3 symbols in a variable manner in 00ms, 1 per symbol
Switching display of a total of 48 display patterns is required for the three patterns of the 6 display patterns. However, the processing capacity of the variable display device 30 is limited to 500 ms (30/60 sec) because the switching display of the display pattern every 1/60 sec is the limit.
Then, only the variable display of 30 display patterns at the maximum can be performed. Therefore, the switching display cycle of the variable display device 30 is performed by performing a thinning process that does not perform the variable display of 18 display patterns (48-30 = 18) of the amount exceeding the processing capacity (overflow amount). 1 / 60se
c) It looks as if the high-speed variable display above is being performed.

In this thinning-out process, a variable display process is carried out by thinning out frame images of display patterns corresponding to overflows by using an offset counter inside the RAM 86 of the CPU 80 in the display control unit 63, an offset counter addition value and a predetermined data table. . For example, symbol display area 1
With respect to the left symbol "0" displayed on 9a, each display pattern data (in this case, "0") forming a series of variation pattern data showing the symbols as shown in FIGS. 10, 14 and 15 is stored. The fluctuation display processing is performed using the fluctuation pattern data table 100 thus generated. First, the maximum value (total number) of the offset counter is set. The total number of offset counters can be set arbitrarily, but the most desirable value is set to an integral multiple of the number of clocks of the display operation cycle (switching display cycle of the variable display device 30) when calculating the offset counter addition value. It is considered to be good. Based on this, the maximum value of the offset counter (total number)
Is the common multiple of the unit time of 250 ms (250
The value of the same number as the number of time of the display operation cycle of ms (15/60 sec) is set to an integer multiple of (15). In this example, the maximum value of the offset counter is 90 (1
5 × 6 = 90) is set. Next, the offset counter addition value is set. The offset counter addition value is a value that is added to the offset counter every display operation cycle of the variable display device 30 (in this example, every 1/60 sec which is the switching display timing of the variable display unit 31 of the variable display device 30). . The offset counter addition value is preferably an integer value for the convenience of control processing.

The offset counter added value is obtained by multiplying the total number (90) of offset counters by the number of variable display symbols per unit time (3) and the limit number (30) of image (frame image) switching display per unit time. It can be obtained by dividing by. For example, in this case, 90 × 3 ÷ 30
= 9, the offset counter addition value is set to 9.

The fluctuation pattern data table 100 shown in FIG. 10 is applied when the offset counter addition value is set to 9 (high speed fluctuation A). The fluctuation pattern data table 100 contains frame numbers,
Each item of offset value, image code, frame image, offset counter addition value, and frame display is assigned to each display pattern data. “○” in the frame display column in FIG. 10 means that the frame image of the display pattern data of that frame number is displayed,
"⇒" means that the display of the frame image is omitted. Therefore, in the high-speed fluctuation A when this offset counter addition value is set to 9, frame numbers 3, 5,
Frame images of a total of seven display pattern data of 7, 10, 12, 14, and 16 are thinned and displayed. Further, as described above, the offset value is a value obtained by dividing the same number as the total number (90) of the offset counters by the number of frame images (16) of the display pattern data per symbol. In this example, offset value allocation is performed as follows. That is, the value obtained by dividing the maximum number of offset counter values (90) by the number of frame images per symbol (16) is 5.625. In this case, since the offset value is also preferably an integer value like the offset counter addition value, a value (5) in the range of the value of the integer part of the obtained value is assigned to each display pattern data. . Then, all the surplus numerical values of the obtained values are assigned to predetermined display pattern data (in this example, the display pattern data of the frame number 4 having the frame image of the front display image of the design), and the predetermined display pattern. With respect to the data, a value in the range of the value obtained by adding the surplus numerical value to the value of the integer part is assigned, and the fraction processing of the assignment is performed.

FIG. 11 is a flow chart showing the symbol variation condition setting process in the thinning process. When the offset counter is updated, variable condition setting processing is performed in order to determine a numerical value or the like for updating the offset counter. By this processing, the variable display speed of the symbol is determined. First, the CPU 80 of the display control unit 63
Receives command data relating to a variation pattern from the CPU 73 of the main control circuit 72, and reads the display control code of each symbol area in the RAM 86 based on the received command data (S100). This display control code is sequentially read every time the variable display speed is changed, and the CPU 80
Performs the following various settings based on the read display control code. After reading the display control code in step S100, the CPU 80 multiplies an integer multiple (x) of the synchronization time (250 ms) between the cycle of the basic operation clock of the CPU 73 of the main control circuit 72 and the display operation cycle of the variable display device 30 (common multiple). ) Is set as the unit time (y) (S101).
After setting the unit time (y), next, the number of symbols (a) to be variably displayed per unit time is set (S102).

The CPU 80 sets the unit time (y) thus set, the number of symbols for variable display (a), and the number of times the variable display device 30 performs the switching display per unit time (y) (for example, 250 ms). 15 times), and the offset counter addition value (b) is calculated from the preset total number (90) of offset counters and stored in each symbol area in the RAM 86 (S103). By the processing so far, for example, when the unit time is set to 500 ms, 2 is substituted for (x), and when the number of variable symbols per unit time is 3, 3 is substituted for (a). The offset counter addition value (b) is set to 9. As a result, in the case of variable display of symbols at this variable display speed, the offset counter addition value (9) set from the number of offset values (5) assigned to each display pattern data in the variable pattern data table 100 is set. ) Is numerically larger, the CPU 80 adds and updates the offset counter, and as a result, the fluctuation pattern data table 1
Display pattern data that is not selected occurs in 00, and as a result, the frame image of the display pattern data is not displayed, and it is possible to perform thinning display of the symbols.

After the offset counter addition value is set in step S103 in this way, the CPU 80 sets the time (operation time) (z) for performing the variable display operation of the symbol based on each set numerical value (S104). . In this example, in order to synchronize with the cycle of the basic operation clock of the CPU 73 of the main control circuit 72, for example, it is set based on the synchronization time of the cycle of the basic operation clock of the CPU 73 and the switching display cycle of the symbol display device 30. I am trying. Therefore, the operation time is an integral multiple of the synchronization time (250 ms), and for example, the variable display at the variable display speed set above can be performed for 5000 ms (300/60 sec).

After performing the changing condition setting process in this way,
The CPU 80 performs the offset counter updating process based on this. FIG. 12 is a flowchart showing the offset counter updating process. First, the CPU 80 uses the RA
The offset counter value of the offset counter is added and updated based on the offset counter addition value set in each symbol area in M86 (S150). The offset counter value may be added and updated every time the switching display cycle of the variable display device 30 is counted a plurality of times. In this case, the offset counter addition value is the number of times of the switching display cycle in which the addition and update are performed. . For example, the switching display cycle is 2
When the offset counter value is added and updated each time the time is counted, the offset counter addition value set at this variable display speed is 18.

Next, the CPU 80 determines whether or not the value exceeds 89, which is the maximum value of the offset counter, as a result of adding and updating the offset counter value (S1).
51). If the maximum value is not exceeded, the CPU 80 enters a waiting state for receiving an interrupt enable signal (S155). If it exceeds the maximum value, the CPU 80 adds one (+1) to the symbol number of each symbol area in the RAM 86 and subtracts 90 (-90) from the offset counter value (S152).
In this case, the CPU 80 may set the offset counter to 0 as the offset counter value. The CPU 80 subsequently assigns the symbol number 1 in this way.
As a result of the addition, it is determined whether or not the symbol number exceeds 9 (S153), and if it does not exceed, the waiting state for the interrupt permission signal is obtained similarly to the above (S155),
If it exceeds, 0 is set to the symbol number (S15).
4).

Next, the CPU 80 waits until it receives the interrupt permission signal (S155), and when it receives the interrupt permission signal, it reads the offset counter value from each symbol area in the RAM 86 and stores it in the variation pattern data table 100. By comparing and collating with the offset value assigned to each display pattern data, the frame image of the predetermined display pattern data corresponding to the image code associated with the corresponding frame number is displayed in the predetermined display area of the variable display unit 31. indicate. Next, the CPU 80 causes the display controller 63 to
The operation time set to is counted (S156), and it is determined whether the time is up (S157). Here, if the time is up, the offset counter updating process is skipped and another control process is performed. If the time is not up, the process proceeds to step S150 and the offset counter value is added and updated again.

In this way, in the pachinko gaming machine 1, it is possible to change the variable display speed and perform variable display of symbols. The variable display using two or more types of high-speed fluctuation patterns will be described below. For example, as shown in FIG. 13, the CPU 80 causes the CPU 73 of the main control circuit 72 to send command data (eg,
When the variation pattern designation command data [80H01H]) is received, for example, variation pattern data suitable for it is read from the image data ROM 83, and the variation display of the symbol by the high-speed variation A (3 symbol variation display at 500 ms) is first performed for 4000 ms. According to this variation display, as described above, the variation pattern data table 100 shown in FIG. 10 is applied, and the frame images of 18 display patterns of the number of images overflowing when varying in a unit time of 500 ms are thinned and displayed. Will be. The variable display at the variable display speed can be used, for example, during a normal high speed change.

Next, the CPU 80 causes the high speed fluctuation B (10
2 variable display of symbols by 4 symbol variable display at 00ms)
Perform 000 ms. According to this variable display, the unit time is 10
The number of images that overflow when changing in 00ms is 4
One frame image will be thinned out and displayed.
The fluctuation pattern data table 100 shown in FIG. 14 is applied to this case (high speed fluctuation B) in which 6 is set as the offset counter addition value. Therefore, in the high speed fluctuation B of the fluctuation pattern data table 100, frame images of a total of two display pattern data of frame numbers 10 and 16 are thinned and displayed. The variable display at the variable display speed can be used for the variable display before the stop display of the symbols, for example. And the CPU 80
Is next low speed fluctuation A (1 symbol fluctuation display at 500ms)
The variable display of the symbol is performed for 1500 ms. According to this variable display, there is no image that overflows when it fluctuates in a unit time of 500 ms, so the frame images of each display pattern data are displayed without being thinned out. In the fluctuation pattern data table 100 shown in FIG. 15, the offset counter addition value is set to 3 (low speed fluctuation A).
Applied to. In addition, "○" in the frame display column means that the frame image associated with the display pattern data of the frame number is displayed, and the number in the inside indicates the number of times the frame image is displayed (for example, consecutive 2 Displayed twice.). The display speed at the variable display speed can be used for the variable display when displaying a so-called reach state, for example. Further, in the variable display at the variable display speed, since there are no thinned frame images as described above, the variable display of symbols is smoothly performed.

After performing the variable display at the low speed variation A in this manner, the CPU 80 displays, for example, a temporary stop display at 500.
do ms. This temporary stop display is performed, for example, by slightly moving the displayed symbol up and down. In addition, with the temporary stop, the symbol is displayed as a stop (no change),
It means the state where the fixed stop is not displayed yet. Finally CP
U80 performs fixed stop display for a predetermined time, and ends variable display of symbols.

In this example, it is made to appear as if high-speed symbol variable display is performed by the above-mentioned method, but other than that, high-speed symbol variable display is performed by the following method. Can be disguised as. For example, when allocating the offset value to the fluctuation pattern data table, the surplus numerical value is displayed as predetermined display pattern data in the fluctuation pattern data table (a display including a frame image having points for facilitating the distinction of the pattern). Pattern data) so that the frame image associated with the display pattern data is displayed for a long time. By doing this, it becomes possible to easily visually recognize and grasp the changing pattern in the high-speed fluctuation, and in the low-speed fluctuation, the frame image of the display pattern data to which the surplus is allocated is more than the other frame images. Since it will be displayed for a long time, it can be expected that the player will have a sense of expectation as to whether or not the symbol will further change. Further, as shown in FIG. 16, among the frame images of each display pattern data, the frame image of the predetermined display pattern data (the frame image of the display pattern data for displaying the front of the design) is set to the frame number 1 and the offset is set. The value 0 and the next display pattern (for example,
The frame image of the display pattern data of the frame numbers 1 to 4 of "1" if the currently displayed pattern is "0" (the frame image before the frame image displaying the front of the pattern)
The variable display may be performed using the variation pattern data table 103 assigned to the frame numbers 13 to 16. By doing this, for example, if the counter value is not 0 at the start of the fluctuation of the symbol, if the variable display is started after being cleared to 0, the display is always performed from the frame image displaying the front of the symbol when the variable display of the symbol is started. Since it can be started, data management becomes easier and the processing load is reduced. In this case, the surplus numerical value of the offset value is assigned to the frame image of the display pattern data of frame number 1.

Further, as shown in FIG. 17, a plurality of symbols may be associated as one band-shaped image, and variable display may be performed by scrolling vertically or horizontally while switching display base points. Specifically, in the case of this scroll display type, data that connects a plurality of symbols in a strip shape is generated,
Displaying a certain range of vertical and horizontal patterns based on the display base point, and changing the display base point (for example, changing the X coordinate for vertical scrolling, changing the Y coordinate for horizontal scrolling)
By performing switching display of symbols, it is possible to perform variable display as if scrolling. In this case, for example, the variation pattern data of the design is divided into 16 display pattern data, and the division points are assigned image codes [00] to [15] as the display base points of the respective designs, the variation pattern data table and the offset. By configuring the counter addition value to have the same configuration as in the above example, it is possible to realize variable display as if high-speed variable display is being performed. For example, the image of the thinned variable display when the variable display performed by the low speed variation A and the variable display performed by the high speed variation A are compared is as shown in FIG. According to this, if two frame images are thinned out and displayed among the frame images of the four display pattern data displayed every 4/60 sec at the time of the variable display at the low speed variation A, the fluctuation at the high speed variation A is changed. It would be the same as being able to do the display. By performing variable display in this manner, it is possible to perform high-speed symbol variable display as if the switching display processing capability of the variable display device 30 is exceeded.

Further, every time the variable display speed is switched, the variable pattern data table in which the thinned display pattern data is set may be used to perform the variable display. In the above-described example, the thinned display pattern data is determined by the variable display speed, but if the variable display is performed by appropriately using the variable pattern data table in which the frame images of the thinned display pattern data are preset, Arrangement order (display order) of the display pattern data can be set arbitrarily, and a variation pattern data table to be read is appropriately selected according to the variation display speed, and a pattern that is sequentially varied and displayed based on this variation pattern data table Since it is possible to switch and display, the amount of data processing increases, but since an offset counter is not used, there is no fear of malfunction and it is possible to perform smoother variable display of symbols. Further, for example, as shown in FIG. 18, variable display may be performed by using a set of a plurality of unit times as an operation unit time of variable display of symbol fluctuation. In this way, by changing the variable display speed of the symbols by using the unit time, it is possible to reduce the load of the calculation processing in the variable display processing,
This is because data management becomes easy and the processing load can be reduced.

[0072]

As described above, according to the present invention,
The display control means is configured to sequentially transmit each display pattern data, which is displayed on the variably display unit and constitutes a series of variation pattern data indicating the identification information that changes in time series, to the variably display device at predetermined times at predetermined times. In addition to performing the variable display of the identification information at the fluctuating speed, the number of transmissions of the display pattern data to be transmitted to the variable display device is set to be a number smaller than the predetermined number of times at the predetermined fluctuating speed, thereby fluctuating faster than the predetermined fluctuating speed. It displays fluctuations at speed. Therefore, it is possible to perform the display processing of the symbol variation at high speed as if the display processing capability of the variable display device is improved, and perform the variable display of the identification information at the display speed higher than the display processing capability of the variable display device. This has the effect of making it possible to impersonate the user.

[Brief description of drawings]

FIG. 1 is a front view showing a pachinko gaming machine according to an embodiment of the present invention.

FIG. 2 is a block diagram showing an electrical configuration of the same pachinko gaming machine.

FIG. 3 is a block diagram showing an internal configuration of a display control unit of the same pachinko gaming machine.

FIG. 4 is a diagram showing a work area of a RAM in a CPU of the display control unit.

FIG. 5 is a diagram showing a configuration of image data used in the display control unit.

FIG. 6 is a flowchart showing a symbol variation display process of the display control unit.

FIG. 7 is a diagram showing command data used in the display control unit.

FIG. 8 is a diagram showing a relationship between a display control code used in the display control unit and an offset counter addition value.

FIG. 9 is a diagram showing an offset table used in the display control unit.

FIG. 10 is a diagram showing a variation pattern data table used in the display control unit.

FIG. 11 is a flowchart showing a variable condition setting process in the display control unit.

FIG. 12 is a flowchart showing an offset counter updating process in the display control unit.

FIG. 13 is a time chart of variable display of symbols in the display control unit.

FIG. 14 is a diagram showing a variation pattern data table used in the display control unit.

FIG. 15 is a diagram showing a variation pattern data table used in the display control unit.

FIG. 16 is a diagram showing a variation pattern data table used in the display control unit.

FIG. 17 is a view showing a variable display of symbols in the display control unit according to another embodiment.

FIG. 18 is a diagram showing a relationship between operation unit time and unit time used in the display control unit.

[Explanation of symbols]

1 ... Pachinko gaming machine, 2 ... Machine frame, 3 ... Game board, 5 ... Inner frame, 6 ... Upper plate, 7 ... Mounting plate, 8 ... Sound emission port, 9 ...
Lower plate, 10 ... Speaker, 11 ... Game ball launching operation unit, 12
… Stop switch, 13… Key hole, 14… Frame lamp, 1
5 ... glass frame, 16 ... upper front plate lamp, 17 ... lower lamp,
20 ... Game area, 21 ... Guide rail, 22 ... Guide ball, 23 ... Limit step, 24 ... Repulsion rubber, 25 ... Limit step axis, 26 ... Game ball discharge port, 27 ... Start port, 28 ... Pass chucker , 30 ... Symbol display device, 31 ... Variable display part, 32, 33 ... Normal symbol display LEDs, 34, 35 ... Warp path entrance, 38 ... Movable piece, 40 ... Special electric accessory, 4
1 ... Big prize hole, 42 ... Open / close plate, 43 ... Big prize LED,
44 ... Upper prize hole, 45 ... Windmill lamp, 46 ... Windmill, 4
7 ... Center LED, 48 ... Winning memory LED section, 49 ...
Side lamp, 50 ... Illuminated LED, 51 ... Lower prize hole,
52 ... Game ball outlet, 60 ... Writing winning slot, 61 ... Winning switch, 62 ... Payout control section, 63 ... Display control section, 64 ...
Voice control unit, 65 ... Various lamps, 66 ... Lamp control unit,
67 ... Big prize opening / closing device, 68 ... Big prize controller, 69
... Payout device (motor), 70 ... Power supply, 71 ... Main control board, 72 ... Main control circuit, 73, 80 ... CPU, 74, 8
6 ... RAM, 75 ... ROM, 76 ... Selection circuit, 77 ... Oscillation control circuit, 78, 85 ... Crystal oscillator, 79 ... Power supply circuit, 81 ... Display control ROM, 82 ... VDP, 83 ... Image data ROM, 84 VRAM, 87 ... Clock divider circuit, 88 ... Image operation unit, 89 ... Sync signal timing controller, 90 ... D / A converter, 91 ... LC
D.

Claims (7)

[Claims] 1. A gaming machine having a variable display unit, wherein the variable display device variably displays identification information displayed on the variable display unit based on a gaming state of the gaming machine. Further comprising display control means for controlling the display state of the identification information, wherein the display control means, in the variable display from the first identification information of the identification information to the second identification information, the variable display section. Identification information at a predetermined fluctuation speed by sequentially transmitting each display pattern data forming a series of fluctuation pattern data indicating the identification information displayed on the variable display device in a time series to the variable display device for a predetermined number of times. While performing the variable display of, the number of transmissions of the display pattern data to be transmitted to the variable display device is set to a number smaller than the predetermined number of times, so that A gaming machine characterized by performing variable display from the first identification information to the second identification information at a fast changing speed. 2. The display control means, when performing variable display from the first identification information of the identification information to the second identification information, determines how many times the display pattern data is transmitted to the variable display device. 2. The gaming machine according to claim 1, wherein the identification information is variably displayed and controlled at two or more varying speeds that are different from the predetermined varying speed. 3. A game control means for controlling the entire gaming machine as a whole is further provided, wherein the display control means has a cycle of a basic operation clock of the game control means and a switching display cycle of variable display of the variable display device. The minimum common multiple cycle of is the synchronization time, and this synchronization time or an integral multiple thereof is set as the unit time, and the fluctuation display speed is determined by setting the number of series of fluctuation pattern data that can be displayed in the unit time. The gaming machine according to claim 1 or 2, further comprising means. 4. The display control means, when performing variable display of the identification information based on the fluctuation speed determined by the fluctuation speed determination means, switching displayable on the variable display device per unit time. When performing switching display of each display pattern data that constitutes the series of variation pattern data more than the number of times of display, image thinning omitting transmission of a predetermined number of display pattern data among the display pattern data to be transmitted to the variable display device. The game machine according to claim 3, further comprising means. 5. The display control means sets a counter update value set according to the number of series of fluctuation pattern data that can be displayed per unit time determined by the fluctuation speed determination means, and every switching display cycle. And a counter for updating a value within a preset range based on the set counter update value, and a display image code for specifying each display pattern data transmitted to the variable display device. And a variation pattern data table that associates an offset value in which a value in the same range as the counter is set, and compares the counter value read from the counter with the offset value to match the offset value. Image display means for transmitting predetermined display pattern data based on the attached display image code to the variable display device. Gaming machine of claim 3 or 4, wherein. 6. The image selection means associates each of the offset values with a predetermined number of integer values as a reference range with the display image code of each display pattern data, and a surplus occurs in the offset value. In this case, the surplus is added to the integer value associated with a predetermined display image code, and the numerical value obtained as a result of the addition is associated as a reference range of the predetermined display image code. The gaming machine according to claim 5. 7. The game machine according to claim 6, wherein the image selection means associates the predetermined display image code with the minimum offset value.