JP2003017485A - 半導体装置およびその製造方法 - Google Patents

半導体装置およびその製造方法

Info

Publication number
JP2003017485A
JP2003017485A JP2001198964A JP2001198964A JP2003017485A JP 2003017485 A JP2003017485 A JP 2003017485A JP 2001198964 A JP2001198964 A JP 2001198964A JP 2001198964 A JP2001198964 A JP 2001198964A JP 2003017485 A JP2003017485 A JP 2003017485A
Authority
JP
Japan
Prior art keywords
insulating film
interlayer insulating
semiconductor device
substrate
porous structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001198964A
Other languages
English (en)
Japanese (ja)
Inventor
Yoshiaki Oku
良彰 奥
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP2001198964A priority Critical patent/JP2003017485A/ja
Priority to EP20020743749 priority patent/EP1408539A1/en
Priority to KR1020037016885A priority patent/KR100645654B1/ko
Priority to US10/482,564 priority patent/US7075170B2/en
Priority to CNB028127706A priority patent/CN100369216C/zh
Priority to PCT/JP2002/006508 priority patent/WO2003003440A1/ja
Priority to TW091114279A priority patent/TWI233215B/zh
Publication of JP2003017485A publication Critical patent/JP2003017485A/ja
Priority to US11/399,724 priority patent/US7385276B2/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
  • Semiconductor Memories (AREA)
JP2001198964A 2001-06-29 2001-06-29 半導体装置およびその製造方法 Pending JP2003017485A (ja)

Priority Applications (8)

Application Number Priority Date Filing Date Title
JP2001198964A JP2003017485A (ja) 2001-06-29 2001-06-29 半導体装置およびその製造方法
EP20020743749 EP1408539A1 (en) 2001-06-29 2002-06-27 Semiconductor device and production method therefor
KR1020037016885A KR100645654B1 (ko) 2001-06-29 2002-06-27 반도체 장치 및 그 제조 방법
US10/482,564 US7075170B2 (en) 2001-06-29 2002-06-27 Semiconductor device and production method therefor
CNB028127706A CN100369216C (zh) 2001-06-29 2002-06-27 半导体装置及其制造方法
PCT/JP2002/006508 WO2003003440A1 (en) 2001-06-29 2002-06-27 Semiconductor device and production method therefor
TW091114279A TWI233215B (en) 2001-06-29 2002-06-28 Semiconductor device and method of manufacturing same
US11/399,724 US7385276B2 (en) 2001-06-29 2006-04-07 Semiconductor device, and method for manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001198964A JP2003017485A (ja) 2001-06-29 2001-06-29 半導体装置およびその製造方法

Publications (1)

Publication Number Publication Date
JP2003017485A true JP2003017485A (ja) 2003-01-17

Family

ID=19036317

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001198964A Pending JP2003017485A (ja) 2001-06-29 2001-06-29 半導体装置およびその製造方法

Country Status (2)

Country Link
JP (1) JP2003017485A (zh)
CN (1) CN100369216C (zh)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004273786A (ja) * 2003-03-10 2004-09-30 Ulvac Japan Ltd 疎水性多孔質ｓｏｇ膜の作製方法
US7382657B2 (en) 2004-06-17 2008-06-03 Matsushita Electric Industrial Co., Ltd. Semiconductor memory device having bit line precharge circuit controlled by address decoded signals
JP2010251784A (ja) * 2010-06-16 2010-11-04 Ulvac Japan Ltd 疎水性多孔質ｓｏｇ膜の作製方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999015280A1 (en) * 1997-09-25 1999-04-01 Sandia Corporation Ordered mesoporous thin films
EP1094506A2 (en) * 1999-10-18 2001-04-25 Applied Materials, Inc. Capping layer for extreme low dielectric constant films
JP2001118841A (ja) * 1999-10-22 2001-04-27 Asahi Kasei Corp 多孔性シリカ
JP2001130911A (ja) * 1999-10-29 2001-05-15 Japan Chemical Innovation Institute 高結晶性シリカメソ多孔体薄膜の製造方法
JP2002033314A (ja) * 2000-02-10 2002-01-31 Applied Materials Inc Ｐｅｃｖｄキャッピングモジュールを含む低誘電率誘電体処理のための方法及び一体型装置
JP2002217910A (ja) * 2001-01-17 2002-08-02 Sony Corp 情報入出力装置

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01235254A (ja) * 1988-03-15 1989-09-20 Nec Corp 半導体装置及びその製造方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999015280A1 (en) * 1997-09-25 1999-04-01 Sandia Corporation Ordered mesoporous thin films
EP1094506A2 (en) * 1999-10-18 2001-04-25 Applied Materials, Inc. Capping layer for extreme low dielectric constant films
JP2001118841A (ja) * 1999-10-22 2001-04-27 Asahi Kasei Corp 多孔性シリカ
JP2001130911A (ja) * 1999-10-29 2001-05-15 Japan Chemical Innovation Institute 高結晶性シリカメソ多孔体薄膜の製造方法
JP2002033314A (ja) * 2000-02-10 2002-01-31 Applied Materials Inc Ｐｅｃｖｄキャッピングモジュールを含む低誘電率誘電体処理のための方法及び一体型装置
JP2002217910A (ja) * 2001-01-17 2002-08-02 Sony Corp 情報入出力装置

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004273786A (ja) * 2003-03-10 2004-09-30 Ulvac Japan Ltd 疎水性多孔質ｓｏｇ膜の作製方法
US7382657B2 (en) 2004-06-17 2008-06-03 Matsushita Electric Industrial Co., Ltd. Semiconductor memory device having bit line precharge circuit controlled by address decoded signals
JP2010251784A (ja) * 2010-06-16 2010-11-04 Ulvac Japan Ltd 疎水性多孔質ｓｏｇ膜の作製方法

Also Published As

Publication number Publication date
CN100369216C (zh) 2008-02-13
CN1692479A (zh) 2005-11-02

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