JP2002373920A - Manufacturing method for semiconductor device and manufacturing device therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the manufacturing technique for a semiconductor device efficiently and accurately bonding a semiconductor chip to a supporting body. SOLUTION: In the manufacturing method for the semiconductor device, the semiconductor chip 21 picked up from a semiconductor wafer 18 or a housing tray 26 is supplied to a stage 7, the position of the semiconductor chip 21 supplied to the stage 7 is mechanically corrected, and the semiconductor chip 21 is held and fixed to the stage 7. By recognizing the position of the semiconductor chip 21 held and fixed to the stage 7 and moving the stage 7 on the basis of the position recognized result, the position of the semiconductor chip 21 held and fixed to the stage 7 is corrected, and the position-corrected semiconductor chip 21 is bonded to the supporting body 29. Thus, the detection of the recognition pattern of the semiconductor chip 21 by a position recognition means 16 is facilitated and the semiconductor chip 21 is efficiently and accurately bonded to the supporting body 29.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention is effective when applied to a semiconductor device manufacturing technique, particularly a bonding technique for mounting a semiconductor chip on a support such as a lead frame or a tape carrier.

[0002]

2. Description of the Related Art Conventionally, TCP (Tape Carrier Package)
In the manufacturing technology of semiconductor devices having a structure, after aligning the inner leads of a TAB (Tape Automated Bonding) tape, which is a support, with the bump electrodes formed on the electrode pads of the semiconductor chip, a bonding tool is used to collectively. An inner lead bonding technique for connecting the semiconductor chip and inner leads by applying a load to the semiconductor chip has been performed. In the inner lead bonding technique, a semiconductor chip or a semiconductor chip stored in a storage tray or the like is picked up from a semiconductor wafer held by a frame member, and the semiconductor chip is position-corrected by position correction means. Is bonded to a support such as a lead frame or a TAB tape. Such an inner lead bonding technology is described in, for example, “VLSI Packaging Technology (Lower)”, 87-95, published by Nikkei BP on May 31, 1993.
Page.

As the position correcting means, for example, position correction by detecting a recognition pattern of a semiconductor chip, or L
A method such as mechanical position correction by contact with a nail having a shape (hereinafter, referred to as an L nail) is generally used.

In the position correction method by detecting the recognition pattern of the semiconductor chip, first, the picked-up semiconductor chip is supplied to a bonding stage (hereinafter, referred to as a stage) located at a pre-alignment site by a collet or the like. Detection processing of the recognition pattern of the semiconductor chip supplied to the unit is performed. Then, by moving the stage based on the detection result of the recognition pattern of the semiconductor chip, the position of the semiconductor chip on the stage is corrected in the X, Y, and θ directions, and the stage on which the semiconductor chip is mounted is mounted. The part is moved to the bonding site. The semiconductor chip held and fixed on the stage is bonded to a support such as a lead frame or a TAB tape.

In the mechanical position correction method using the L-claw or the like, similarly, the picked-up semiconductor chip is supplied to a stage located at a pre-alignment site by a collet or the like. When the semiconductor chip is supplied to the stage, the L-claw is moved, and the L-claw is pushed into the side surface of the semiconductor chip corner portion mounted on the stage by a predetermined amount, so that the X, Y, and The position is mechanically corrected in the θ direction. The position-corrected semiconductor chip is bonded to a support.

[0006]

However, in the above-described position correction method by detecting a recognition pattern of a semiconductor chip, a semiconductor chip picked up from a semiconductor wafer or a storage tray is transported by a collet or the like. However, there is a problem that the accuracy of placement of the transfer means such as the collet is affected. The problem is that in the position correction method by detecting the recognition pattern of the semiconductor chip, for example, the two patterns on the semiconductor chip are used as recognition targets, and the two-point recognition pattern is detected. X, Y
And the position correction in the θ direction, the semiconductor chip supplied to the stage part is largely displaced in the X, Y and θ directions when the placement accuracy of the transfer means is poor, It takes time to detect the recognition pattern on the semiconductor chip by the position recognition means. The time required to detect the recognition pattern greatly affects the operation rate of the bonding apparatus.
Such a misalignment of the semiconductor chip is caused not only when the semiconductor chip is placed on the stage section, but also when the semiconductor chip is sucked by a collet, for example, or when the semiconductor chip is being conveyed. There is also a possibility that the placement accuracy by the transfer means is deteriorated. Since it takes time to detect the recognition pattern on the semiconductor chip, the operation rate of the bonding apparatus is greatly affected.

In the mechanical position correction method using the L-claw, the semiconductor chip mounted on the stage is pressed on the side of the stage by pushing a certain amount of the side of the semiconductor chip with the L-claw or the like. Since the position of the placed semiconductor chip is mechanically corrected for displacement in the X, Y and θ directions, the semiconductor chip is pushed into the side surface, the back surface and the front surface of the semiconductor chip due to the mechanical pushing of the L-claw. Of the semiconductor chip, and the occurrence of edge chipping of the semiconductor chip. Such flaws, edge chips, and the like may lead to defective characteristics of the semiconductor device.

[0008] These problems of scratches or edge chipping on the semiconductor chip can be counteracted by sufficiently adjusting the position of the semiconductor chip pushed by the L-claw.
Since the adjustment of the pushing position by the L-claw needs to be adjusted in the X, Y, Z and θ directions, it is difficult to adjust the pushing position, and it takes a lot of time to adjust the pushing position.

In recent years, TCP and CSP (Chip Size Pa)
2. Description of the Related Art A semiconductor device having a structure in which the back surface of a semiconductor chip is exposed, such as a structure, has come out. In such a semiconductor chip in which the back surface of the semiconductor chip is exposed, scratches on the side surface, the back surface, etc. of the semiconductor chip or the semiconductor chip Edge cracks and the like may lead to poor appearance.

It is an object of the present invention to provide a semiconductor device manufacturing technique capable of reducing the occurrence of scratches and chips on a semiconductor chip and efficiently and accurately bonding the semiconductor chip to a support. is there.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0012]

The following is a brief description of an outline of a typical invention among the inventions disclosed in the present application.

That is, a step of supplying a semiconductor wafer or a semiconductor chip picked up from a storage tray to a stage, mechanically correcting the position of the semiconductor chip supplied to the stage, and placing the semiconductor chip on the stage. A step of holding and fixing, a step of recognizing a position of the semiconductor chip held and fixed to the stage, and a step of moving the stage based on the position recognition result to position the semiconductor chip held and fixed to the stage. This is a semiconductor device manufacturing technique including a correcting step and a step of bonding the position-corrected semiconductor chip to a support. Further, in the semiconductor device manufacturing technique, the mechanical position correction is performed by positioning a semiconductor chip supplied to the stage portion along the tapered surface by a positioning portion provided with a tapered surface near the periphery of the stage portion. And mechanically corrects the position. According to the above-described means, while the position of the semiconductor chip supplied to the stage is mechanically corrected, the semiconductor chip is held and fixed to the stage, and the position of the semiconductor chip held and fixed to the stage is recognized. By moving the stage based on the position recognition result, the position of the semiconductor chip held and fixed to the stage is corrected, and the position-corrected semiconductor chip is bonded to a support. Therefore, the position is simply corrected by the mechanical position correction, and then the position of the semiconductor chip is corrected by performing the position recognition process, so that the recognition pattern of the semiconductor chip can be easily detected, and the semiconductor chip can be efficiently and accurately positioned. Good bonding to the support. The mechanical position correction may be such that a semiconductor chip supplied to the stage portion is mechanically corrected along the tapered surface by a positioning portion provided with a tapered surface near the periphery of the stage portion. Therefore, simple position correction can be performed without generating scratches or chips on the semiconductor chip.

[0014]

Embodiments of the present invention will be described below with reference to the drawings. In the present embodiment, a case will be described in which the bonding technique of the present invention is applied to a technique for manufacturing a TCP semiconductor device.

FIG. 1 is a diagram showing a schematic configuration of an inner lead bonding apparatus according to an embodiment of the present invention. The inner lead bonding apparatus 1 includes a chip supply unit 2, a positioning stage 3 for positioning and holding a semiconductor chip supplied from the chip supply unit 2, a tape transport unit 4 for transporting a TAB tape as a support, And a bonding section 5 for mounting the semiconductor chip positioned and held on the positioning stage 3 on the TAB tape transported by the tape transport means 4 by batch bonding. The chip supply section 2 has a collet 6 as a transfer means, for example, a pyramid collet, and can hold a semiconductor chip by vacuum suction. The collet 6 is configured to be movable in the X, Y, and Z directions. The collet 6 sucks and holds a semiconductor chip stored in a cavity of a storage tray, and moves the positioning stage 3 moved to a pre-alignment site. The semiconductor chip is transported and supplied to the semiconductor device. Next, the positioning stage 3, which is a feature of the present invention, is configured as shown in FIGS. 2 and 3, for example. The positioning stage 3 has a stage portion 7 at a substantially central portion thereof. The stage section 7 has a chip mounting surface 8 for positioning and holding a semiconductor chip.
The chip mounting surface 8 is configured to have the same size as, for example, a semiconductor chip to be mounted. A suction hole 9 is provided in the chip mounting surface 8 of the stage unit 7, and the semiconductor chip mounted on the chip mounting surface 8 is held by vacuum suction from the suction hole 9 by a vacuum pump or the like (not shown). Can be fixed. Further, the stage section 7 has a heater (not shown) so that the semiconductor chip 21 mounted on the chip mounting surface 8 can be heated to a predetermined temperature. Further, the stage section 7 is detachably connected to the base section 10 so as to be able to cope with product type change and component replacement. A positioning section 11 is provided so as to surround the periphery of the chip mounting surface 8 of the stage section 7. The positioning section 11 includes, for example, a positioning block 12 for positioning a semiconductor chip to be mounted, an elastic body 13 such as a spring provided to push the positioning block 12 to a position above the stage section, and the positioning block. And a guide rod 14 for guiding the up and down movement of the base 12. As shown in FIG.
0. The positioning block 12
The four surfaces surrounding the chip mounting surface 8 have tapered surfaces 15 so that the upper side is wide and the lower side is adjacent to the chip mounting surface 8.
The semiconductor chip 21 supplied by the tapered surface 15 is guided to the stage 7. Further, the positioning section 11 pushes down the guide rod 14 so that the positioning block 1 is pressed.
2 descends and is accommodated in the base part 10 as shown in FIG. The base 10 of the positioning block 12
By being accommodated inside, the upper portion of the stage section 7 of the positioning stage 3 is exposed, and the semiconductor chip mounted on the chip mounting surface 8 of the stage section is in a state where it can be collectively joined to the inner lead of the TAB tape 29. . When the guide rod 14 is released from being pushed down, the positioning block 12 is pushed up again by the elastic body 13 to a position above the stage 7, and the semiconductor chip to be supplied to the positioning stage is prepared for positioning. . Here, in the positioning stage 3 of the present embodiment, a tapered surface 15 for guiding to the chip mounting surface 8 of the stage 7 is provided.
By providing the positioning portion 11 having the shape shown in FIG. 4, the semiconductor chip 21 supplied to the positioning stage 3 can be moved according to the placement accuracy of the collet 6 in the chip supply portion 2 as shown in FIG.
When the position shifts in the X, Y or θ directions as shown in FIG.
As shown in FIG. 4 (b), the position can be satisfactorily corrected on the chip mounting surface 8 of the stage 7 as shown in FIG. Here, in the positioning stage 3 of the present embodiment, since the positioning portion 11 is disposed so as to be able to protrude and retract from the base portion 10 to the periphery of the stage portion 7, the positioning stage 3 is connected to the stage portion at the time of inner lead bonding. can do. A position recognizing means 16, for example, a CCD camera or the like is provided above the positioning stage 3, and can recognize the position of the semiconductor chip positioned and held on the stage 7 of the positioning stage 3. Further, the positioning stage 3 has XYZ and θ
The position recognition means 1
6, the position of the semiconductor chip positioned and held by the stage unit 7 can be corrected in the XY and θ directions. In this embodiment, the semiconductor chip 21 mounted on the stage 7 of the positioning stage 3 is mechanically corrected in position by the positioning unit 11. Regardless of the placement accuracy, the semiconductor chip is positioned and held at a predetermined portion of the stage section 7. As a result, the recognition pattern of the semiconductor chip by the position recognition means 16 can be quickly recognized, and the position recognition time of the semiconductor chip can be shortened. The tape transport means 4 is constituted by a reel-to-reel, and a TAB tape wound on a reel set in a tape supply unit (not shown) passes through a bonding position from the tape supply unit, and is reeled into a tape collection unit. Is configured to be conveyed intermittently. A bonding portion 5 is provided above the TAB tape at the bonding site.
The bonding section 5 has a bonding tool 17 for bonding semiconductor chips to the support at one time. The bonding tool 17 is connected to a moving mechanism. The bonding tool 17 includes an inner lead of the TAB tape 29 sent from the tape transport unit to a bonding position and a bump of the semiconductor chip 21 held on the positioning stage 3. The semiconductor chip is mounted on a TAB tape as a support by collective joining in a state where the electrodes are aligned. As described above, in the present embodiment, the inner lead bonding apparatus 1
A positioning section 11 is provided around the chip mounting surface 8 of the stage section 7, and the position of the semiconductor chip 21 mounted on the stage section 7 is mechanically corrected by the positioning section 11. After the position correction, the position recognition means 16 detects a recognition pattern of the semiconductor chip held and fixed on the stage unit 7, and based on the detection result of the recognition pattern, corrects the position of the semiconductor chip of the stage unit 7. With this configuration, the semiconductor chips can be accurately positioned in a short time without being influenced by the chip placement accuracy of the transfer means, and the processing efficiency of the apparatus can be improved. The mechanical position correction of the semiconductor chip is provided so as to surround the stage 7, and the semiconductor chip supplied to the stage 7 is guided by the tapered surface 15 to the chip mounting surface 8. Is corrected by its own weight, so that the semiconductor chip 21 is no longer mechanically pushed, so that the semiconductor chip can be prevented from being damaged due to mechanical pushing.

Next, a method for manufacturing a TCP semiconductor device to which the present invention is applied will be described.

First, a semiconductor wafer 18 used for manufacturing a semiconductor device is one in which a predetermined circuit is formed on a substrate on a disk made of Si (silicon) through a process such as diffusion or the like. As shown in a)
In a state where the circuit formation surface is on the upper side, it is adhered and fixed to an adhesive tape 20 adhered to a frame member (wafer ring) 19. As the adhesive tape 20, for example, UV (Ultra Vi
olet) tape or the like is used. The semiconductor wafer 18 adhered and fixed to the frame member 19 is transferred to, for example, a dicing process, and cut and separated into individual semiconductor chips 21.

In the dicing step, the frame member 19
As shown in FIG. 5B, the semiconductor wafer 18 adhered and fixed to the substrate is cut by a dicing blade 22 in a high-speed rotation state, and separated into individual semiconductor chips 21. The dicing process of the semiconductor wafer 18 uses, for example, a full cut method for completely cutting the semiconductor wafer. Here, the dicing process is cut and separated by a full cut method. However, since the semiconductor chips 21 are respectively adhered and fixed to an adhesive tape, they are held at predetermined portions even after the cut and separated. The dicing process may use a half-cut method or a semi-full-cut method. Then, the dicing process is completed, and the semiconductor wafer 18 cut and separated for each semiconductor chip is transferred to a pickup process.

In the pick-up step, the adhesive tape 20 on which the semiconductor wafer 18 having been subjected to the dicing process is adhered and fixed is irradiated with ultraviolet rays in advance, so that the adhesive force of the adhesive tape is reduced. Then, after positioning the frame member 19 to which the semiconductor chip 21 on which the dicing process has been completed is adhered and fixed, for example, a semiconductor chip
The push-up pin 25 is disposed below the semiconductor chip 21 and the collet 6 is disposed above the semiconductor chip 21 to be picked up. Then, as shown in FIG. 5C, the push-up pins 25 are raised, so that the semiconductor chip 2
1 is pushed up and the semiconductor chip 2 is removed from the adhesive tape.
1 is peeled off. With the rise of the push-up pin, the collet arranged above descends, and the push-up pin 25
The semiconductor chip pushed up by the above is vacuum-adsorbed by the collet. After the collet 6 sucking the semiconductor chip 21 rises to a predetermined height, the collet 6
Is moved above the storage tray 26. Then, the collet 6 is lowered, and the semiconductor chip 21 is stored in the cavity 27 of the storage tray 26 as shown in FIG. And when the pickup is completed,
The storage tray storing the semiconductor chips 21 is transferred to a bump forming step.

In the bump forming step, a bump electrode 28 is formed on each of a plurality of electrode pads provided on the semiconductor chip 21. In the bump forming step, for example, the semiconductor chip 21 stored in the storage tray 26 is used.
However, after the tip of a wire made of gold (Au) or the like is melted to form a ball portion while being positioned and held on a heat stage (not shown), the ball portion is pressed against the electrode pad of the semiconductor chip 21 while being pressed. Apply ultrasonic vibration,
The ball part is joined to the electrode pad. Next, the ball portion at the tip cuts off the wire bonded to the electrode pad. The cut wire is broken at the recrystallized region, and a bump electrode 28 is formed on the electrode pad. After the bump electrodes 28 are formed on all the electrode pads of the semiconductor chip 21, the bump electrodes 28 on the semiconductor chip 21 are flattened. As a result, the height of the bump electrodes formed on the semiconductor chip can be made substantially uniform. Then, the bump forming step is completed, and the semiconductor chip 21 having the bump electrodes 28 formed on one surface is placed in the storage tray 2 as shown in FIG.
6 and is transferred to the inner lead bonding step.

In the present embodiment, the bump electrodes are formed after the semiconductor wafer is divided into individual semiconductor chips, but the bump electrodes are formed on the individual semiconductor chips at the stage of the semiconductor wafer. May be.

The storage tray 26 storing the semiconductor chip 21 on which the bump electrodes 28 are formed is set, for example, at a predetermined position of the chip supply unit 2 of the inner lead bonding apparatus 1. A TAB tape 29 is set in a tape supply section (not shown) of the inner lead bonding apparatus 1 in a state wound around a reel, and the TAB tape 29 is intermittently supplied to a bonding position. I have.

The unit frame of the TAB tape 29 is
For example, the unit frame is configured as shown in FIG. 6, and the unit frames are formed continuously in the tape transport direction. The TAB tape 29 is obtained by forming a conductive pattern (film lead) 31 made of copper (Cu) or the like on an insulating thin film substrate 30 made of, for example, a polyimide resin. The film lead 31 can be formed in a predetermined shape by, for example, etching. An opening 32 for connecting a semiconductor chip is provided at a substantially central portion of the TAB tape 29.
8 is provided in accordance with the arrangement. In the present embodiment, since the center pad type semiconductor chip having the electrode pads arranged at substantially the center is used, the TAB lead 2 is used.
An opening 32 is formed substantially in the center of the opening 9 in a rectangular shape. One end (inner part) of the film lead 31 is provided in the opening 32, and the other end (outer part) of the film lead 31 extends along the tape transport direction. For example, in FIG. A film lead 31 extends from the part 32 in the left-right direction. A plurality of sprocket holes 33 are provided in the vicinity of the end of the TAB tape 29, and the sprocket holes 33 are arranged at predetermined intervals along the tape transport direction so that the TAB tape 29 can be transported and positioned. Have been. Such a TAB tape 29 is wound around a reel and set in a TAB tape supply section of the inner lead bonding apparatus 1.

In the inner lead bonding apparatus 1, the collet 6 moves onto the storage tray 26 set at a predetermined portion of the chip supply section 2, and the semiconductor chip 21 stored in the cavity of the storage tray 26. Is held by suction. Then, the collet 6 holding the semiconductor chip by suction is transported above the positioning stage 3 located at the pre-alignment site as shown in FIG. By releasing the holding by the collet 6,
The semiconductor chip 21 is supplied to the stage section 7 of the positioning stage 3. As described above, the semiconductor chip 21 supplied to the positioning stage 3 is positioned around the positioning unit 1 so as to surround the stage unit 7.
By (1), the position shift of the semiconductor chip 21 in the X, Y and θ directions is corrected by its own weight, and the semiconductor chip 21 is mounted on the chip mounting surface 8 of the stage section 7. After the semiconductor chip 21 is mounted on the stage 7, the semiconductor chip 21 is sucked and held from the suction holes 9 provided in the stage 7.
Thereby, the displacement of the semiconductor chip due to the movement of the positioning stage 3 or the like can be prevented.

After the semiconductor chip 21 is mounted on the stage 7 of the positioning stage 3, a recognition pattern of the semiconductor chip is detected by the position recognition means 16 provided above the positioning stage. Positioning stage 3 based on the detection result of the recognition pattern
Are moved in the XY and θ directions, and the position of the semiconductor chip is corrected.

In this embodiment, the semiconductor chip 21 is mechanically corrected by the positioning unit 11 when the positioning stage 3 is mounted on the stage. Is position-corrected at a predetermined portion of the stage section 7. Therefore, it is possible to detect the recognition pattern of the semiconductor chip by the position recognition means 16 in a short time.

After the position correction of the semiconductor chip by the position recognition means 16 is completed, the positioning stage 3 holding the semiconductor chip 21 by suction is moved to the bonding site as shown in FIG. In the positioning stage 3 moved to the stage section, the positioning section 11 is moved downward, and the upper portion of the stage section 7 holding and fixing the semiconductor chip 21 is exposed. The TAB tape 29 supplied to the bonding position by the tape transport means is positioned and held by a clamper 34 or the like, and the positioning stage 3 holding and fixing the semiconductor chip is a TAB tape.
It is moved below the tape 29.

The film lead 3 of the TAB tape 29
9 is aligned with the bump electrodes 28 of the semiconductor chip 21 held by the positioning stage 3 in FIG.
As shown in (1), the film lead 31 is collectively heated and pressed by the bonding tool 17 to the bump electrode 28 to join the film lead 31. In the TAB tape 29 on which the inner lead bonding process has been completed, for example, as shown in FIG. 10, the inner portion of the film lead is bonded to the bump electrode 28, whereby the semiconductor chip 21 is mounted on the TAB tape 29. Then, the TAB tape 29 on which the semiconductor chip 21 is mounted is wound on a reel of a tape collecting unit (not shown) by the tape transport unit, and the inner lead bonding process is completed. The TAB tape on which the semiconductor chip is mounted is transferred to a resin sealing step.

In the resin encapsulation step, the surface of the semiconductor chip 21 mounted on the TAB tape 29 on the circuit forming surface is
A thermosetting resin is supplied to the inner portion of the film lead 31 joined to the semiconductor chip 21 from a nozzle attached to a dispenser (not shown) by potting. The thermosetting resin is made of, for example, an epoxy resin, and the supply of the resin by the potting is performed by, for example, a drawing method. The TAB tape 29 in which the thermosetting resin is supplied on the semiconductor chip 21 is cured at a predetermined temperature, whereby the resin supplied to the TAB tape 29 is cured, and FIGS. 11A and 11B are used. The semiconductor chip 21 mounted on the TAB tape 29 as shown in FIG.
And a sealing portion 35 covering the inner portion 31a of the film lead 31 joined to the semiconductor chip.

Then, the TAB tape having undergone the sealing step is subjected to a cutting and molding step to form a TCP as shown in FIG.
Semiconductor device 36 is obtained.

As described above, in the inner lead bonding step, after the mechanical position is corrected, the position of the semiconductor chip is recognized by the position recognition means, and the position of the semiconductor chip is corrected based on the recognition result. The recognition time of the recognition pattern can be reduced, and the processing efficiency of the inner lead bonding step can be improved.

Although the invention made by the inventor has been specifically described based on the embodiment, the invention is not limited to the embodiment and can be variously modified without departing from the gist of the invention. Needless to say. In the present embodiment, the case where the present invention is applied to the inner lead bonding technology of the TCP type semiconductor device has been described.
The present invention can be applied to position correction of a semiconductor device having a structure in which a semiconductor chip is mounted from below a support, such as a semiconductor device having a LOC (Lead On Chip) structure as shown in FIG.

[0033]

The effects obtained by typical ones of the inventions disclosed in the present application will be briefly described as follows.

That is, in the method of manufacturing a semiconductor device, a semiconductor wafer or a semiconductor chip picked up from a storage tray is supplied to a stage, and the position of the semiconductor chip supplied to the stage is mechanically corrected. The semiconductor chip held and fixed to the stage unit is held and fixed to the unit, the position of the semiconductor chip held and fixed to the stage unit is recognized, and the stage unit is moved based on the position recognition result. The position is corrected, and the semiconductor chip whose position has been corrected is bonded to the support, so that the recognition pattern of the semiconductor chip by the position recognition means can be easily detected, and the semiconductor chip can be efficiently and accurately placed on the support. Can be bonded.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram showing an inner lead bonding apparatus to which the present invention is applied.

FIG. 2 is a plan view showing a positioning stage according to an embodiment of the present invention.

FIG. 3 is a cross-sectional view showing a positioning stage according to an embodiment of the present invention.

FIG. 4 is a diagram showing an operation of a positioning section of the positioning stage according to one embodiment of the present invention.

FIG. 5 is a sectional view showing a process flow from a step of mounting bumps on a semiconductor chip from a semiconductor wafer.

FIG. 6 is a diagram showing a unit frame configuration of a TAB tape.

FIG. 7 is a cross-sectional view illustrating supply of a semiconductor chip to a positioning stage of the inner lead bonding apparatus according to one embodiment of the present invention.

FIG. 8 is a cross-sectional view showing a process for recognizing the position of a semiconductor chip held on a positioning stage according to an embodiment of the present invention.

FIG. 9 is a sectional view showing an inner lead bonding process according to an embodiment of the present invention.

FIG. 10 TCP after inner lead bonding processing
FIG. 3 is a cross-sectional view illustrating the semiconductor device of FIG.

FIG. 11 is a diagram illustrating a TCP semiconductor device after completion of a resin sealing process.

FIG. 12 is a cross-sectional view illustrating a TCP semiconductor device after completion of the cutting and forming process.

FIG. 13 is a cross-sectional view illustrating a configuration of a semiconductor device having a LOC structure.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Inner lead bonding apparatus, 2 ... Chip supply part, 3 ... Positioning stage, 4 ... Tape transport means, 5 ...
Bonding part, 6 ... Collet, 7 ... Stage part, 8 ...
Chip mounting surface, 9: suction hole, 10: base portion, 11: positioning portion, 12: positioning block, 13: elastic body, 14
... Guide rod, 15 ... Tapered surface, 16 ... Position recognition means, 1
7 bonding tool, 18 semiconductor wafer, 19
Frame member, 20: adhesive tape, 21: semiconductor chip, 2
2 ... dicing blade, 23 ... dicing line, 2
4 ... thrust means, 25 ... thrust pin, 26 ... storage tray, 27 ... cavity, 28 ... bump electrode, 29 ... T
AB tape, 30: thin film substrate, 31: film lead,
Reference numeral 32 denotes an opening for connecting a chip, 33 denotes a sprocket hole, 34 denotes a clamper, 35 denotes a sealing portion, 36 denotes a semiconductor device, 37 denotes an insulating tape, 38 denotes a lead, and 39 denotes a wire.

Claims (3)

[Claims] A step of supplying a semiconductor wafer or a semiconductor chip picked up from a storage tray to a stage, mechanically correcting the position of the semiconductor chip supplied to the stage, and placing the semiconductor chip on the stage. A step of holding and fixing, a step of recognizing a position of the semiconductor chip held and fixed to the stage, and a step of moving the stage based on the position recognition result to position the semiconductor chip held and fixed to the stage. A method of manufacturing a semiconductor device, comprising: a step of correcting the position; and a step of bonding the position-corrected semiconductor chip to a support. 2. The mechanical position correction is performed by a positioning portion having a tapered surface disposed near a periphery of the stage portion.
2. The method according to claim 1, wherein the position of the semiconductor chip supplied to the stage is mechanically corrected along the tapered surface. 3. A stage portion having a chip holding surface for holding and fixing a semiconductor chip, and a vertically movable portion provided around a periphery of the chip holding surface of the stage portion, wherein the semiconductor chip supplied to the chip holding surface is tapered. A positioning unit that corrects the position along the surface, a position recognition unit that is provided above the stage unit and that recognizes the position of the semiconductor chip held and fixed on the chip holding surface, based on a recognition result of the position recognition unit. An apparatus for manufacturing a semiconductor device, comprising: a moving mechanism of the stage unit capable of correcting a position of a semiconductor chip; and a bonding mechanism of mounting a semiconductor chip held and fixed on the stage unit on a support.