JP2002359340A - Multilayer circuit board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a multilayer circuit board where the electric connection between an insulating cover and a multilayer board is stable and besides the downsizing is possible. SOLUTION: For this multilayer circuit board 10, a surface circuit pattern 62 is made on the insulating cover 6. Moreover, the surface wiring layer 2 of the multilayer board 1 and the surface circuit pattern 62 of the insulating cover 6 are electrically connected with each other by bonding wire 63 and a chip-form electronic part 70. Moreover, a step 7a is provided all around the inwall of a cavity 7. Then, the periphery of the rear of the insulating cover 6 and the step of the cavity 7 are joined with each other by seal member 64.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer circuit board in which a cavity for an electronic component provided in the multilayer board is covered with an insulating lid.

[0002]

2. Description of the Related Art For example, a multilayer circuit board containing an electronic component element such as a surface acoustic wave filter or an IC chip in a cavity is provided with an insulating cover to protect the electronic component element and the IC chip from dust and moisture. And a metal lid.

[0003] Such a multilayer circuit board is generally provided with a cavity having an opening on the surface of the multilayer substrate, and mounted with electronic component elements such as surface acoustic wave filters and IC chips on the bottom surface of the cavity. Other circuit components such as an IC and a capacitor are mounted around the cavity opening. In addition, since an insulating lid or a metallic lid is simply mounted on the opening of the cavity, the lid portion is restricted in arranging the surface wiring layer on the surface of the multilayer substrate, and the dead of circuit components is reduced. It becomes space.

In order to solve such a problem, FIG.
As shown in FIG. 6, using an insulating material for the lid 46, the surface circuit pattern 42 is formed on the insulating lid 46, and
A predetermined circuit component 60 is mounted (Japanese Patent No. 2682)
No. 477). In the drawing, reference numeral 1 denotes a multilayer substrate, and reference numeral 45 denotes an electronic component element.

[0005]

However, according to the multilayer circuit board 40, the terminal electrode 44 connected to the circuit pattern 42 on the front surface side is formed on the back surface of the insulating cover 46, and the stepped portion of the cavity 7 is formed. 7a has an internal wiring layer 4
Is formed. Then, the terminal electrode 44 and the pad 74 are connected via solder or the like.

In such a structure, the connecting portion between the two is
Since it is located on the back surface of the insulating lid 46, the connection state could not be visually confirmed, and the connection reliability was low. In the above-described structure, the terminal electrode 44 is provided on the back side of the lid 46.
Was formed, and it was very difficult to hermetically seal the cavity 7.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has as its object to provide an electric circuit between a surface circuit pattern formed on a lid for sealing an opening of a cavity and a surface wiring layer on a multilayer substrate side. It is an object of the present invention to provide a multi-layer circuit board in which the connection state of a typical connection can be visually observed and the size can be reduced. Another object is to provide a multilayer circuit board capable of hermetically sealing electronic component elements and IC chips housed in a cavity.

[0008]

SUMMARY OF THE INVENTION A multilayer circuit board according to the present invention has an electronic component element or IC having a surface wiring layer formed on the surface, an opening on the surface, and a step on the inner wall.
A multilayer substrate having a cavity in which the chip is housed,
In a multilayer circuit board comprising an insulating lid placed on the step and sealing an opening of the cavity, the insulating lid has a surface circuit pattern formed on a surface thereof, and the surface circuit pattern is The multilayer circuit board is connected to the surface wiring layer on the surface side of the multilayer board and the insulating lid.

The surface wiring layer and the surface circuit pattern are connected by bonding wires.

[0010] Further, a chip-shaped electronic device in which the surface of the multilayer substrate and the surface of the insulating lid are coplanar, and has at least one pair of terminal electrodes so as to extend over the surface of the multilayer substrate and the surface of the insulating lid. The components were arranged, and one terminal electrode and the surface wiring layer were electrically connected to each other, and the other terminal electrode was electrically connected to the surface circuit pattern.

[0011] Further, a multilayer substrate having a surface wiring layer formed on the surface thereof, an opening on the surface thereof, and a cavity for accommodating an electronic component element or an IC chip having a stepped portion on the inner wall, is formed on the stepped portion. In a multilayer circuit board comprising a mounting and an insulating lid for sealing the opening of the cavity,
In the insulating lid, a surface circuit pattern is formed on the surface, an end face electrode is formed on an end face, and an electrode pad is formed on a step portion of the cavity, and the end face electrode and the electrode pad are It is a multilayer circuit board that is electrically connected. The step portion is provided around the entire inner wall of the cavity, and the outer peripheral portion of the back surface of the insulating lid is joined to the step portion.

The sealing of the opening of the cavity is performed by bonding the outer peripheral portion of the back surface of the insulating lid on the step portion with a low melting point glass or a thermosetting adhesive.

The sealing of the opening of the cavity is performed by bonding the seal conductive film formed on the step portion and the seal conductive film formed on the outer peripheral portion of the back surface of the insulating lid with solder. .

The sealing of the opening of the cavity is performed inside the electrode pad formed on the step.

[0015]

In the present invention, a surface wiring layer is formed on the surface of the multilayer substrate, and a surface circuit pattern is formed on the surface of the insulating lid. Accordingly, since a predetermined circuit can be formed on the entire surface of the multilayer circuit board, the density of the surface wiring and circuit components can be increased, and the size can be reduced.

Further, since the connection between the surface circuit pattern of the insulating lid and the surface wiring layer of the multilayer substrate is made on the front side of the insulating lid, the electrical connection state can be visually confirmed. Connection reliability is improved.

By connecting the connection between the surface wiring layer and the surface circuit pattern to the circuit function of the chip-like component, a predetermined circuit is formed and at the same time, both connections are made. Become.

In another aspect of the present invention, the surface circuit pattern on the side of the insulating lid is drawn out to the end face of the insulating lid, extends from the internal wiring layer on the multilayer substrate side, and is connected to a pad formed on the step portion. You. Also in this case, the connection state of the multilayer circuit board and the insulating lid can be visually observed from the front surface side of the multilayer circuit board, thereby improving the connection reliability.

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a multilayer circuit board according to the present invention will be described in detail with reference to the drawings.

FIG. 1 is an external perspective view of a multilayer circuit board according to the present invention. FIG. 2 is a sectional view of the multilayer circuit board of FIG.

In the figure, a multilayer substrate 1 is made of ceramic,
Insulating layers 1a to 1f made of glass-ceramic material or the like are laminated, and an internal wiring layer 4 forming a predetermined circuit network is arranged between the insulating layers 1a to 1f. The internal wiring layer 4 has a predetermined function other than the wiring network, such as a counter electrode that forms a capacitance component, a coil pattern that forms an inductance, and a microstrip line. Also, via-hole conductors 3 are formed in the insulating layers 1a to 1f so as to penetrate the layers in the thickness direction.

Further, a surface wiring layer 2 is formed on the surface of the multilayer substrate 1, and a circuit component 8 constituting a predetermined circuit is mounted thereon. The surface wiring layer 2, the via-hole conductor 3, and the internal wiring layer 4 are made of an Ag-based material (Ag alone, Ag-P
d, an Ag alloy such as Ag-Pt) as a main component.

In the multilayer substrate 1, a cavity 7 having a surface opening is formed. An electronic component element such as a surface acoustic wave filter 5 and I
A C chip is mounted. On the inner wall of the cavity 7, a step portion 7a is provided around the entire circumference. The step 7 a is a portion that supports the insulating lid 6. Then, the insulating lid 6 is placed on the step 7a, and the opening of the cavity 7 is sealed.

A wiring layer including a mounting electrode pad 71 made of a conductor such as Ag is formed on the bottom surface of the cavity 7. The mounting electrode pad 71 is provided with an electronic component element such as a surface acoustic wave filter 5 or an IC chip.
1 and are mechanically joined together. Note that the electronic component elements and the IC chip may be electrically connected by bonding wires other than the face bonding.

The surface of the stepped portion 7a provided around the entire inner wall of the cavity 7 and the outer peripheral portion of the back surface of the insulating lid 6 are formed of a sealing member 6 made of low melting glass or a thermosetting adhesive.
4 are joined. Thus, the inside of the cavity 7 can be hermetically sealed. Further, depending on the type of the electronic component element or the IC chip, for example, in the surface acoustic wave filter 5 or the like, the inside of the cavity 7 may be filled with a predetermined gas in order to stabilize the characteristics. Moreover, you may fill with resin as needed.

A surface circuit pattern 62 for forming a predetermined wiring network is formed on the surface of the insulating lid 6 together with the surface wiring layer 2, the internal wiring layer 4, and the via-hole conductor 3 of the multilayer substrate 1. Circuit component 60 forming a circuit
Is arranged. Specifically, the insulating lid 6 is made of a ceramic substrate such as a single-layer or multilayer ceramic material or a glass-ceramic material, or a glass-epoxy substrate.
Then, the circuit pattern 62 is formed on the surface by an ordinary well-known method, for example, a thick film method or a copper foil forming method.

The electrical connection between the surface wiring layer 2 on the side of the multilayer substrate 1 and the surface circuit pattern 62 of the insulating lid 6 is made by bonding wires 63 as shown in FIG. As described above, by making the electrical connection between the two by the bonding wires 63, even if a slight gap is generated between the opening of the cavity 7 of the multilayer substrate 1 and the insulating cover 6, Even if there is a step between the surface of the first cover 1 and the surface of the insulating lid 6, stable connection is possible. In addition, the connection state can be visually checked from the front side of the multilayer substrate 1.

Further, as another electrical connection method, as shown in FIG. 1, a part of the surface wiring layer is extended to the vicinity of the opening of the cavity 7, and a part of the surface circuit pattern 62 is simultaneously formed. Is extended to the vicinity of the outer periphery of the insulating lid 6, and a chip-shaped electronic component 70 having at least a pair of terminal electrodes is provided.
Are arranged so as to straddle the multilayer substrate 1 and the insulating lid 6, and the terminal electrodes of the chip-shaped electronic component 70 are connected to the surface wiring layer 2 and the surface circuit pattern 62, respectively. That is, the circuit function of the chip-shaped electronic component 70, for example, in a chip-shaped multilayer ceramic capacitor, both are connected with a capacitance component. In a chip resistor, both are connected by a resistance component. In a chip coil, both are connected by an inductance component. Further, a chip component having three or more terminals, such as a transistor or a composite electronic component, may be used. At this time, the surface of the multilayer substrate 1 and the surface of the insulating lid 6 need to be substantially coplanar.

Hereinafter, a method for manufacturing a multilayer circuit board according to the present invention will be described.

A green sheet made of an insulating material to be the multilayer substrate 1, for example, a glass-ceramic material is formed. Note that this green sheet is a large green sheet including a plurality of substrate regions serving as the substrate 1. When a capacitance component or a microstrip line is formed inside the multilayer substrate 1, it is necessary to use an insulating material in consideration of dielectric characteristics.

Next, a through hole serving as a via hole conductor 3 is formed in each substrate region on the green sheet by punching, and an Ag-based material is formed in each of the substrate regions on the green sheet by screen printing. The conductive paste is filled, and a conductive film or the like to be the internal wiring layer 4 is formed. When forming the through hole, a portion to be the cavity 7 may be punched with a punch. In forming a conductive film to be the internal wiring layer 4, a conductive film to be the mounting electrode pad 71 is formed in a portion to be a bottom surface of the cavity 7. Further, a conductor film to be the surface wiring layer 2 and a conductor film to be various electrode pads are formed on the outermost green sheet.

The green sheets on which the conductor films are formed as described above are laminated and integrated according to the lamination order to form a large unfired large substrate composed of a plurality of substrate regions. Thereafter, if necessary, division grooves are formed according to the shape of each multilayer circuit board.

Next, the large substrate in the unfired state is fired in an air atmosphere or a neutral atmosphere. The firing conditions are determined by the internal wiring material and the insulating material.

In this step, a large-sized multilayer circuit board having the internal wiring layer 4 and the via-hole conductor 3 formed in each substrate region to be the multilayer substrate 1 and the surface wiring layer 2 formed on the surface is obtained. Become. Further, a cavity 7 is provided on the surface of the substrate 1.
Are formed, and mounting electrode pads 71 are formed on the bottom surface of the cavity 7.

Thereafter, if necessary, a thick-film resistance element connected to the surface wiring layer 2 and an insulating protective film having a predetermined shape are formed.

Next, the circuit component 8 is mounted on the surface wiring layer 2 formed around the cavity 7 on the surface of the substrate 1 by soldering or the like.

Next, electronic components such as a surface acoustic wave filter 5 and an IC chip are mounted in the cavity 7. For example, the bumps 51 are formed on the mounting surface side electrode portion of the surface acoustic wave filter 5 and are bonded by ultrasonic thermocompression so that the bumps 51 abut the mounting electrode pads 71 of the cavity 7.

The insulating cover 6 is provided with a surface circuit pattern 6.
2 is a substrate formed by a thick film technique or a copper foil forming method.

Next, the opening of the cavity 7 is hermetically sealed using the above-mentioned insulating lid 6. That is, the cavity 7
A sealing member 64 such as a low-melting glass or a thermosetting adhesive is applied by a dropping method or the like so as to be provided on the stepped portion 7a, and then the insulating lid 6 is placed so that the sealing member 64 is sandwiched. Place on 7a and give the load,
Heat treatment is performed to perform hermetic sealing. Next, another circuit component 60 is mounted on the surface circuit pattern 62 of the insulating lid 6 by soldering or the like.

After that, the surface circuit pattern 62 on the insulating lid 6 and the surface wiring layer 2 on the substrate 1 are connected by bonding wires 63 such as Au wire or Al wire, and the surface on the insulating lid 6 side is connected. The circuit pattern 62 is electrically connected to the surface wiring layer 2 on the multilayer substrate 1 side.

As another electrical connection, the surface circuit pattern 62 of the insulating lid 6 and the surface wiring layer 2 of the multilayer substrate 1 are used.
And a chip-like electronic component 7 having two terminal electrodes
0, and the surface circuit pattern 62 and the surface wiring layer 2 are electrically connected.

Finally, a large-sized substrate is separated for each substrate region, and a multilayer circuit board 10 is obtained.

As the above-described electrical connection method, FIGS. 1 and 2 show a state of connection using the bonding wire 63 and the chip-shaped electronic component 70. A method may be used.

Thus, according to the multilayer circuit board 10 of the present invention, since the surface circuit pattern 62 is formed on the insulating lid 6, the area for forming the surface wiring of the entire multilayer circuit board 10 is increased, and the conventional dead space is reduced. Therefore, high-density mounting becomes possible and miniaturization becomes possible.

In the above-described embodiment, the connection between the surface circuit pattern 62 on the insulating lid 6 side and the surface wiring layer 2 of the multilayer substrate 1 can be visually confirmed. The connection reliability is greatly improved as compared with the case where a conventional connection is made. In addition, the step 7 of the cavity 7
A sealing member 64 is disposed between the insulating lid 6 and the outer peripheral portion of the rear surface of the insulating lid 6 to form a surface circuit pattern 62 of the insulating lid 6, and the insulating lid 6 seals the cavity 7 in an airtight manner. Can be sealed.

FIG. 3 is a sectional view of another embodiment of the multilayer circuit board of the present invention. In the embodiment of FIG. 3, the electrical connection between the predetermined wiring on the multilayer substrate 1 side and the circuit pattern 62 on the insulating lid 6 side is based on the electrode pad (extending from the internal wiring layer 2) formed on the stepped portion 7 a. ) 24 and the end face electrode 13 formed on the end face of the insulating lid 6. The end surface electrode 13 has, for example, a concave portion extending in the thickness direction on the end surface of the insulating lid 6, and the terminal electrode 13 is formed on the inner wall surface of the concave portion. The terminal electrode 13 is connected to a circuit pattern 62 or a circuit component 60 formed on the surface of the insulating lid 6 via the inside of the substrate or an end surface of the substrate. In this connection state, the electrical connection between the terminal electrode 13 on the end face of the insulating lid 6 and the step 7a of the cavity 7 can be visually observed from the gap between the cavity 7 of the multilayer substrate 1 and the insulating lid 6. it can. This electrical connection is made with, for example, solder or conductive resin paste.

FIG. 4A shows the surface wiring layer 2 of the multilayer substrate 1, the insulating lid 6, the surface circuit pattern 62, and the surface of the multilayer circuit substrate 10 as shown in FIGS. And shows a state in which another seal member is used. That is, in FIGS. 1 and 2, a low-melting glass or a thermosetting resin is used. At the same time, the seal conductor film 21 is also formed around the outer peripheral portion of the back surface of the insulating lid 6. The two seal conductor films 21 and 23 are sealed with solder or the like. Note that the seal conductor film 21 may be formed on the entire back surface of the insulating lid 6. Particularly, by setting the sealing conductor film 21 to the ground potential, the electronic component element 5 and the IC chip housed in the cavity 7 can be protected from unnecessary electromagnetic waves.

FIG. 4B is an enlarged view showing a sealed portion in the multilayer circuit board of FIG. Since the multilayer circuit board 10 shown in FIG. 3 is electrically connected to the multilayer substrate 1 by the end face of the insulating lid 6, it is necessary to pay close attention to the sealing between the insulating lid 6 and the multilayer substrate 1. Becomes That is, this sealing method should avoid the sealing by solder bonding as shown in FIG. 4A, particularly when achieving hermetic sealing. That is, when the solder for sealing spreads and reaches the end face electrode 13 on the end face portion of the insulating lid 6, a fatal problem occurs in the electrical connection. For this reason,
In FIG. 4B, it is important to seal using a sealing member 64 such as a low-melting glass or a thermosetting resin. In such a structure, the electrical connection between the insulating lid 6 and the multilayer substrate 1 is performed by soldering, and hermetic sealing is performed with an insulating material. Here, what is important is that the step 7
On a, it is important that the hermetic sealing region is located inside the electrical connection region (the end face of the insulating lid).

It should be noted that the present invention is not limited to the above-described example, and various changes and improvements can be made without departing from the spirit of the present invention.

[0050]

According to the multilayer circuit board of the present invention, since the surface circuit pattern is formed on the insulating lid, the dead space on the surface of the multilayer circuit board can be eliminated, and high-density mounting on the surface can be achieved. The size can be reduced.

The electrical connection between the predetermined circuit network on the multilayer substrate side and the predetermined circuit network on the insulating lid body is made at the surface of the multilayer substrate and the insulating lid body, or on the step portion of the cavity. And the end face of the insulating lid. That is, it is not performed on the back side of the insulating lid. Therefore, since the electrical connection between the two can be confirmed by visual observation from the front side of the multilayer circuit board, the reliability of the electrical connection between the two is improved. Also, since the back surface of the insulating lid is occupied by the sealing means for hermetically sealing the cavity, the electronic component elements, IC chips, and the like are kept airtight while maintaining the high-density mounting on the surface of the multilayer circuit board as described above. It can be hermetically sealed.

[Brief description of the drawings]

FIG. 1 is an external perspective view of a multilayer circuit board according to the present invention.

FIG. 2 is a cross-sectional view of the multilayer circuit board of FIG.

FIG. 3 is a sectional view of another embodiment of the multilayer circuit board of the present invention.

FIGS. 4A and 4B are partial cross-sectional views of a hermetically sealed portion of the multilayer circuit board of the present invention.

FIG. 5 is a perspective view of a conventional multilayer circuit board before a lid is sealed.

FIG. 6 is a sectional view of the multilayer circuit board of FIG. 5;

[Explanation of symbols]

 10, 40 Multilayer circuit board 1 Base 1a to 1f Insulating layer 2 Surface wiring layer 3 Via hole conductor 4 Internal wiring layer 5 Electronic component element or IC chip 6, 46 Insulating lid 62, 42 Surface circuit pattern 64 Seal member 63 Bonding wire 60 Circuit component 70 Chip-shaped electronic component 7 Cavity 7a Step 13 End electrode 24 Electrode pad

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H01L 23/12 F

Claims (8)

[Claims] 1. A method for forming a surface wiring layer on a surface,
A multilayer substrate having an opening on the surface and having a cavity for accommodating an electronic component element or an IC chip having a step on the inner wall, and an insulating lid placed on the step and sealing the opening of the cavity. In the multilayer circuit board, a surface circuit pattern is formed on a surface of the insulating lid, and the surface circuit pattern is connected to the surface wiring layer on a surface side of the multilayer substrate and the insulating lid. A multilayer circuit board characterized by the above. 2. The multilayer circuit board according to claim 1, wherein said surface wiring layer and said surface circuit pattern are connected by bonding wires. 3. A chip-like electronic device wherein a surface of the multilayer substrate and a surface of the insulating lid are flush with each other, and at least a pair of terminal electrodes are provided so as to extend over the surface of the multilayer substrate and the surface of the insulating lid. 2. The multilayer circuit board according to claim 1, wherein components are arranged, and one terminal electrode and the surface wiring layer are electrically connected to each other, and the other terminal electrode is electrically connected to the surface circuit pattern. 4. A method for forming a surface wiring layer on a surface,
A multilayer substrate having an opening on the surface and having a cavity for accommodating an electronic component element or an IC chip having a step on the inner wall, and an insulating lid placed on the step and sealing the opening of the cavity. In the multilayer circuit board, a surface circuit pattern is formed on a surface of the insulating lid, and an end surface electrode is formed on an end surface, and an electrode pad is formed on a step portion of the cavity. And the electrode pads are electrically connected to each other. 5. The stepped portion is provided around the entire inner wall of the cavity, and the outer peripheral portion of the back surface of the insulating lid is joined to the stepped portion. 4. The multilayer circuit board according to 4. 6. The method according to claim 6, wherein the sealing of the opening of the cavity is performed by bonding an outer peripheral portion of a back surface of the insulating lid on the step portion with a low melting point glass or a thermosetting adhesive. 5. The multilayer circuit board according to 1 or 4. 7. The sealing of the opening of the cavity is performed by joining a seal conductive film formed on the step portion and a seal conductive film formed on the outer peripheral portion of the back surface of the insulating lid with solder. 5. The multilayer circuit board according to claim 1, wherein: 8. The multilayer circuit board according to claim 4, wherein sealing of the opening of the cavity is performed inside an electrode pad formed on the step portion.