JP2002333985A - Register saving and restoring method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a register saving and restoring method capable of efficiently executing processing to save the contents of a register related with a program which is being executed at the time of switching a program, and then to restore the contents of the register related with the changed program. SOLUTION: The operation to save and restore the contents of a register corresponding to a program at the time of switching a program is controlled according to a process ID in a register saving and restoration control unit 16. In a process ID table 17, identification numbers for saving or restoring registers are stored for every process ID assigned to the program, and numbered corresponding to the process ID numbers, and constituted of a plurality of elements. Each of elements has a fields for every classification of registers to be saved and restored. Also, identification numbers related with the register saving and restoration are arranged in respective fields.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital signal processing device often used in information processing or digital signal processing, for example, which saves the contents of registers used in one program and saves the contents of registers in another program. Register save and restore method to restore
In particular, the present invention relates to a register saving / restoring method for efficiently saving and restoring registers at the time of program switching when executing a plurality of programs in parallel when executing and controlling a program.

[0002]

2. Description of the Related Art Applications of a digital signal processing apparatus including a register include control of external hardware and the like, in addition to numerical signal processing of digital signals. Generally, control of external hardware is often performed for a plurality of devices. In many cases, it must be executed in real time according to the status of the control device. For example, in a mobile phone, in addition to signal processing for transmission / reception data, it is necessary to execute control of external hardware related to a transmission / reception system within a predetermined time. Each process exists as a program unit and is processed in parallel. In order to process programs in parallel, it is necessary to save the register state of the digital signal processing device before switching when switching the program being executed.

[0003] Digital signal processing devices are often used to efficiently process relatively small programs. For this reason, in addition to the registers in which functions such as arithmetic operation registers and data address registers are separated,
In order to execute repetitive processing at high speed, a register group dedicated to repetitive processing is often prepared.

As described above, when switching the program being executed, the contents of the registers are saved so that the program can be continued after execution of the next instruction, which is required by the switched program. It is necessary to restore the contents of the register. However, there are many registers to be saved and restored, and the amount of processing required for saving and restoring that occurs each time the program is switched becomes a problem.

[0005]

As described above, in the case where programs are executed in parallel, the registers prepared for efficiently executing the program, on the contrary, perform the processing required for saving and restoring the registers. There was a problem that the amount was increased.

The present invention has been made in view of such a situation, and has as its object to save the contents of registers relating to a program being executed at the time of program switching, and thereafter to save the contents of registers relating to a program after change. An object of the present invention is to provide a register save / restore method for efficiently executing a process of restoring contents.

Another object of the present invention is to efficiently cope with frequent program switching by efficiently executing the processing required for saving and restoring registers which occurs when the program is switched. An object of the present invention is to provide a register save / restore method.

[0008]

According to the present invention, an identification number is assigned to each program, and the data content of a register for temporarily storing data for executing the program is determined according to the program. Evacuating to the first storage means for storing data, and storing the data in the second storage means
In the register saving and restoring method for restoring the data content of the register from the storage means, the identification number of the program being executed is obtained, the executed program is temporarily stopped, and the second program is executed. By generating an interrupt signal for giving an instruction and detecting the interrupt signal, the register of the register is referenced with reference to the table in which the register and the identification number are associated based on the identification number of the program being executed. The contents are saved in the first storage means, and the identification number of the program being executed is changed to the identification number of the second program based on the interrupt signal, and based on the identification number of the changed second program. And refer to the table,
A register saving / restoring method is provided in which the contents of the register are restored from the second storage means.

[0009]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a configuration of a main part of a digital signal processing device for executing a register save / restore method according to an embodiment.

As shown in FIG. 1, the digital signal processing device of this embodiment has an interrupt control unit 11. The interrupt control unit 11 generates an interrupt signal for temporarily suspending the program being executed and executing a program prepared to be executed when the program being executed is interrupted. The interrupt signal is generated by an external instruction via an external bus or an instruction within a program. The cause of the interrupt is determined based on the interrupt signal, and an arithmetic process for coping with the cause of the interrupt is determined. Then, an arithmetic processing designation signal for designating the determined arithmetic processing is output to the program decoder unit 14. An arrow from above the interrupt control unit 11 in FIG. 1 is a signal line for interrupt control, and an interrupt signal is input from an external device or the like via this signal line.

The program address generation unit 12 is reset by a reset signal output from the interrupt control unit 11. Further, the arithmetic processing designation signal is output to a program decoder unit 14 described later. Then, based on the control from the program decoder unit 14, the address of the program necessary for performing the interrupt processing is generated. The generated program address is output to the program memory 13.

The program memory 13 stores a program in which the procedure of the arithmetic processing to be executed is described.
Then, the program memory 13 reads an instruction (encoded data) corresponding to the program address output from the program address generation unit 12 and outputs this data to the program decoder unit 14.

The program decoder unit 14 decodes data read from the program memory 13. A program counter (not shown) is controlled according to the decoding result. The program execution order is controlled by the program counter. Further, a hardware stack 15 is connected to the program decoder unit 14. Further, an arithmetic processing designation signal output from the interrupt control unit 11 is output to the program decoder unit 14. Then, based on the control from the program decoder unit 14, the program address necessary for performing the interrupt processing is generated by the program address generation unit 12.

In the hardware stack 15, data is stored when the value of a register is temporarily saved or a return address is entered when branching to a subroutine.

The process ID of the program being executed is output from the program decoder unit 14 to the register save / restore control unit 16. The process ID of the currently executed program is stored in the register save / restore control unit 16. Process I
D is assigned and assigned in advance for each program. In the register saving / restoring control unit 16, the operation of saving and restoring the contents of the register corresponding to the program when the program is switched is controlled according to the process ID. That is, the data address register 18, the arithmetic operation register 20, the general-purpose register 22, and the operation control unit 23 are instructed to start an operation of saving and restoring the contents of the register corresponding to the program. When the process ID changes, the register contents of the program before the change, that is, the currently executed program, are saved based on the register save / restore information derived from the process ID. And the process ID
After the change, that is, the register contents of the program to be executed next are restored based on the register save / restore information derived from the process ID after the change. The register save / restore control unit 16 stores the process ID of the currently executing program. Therefore, a new process I
When D is obtained from the program decoder unit 14,
The process refers to the process ID table 17 based on the currently executed process ID, and saves the registers according to the contents of the corresponding table. Then, the table is referenced according to the new process ID, and the register is restored according to the contents. In addition,
The contents of the registers for performing the save and the restoration are stored in the data memory 24 or in a bank-structured register. Saving and restoring the contents of these registers are executed with reference to the process ID table 17.
Then, the register save / restore control unit 16 identifies a register for executing save / restore.

The process ID table 17 stores an identification number for saving or restoring a register for each process ID assigned to a program. Numbering corresponding to the process ID number is performed, and is composed of a plurality of elements. Each element has a field for each register type such as an arithmetic operation register 20 and a data address register 18 to be saved and restored. In each field, an identification number related to register save / restore is arranged. These identification numbers indicate the numbers of storage destinations to be referred to when register saving and restoring are performed.
6 obtains this number, and executes the save / restore operation of the register for the corresponding location. For example, process ID
When the process ID = 2 is issued by the program decoder unit 14 during the execution of the program of = 1, the register saving / restoring control unit 16 first executes the process I
The register information to be saved is acquired by referring to the table of D = 1. The process ID table 17 may be arranged in a specific storage area in the data memory 24. When executing the program, the data memory 24
Alternatively, necessary data such as a calculation result is stored. Also,
The data memory 24 is connected to an external bus.

In the program decoder unit 14, when the decoded result is an instruction related to loop control, information such as the start address, end address and the number of loops of the loop is stored in the hardware stack 15. The program decoder unit 14 controls the program address generation unit 12 based on this information. If the decoded result is an instruction relating to register save / restore, the interrupt control unit 11 calculates the start address of the interrupt program to be executed by the interrupt signal, and outputs the address to the program address generation unit 12. Transfer control to the corresponding interrupt program.

The program control unit 31 is composed of the program address generation unit 12, the program decoder unit 14, the hardware stack 15, the register save / restore control unit 16, and the process ID table 17 described above. The program control unit 31 reads a program from the program memory 13 and determines the processing contents. In addition, a unique process ID can be recognized for each of a plurality of programs to be executed in parallel by time division.

The program decoder unit 14
Is connected to four registers to exchange data. The first unit 32 includes the data address register 18 and the first arithmetic operation unit 19,
An address for accessing the data memory 24 is generated. This address is used when reading data from the data memory 24 or when writing data to the data memory 24. Further, in the program decoder unit 14, data for generating an address for accessing the data memory 24 and performing writing or reading is temporarily stored. That is,
In the data address register 18, decoded data is input via the internal bus 25 or from the program decoder unit 14, and is temporarily stored. These data are stored in a predetermined storage area (for example, i0, i1, i2,... Shown in FIG. 1).
・ Area corresponding to etc.). Those data are output to the first arithmetic operation unit 19. In the first arithmetic operation unit 19, an address for accessing the data memory 24 is calculated from the input data. The address obtained as a result of the calculation is stored in a predetermined area of the data address register 18 and the internal bus 25
Alternatively, the data is output to the data memory 24.

Data is read from and written to each register by sequentially taking out instructions from a program memory 13 in which a program describing a procedure of an operation process to be executed is stored, and executing an operation based on the instructions. Done. The data necessary for the operation for executing the operation is stored in the program memory 13 and read or written.

The second unit 33 has an arithmetic operation register 20 and a second arithmetic operation unit 21, and executes an arithmetic operation. In this unit, for example, arithmetic processing for realizing signal processing and the like is executed. In the arithmetic operation register 20, decoded data is input via the internal bus 25 or from the program decoder unit 14, and is temporarily stored. These data are stored in a predetermined storage area (for example,
Regions corresponding to z0, z1,... Shown in FIG. 1). The data is used for calculation in the second arithmetic operation unit 21. In the second arithmetic operation unit 21,
More complicated calculations are performed than in the first arithmetic unit 19. That is, while the first arithmetic operation unit 19 performs only the address calculation, the second arithmetic operation unit 21 performs a more complicated calculation. For example, calculation such as the signal processing described above. In the second arithmetic operation unit 21, data obtained from the arithmetic operation register 20 or the internal bus 25 is input to the second arithmetic operation unit 21 to execute a calculation. Then, the calculation result is stored in a predetermined storage area in the second arithmetic operation unit 21 and the internal bus 25 or the data memory 24
Is output to The registers such as the data address register 18 and the arithmetic operation register 20 are constituted by register banks of the same configuration having the same function and the same number of registers. For example, the data address register 18, the arithmetic operation register 20, the general purpose register 22, the control register, and the mode selection register shown in FIG. 1 are each composed of two registers (such registers are bank-configured). (The number of registers is not limited to two.) Of course, the larger the number, the faster the processing operation. This quantity is
The decision is made in consideration of the operation speed and cost necessary for the design, the capacity that the register can occupy in the device, and the like. Further, by setting a specific value in the process ID table 17, the bank can be switched via the register save / restore control unit 16.

The third unit 34 includes the general-purpose register 22
And is used for temporary storage of data necessary for the calculation. That is, the decoded data is input from the program decoder unit 14 and is temporarily stored. The general-purpose register 22 is different from a register having a specific use such as the arithmetic operation described above. General purpose register 22
Is a versatile register that can be used as temporary storage for data required for operations and intermediate results, or can be used to modify the address part of an instruction for address modification to store the address of data that is actually accessed. It can be used as a register used for the calculation or as a register storing the start address of the program being executed. Here, the address modification means that
This is the operation to obtain the target address by adding the value of the register used for obtaining the address. Also in this general-purpose register 22, data is stored in a predetermined storage area in the above-described register similarly (for example, areas corresponding to r0, r1, r2,... Shown in FIG. 1). The data is output to each unit and the like via the internal bus 25. Also, when new data is created from stored data based on an instruction from another unit via the program decoder unit 14 or the internal bus 25, and the new data is stored in the general-purpose register 22. There is also.

The fourth unit 35 includes the operation control unit 23, and stores an operation mode when executing an arithmetic operation or the like. The arithmetic and control unit 23 includes a control register, a mode selection register, and the like. The control register controls the execution order of the program. Also, it stores the instruction read from the main memory. The mode selection register selects an operation processing mode. These data are output to each unit via the internal bus 25.

The data stored in the data address register 18, the arithmetic operation register 20, the general purpose register 22, and the operation control unit 23 are set so as to be transferred to the program decoder unit 14.

The data memory 24, the program control unit 31, the first unit 32, the second unit 3
The third, third and fourth units 34 and 35 are connected to the internal bus 25 and can transfer data such as operation results as needed.

The program decoder unit 14 controls the program counter according to the decoding result, and stores the decoding result in the register save / restore control unit 16, the first unit 32, and the second unit 3.
3, arbitrarily output to the third unit 34 and the fourth unit 35.

As described above, the registers are saved and restored by the register save / restore control unit 16 with reference to the process ID table designating each storage location for each process ID. The appropriate storage location is the process ID
The contents of the registers to be saved or restored are reduced by being supplied every time. Therefore, the amount of processing for saving or restoring is reduced. Also, the number of programs for saving or restoring in the program memory is reduced. Therefore, the saving and restoring processing of the register can be efficiently executed. As a result, it is possible to efficiently cope with frequent program switching.

Referring to FIG. 2, an example of an identification number assigned to each register type for each process ID will be described, and the saving and restoring operation of the register corresponding to the example will be described.

In the example shown in FIG. 2, process ID = 1
It is assumed that the process ID = 2 is issued by the program decoder unit 14 while the program marked with “.” Is being executed. First, the register save / restore control unit 16 refers to the table of the process ID = 1, and acquires the information of the register to be saved. In this example, when the process ID = 1, the identification number “1” is stored in the field of the mode selection register and the identification number “0” is stored in the other registers and the field of the hardware stack 15. Here, the identification number is, as described above,
The number of the storage destination to be referred to is indicated, and the storage location is designated by this number. The identification number “0” has a special meaning and indicates that the save / restore operation is not performed.

The register save / restore control unit 16 executes the save operation of each register based on the table of process ID = 1. In the example shown in FIG. 2, only the mode selection register is a target to be saved. The location to be stored is determined from the identification number "1", and the mode selection register is saved.

Next, the register is restored based on the process ID = 2 obtained from the program decoder unit 14. In FIG. 2, the data address register 18,
The identification number "1" is assigned to the arithmetic operation register 20, the hardware stack 15, and the general-purpose register 22, and the identification number "2" is assigned to the mode selection register. The register save / restore control unit 16 restores the contents of these registers from the locations corresponding to the identification numbers “1” and “2”.
The identification number is assigned to each register such as the data address register 18 and the arithmetic operation register 20. Even if the register number is the same, the storage location is different.

Further, when the program decoder unit 14 issues the process ID = 3 while the program with the process ID = 2 is being executed, the register save / restore unit sets the process ID
= 2, the information of the register to be saved is acquired. That is, the data address register 18, the arithmetic operation register 20, the hardware stack 15, and the general-purpose register 22 are assigned an identification number "1", and the mode selection register is assigned an identification number "2". . Thereafter, the register save / restore control unit 16 executes the save operation of each register according to the identification number. That is, the contents of the data address register 18, the arithmetic operation register 20, the hardware stack 15, and the general-purpose register 22 are saved and stored in the save locations corresponding to the identification numbers "1", respectively.
The mode selection register is saved and stored in the save location corresponding to the identification number “2”.

Next, the program decoder unit 14
The register recovery operation is executed based on the process ID = 3 obtained from the process. Referring to FIG. 2, the data address register 18, the arithmetic operation register 20, the hardware stack 15, and the general-purpose register 22 are provided with an identification number "2", and the mode selection register is provided with an identification number "3". Is attached. Therefore, the register save / restore control unit 16 restores the contents of these registers from the location corresponding to the identification numbers “2” and “3”.

As another example, it is assumed that the process ID = n is issued by the program decoder unit 14 while the process ID = 1 is being executed.
In this case, the register save / restore control unit 16 first refers to the table of the process ID = 1, and acquires information of the register to be saved. In this example, process ID =
When it is 1, the identification number “1” is stored in the field of the mode selection register and the identification number “0” is stored in the other registers and the field of the hardware stack 15.
Therefore, only the contents of the mode selection register are stored in the location specified by the identification number "1".

Next, the program decoder unit 14
, The register is restored based on the process ID = n obtained from the process. Referring to FIG. 2, the data address register 18, the arithmetic operation register 20, the mode selection register, the hardware stack 15, and the general-purpose register 22 have identification numbers "a", "b",
“C”, “d”, and “d” are added. Therefore, the register save / restore control unit 16 restores the contents of these registers from the locations corresponding to the identification numbers “a”, “b”, “c”, and “d”.

Referring to the flowchart of FIG. 3, the operation of saving the register contents related to the program being executed and restoring the register contents related to the interrupt program will be described.

First, the process ID of the program being executed
Is acquired by the register save / restore control unit 16.
This process ID is stored in the program decoder unit 14
(ST-1).

In step ST-2, the interrupt control unit 11 generates an interrupt signal. The interrupt signal is a signal for temporarily stopping the program being executed and executing the interrupt program. This interrupt signal is output to the program decoder unit 14 and further output to the register save / restore control unit 16.

In step ST-3, the register save / restore control unit 16 detects the interrupt signal and refers to the process ID table 17 to determine the contents of each register with respect to the process ID of the interrupted program being executed. Know where to evacuate.

In step ST-4, step ST-3
The contents of each register are saved in accordance with the recognition in the above.

In step ST-5, the register save / restore control unit 16 changes the process ID corresponding to the program being executed to the process ID corresponding to the interrupt program.

In step ST-6, the register save / restore control unit 16 refers to the process ID table 17 based on the process ID changed in step ST-5, and reads the contents of the register used in the interrupt program. Is recognized.

In step ST-7, step ST-6
The contents of the registers used in the interrupt program recognized in step are restored to the respective registers.

Referring to FIG. 4, a case will be described in which a certain program is being executed and then an interrupt program interrupts the program. FIG. 4 shows an example in which an interrupt program assigned to the process ID "2" enters during the execution of the program assigned to the process ID "1", and the process is switched.

After the program with process ID = 1 is executed in the operations OP-1 and OP-2, the program with process ID = 2 is interrupted. That is, after the operation OP-2 is executed, the process ID
Operation 1 of the program marked with = 2 is executed.
Here, the numbers 1, 2, and 2 shown on the left side of the interrupt program of process ID = 2 shown on the right side of FIG.
3,..., M, m + 1, and m + 2 are processes I
This corresponds to the order of execution in the program with D = 2.

After the execution of the operation OP-2 of the program assigned with the process ID = 1, the “getpro” of the operation 1 is executed.
cessID temp ”is executed. This instruction corresponds to the process I of the program interrupted during execution.
Get D. Then, the process ID is stored in the temporary area temp of the data memory 24. That is, “1” of the process ID is acquired, and this “1” is set to t.
Store in emp.

Next, in operation 2, "restoreReg"
This instruction changes the current process ID from "1" to "2" and executes the saving and restoring of the register based on the contents described in the process ID table 17. I do.

Referring to FIGS. 5, 6, and 7, the saving and restoring operations of the register corresponding to FIG. 4 will be described. It is assumed that the process ID table 17 in the example shown in FIG. 4 is as shown in FIG. When the instruction “restoreReg 2” is decoded in the program decoder unit 14, the process ID is determined based on the currently set process ID (in other words, the process ID of the interrupted program. In this example, the process ID = 1).
Table 17 is referenced. Referring to FIG.
The table value corresponding to D = 1 is (data address register 18, arithmetic operation register 20, mode selection register, hardware stack 15, general-purpose register 22) =
(1, 1, 1, 1, 1). Therefore, as shown in FIG. 6, these registers and the contents of the hardware stack 15 are saved to a location corresponding to the identification number 1.

Next, after the saving process is completed, the process ID table 17 is referred to based on the process ID = 2 of the interrupt program, and the table value corresponding to the process ID = 2 (data address register 18, arithmetic Arithmetic register 20, mode selection register, hardware stack 15, general-purpose register 22) = (0, 0, 2, 2)
(0,0) is obtained. In other words, as shown in FIG. 6, the contents of the mode selection register are sequentially written from the location corresponding to the identification number 2 to the contents of the mode selection register to restore the contents of the mode selection register. Note that registers other than the mode selection register and the general-purpose register 2
No recovery operation is performed for the second.

Thereafter, the operation 3 (OP-3) is executed (see FIG. 4). Then, the operations described in the interrupt program in order are executed up to the operation m (OP-m).
Then, the process of process ID = 2 is terminated.

When the processing of the interrupt program is completed, the operations m + 1 and m + 2 shown in FIG.
Is executed. That is, “restor” of operation m + 1
The instruction of “eReg temp” is executed. This instruction corresponds to the t acquired in the temporary area of the data memory 24 in the operation 1.
The process ID is changed to the process ID stored in emp, and the register is saved and restored based on the contents described in the process ID table 17.

When the instruction "restoreReg temp" is decoded in the program decoder unit 14, based on the currently set process ID (in other words, the process ID of the interrupt program. In this example, process ID = 2) The process ID table 17 is referred to. In FIG. 4, process ID = 2
Table value corresponding to (data address register 1
8, arithmetic operation register 20, mode selection register, hardware stack 15, general-purpose register 22) = (0,
(0, 2, 0, 0). Therefore, FIG.
As shown in (1), the contents of the mode selection register are saved to the location corresponding to the identification number 2. The save operation is not performed on the registers other than the mode selection register and the general-purpose register 22.

Next, after the saving process is completed, the process ID table 17 is referred to based on the process ID = 1 of the interrupted program, and the process ID = 1.
Table value corresponding to (data address register 1
8, arithmetic operation register 20, mode selection register, hardware stack 15, general-purpose register 22) = (1,
1, 1, 1, 1) are obtained. That is, as shown in FIG. 7, the contents of these registers and the hardware stack 15 are restored by sequentially writing to these registers and the hardware stack 15. After that, “iret” of the operation m + 2 is executed. The operation m + 2 returns to the program with the process ID = 1. The storage location can be assigned to the data memory 24 or one side of the register bank by the process ID.

The present invention is not limited to the above-described embodiment, but can be implemented with various modifications within the technical scope.

[0056]

According to the present invention, it is possible to save and restore a register for each register type in an environment where an interrupt operation process is executed.

Further, by selectively executing the save / restore operation according to the type of the process to be executed, it is possible to efficiently execute the processing required for switching the program.

Further, by efficiently executing the processing required for saving and restoring the registers generated by the program switching, it is possible to efficiently cope with the frequent program switching.

[Brief description of the drawings]

FIG. 1 is a functional block diagram of a digital signal processing device that executes a register save / restore method according to an embodiment of the present invention.

FIG. 2 is a table stored in the process ID table shown in FIG. 1 and shows, for each process ID, a storage location of the contents when saving and restoring the contents of each register and a hardware stack; It is a table.

FIG. 3 is a flowchart showing a series of flows in the register saving / restoring control unit shown in FIG. 1 for saving the contents of a register of a program being executed and restoring the contents of the register based on a changed process ID; FIG.

FIG. 4 is a diagram illustrating an example in which an interrupt program interrupts a program being executed, in which a program with process ID = 2 is interrupted with a program with process ID = 1.

FIG. 5 shows the contents of a process ID table in the example shown in FIG.

6 is a diagram showing a save and restore operation when an operation 2 in a program with a process ID = 2 shown in FIG. 4 is executed.

7 is a diagram showing a save and restore operation when an operation m + 1 in a program with a process ID = 2 shown in FIG. 4 is executed.

[Description of Signs] 11 Interrupt control unit 12 Program address generation unit 13 Program memory 14 Program decoder unit 15 Hardware stack 16 Register save / restore control unit 17 Process ID table 18 Data address register 19 First arithmetic operation unit 20 Arithmetic operation Register 21 Second arithmetic operation unit 22 General-purpose register 23 Operation control unit 24 Data memory 25 Internal bus 31 Program control unit 32 First unit 33 Second unit 34 Third unit 35 Fourth unit

Claims (3)

[Claims] An identification number is assigned to each program, and data contents of a register for temporarily storing data for executing the program are stored in first storage means for storing data in accordance with the program. In a register save / restore method for restoring and registering the data content of the register from a second storage means for saving and storing data, an identification number of a program being executed is obtained, and the program being executed is temporarily stopped. Then, an interrupt signal for giving an instruction to execute the second program is generated. By detecting the interrupt signal, the register and the identification number are associated with each other based on the identification number of the program being executed. With reference to the table
The contents of the register are saved in the first storage means, and the identification number of the program being executed is changed to the identification number of the second program based on the interrupt signal, and the identification of the second program after the change is performed. A register save / restore method, wherein the contents of a register are restored from the second storage unit by referring to the table based on a number. 2. A plurality of registers are provided. In the table, a storage location to be referred to when saving and restoring for each register is specified in correspondence with the identification number of a program. 2. The register saving / restoring method according to claim 1, wherein the contents of the register are saved and restored based on the number. 3. The register saving / restoring method according to claim 2, wherein said storage location is a register in a bank or a memory for storing data.