JP2002329844A - Thin-film multilayer wiring circuit board and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To manufacture a thin-film multilayer wiring board that has a large capacity and can operate speedily. SOLUTION: A wiring layer 15 is used for at least one of electrodes 15 and 17 where a thin-film capacitor using a ferroelectric thin film 16 is formed in the thin-film multilayer wiring board. The thin-film multilayer wiring circuit board includes a process for forming the wiring layer 15 that is patterned onto an interlayer insulating film layer 12b, a process for forming the ferroelectric film 16 that is patterned onto the patterned wiring layer 15, and a process for annealing the ferroelectric film 16 selectively by irradiating laser beams. The patterning method may include the lift-off method or a method using a mask, and a formation method by patterning due to etching after the entire surface is film-formed. Also, the wiring layer 15 and the ferroelectric film 16 may be patterned simultaneously.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a circuit board incorporating a ferroelectric thin film capacitor and a method for manufacturing the same.

[0002]

2. Description of the Related Art In recent years, non-volatile memories utilizing a high spontaneous polarization and coercive electric field of a ferroelectric have attracted attention as memories which can operate at high speed. As a ferroelectric used in a nonvolatile memory, Pb (Zr / T
i) O ₃ (PZT) or SrB with excellent film fatigue properties
Bi-layered ferroelectrics such as i ₂ Ta ₂ O ₉ (SBT) are known. FIG. 4 is a schematic sectional view showing the structure of a conventional thin film capacitor. The conventional thin film capacitor has a structure in which electrodes 47 are arranged above and below a ferroelectric thin film 46. The wiring layer 48 is connected to the electrode 47 via the interlayer insulating layer 42.

[0003]

Generally, a sputtering method is used as a method for forming a ferroelectric thin film. However, since a thin film formed at room temperature is amorphous, ferroelectric characteristics cannot be obtained as it is. I can't. Therefore, a crystallization heat treatment (crystallization anneal) at a high temperature is required to obtain the original characteristics of the ferroelectric. As a result, in the conventional ferroelectric thin film capacitor, a problem such as contact failure occurs due to a reaction between the ferroelectric thin film and the electrode and thermal damage to the periphery, and it has been difficult to operate at high speed and increase the capacitance.

As a method of selectively heating a dielectric thin film, a method using laser annealing is disclosed in Japanese Patent Application Laid-Open No. 9-219587, but since a resin-made interlayer insulating layer having low heat resistance is used. Insufficient high-temperature heating,
As a result, since the amorphous phase remains in the dielectric, there is a problem that it is difficult to obtain the original characteristics of the dielectric. Also, when a thin film capacitor using the ferroelectric is to be formed in a multilayer wiring circuit board using a material having a low melting point for wiring, crystallization annealing at a high temperature is necessary as described above. Causes a contact failure or the like.

The present invention has been made in view of the above problems of the prior art, and provides a circuit board incorporating a thin film capacitor using a ferroelectric thin film capable of preventing contact failure and operating at high speed, and a method of manufacturing the same. The purpose is to: Another object of the present invention is to provide a circuit board having a simple structure incorporating a ferroelectric thin film capacitor and a method of manufacturing the same.

[0006]

According to the present invention, the above object is achieved by forming a thin film capacitor using a ferroelectric thin film in a thin film multilayer circuit board in which interlayer insulating layers and wiring layers are alternately stacked. A thin-film multilayer wiring circuit board according to the present invention includes an interlayer insulating layer and a wiring layer alternately stacked on a substrate, and a thin-film capacitor in which a ferroelectric thin film is sandwiched between an upper electrode and a lower electrode. And at least one of the lower electrodes is a wiring layer. Both the upper electrode and the lower electrode of the thin film capacitor may be wiring layers.

The wiring layer has a laminated structure of Cu or TiN / Cu / TiN. If the wiring layer is composed of an element having a low melting point, the wiring layer is melted at the time of annealing and causes a contact failure. By using Cu as the wiring layer, the ferroelectric layer can be annealed without melting the wiring layer. Further, by stacking TiN, it is possible to prevent oxidation of the wiring layer and realize good contact.

The upper electrode or the lower electrode layer forming the thin film capacitor is not particularly limited, but may be Cu, Au, Pt, Ir.
High-speed operation can be realized by using at least one kind of metal selected from the group consisting of Ir and Ru, or at least one kind of conductive oxide selected from the group consisting of IrO _x and SrRuO ₃ .

Further, the ferroelectric material forming the thin film capacitor is not particularly limited, but may be (Pb / A) (Zr / T
i) O ₃ (where A is one element selected from La, Ba, Nb, Ca, and Sr) or SrBi ₂ Ta _2-x Nb _x O ₉
(Where x is 0 to 1), and (Ba / Sr) T
By using a ferroelectric having a composition of iO ₃ , a thin film capacitor having high ferroelectric characteristics can be obtained.

A method of manufacturing a thin-film multilayer wiring circuit board according to the present invention is directed to a method of manufacturing a thin-film multilayer wiring board having an interlayer insulating layer and a wiring layer alternately stacked and including therein a thin-film capacitor using a ferroelectric thin film. Forming a patterned wiring layer on the interlayer insulating layer, forming a patterned ferroelectric thin film on the patterned wiring layer, and selectively annealing the ferroelectric thin film. Features. A patterning method may be a lift-off method, a method using a mask, or the like, or a method of forming the entire surface by patterning by etching. Also,
The wiring layer and the ferroelectric thin film may be simultaneously patterned.

Further, the method of manufacturing a thin-film multilayer wiring circuit board according to the present invention is directed to a method of manufacturing a thin-film multilayer wiring board including a thin-film capacitor in which interlayer insulating layers and wiring layers are alternately laminated and a ferroelectric thin film is used therein. Forming a patterned ferroelectric thin film on the patterned wiring layer or lower electrode layer, selectively annealing the ferroelectric thin film, and forming an interlayer insulating layer on the ferroelectric thin film. A step of forming a contact hole in the interlayer insulating layer, a step of forming a patterned wiring layer on the interlayer insulating layer, and connecting the wiring layer and the ferroelectric thin film.

The annealing can be performed by laser light irradiation. In this case, the surface of the ferroelectric thin film is irradiated with laser light, and only the ferroelectric thin film is selectively annealed and crystallized. An excimer laser is most suitable as the laser to be used.
Good characteristics can be obtained with 200 mJ / cm ² · pulse. 2
At an intensity higher than 00 mJ / cm ² · pulse, the ferroelectric thin film is broken by ablation (scattering). Also,
If the strength is lower than 40 mJ / cm ² · pulse, the crystallization of the ferroelectric thin film is insufficient and ferroelectricity cannot be obtained.

The substrate temperature during laser annealing is preferably set to 300 ° C. or lower. If laser annealing is performed at a substrate temperature higher than 300 ° C., contact failure due to oxidation of the wiring is likely to occur. The atmosphere during the laser annealing can be oxygen, an inert gas, or a vacuum.

[0014]

Embodiments of the present invention will be described below with reference to the drawings. [First Embodiment] FIG. 1 is a schematic sectional view showing a thin-film multilayer wiring circuit board according to the present invention. In FIG. 1, 11 is S
i wafer, 12 an interlayer insulating layer, 13 a buried plug,
14 is a first layer wiring, 15 is a second layer wiring, 16 is a ferroelectric thin film, 17 is a capacitor electrode, and 18 is a third layer wiring.

First, an SiO ₂ interlayer insulating layer 12a was formed on the surface of a Si wafer 11 by thermal oxidation. Next, a contact hole was opened by etching using a mask. Further, a conductive plug (W) 1 is provided in the contact hole.
3 was formed. The method of forming the SiO ₂ interlayer insulating layer 12a and the material of the conductive plug 13 are not particularly limited.

Next, a _first layer is formed on the SiO ₂ interlayer insulating layer 12a.
A wiring layer 14 having a layered TiN / Cu / TiN laminated structure is formed to a thickness of about 2 μm. By using the Cu wiring, the resistivity becomes lower than that of the conventional Al wiring by about 1 μΩ · cm, and high-speed operation becomes possible. Further, by arranging the TiN layers above and below the Cu layer, an effect of preventing oxidation of Cu can be obtained. The method for forming the wiring is not particularly limited. For example, a formation method using a mask or a method of forming a film over the entire surface and removing it by etching may be used.

Further, an SiO ₂ interlayer insulating layer 12b is formed so as to cover the wiring layer 14, a contact hole is formed as described above, and a W plug 13 is formed. Interlayer insulating layer 1
A wiring layer 15 of a second-layer TiN / Cu / TiN laminated structure is patterned and formed on 2b so as to be orthogonal to the wiring layer. Subsequently, Pb (Zr / Tr) is formed on the wiring layer 15 by a lift-off method using a resist and a sputtering method.
i) The O ₃ ferroelectric thin film 16 is formed to a thickness of 100 nm. The Pb (Zr / Ti) O ₃ ferroelectric thin film 16 is formed at room temperature. As a result of X-ray diffraction, the deposited Pb (Zr / T
i) The O ₃ thin film 16 was found to be amorphous.

This Pb (Zr / Ti) O_ThreeFerroelectric thin film
The KrF excimer laser beam was selectively applied to only 16 surfaces.
00mJ / cm^Two・ Irradiate under pulse and 100Hz conditions,
Instantaneous annealing is performed. Selective irradiation of laser light
The light is Pb (Zr / Ti) O _ThreeSurface of ferroelectric thin film 16
Was scanned. X-ray diffraction was performed at this stage.
As a result, a peak due to the perovskite structure was observed,
Ferroelectric thin film 1 by annealing with excimer laser light irradiation
It was confirmed that 6 was crystallized.

For comparison, a similar sample was prepared by the above method, and the laser beam intensity was 37 to 210 mJ / cm ² · pul.
Annealing of laser beam irradiation was performed under the conditions of se, and the crystallinity was examined. As a result, the laser beam intensity was 40 mJ / cm ² · pul
In the region smaller than se, only the amorphous peak can be identified,
Had not crystallized. In addition, the laser beam intensity is 200m
In a region larger than J / cm ² · pulse, it was confirmed that the Pb (Zr / Ti) O ₃ ferroelectric thin film was destroyed by ablation. As a result, it was found that the best annealing condition by laser light irradiation was 40 to 200 mJ / cm ² · pulse.

In the selective annealing method using laser light, since the wiring layer of Cu or the like has an effect of reflecting laser light, it is possible to sufficiently heat the ferroelectric thin film. Furthermore, by using a material having a high melting point such as Cu (melting point: 1083 ° C.) for the wiring layer, thermal damage due to annealing becomes less likely. Therefore, selective annealing using laser light can be performed.

In this embodiment, annealing by laser light irradiation is performed at room temperature.
By heating the substrate to a temperature at which the wiring is not oxidized, a higher laser annealing effect can be obtained. The heating temperature of the substrate is desirably 300 ° C. or less in the case of Cu wiring.

Next, an Au upper electrode 17 was formed to a thickness of 100 nm on the Pb (Zr / Ti) O ₃ ferroelectric thin film.
Further, to form a SiO ₂ interlayer insulating layer 12c, after forming a contact hole in the SiO ₂ interlayer insulating layer 12c, by forming the wiring layer 18, to produce a thin-film multilayer wiring circuit board having a ferroelectric thin film. As a result of evaluating the electrical characteristics of the obtained thin-film multilayer wiring circuit board, remanent polarization (2Pr) of 50 μC / cm ² was obtained at an applied voltage of 2 V. The thin-film multilayer wiring circuit board manufactured by the above-described method operated even at a low voltage of 2 V applied, and was capable of high-speed writing.

[Embodiment 2] FIG. 2 is a schematic sectional view showing another example of a thin-film multilayer wiring circuit board according to the present invention. As in the first embodiment, an SiO ₂ interlayer insulating layer 22a was formed on the surface of a Si wafer 21 by thermal oxidation, a contact hole was opened by etching using a mask, and a W plug 23 was formed in the contact hole. Next, a first-layer wiring layer 24 having a TiN / Cu / TiN structure of about 1.2 μm was formed on the interlayer insulating layer 22a. There is no particular limitation on the forming method. By laminating TiN above and below Cu,
This has the effect of further improving the adhesion to the ferroelectric thin film and the electrode layer. Further, the interlayer insulating layer 22b is formed so as to cover the wiring layer 24.
And forming a contact hole as described above,
The plug 23 was formed. A second-layer wiring layer 25 having a TiN / Cu / TiN structure is formed on the interlayer insulating layer 22b by patterning. Subsequently, after forming an interlayer insulating layer 22c, a contact hole was formed, a W plug was formed, and a Pt lower electrode 27 was formed using mask evaporation.

A lift-off method using a resist on the lower electrode 27 and a sputtering method with a thickness of about 150 nm are used.
An rBi _2.4 Ta ₂ O ₉ ferroelectric thin film 26 was formed. Subsequently, only the surface of the SrBi _2.4 Ta ₂ O ₉ ferroelectric thin film 26 is selectively irradiated with KrF excimer laser light at 200 mJ / cm.
Irradiation was performed under the conditions of ² · pulse and 100 Hz, and instantaneous annealing was performed. The substrate temperature at this time was room temperature. As a result of examining the crystallinity after laser annealing, SrBi _2.4 Ta ₂ O ₉
The diffraction result in which the main peak of (105) plane was emphasized was obtained, and it was found that the crystal was crystallized by laser annealing. Finally, an interlayer insulating layer 22d was formed, and then a contact hole was formed. Then, the third layer of TiN
/ Cu / TiN wiring layer 28 is formed, and SrBi _2.4 Ta ₂ O ₉ is formed so that the third wiring layer 28 becomes an upper electrode.
It was connected to the ferroelectric thin film 26.

By the above-described method, a thin-film multilayer wiring circuit board having a built-in thin-film capacitor using a wiring layer for the upper electrode 28 could be manufactured. As a result of evaluating the rewriting (fatigue) characteristics of the obtained thin film multilayer wiring circuit board, ± 3
Even when the voltage reversal of V was repeated 10 ¹² times, there was no change in 2Pr, the same as the initial polarization value (25 μC / cm ² ), and it was confirmed that there was no deterioration.

[Embodiment 3] FIG. 3 is a schematic sectional view showing still another example of a thin-film multilayer wiring circuit board according to the present invention. As in the first embodiment, an interlayer insulating layer 32a was formed on the surface of a Si wafer 31 by thermal oxidation, a contact hole was opened by etching using a mask, and a W plug 33 was formed in the contact hole. Next, a first-layer wiring layer having a TiN / Cu / TiN structure of about 2 μm was formed on the interlayer insulating layer 32a. Further, an interlayer insulating layer 32b was formed so as to cover the wiring layer 34, a contact hole was formed as described above, and a W plug 33 was formed.
Next, a second wiring layer 35 was formed on the interlayer insulating layer 32b by patterning so as to be orthogonal to the wiring layer 34.

Subsequently, Pb (Zr / Tr) is formed on the wiring layer 35 by a lift-off method using a resist and a sputtering method.
i) An O ₃ ferroelectric thin film 36 was formed to a thickness of 100 nm. Next, only the surface of the Pb (Zr / Ti) O ₃ ferroelectric thin film 36 was selectively irradiated with KrF excimer laser light for 200 m.
Irradiation was performed under the conditions of J / cm ² · pulse and 100 Hz to perform instantaneous annealing, and the ferroelectric thin film 36 was crystallized. At this time, the substrate temperature was 300 ° C. Then, the interlayer insulating layer 3
After forming 2c, a contact hole was formed, and a wiring 38 was formed. By the above method, a thin-film multilayer wiring circuit board using the wiring layers 35 and 38 for the upper electrode and the lower electrode for forming the thin-film capacitor could be manufactured.

According to the present invention, the structure of a thin film capacitor using a ferroelectric thin film can be simplified as compared with the conventional structure having an upper electrode and a lower electrode shown in FIG. In the conventional structure, since the upper electrode and the lower electrode are indispensable, the ferroelectric thin film is thinned to reduce the total thickness. However, when the ferroelectric thin film is made thin, a current path is easily generated in the film, and as a result, there is a problem that the withstand voltage characteristic is reduced.

Since the structure of the thin film capacitor according to the present invention has a structure in which wiring is used as an electrode, the total thickness has already been reduced, so that the above problem does not occur. Further, since the crystallization of the ferroelectric is performed by instantaneous annealing by laser irradiation, it can be performed without a reaction between the ferroelectric and the wiring. Further, since the substrate is heated during annealing at a temperature at which the wiring is not oxidized, contact failure can be prevented. As described above, the present invention has been described with reference to the preferred embodiments.
The present invention is not limited to the specific embodiment, and various modifications and changes can be made within the scope of the gist described in the claims.

[0030]

According to the present invention, it is possible to obtain a thin film capacitor using a ferroelectric thin film, which can prevent contact failure and can operate at high speed. Further, by using a wiring as an electrode and forming a ferroelectric thin film on the wiring, the structure can be simplified, and as a result, effects such as improvement in productivity can be obtained. In addition, by selectively annealing only the ferroelectric thin film by instantaneous heating using laser light, a thin film multilayer wiring circuit having a large capacity and high polarization characteristics without damaging the wiring and the interlayer insulating layer is manufactured. can do.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view showing a thin-film multilayer wiring circuit board according to the present invention.

FIG. 2 is a schematic sectional view showing another example of the thin-film multilayer wiring circuit board according to the present invention.

FIG. 3 is a schematic sectional view showing still another example of the thin-film multilayer wiring circuit board according to the present invention.

FIG. 4 is a schematic sectional view showing the structure of a conventional thin film capacitor.

[Explanation of symbols]

14, 15, 18, 24, 25, 28, 34, 35, 3
8, 48 wiring layers 16, 26, 36, 46c ferroelectric thin film 17, 27, 47 electrodes 13, 23, 33 W plugs 12a, 12b, 12c, 42 interlayer insulating layers 22a, 22b, 22c, 22d: interlayer insulating layer 32a, 32b, 32c: interlayer insulating layer 11, 21, 31, 41: Si wafer

Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat II (Reference) H01L 27/04 (72) Inventor Yasuhiko Murata 7-1-1, Omikamachi, Hitachi City, Hitachi City, Ibaraki Prefecture Hitachi Research, Ltd. Hitachi Research, Ltd. house F-term (reference) 4M104 AA01 BB04 BB06 BB09 BB18 BB30 CC01 DD16 DD34 FF18 GG19 HH16 HH20 5F033 HH07 HH11 HH33 JJ01 JJ19 KK01 KK11 KK13 KK33 MM08 MM13 QQ08 QQ09 QQ37 QQ54 QQ74 QQ83 RR04 SS25 SS27 VV10 WW03 XX10 XX13 XX20 5F038 AC05 AC15 CD12 CD18 EZ14 EZ15 EZ16 EZ17 EZ20 5F083 FR01 GA01 JA14 JA15 JA17 JA37 JA38 JA39 JA40 MA06 MA16 NA08 PR33

Claims (7)

[Claims] 1. A thin-film capacitor comprising an interlayer insulating layer and a wiring layer alternately laminated on a substrate, and a thin-film capacitor having a ferroelectric thin film sandwiched between an upper electrode and a lower electrode, wherein the upper electrode and the lower electrode of the thin-film capacitor are provided. Characterized in that at least one of them is the wiring layer. 2. A thin film capacitor comprising an interlayer insulating layer and a wiring layer alternately laminated on a substrate, and a thin film capacitor having a ferroelectric thin film sandwiched between an upper electrode and a lower electrode, wherein the upper electrode and the lower electrode of the thin film capacitor are provided. Is the wiring layer. 3. The thin-film multilayer wiring circuit board according to claim 1, wherein said wiring layer is made of Cu or TiN / Cu / T.
A thin-film multilayer wiring circuit board having a laminated structure of iN. 4. A method for manufacturing a thin-film multilayer wiring board comprising an interlayer insulating layer and a wiring layer alternately laminated and including a thin-film capacitor using a ferroelectric thin film therein, wherein the patterned wiring layer is formed on the interlayer insulating layer. Forming a patterned ferroelectric thin film on the patterned wiring layer; and selectively annealing the ferroelectric thin film. Production method. 5. A method for manufacturing a thin-film multilayer wiring board comprising an interlayer insulating layer and a wiring layer alternately laminated and including a thin-film capacitor using a ferroelectric thin film therein, the method comprising the steps of: Forming a patterned ferroelectric thin film; selectively annealing the ferroelectric thin film; forming an interlayer insulating layer on the ferroelectric thin film; and forming a contact hole in the interlayer insulating layer. Forming, forming a patterned wiring layer on the interlayer insulating layer,
Connecting the wiring layer and the ferroelectric thin film to each other. 6. The method for manufacturing a thin-film multilayer wiring circuit board according to claim 4, wherein the annealing is performed by laser light irradiation. 7. The method according to claim 4, wherein the annealing is performed at a substrate temperature of 300 ° C. or less.