JP2002329800A - Semiconductor device housing package - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device housing package which is improved in transmission characteristics by reducing the capacitance between line conductors and a ground conductive layer formed on the upper surface of a standing wall. SOLUTION: This semiconductor device housing package includes an input/ output terminal 5 comprising a flat plate 9 consisting of a dielectric having a plurality of line conductors 8 formed extendedly from one side of the upper surface in the direction of the opposed other side, and a standing wall 10 consisting of a dielectric jointed to the upper surface of the flat plate 9 sandwiching a plurality of line conductors 8 therebetween. In this case, the standing wall 10 is jointed to the upper surface of the flat plate 9 through a resin layer 11 of which the dielectric constant is not more than 5 and the porosity is 20-60%.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device housing package for housing various semiconductor devices operating at a high frequency used in the fields of optical communication, microwave communication and millimeter wave communication.

[0002]

2. Description of the Related Art A semiconductor device housing package (hereinafter, referred to as a semiconductor package) for hermetically sealing various semiconductor devices operating at a high frequency used in the fields of optical communication, microwave communication, and millimeter wave communication. As an example, an optical semiconductor package used in the optical communication field is shown in FIG. As shown in FIG. 1, a semiconductor package 1 as an optical semiconductor package is generally made of iron (F).
e) A metal material such as a nickel (Ni) -cobalt (Co) alloy or a copper (Cu) -tungsten (W) alloy, and a semiconductor laser (LD), a photodiode (PD), etc. It has a base 4 provided with a mounting portion 3 on which a semiconductor element 2 such as an optical semiconductor element is mounted. The base 4 has a substantially rectangular plate shape, and has screw holes 12 for screwing to an external mounting substrate (not shown) on opposite sides thereof.

Further, the semiconductor device 2 is joined to the upper surface of the substrate 4 via a brazing material such as silver brazing so as to surround the mounting portion 3, and the semiconductor element 2 is disposed on both sides located on the long side of the substrate 4. A frame 7 provided with a mounting portion 6 formed of a through hole or a cutout portion for fitting and joining an input / output terminal 5 for inputting / outputting a high-frequency signal for electrically connecting to an external electric circuit (not shown).
Having. The frame 7 is made of an Fe—Ni—Co alloy or the like, and has an optical fiber 13 on one side located on the short side of the base 4.
Through-hole 1 into which tubular fixing member 19 for fixing is fitted and joined
5 are formed. Then, for example, an Fe—Ni—Co alloy or an Fe—Ni alloy that approximates the thermal expansion coefficient of the frame 7 is provided around the outer opening of the through hole 15 that is the optical transmission path of the frame 7.
A fixing member 19 made of a metal material such as an alloy is joined with a brazing material such as silver brazing.

[0004] A seal ring 18 is joined to the upper surface of the frame 7 and the upper surface of the input / output terminal 5 via a brazing material such as a silver braze to sandwich the input / output terminal 5 and to seal the lid 16 on the upper surface. It functions as a joining medium for joining by welding or the like.

The optical semiconductor package 1 has an input / output terminal 5 attached to a mounting portion 6 and a lid 16 hermetically sealing the semiconductor element 2 attached to the upper surface of a frame 7. It comprises.

The semiconductor package 1 has a base 4
The semiconductor element 2 is mounted and fixed on the mounting portion 3 with a low melting point brazing material such as tin (Sn) -lead (Pb) solder, and the electrodes of the semiconductor element 2 are inserted through bonding wires (not shown). It is electrically connected to the line conductor 8 of the output terminal 5, and further adjusts the optical axis of the optical fiber 13 and the semiconductor element 2. Then, the optical fiber 13 is attached to the end face of the fixing member 19 outside the frame 7.
Is attached to the metal holder 14 with an adhesive such as resin.
u) -joining with a low melting point brazing material such as tin (Sn). Then, the lid 16 is joined to the upper surface of the frame 7 by seam welding or the like, and the semiconductor element 2 is hermetically accommodated in a container formed of the base 4, the frame 7 and the lid 16, thereby providing a product. It becomes an optical semiconductor device.

In such an optical semiconductor device, after being screwed onto a mounting board, the semiconductor element 2 is optically excited by a driving high-frequency signal supplied from an external electric circuit, and the excited light such as a laser beam is emitted. By transmitting / receiving the optical fiber 13 to / from the fiber 13, the optical fiber 13 functions as a photoelectric conversion device capable of transmitting a large amount of information at high speed, and is widely used in the optical communication field and the like.

Therefore, the input / output terminal 5 used in the semiconductor package 1 used at a high frequency constituting this optical semiconductor device is formed of a line conductor that is electrically insulated and can be leaded and wire-bonded. You need to be able to do it. As shown in FIG. 4, the input / output terminal 5 includes a flat plate portion 9 made of a dielectric having a line conductor 8 formed from one side of the upper surface to the other opposite side, and a line formed on the upper surface of the flat plate portion 9. And a standing wall 10 made of a similar dielectric and joined with the conductor 8 interposed therebetween. On both sides of the flat plate portion 9 and the vertical wall portion 10 substantially parallel to the line conductor 8, the line conductor 8 surrounds the line conductor 8 in a pseudo-coaxial manner and functions as a ground conductor, and the inner surface of the mounting portion 6 shown in FIG. A conductor layer (not shown) functioning as a joining medium to be joined via a brazing material such as silver brazing is formed.

On the upper surface of the line conductor 8 outside the frame 7,
A lead terminal 17 made of a metal material such as an Fe-Ni-Co alloy and joined by a brazing material such as silver brazing and having a function of electrically connecting the input / output terminal 5 to an external electric circuit is joined. . On the other hand, it is made of a wire material such as Au or aluminum (Al), and is bonded by an ultrasonic bonding method or thermocompression bonding, and a bonding wire (not shown) for electrically connecting the semiconductor element 2 and the input / output terminal 5. Are provided.

Further, for example, a feed-through terminal (input / output terminal 5) of a package for a microwave integrated circuit used for a semiconductor package similar to the above-mentioned optical semiconductor package.
In this case, a DC bias application wiring pattern and a signal application wiring pattern (corresponding to the line conductor 8) are provided on a dielectric substrate (corresponding to the flat plate portion 9) such as alumina ceramics, and these wiring patterns are sandwiched therebetween. A structure in which a dielectric block (corresponding to the vertical wall portion 10) such as alumina ceramics is provided on the substrate has been proposed (Japanese Patent Laid-Open No. Hei 8-288).
No. 701).

[0011]

However, in the structure disclosed in JP-A-8-288701, both the dielectric substrate and the dielectric block are made of alumina ceramics having a dielectric constant of 8 to 10, so that the dielectric substrate and A large capacitance has been generated between the DC bias application wiring pattern and the signal application wiring pattern sandwiched between the dielectric blocks, and the ground conductor layer formed on the upper surface of the dielectric block. Since this large capacitance is connected between the wiring pattern and the ground conductor layer, the width must be reduced in order to make the characteristic impedance of the line conductor 8 a predetermined value (for example, 50Ω). There is a problem that the wiring resistance is increased and the transmission loss is increased. Further, when the dielectric constant is large as described above, the value of the cutoff frequency of the high-frequency signal becomes low, and there is a problem that resonance occurs at the input / output terminal at this low frequency.

Accordingly, the present invention has been completed in view of the above problems, and an object of the present invention is to reduce the capacitance generated between a line conductor and a ground conductor layer formed on the upper surface of a vertical wall. Another object of the present invention is to provide a semiconductor package having an input / output terminal with improved high-frequency signal transmission characteristics.

[0013]

A semiconductor package according to the present invention is mounted on a base having a mounting portion on which a semiconductor element is mounted on an upper surface, and is mounted on the upper surface of the base so as to surround the mounting portion. A frame having a notch or a through-hole on the side, on which a mounting portion for an input / output terminal is formed, and a dielectric having a plurality of line conductors formed from one side of the upper surface to the other side facing the same. The semiconductor device and the external electric circuit are formed by a flat plate portion and an upright wall portion made of a dielectric bonded to the upper surface of the flat plate portion with the plurality of line conductors interposed therebetween and fitted to the mounting portion. In a semiconductor element storage package having an input / output terminal electrically connected,
The vertical wall portion is bonded to the upper surface of the flat plate portion via a resin layer having a relative dielectric constant of 5 or less and a porosity of 20 to 60%.

According to the present invention, the standing wall portion is joined to the upper surface of the flat plate portion via a resin layer having a relative dielectric constant of 5 or less, so that the line conductor immediately below the standing wall portion and the ground formed on the upper surface of the standing wall portion. The capacitance between the conductor layer and the conductor layer is reduced, and as a result, the transmission loss of the high-frequency signal passing through the line conductor is reduced, and the transmission characteristics of the high-frequency signal are improved.
Further, by using a resin layer having a porosity of 20 to 60%, considerable air is present in the resin layer, the relative dielectric constant is further reduced, and the transmission characteristics of a high-frequency signal are further improved. Further, the adhesive strength of the resin layer is maintained, and the large number of pores function as a cushion for absorbing and relaxing the stress applied to the input / output terminals, so that the strength of the input / output terminals against the stress is also improved.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The semiconductor package of the present invention will be described in detail below. FIG. 1 is a perspective view showing an example of an embodiment of a semiconductor package of the present invention, and FIG. 2 is a perspective view showing input / output terminals in the semiconductor package of the present invention. In FIG. 1, the basic configuration of the entire semiconductor package of the present invention is the same as that of FIG. 5 of the conventional example, and detailed description of each part other than the characteristic portions of the present invention is omitted.

As shown in FIG. 2, the input / output terminal 5 constituting the semiconductor package of the present invention is formed of a substantially rectangular dielectric plate, and has a line conductor 8 formed on one surface from the other side to the opposite side. And a substantially rectangular parallelepiped standing wall 10 made of a dielectric bonded to the upper surface thereof with the line conductor 8 interposed therebetween. The standing wall 10 has a relative permittivity of 5 on the upper surface of the flat plate 9. Resin layer 1 having a porosity of 20 to 60% below
1 are joined. The resin layer 11 has good adhesion to ceramics and the like constituting the standing wall portion 10 and the flat plate portion 9 and adhesion to the line conductor 8 made of a metallized layer and the like.

In this configuration, when the line conductor 8 is covered with a resin layer having a relative permittivity of more than 5, when transmitting a high-frequency signal, the line conductor 8 and the ground conductor layer formed on the upper surface of the upright wall portion 10 are connected. A large capacitance occurs between them. as a result,
In order to set the characteristic impedance of the line conductor 8 to a predetermined value, the width of the line conductor 8 must be reduced, so that the conductor resistance increases and the transmission loss of a high-frequency signal passing through the input / output terminal 5 decreases. growing. When the dielectric constant is large as described above, the value of the cut-off frequency of the high-frequency signal becomes low, and resonance occurs at the input / output terminal 5 at this low frequency, so that the semiconductor element 2 operates normally in a high frequency band. You can't do that.

Input / output terminal 5 of the semiconductor package of the present invention
In, for example, the lower surface of the standing wall portion 10, that is, the flat plate portion 9
A groove 20 is provided on the joint surface between the resin layer 11 and the resin layer 11.
After filling with a liquid resin to be
Cover. At this time, since the relative permittivity of the resin layer formed in the groove 20 is as small as 5 or less, the capacitance generated between the line conductor 8 immediately below the standing wall 10 and the ground conductor layer on the top of the standing wall 10 is small. Become. As a result, the cutoff frequency of the high-frequency signal passing through the line conductor 8 shifts to a higher frequency band, so that the high-frequency signal can be transmitted in a higher frequency band.

When the porosity of the resin layer 11 is less than 20%, the relative dielectric constant of the resin layer 11 is hardly reduced, and
1 reduces the stress absorption and relaxation effect. Incidentally, when the porosity is about 20%, the relative dielectric constant is reduced by about 0.8. If the porosity of the resin layer 11 exceeds 60%, the adhesiveness of the resin layer 11 is reduced, and gas is easily generated from the resin layer 11 into the inside of the semiconductor package. Incidentally, when the porosity is about 60%, the relative dielectric constant is reduced by about 2.4. More preferably, 2
0 to 50% is good.

In the present invention, the material of the dielectric material constituting the standing wall portion 10 is aluminum oxide (relative permittivity ε =
8-10), mullite (ε = 8-10), and aluminum nitride (ε = 8-10).

The resin layer 11 is made of epoxy resin (ε = 3.5-5), allyl resin (ε = 3.6-3.5).
4.5), silicone resin (ε = 2.6-2.7), vinyl acetate resin (ε = 3.5-4.5), polyamide resin (ε = 3.7), polyimide resin (ε = 3.4), B
T (bismaleimide triazine) resin (ε = 3.5-
5) and the like are preferable. All of these have low dielectric constants of 5 or less and high adhesiveness during curing, so that
Accordingly, when the semiconductor package 1 is hermetically sealed, the semiconductor package 1 can be hermetically sealed without any problem. And the resin layer 1
Pores can be formed by adding a foaming agent such as polyurethane to the resin material to be used as the first resin material. The porosity can be appropriately adjusted by adjusting the amount of the foaming agent.

The depth of the groove 20 (height in the vertical direction) is preferably 5 to 50% of the height of the standing wall portion 10. If it is less than 5%, it is difficult to completely inject the material of the resin layer 11 into the groove 20. If it exceeds 50%, the frequency at which the resonance phenomenon of the high-frequency signal occurs does not increase, and the improvement of the transmission characteristics of the high-frequency signal cannot be expected. Specifically, the depth of the groove 20 is 0.15 to 0.5 mm
It is about. In order to secure a large volume of the resin layer 11 and shift the resonance point of the high-frequency signal passing through the input / output terminal 5 to a higher frequency, the width of the groove 20 must be 150% or more of the line width of the line conductor 8. Preferably, 150% or more of the total line width of the plurality of line conductors 8 is preferable. If this width is 150% or less of the total line width of the plurality of line conductors 8, the reflection loss of a high-frequency signal increases, and transmission characteristics are impaired.

In the groove 20, the distance between the edge of the line conductor 8 closest to the inner surface of the groove 20 and the inner surface of the groove 20 is preferably 0.25 to 1 mm.
The reflection loss of the high-frequency signal in the groove 20 increases. 1
If it exceeds mm, the effect of reducing the reflection loss by forming the resin layer 11 becomes very small. That is, considering that the effect of reducing the reflection loss can no longer be expected, and considering the size of the input / output terminal 5, if it exceeds 1 mm, it becomes impractical. Therefore, in the groove 20, the distance between the edge of the line conductor 8 closest to the inner surface of the groove 20 and the inner surface of the groove 20 is preferably 0.25 to 1 mm.

Further, in a configuration in which a groove 20 is provided in the standing wall portion 10 to cover the line conductor 8 immediately below the standing wall portion 10 with the resin layer 11, the line conductor 8 immediately below the standing wall portion 10 is formed before the resin layer 11 is formed.
Is open to the outside world, it is possible to form a plating film on its surface. Therefore, it is possible to form a metal film such as an Au plating film on the surface of the line conductor 8 directly below the standing wall portion 10. This case is preferable in that the transmission characteristics of the high-frequency signal are improved. That is, since the high-frequency signal is transmitted on the very surface of the line conductor 8 by the skin effect, the transmission characteristic of the high-frequency signal is further improved by coating the surface of the line conductor 8 with a good conductor such as Au.

The flat plate portion 9 is made of aluminum oxide (A
It is made of a dielectric material such as ceramics containing (L ₂ O ₃ ) as a main component, and is preferable in view of simultaneous sintering with the line conductor 8 containing copper (Cu). The ceramic containing aluminum oxide as a main component is preferably formed of a high-density body having a relative density of 95% or more, particularly 97% or more, and more preferably 99% or more, and has high thermal conductivity and high strength. Will do.
Furthermore, in order to achieve the shape retention during simultaneous firing with the line conductor 8, it is preferable that the dense body has a low firing temperature of 1200 to 1500 ° C. and a relative density of 95% or more. Therefore, the dielectric material of the input / output terminal 5 having such characteristics contains aluminum oxide as a main component at a ratio of 84 to 90% by weight, and
In order to enhance the sinterability at the above firing temperature, manganese (M
n) A compound containing a compound at a ratio of 2 to 6% by weight in terms of MnO ₂ is preferable.

The line conductor 8 formed on the upper surface of the flat plate portion 9 of the input / output terminal 5 is made of a metallized layer conductor mainly composed of a composite material of Cu and tungsten (W) and / or molybdenum (Mo). , Flat plate 9 and upright wall 1
It is formed by co-firing with the dielectric material constituting 0.

Further, on the surface of the line conductor 8, Au, Cu, T is used to prevent corrosion due to oxidation, wire bonding property, wettability with solder, and lower the resistance of the line conductor 8.
It is preferable that at least one metal layer selected from the group consisting of i, Ni and Pd is applied by means such as electroless plating and electrolytic plating. In particular, from the viewpoint of corrosion resistance and resistance reduction, it is more preferable that Au is adhered to the outermost surface.

In order to improve the adhesion between the line conductor 8 and the dielectric of the input / output terminal 5, a ceramic main component constituting the dielectric or a ceramic component having the same composition as the dielectric composition is included in the line conductor 8. Can be contained at a ratio of 0.05 to 2% by volume.

Further, a portion of the line conductor 8 led out of the frame 7 is provided with a metal such as an Fe-Ni-Co alloy for inputting / outputting a high-frequency signal between the external electric circuit and the input / output terminal 5. A lead terminal 17 made of a material is joined with a brazing material such as silver brazing.

The input / output terminal 5 obtained in this way is
The frame 7 is joined to the mounting portion 6 on the side of the frame 7 joined to the upper surface of a metal material such as a Ni-Co alloy or a Cu-W alloy with a brazing material such as silver brazing. As a result, it becomes a part of the frame 7 and hermetically separates the inside and the outside, and forms a conductive path that conducts between the inside and the outside of the frame 7.

Next, an example of a method for manufacturing the input / output terminals 5 constituting the semiconductor package 1 of the present invention will be specifically described.

[1] First, in order to form the flat plate portion 9 and the vertical wall portion 10 of the input / output terminal 5, the Al ₂ O ₃ raw material powder as a main component has an average particle size of 0.5 to 2.5 μm. More preferably, a powder of 0.5 to 2 μm is used. This means that if the average particle size is less than 0.5 μm, such fine powder is difficult to handle and the cost of powder production is high,
If it is larger than μm, it becomes difficult to fire at a low temperature of 1500 ° C. or less.

[2] Next, MnO ₂ is added as a second component to the Al ₂ O ₃ raw material powder at a ratio of ₂ to 15% by weight, more preferably 3 to 10% by weight. As a third component, 0.1 to 4% by weight of SiO ₂ and one or more oxides of alkaline earth elements such as MgO, CaO, and SrO;
More preferably, it is added at a ratio of 0.2 to 2.5% by weight. Further, as a fourth component, a metal powder or oxide powder of a transition metal such as W, Mo, or Cr is added as a coloring component at a ratio of 2% by weight or less in terms of metal. When adding each of these oxides, a carbonate, a nitrate, an acetate, or the like, which can form an oxide by firing, may be added in addition to the oxide powder.

[3] Thereafter, a sheet-like molded body is prepared from the mixed powder by a known molding method. Specifically, after an organic binder or a solvent is added to the mixed powder to prepare a slurry, the slurry is formed into a sheet by a doctor blade method. Alternatively, an organic binder is added to the mixed powder, and a sheet-like molded body having a predetermined thickness is produced by a press molding method or a rolling molding method.

[4] A 10-70 volume% Cu powder having an average particle size of 1 to 10 μm and a W and / or Mo powder having an average particle size of 1 to 10 μm are added to the formed sheet-like compact in an amount of 30 to 70% by volume. A conductor paste containing 90% by volume is prepared. Using this conductor paste, a wiring pattern to be the line conductor 8 is printed and applied on the surface of the sheet-like molded body for the flat plate portion 9 by a screen printing method, a gravure printing method, or the like. In order to improve the adhesion of the flat plate portion 9 to the dielectric, Al ₂ O ₃ powder or a ceramic powder having the same composition as the oxide ceramic component constituting the dielectric is added to the conductor paste in an amount of 0.05%.
It is also possible to add ２2% by volume.

[5] Then, from the sheet-like molded body, the flat plate portion 9 and the shape of the upright wall portion 10 having the groove 20 provided on the joint surface with the flat plate portion 9 are formed by punching.
The standing wall portion 10 is laminated and pressed on the upper surface of the laminate, and the laminate is fired and integrated in a non-oxidizing atmosphere under the condition that the highest firing temperature is 1200 to 1500 ° C. At this time, if the firing temperature is lower than 1200 ° C., the aluminum oxide sintered body cannot be densified to have a relative density of 95% or more, and the thermal conductivity and strength are reduced. If the sintering temperature exceeds 1500 ° C., sintering of W and Mo in the conductor paste proceeds, and a conductor layer having a homogeneous structure in which W and Mo are present in Cu as a matrix cannot be obtained, and a low resistance value is obtained. You can't get it. That is, it becomes difficult to set the sheet resistance of the line conductor 8 to 8 mΩ / □ or less. On the other hand, when the temperature exceeds 1500 ° C., the grain size of the main crystal phase of the oxide ceramic becomes large, abnormal grain growth occurs, and the length of the grain boundary, which is a path when Cu diffuses into the ceramic, becomes short. At the same time, the diffusion speed increases. As a result, it becomes difficult to suppress the diffusion distance to 30 μm or less, and the resistance value increases. Therefore, the firing temperature is more preferably in the range of 1250 to 1400 ° C.

Further, as the non-oxidizing atmosphere at the time of firing,
It is preferable to use nitrogen or a mixed atmosphere of nitrogen and hydrogen. In particular, from the viewpoint of suppressing the diffusion of Cu in the line conductor 8, a non-oxidizing atmosphere containing nitrogen and hydrogen and having a dew point of 10 ° C or lower, particularly -10 ° C or lower is preferable. An inert gas such as an argon gas may be mixed in the non-oxidizing atmosphere. That is, if the dew point of the non-oxidizing atmosphere is higher than 10 ° C., the oxide ceramic reacts with the moisture in the atmosphere during firing to form an oxide film, and the oxide film reacts with Cu in the conductor to form a line. This is because not only does this hinder lowering of the resistance of the conductor 8 but also promotes the diffusion of Cu.

[6] Thereafter, the line conductor 8 of the input / output terminal 5 co-fired is subjected to at least one selected from the group consisting of Au, Cu, Ti, Ni and Pd by an electroless plating method or an electrolytic plating method. 0.5-10μ of seed metal layer
m.

[7] Next, the groove 2 formed in the upright wall 10
After the material of the resin layer 11 is press-fitted with a syringe or the like to 0, it is sealed by hardening.

A metal such as an Fe—Ni—Co alloy or Cu—W for inputting / outputting a high-frequency signal between the external electric circuit and the input / output terminal 5 with respect to the line conductor 8 of the input / output terminal 5. A lead terminal 17 made of a material is joined with a brazing material such as silver brazing.

It should be noted that the present invention is not limited to the above-described embodiment, and that various changes can be made without departing from the scope of the present invention. For example, as shown in FIG. 3, a configuration in which the entire lower surface of the standing wall portion 10 is covered with the resin layer 11 may be employed, and the same effect as described above can be obtained.

[0042]

According to the present invention, there is provided a base having a mounting portion on which a semiconductor element is mounted on an upper surface, and a cutout or penetrating portion mounted on the upper surface of the base so as to surround the mounting portion. A frame body on which an input / output terminal mounting portion formed of a hole is formed, a flat plate portion made of a dielectric having a plurality of line conductors formed from one side of the upper surface to the other opposite side, and a plurality of Having an input / output terminal which is constituted by an upright wall portion made of a dielectric joined with the line conductor interposed therebetween and which is fitted to the mounting portion to electrically connect the semiconductor element and an external electric circuit. In the element storage package, the vertical wall has a relative dielectric constant of 5 or less and a porosity of 20
By being joined through a resin layer of ~ 60%,
The capacitance between the line conductor immediately below the standing wall and the ground conductor layer formed on the upper surface of the standing wall is reduced, and as a result, transmission loss of a high-frequency signal passing through the line conductor is reduced, and transmission of the high-frequency signal is performed. The properties are improved. In addition, considerable air exists in the resin layer, the relative dielectric constant is further reduced, and the transmission characteristics of high-frequency signals are further improved. Furthermore, while maintaining the adhesion strength of the resin layer,
Since a large number of pores function as cushions for absorbing and relaxing the stress applied to the input / output terminals, the strength of the input / output terminals against stress is also improved.

[Brief description of the drawings]

FIG. 1 is an exploded perspective view showing an example of an embodiment of a semiconductor package of the present invention.

FIG. 2 is a perspective view showing an example of input / output terminals in the semiconductor package of the present invention.

FIG. 3 is a perspective view showing another example of the input / output terminals in the semiconductor package of the present invention.

FIG. 4 is a perspective view of an input / output terminal in a conventional semiconductor package.

FIG. 5 is an exploded perspective view showing a conventional semiconductor package.

[Explanation of symbols]

 Reference Signs List 1: semiconductor package 2: semiconductor element 3: mounting portion 4: base member 5: input / output terminal 6: mounting portion 7: frame body 8: line conductor 9: flat plate portion 10: standing wall portion 11: resin layer

Claims (1)

[Claims] 1. A base having a mounting portion on which a semiconductor element is mounted on an upper surface, and attached to the upper surface of the base so as to surround the mounting portion, and a notch or a through hole is formed on a side portion. A flat plate portion made of a dielectric having a plurality of line conductors formed from one side of the upper surface to the other side opposite to the frame, and the plurality of An input / output terminal which is constituted by an upright wall portion made of a dielectric joined with the line conductor interposed therebetween and which is fitted to the mounting portion to electrically connect the semiconductor element and an external electric circuit. In the package for housing a semiconductor device according to the present invention, the vertical wall portion has a relative dielectric constant of 5
A package for accommodating a semiconductor element, wherein the package is joined via a resin layer having a porosity of 20 to 60%.