JP2002324964A - Multi-unit wiring board - Google Patents

Multi-unit wiring board

Info

Publication number
JP2002324964A
JP2002324964A JP2001126387A JP2001126387A JP2002324964A JP 2002324964 A JP2002324964 A JP 2002324964A JP 2001126387 A JP2001126387 A JP 2001126387A JP 2001126387 A JP2001126387 A JP 2001126387A JP 2002324964 A JP2002324964 A JP 2002324964A
Authority
JP
Japan
Prior art keywords
wiring board
defective
metal bumps
electronic component
metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2001126387A
Other languages
Japanese (ja)
Other versions
JP4593823B2 (en
Inventor
Genta Taniguchi
源太 谷口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2001126387A priority Critical patent/JP4593823B2/en
Publication of JP2002324964A publication Critical patent/JP2002324964A/en
Application granted granted Critical
Publication of JP4593823B2 publication Critical patent/JP4593823B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

PROBLEM TO BE SOLVED: To solve a problem that an automatic machine for mounting electronic parts misreads a defective wiring board region as a normal wiring board region, and as a result, a defective electronic device is manufactured. SOLUTION: In a multi-unit wiring board, a plurality of wiring board regions 2 are arranged with a plurality of metal bumps 6 for connecting electrodes of electronic parts on an upper face of an insulation base 4, and the regions 2 are integrally and vertically laterally arrayed in a sheet-like mother board 1. A defective wiring board region 2D of the respective wiring board regions 2 is flattened so that at least one 6M of the metal bumps 6 has a height of 3/4 of the other metal bumps 6. The flattened metal bump 6M is measured by a height measuring device, whereby go or no go of the respective wiring board regions 2 can be reliably determined.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体素子や圧電
振動子等の電子部品を搭載するための配線基板となる配
線基板領域を広面積の母基板中に縦横に多数個配列形成
して成る多数個取り配線基板に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention comprises a large number of wiring board regions, which are used as wiring boards for mounting electronic components such as semiconductor elements and piezoelectric vibrators, arranged in a matrix on a wide area. The present invention relates to a multi-cavity wiring board.

【0002】[0002]

【従来の技術】半導体素子や圧電振動子等の電子部品を
搭載するための配線基板は、例えば、上面中央部に電子
部品が搭載される略四角平板状のセラミックスから成る
絶縁基体に、この絶縁基体の上面から下面にかけて導出
する複数のメタライズ配線導体を配設させて成る。メタ
ライズ配線導体のうち絶縁基体の上面に導出した部位は
電子部品の電極が電気的に接続される電子部品接続パッ
ドを、絶縁基体の下面に導出した部位は外部電気回路基
板に接続される外部接続パッドを形成している。なお、
電子部品の電極と配線基板の電子部品接続パッドとの電
気的接続は、近時は半田や金等から成る金属バンプを介
して行なわれるようになってきており、そのような金属
バンプを介した接続を容易なものとするため、配線基板
の各電子部品接続パッドに金属バンプを予め取着させて
おくことが一般的である。そして、電子部品の各電極を
配線基板の電子部品接続パッドに予め取着させておいた
金属バンプを介して電気的および機械的に接続し、しか
る後、配線基板の上面に電子部品を覆うようにして封止
用の樹脂や蓋体を固着させ、電子部品を気密に封止する
ことによって製品としての電子装置となる。
2. Description of the Related Art A wiring board for mounting an electronic component such as a semiconductor element or a piezoelectric vibrator is formed, for example, on an insulating base made of a substantially square plate-like ceramic on which an electronic component is mounted at the center of the upper surface. A plurality of metallized wiring conductors extending from the upper surface to the lower surface of the base are arranged. The portion of the metallized wiring conductor protruding on the upper surface of the insulating base is an electronic component connection pad to which electrodes of the electronic component are electrically connected, and the portion protruding on the lower surface of the insulating base is an external connection connected to an external electric circuit board. Pads are formed. In addition,
The electrical connection between the electrodes of the electronic component and the electronic component connection pads of the wiring board has recently been made through metal bumps made of solder, gold, or the like, and via such metal bumps. In general, metal bumps are generally attached to respective electronic component connection pads of a wiring board in advance to facilitate connection. Then, each electrode of the electronic component is electrically and mechanically connected to the electronic component connection pad of the wiring board via a metal bump previously attached thereto, and then the electronic component is covered on the upper surface of the wiring board. Then, a sealing resin or a lid is fixed, and the electronic component is hermetically sealed, whereby an electronic device as a product is obtained.

【0003】ところで、このような配線基板は、近時に
おける電子装置の小型化の要求に伴い、その大きさが数
mm角程度の極めて小さなものとなってきている。そし
て、そのような小型化した配線基板は、その取り扱いを
容易とするとともに製造効率を高いものとするために、
多数個の小型配線基板を一枚の広面積の母基板から同時
集約的に得るようになした、いわゆる多数個取り配線基
板の形態で製作されている。
Incidentally, such a wiring board has recently become extremely small with a size of about several mm square in accordance with a recent demand for miniaturization of electronic devices. And in order to make such a miniaturized wiring board easy to handle and high in manufacturing efficiency,
It is manufactured in the form of a so-called multi-cavity wiring board in which a large number of small wiring boards are simultaneously and intensively obtained from one large-area mother board.

【0004】このような多数個取り配線基板は、広面積
の母基板中にそれぞれが小型の配線基板となる多数の配
線基板領域が各々分割線で区切られて縦横の並びに一体
的に配列形成されて成り、各配線基板領域には、それぞ
れの上面から下面に導出する配線導体が形成されている
とともに配線導体の電子部品接続パッドには金属バンプ
が取着されている。そして、各配線基板領域に電子部品
をその各電極が電子部品接続パッドに金属バンプを介し
て電気的に接続されるようにして搭載固定するととも
に、この電子部品を覆うようにして各配線基板領域の上
面に封止用の樹脂や蓋体を固着させ、しかる後、母基板
を分割線に沿って分割することにより多数個の電子装置
が同時集約的に製作されるのである。
In such a multi-cavity wiring board, a large number of wiring board areas, each of which is a small wiring board, are divided by dividing lines in a large-area mother board, and are vertically and horizontally arranged integrally. In each wiring board region, a wiring conductor extending from the upper surface to the lower surface is formed, and a metal bump is attached to an electronic component connection pad of the wiring conductor. Then, the electronic component is mounted and fixed on each wiring board area so that each electrode thereof is electrically connected to the electronic component connection pad via a metal bump, and each wiring board area is covered so as to cover this electronic component. A sealing resin or a lid is fixed on the upper surface of the substrate, and thereafter, the mother substrate is divided along the dividing lines, whereby a large number of electronic devices are manufactured simultaneously and intensively.

【0005】なお、このような多数個取りの配線基板に
おいて、各配線基板領域に電子部品を搭載するには、例
えばレーザー光を使用した三次元寸法測定装置を備えた
自動機が使用されており、各配線基板領域における金属
バンプの位置および高さを自動機の三次元寸法測定装置
で測定し、その情報を基にして電子部品の各電極と金属
バンプとを位置合わせして自動で搭載する方法が採用さ
れている。
[0005] In such a multi-cavity wiring board, in order to mount electronic parts on each wiring board area, for example, an automatic machine equipped with a three-dimensional dimension measuring device using laser light is used. The positions and heights of the metal bumps in each wiring board area are measured by a three-dimensional dimension measuring device of an automatic machine, and based on the information, each electrode of the electronic component and the metal bumps are aligned and mounted automatically. The method has been adopted.

【0006】[0006]

【発明が解決しようとする課題】しかしながら、このよ
うな多数個取り配線基板によると、製造上のばらつきや
不具合等により、母基板中に配列形成された多数個の配
線基板領域のうちのいくつかに、例えば断線やショート
・異物の付着・汚れ・染み・傷・欠け等の不具合を有す
る不良の配線基板領域が含まれていることがある。この
ような不良の配線基板領域が含まれている場合には、不
良の配線基板領域の上面に例えば油性の塗料で印を付け
ておき、この印を三次元寸法測定装置で認識することに
より各配線基板領域に自動機で電子部品を搭載する際に
この印のついた配線基板領域を不良と判定させ、この不
良の配線基板領域については電子部品を搭載しないよう
にプログラムしておくことがなされていた。
However, according to such a multi-cavity wiring board, some of the large number of wiring board regions arranged and formed in the mother board due to manufacturing variations and defects. In some cases, a defective wiring board region having a defect such as disconnection, short circuit, adhesion of foreign matter, dirt, stain, scratch, chipping or the like may be included. When such a defective wiring board area is included, a mark is made on the upper surface of the defective wiring board area with, for example, an oil-based paint, and the mark is recognized by a three-dimensional dimension measuring device. When an electronic component is mounted on the wiring board area by an automatic machine, the marked wiring board area is determined to be defective, and the defective wiring board area is programmed so as not to mount the electronic component. I was

【0007】ところが、不良の配線基板領域の上面に油
性の塗料で印をつけた場合、塗料のかすれ等により厚み
不足があると、その印を三次元寸法測定装置で確実に認
識することができず、自動機が不良の配線基板領域を正
常な配線基板領域と誤認して、この不良の配線基板領域
に電子部品を搭載してしまうことがあり、その場合、不
良の電子装置が製造されてしまうという問題点を有して
いた。
However, when a mark is made with an oily paint on the upper surface of the defective wiring board area, if the paint is thin and the thickness is insufficient, the mark can be reliably recognized by the three-dimensional dimension measuring device. In some cases, an automatic machine may mistake a defective wiring board area as a normal wiring board area and mount electronic components on the defective wiring board area. In this case, a defective electronic device is manufactured. Had the problem that

【0008】本発明は、かかる従来の問題点に鑑み案出
されたものであり、その目的は、不良の配線基板領域に
電子部品が搭載されることがなく、良品の電子装置のみ
を多数個、同時集約的に製造することが可能な多数個取
り配線基板を提供することにある。
The present invention has been devised in view of such a conventional problem, and has as its object to prevent the mounting of electronic components in a defective wiring board area and to provide a large number of non-defective electronic devices only. Another object of the present invention is to provide a multi-piece wiring board that can be manufactured simultaneously and intensively.

【0009】[0009]

【課題を解決するための手段】本発明の多数個取り配線
基板は、絶縁基体の上面に電子部品の電極が接続される
複数の金属バンプを配設して成る多数の配線基板領域
を、板状の母基板中に一体的に縦横に配列形成して成る
多数個取り配線基板であって、各配線基板領域のうち、
不良の配線基板領域は、その金属バンプの少なくとも一
つが他の金属バンプの3/4以下の高さとなるように潰
されていることを特徴とするものである。
A multi-piece wiring board according to the present invention comprises a plurality of wiring board areas, each of which has a plurality of metal bumps on an upper surface of an insulating base to which electrodes of electronic components are connected, and is provided with a plurality of wiring board areas. A multi-cavity wiring board formed integrally and vertically arranged in a matrix mother board, of each wiring board area,
The defective wiring board region is characterized in that at least one of the metal bumps is crushed so as to have a height of 3 or less of the other metal bumps.

【0010】本発明の多数個取り配線基板によれば、不
良の配線基板領域は、その金属バンプの少なくとも一つ
が他の金属バンプの3/4以下の高さとなるように潰さ
れていることから、この潰れた金属バンプを自動機の三
次元寸法測定装置で測定させることにより不良の配線基
板領域であるか否かを確実に判定させることができる。
According to the multi-cavity wiring board of the present invention, the defective wiring board area is crushed so that at least one of the metal bumps is 3 or less the height of the other metal bumps. By measuring the crushed metal bumps with a three-dimensional dimension measuring apparatus of an automatic machine, it is possible to reliably determine whether or not the area is a defective wiring board area.

【0011】[0011]

【発明の実施の形態】つぎに、本発明の多数個取り配線
基板を添付の図面を基に説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, a multi-cavity wiring board according to the present invention will be described with reference to the accompanying drawings.

【0012】図1は、本発明の多数個取り配線基板の実
施の形態の一例を示す上面図、図2は断面図であり、こ
れらの図において、1はセラミック母基板、2は配線基
板領域である。
FIG. 1 is a top view showing an embodiment of a multi-cavity wiring board according to the present invention, and FIG. 2 is a cross-sectional view. In these figures, 1 is a ceramic mother board, and 2 is a wiring board area. It is.

【0013】セラミック母基板1は、例えば酸化アルミ
ニウム質焼結体や窒化アルミニウム質焼結体・ムライト
質焼結体・ガラス−セラミックス等のセラミックス材料
から成る略四角形の平板であり、その中央部に各々が小
型の配線基板となる多数の配線基板領域2が仮想線であ
る分割線3で仕切られて縦横に一体的に配列形成されて
いる。
The ceramic mother substrate 1 is a substantially rectangular flat plate made of a ceramic material such as an aluminum oxide sintered body, an aluminum nitride sintered body, a mullite sintered body, or a glass-ceramic. A large number of wiring board regions 2 each of which becomes a small wiring board are partitioned by virtual dividing lines 3 and are integrally arranged vertically and horizontally.

【0014】セラミック母基板1に配列形成された各配
線基板領域2は、セラミックス材料から成る絶縁基体4
の上面から下面にかけてタングステンやモリブデン・銅
・銀等の金属粉末メタライズから成る複数のメタライズ
配線導体5が配設されて成る。
Each wiring substrate region 2 arranged and formed on the ceramic mother substrate 1 has an insulating base 4 made of a ceramic material.
A plurality of metallized wiring conductors 5 made of metal powder of metal such as tungsten, molybdenum, copper, silver or the like are arranged from the upper surface to the lower surface.

【0015】絶縁基体4は、電子部品を支持するための
支持部材として機能するとともに各メタライズ配線導体
5を互いに電気的に絶縁して保持する保持部材として機
能し、その上面側に電子部品が搭載される。
The insulating substrate 4 functions as a supporting member for supporting the electronic components and also as a holding member for electrically insulating and holding the metallized wiring conductors 5 from each other, and the electronic components are mounted on the upper surface thereof. Is done.

【0016】また、メタライズ配線導体5は、絶縁基体
4の上面に搭載される電子部品を外部電気回路基板に電
気的に接続するための導電路として機能し、絶縁基体4
の上面に導出した部位に電子部品の電極が接続される電
子部品接続パッド5aが、絶縁基体4の下面に導出した
部位に外部電気回路に接続される外部接続パッド5bが
形成されている。
The metallized wiring conductor 5 functions as a conductive path for electrically connecting an electronic component mounted on the upper surface of the insulating base 4 to an external electric circuit board.
An electronic component connection pad 5a connected to an electrode of an electronic component is formed on a portion led out on the upper surface of the substrate, and an external connection pad 5b connected to an external electric circuit is formed on a portion led out on a lower surface of the insulating base 4.

【0017】さらに、各配線基板領域2の電子部品接続
パッド5aには、例えば鉛−錫合金や銀−錫合金等の半
田や金等から成る金属バンプ6が取着されている。
Further, a metal bump 6 made of, for example, a solder such as a lead-tin alloy or a silver-tin alloy, gold, or the like is attached to the electronic component connection pad 5a of each wiring board region 2.

【0018】金属バンプ6は、電子部品の電極とメタラ
イズ配線導体5とを電気的および機械的に接続するため
の接続部材として機能し、この金属バンプ6に電子部品
の電極を接続することにより電子部品が各配線基板領域
2上に搭載固定されるとともに電子部品の電極とメタラ
イズ配線導体5とが電気的に接続されることになる。
The metal bump 6 functions as a connecting member for electrically and mechanically connecting the electrode of the electronic component and the metallized wiring conductor 5. The components are mounted and fixed on each wiring board area 2 and the electrodes of the electronic components and the metallized wiring conductors 5 are electrically connected.

【0019】なお、このようなセラミック母基板1は、
例えば、セラミックグリーンシートに適当な打ち抜き加
工を施すとともに、このセラミックグリーンシートにメ
タライズ配線導体5用のメタライズペーストをスクリー
ン印刷法により所定のパターンに印刷塗布し、しかる
後、これを高温で焼成することによって製作され、金属
バンプ6は、例えば半田から成る場合であれば、電子部
品接続パッド5aにニッケルや金等の半田との濡れ性に
優れる金属をめっき法により被着させるとともにその上
にボール状やペースト状の半田を載置して半田の溶融温
度以上の温度で加熱して溶融させた後に冷却することに
よって、金から成る場合であれば、電子部品接続パッド
5a上に例えばニッケルめっき層を下地として金めっき
層を10〜100μm程度の厚みに被着させることによって
取着される。
Incidentally, such a ceramic mother substrate 1
For example, an appropriate punching process is performed on the ceramic green sheet, and a metallized paste for the metallized wiring conductor 5 is printed and applied on the ceramic green sheet in a predetermined pattern by a screen printing method, and then fired at a high temperature. When the metal bump 6 is made of, for example, solder, the metal component 6 is coated with a metal having excellent wettability with solder, such as nickel or gold, on the electronic component connection pad 5a by a plating method, and a ball-shaped metal bump 6 is formed thereon. When the solder is made of gold, for example, a nickel plating layer is formed on the electronic component connection pad 5a by placing the solder in the form of paste or paste, heating and melting the solder at a temperature equal to or higher than the melting temperature of the solder, and then cooling. It is attached by applying a gold plating layer as a base to a thickness of about 10 to 100 μm.

【0020】そして、本発明の多数個取り配線基板にお
いては、セラミック母基板1に配列形成された各配線基
板領域2のうちで不良の配線基板領域2Dがあった場合
に、その不良の配線基板領域2Dの金属バンプ6の一つ
6Mが他の金属バンプ6の3/4以下の高さとなるよう
に潰されている。なお、この例では不良の配線基板領域
2Dの金属バンプ6のうちの一つ6Mが潰されている
が、不良の配線基板領域2Dの金属バンプ6のうち二つ
以上が潰されていても構わない。このように、不良の配
線基板領域2Dの金属バンプ6の少なくとも一つ6Mが
他の金属バンプ6の3/4以下の高さとなるように潰さ
れていることから、各配線基板領域2の搭載部4aに電
子部品を自動機により搭載する場合、自動機の三次元寸
法測定装置により各配線基板領域4の金属バンプ6の高
さを測定することにより、自動機がこの配線基板領域2
の良否を確実に判定することができ、その結果、不良の
配線基板領域2Dに電子部品が搭載されることはない。
In the multi-cavity wiring board of the present invention, if there is a defective wiring board area 2D among the wiring board areas 2 arranged and formed on the ceramic mother substrate 1, the defective wiring board area One of the metal bumps 6M in the region 2D is crushed so as to be 3/4 or less the height of the other metal bumps 6. In this example, one 6M of the metal bumps 6 in the defective wiring board area 2D is crushed, but two or more of the metal bumps 6 in the defective wiring board area 2D may be crushed. Absent. As described above, since at least one of the metal bumps 6M of the defective wiring board area 2D is crushed so as to have a height of 3/4 or less of the other metal bumps 6, the mounting of each wiring board area 2 is performed. When electronic parts are mounted on the part 4a by an automatic machine, the height of the metal bumps 6 of each wiring board area 4 is measured by a three-dimensional dimension measuring device of the automatic machine, so that the automatic machine can use the wiring board area 2
Can be reliably determined, and as a result, no electronic component is mounted on the defective wiring board area 2D.

【0021】なお、不良の配線基板領域2Dの潰された
金属バンプ6Mの高さが他の金属バンプ6の高さの3/
4を超えると、その高さの違いを三次元寸法測定装置に
より測定する際に確実に判定することが困難となる。し
たがって、不良の配線基板領域2Dの潰された金属バン
プ6Mは、他の金属バンプ6の3/4以下の高さとなる
ように潰されていることに特定される。
The height of the crushed metal bump 6M in the defective wiring board area 2D is 3/3 of the height of the other metal bumps 6.
If it exceeds 4, it will be difficult to reliably determine the difference in height when measuring with a three-dimensional dimension measuring device. Therefore, it is specified that the crushed metal bump 6M in the defective wiring board region 2D is crushed so as to have a height of / or less of the other metal bumps 6.

【0022】また、不良の配線基板領域2Dの金属バン
プ6を潰すには、例えばパルスヒート方式を用いた加熱
装置により金属バンプ6の溶融温度より低い温度で加熱
して金属バンプ6を軟化させるとともにこの軟化した金
属バンプ6を例えば下面が平坦な金属棒で上方からプレ
スする方法が採用される。
Further, in order to crush the metal bumps 6 in the defective wiring board area 2D, the metal bumps 6 are softened by heating at a temperature lower than the melting temperature of the metal bumps 6 by, for example, a heating device using a pulse heating method. For example, a method of pressing the softened metal bump 6 from above with a metal bar having a flat lower surface is adopted.

【0023】そして、正常な配線基板領域2の全てに電
子部品を搭載した後、この電子部品が搭載された各配線
基板領域2の上面に電子部品を覆うようにして封止用の
樹脂や蓋体を固着させ、しかる後、セラミック母基板1
を分割線3に沿って分割すれば、多数個の良品の電子装
置のみが同時集約的に製造されることとなる。セラミッ
ク母基板1を分割するには、ダイアモンドカッターやレ
ーザーカッターによって母基板1を分割線3に沿って切
断して分割する方法が採用される。あるいは、母基板1
用のセラミックグリーンシートの上面および/または下
面に分割線3に沿って細い切れ込みを入れることにより
分割溝を形成しておき、この分割溝に沿って破断する方
法が採用される。
After the electronic components are mounted on all of the normal wiring board regions 2, the upper surface of each of the wiring substrate regions 2 on which the electronic components are mounted is covered with a sealing resin or lid so as to cover the electronic components. After fixing the body, the ceramic motherboard 1
Is divided along the division line 3, only a large number of non-defective electronic devices are manufactured simultaneously and collectively. In order to divide the ceramic mother substrate 1, a method of cutting the mother substrate 1 along a division line 3 using a diamond cutter or a laser cutter to divide the ceramic mother substrate 1 is adopted. Alternatively, the mother board 1
A dividing groove is formed by making a small cut along the dividing line 3 on the upper surface and / or lower surface of the ceramic green sheet for use, and a method of breaking along the dividing groove is adopted.

【0024】なお、本発明は、上述の実施の形態に限定
されるものではなく、本発明の要旨を逸脱しない範囲で
あれば種々の変更は可能である。
The present invention is not limited to the above-described embodiment, and various changes can be made without departing from the gist of the present invention.

【0025】[0025]

【発明の効果】本発明の多数個取り配線基板によれば、
不良の配線基板領域は、その金属バンプの少なくとも一
つが他の金属バンプの3/4以下の高さとなるように潰
れていることから、この潰れた金属バンプを自動機の三
次元寸法測定装置で測定させることにより不良の配線基
板領域であるか否かを確実に判定させることができ、そ
の結果、不良の配線基板領域に電子部品が搭載されるこ
とはなく、したがって良品の電子装置のみを多数個、同
時集約的に製造することが可能となる。
According to the multi-cavity wiring board of the present invention,
Since the defective wiring board region is crushed so that at least one of the metal bumps has a height of 高 or less of the other metal bumps, the crushed metal bump is measured by a three-dimensional dimension measuring apparatus of an automatic machine. By performing the measurement, it is possible to reliably determine whether or not the area is a defective wiring board area. As a result, electronic components are not mounted on the defective wiring board area, and therefore, only a large number of good electronic devices are provided. It is possible to manufacture individual and simultaneous intensive products.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の多数個取り配線基板の実施の形態の一
例を示す上面図である。
FIG. 1 is a top view showing an example of an embodiment of a multi-cavity wiring board according to the present invention.

【図2】図1に示す多数個取り配線基板の断面図であ
る。
FIG. 2 is a sectional view of the multi-cavity wiring board shown in FIG. 1;

【符号の説明】[Explanation of symbols]

1・・・母基板 2・・・配線基板領域 2D・・・不良の配線基板領域 4・・・絶縁基体 6・・・金属バンプ 6M・・・潰された金属バンプ DESCRIPTION OF SYMBOLS 1 ... Mother board 2 ... Wiring board area 2D ... Defective wiring board area 4 ... Insulating base 6 ... Metal bump 6M ... Crushed metal bump

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 絶縁基体の上面に電子部品の電極が接続
される複数の金属バンプを配設して成る多数の配線基板
領域を、板状の母基板中に一体的に縦横に配列形成して
成る多数個取り配線基板であって、前記各配線基板領域
のうち、不良の配線基板領域は、その金属バンプの少な
くとも一つが他の金属バンプの3/4以下の高さとなる
ように潰されていることを特徴とする多数個取り配線基
板。
1. A large number of wiring board regions each having a plurality of metal bumps to which electrodes of an electronic component are connected on an upper surface of an insulating base are integrally and vertically arranged in a plate-shaped mother substrate. A multi-cavity wiring board, wherein a defective wiring board area of each of the wiring board areas is crushed so that at least one of the metal bumps has a height of / or less of the other metal bumps. A multi-cavity wiring board characterized in that:
JP2001126387A 2001-04-24 2001-04-24 Multiple wiring board Expired - Fee Related JP4593823B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001126387A JP4593823B2 (en) 2001-04-24 2001-04-24 Multiple wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001126387A JP4593823B2 (en) 2001-04-24 2001-04-24 Multiple wiring board

Publications (2)

Publication Number Publication Date
JP2002324964A true JP2002324964A (en) 2002-11-08
JP4593823B2 JP4593823B2 (en) 2010-12-08

Family

ID=18975435

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001126387A Expired - Fee Related JP4593823B2 (en) 2001-04-24 2001-04-24 Multiple wiring board

Country Status (1)

Country Link
JP (1) JP4593823B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005303100A (en) * 2004-04-14 2005-10-27 Ngk Spark Plug Co Ltd Marking method of defective part of component, the same with bump, and manufacturing method of multi-piece wiring board

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07240569A (en) * 1994-02-28 1995-09-12 Taiyo Yuden Co Ltd Circuit board and its marking detection method
JPH1058241A (en) * 1996-08-20 1998-03-03 Matsushita Electric Ind Co Ltd Loading method and device for conductive ball
JPH11191668A (en) * 1997-12-26 1999-07-13 Sony Corp Assembly substrate and quality discrimination method of each fragmentation part
JP2001127399A (en) * 1999-10-29 2001-05-11 Kyocera Corp Multiple-machining wiring board
JP2002100899A (en) * 2000-09-25 2002-04-05 Yamaha Motor Co Ltd Mounting method and surface mounting machine

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07240569A (en) * 1994-02-28 1995-09-12 Taiyo Yuden Co Ltd Circuit board and its marking detection method
JPH1058241A (en) * 1996-08-20 1998-03-03 Matsushita Electric Ind Co Ltd Loading method and device for conductive ball
JPH11191668A (en) * 1997-12-26 1999-07-13 Sony Corp Assembly substrate and quality discrimination method of each fragmentation part
JP2001127399A (en) * 1999-10-29 2001-05-11 Kyocera Corp Multiple-machining wiring board
JP2002100899A (en) * 2000-09-25 2002-04-05 Yamaha Motor Co Ltd Mounting method and surface mounting machine

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005303100A (en) * 2004-04-14 2005-10-27 Ngk Spark Plug Co Ltd Marking method of defective part of component, the same with bump, and manufacturing method of multi-piece wiring board
JP4515805B2 (en) * 2004-04-14 2010-08-04 日本特殊陶業株式会社 Defective part marking method, defective part marking method for bumped parts, and multi-cavity wiring board manufacturing method

Also Published As

Publication number Publication date
JP4593823B2 (en) 2010-12-08

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