JP2002323873A - Light emission device and electronic equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a light emission device capable of displaying a beautiful picture by preventing the light emission of an OLED(organic light emitting diode) due to the OFF current of a TFT(thin film transistor) for drive and suppressing the reduction of the contrast of the picture. SOLUTION: In this device, a wiring (which is hereinafter referred to as a discharge wiring) which is held at a prescribed potential is provided and the OFF current of the TFT for drive is made so as to be made to not flow through the OLED but to flow through the discharge wiring. Moreover, a TFT (which is hereinafter referred to as a TFT for discharge) such as to be turned ON conversely when the TFT for drive is turned OFF is provided in each pixel and one side of the source region and the drain region of the TFT for discharge is connected to a pixel electrode and the other side is connected to the discharge wiring. By this constitution, when the TFT for drive is turned OFF, the TFT for discharge is turned ON and the OFF current of the TFT for drive is made to flow more positively through the discharge wiring than through the OLED.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting device formed on a substrate, for example, an organic light emitting device (OLED: Organic).
Light Emitting Device) between the substrate and the cover material. In addition, an OLED in which an IC including a controller is mounted on the OLED panel.
About the module. In this specification, OLED
The panel and the OLED module are generically called a light emitting device.
The invention further relates to an electronic device using the light emitting device.

[0002]

2. Description of the Related Art An OLED emits light by itself and has high visibility, and does not require a backlight necessary for a liquid crystal display device (LCD). Therefore, the OLED is suitable for thinning and has no restriction on a viewing angle. Therefore, in recent years, light emitting devices using OLED
It is attracting attention as a display device replacing T and LCD.

[0003] An OLED has a layer containing an organic compound (organic light emitting material) capable of obtaining luminescence (Electroluminescence) generated by applying an electric field (hereinafter, referred to as an organic light emitting layer), an anode layer, and a cathode layer. are doing. Luminescence of an organic compound includes light emission (fluorescence) when returning from a singlet excited state to a ground state and light emission (phosphorescence) when returning from a triplet excited state to a ground state. Either one of the above-described light emissions may be used, or both light emissions may be used.

[0004] In this specification, all layers provided between the anode and cathode of an OLED are defined as organic light-emitting layers.
The organic light emitting layer specifically includes a light emitting layer, a hole injection layer, an electron injection layer, a hole transport layer, an electron transport layer, and the like. Basically, an OLED has a structure in which an anode / light-emitting layer / cathode is laminated in this order. In addition to this structure, an anode / hole injection layer /
It may have a structure in which a light emitting layer / cathode or an anode / hole injection layer / light emitting layer / electron transport layer / cathode are stacked in this order.

Hereinafter, a configuration of a pixel of a general light emitting device will be described with reference to FIG.

In a pixel portion of a general light emitting device, a plurality of pixels 1000 are provided in a matrix. Pixel 10
00 denotes at least one signal line 1001, at least one scanning line 1002, and at least one power line 1
003.

The pixel 1000 has a switching TF
T1004, driving TFT 1005, and OLED 10
06, and a storage capacitor 1007.

The gate electrode of the switching TFT 1004 is connected to the scanning line 1002. One of a source region and a drain region of the switching TFT 1004 is connected to the signal line 1001 and the other is connected to the driving TFT 1005.
Are connected to the respective gate electrodes.

The storage capacitor 1007 is a driving TFT 100
5 and a power supply line 1003. The storage capacitor 1007 is a switching TFT 100
4 is in a non-selected state (off state), the driving TFT 1
005 is provided to hold the gate voltage (the potential difference between the gate electrode and the source region).

One of a source region and a drain region of the driving TFT 1005 is connected to a power supply line 1003,
The other is connected to OLED 1006.

The OLED 1006 includes an anode and a cathode, and an organic light emitting layer provided between the anode and the cathode. When the anode is connected to the source or drain region of the driving TFT 1005, the anode is called a pixel electrode and the cathode is called a counter electrode. Conversely, when the cathode is connected to the source or drain region of the driving TFT 1005, the cathode is called a pixel electrode and the anode is called a counter electrode.

The opposing electrode of the OLED 1006 is OLE
An electric potential (opposite electric potential) is given by a power supply provided outside the D panel. The power line 1003 is also OL
A potential (power supply potential) is provided by a power supply provided outside the ED panel.

Next, the operation of the pixel 1000 shown in FIG. 15 will be described.

The scanning line 1002 is selected by the selection signal input to the scanning line 1002, and all the switching TFTs 1004 whose gate electrodes are connected to the scanning line 1002 are turned on. Note that in this specification, selecting a scanning line means that all TFTs whose gate electrodes are connected to the scanning line are turned on.

A video signal having image information input to the signal line 1001 is turned on by the switching TF
The signal is input to the gate electrode of the driving TFT 1005 via T1004.

The gate voltage of the driving TFT 1005 is determined by the potential of the video signal input to the gate electrode. In the channel formation region of the driving TFT 1005, a current having a value corresponding to the magnitude of the gate voltage flows. Then, the current flowing to the channel formation region of the driving TFT 1005 flows to the OLED 1006.

When a current flows through the OLED 1006, OL
The ED 1006 emits light. Then, the above operation is performed in all the pixels, so that an image is displayed in the pixel portion.

[0018]

The driving TFT
Ideally, it is normally off. For example, in the case of a p-channel TFT, the drain current does not flow when the gate voltage (the potential difference between the source region and the drain region) is larger than the threshold value, and when the gate voltage becomes smaller than the threshold value, Ideally, the current starts to flow. In the case of an n-channel TFT, no drain current flows when the gate voltage is lower than the threshold, and conversely, when the gate voltage becomes higher than the threshold,
Ideally, the drain current starts flowing for the first time.
In this specification, an increase in the gate voltage means that the gate voltage changes in the positive direction, and a decrease in the gate voltage means that the gate voltage changes in the negative direction.

The threshold voltage is a p-channel type TFT.
Is ideally a negative value, and conversely, an n-channel TFT is ideally a positive value.

However, in practice, the threshold voltage of the TFT slightly shifts depending on the manufacturing process. When the threshold voltage shifts, a driving TFT that should be turned off may be turned on. When the driving TFT, which should be off, turns on,
A drain current flows in the channel forming region of the driving TFT, and the OLED emits light when it should not emit light, causing a decrease in contrast and a disturbance in a displayed image.

Further, depending on the characteristics of the TFT, the current flowing when the TFT is off (off current) may be large. If the off current of the driving TFT is large, the off current is
OLED when it should not glow because it flows to the LED
Will emit light.

In order to reduce the off current, a driving TFT
Of the multi-gate structure by increasing the channel length or increasing the number of gate electrodes, there is a limit in reducing the off-state current in any of the methods.

In view of the above problems, an object of the present invention is to propose a light emitting device capable of preventing OLED from emitting due to off current of a driving TFT, suppressing a decrease in contrast, and displaying a beautiful image.

[0024]

The present inventor has proposed a driving TF.
Assuming that an off-current exists in T, a shunt for releasing the off-current was considered to prevent the off-current from flowing to the OLED.

Specifically, a wiring (hereinafter, referred to as a discharge line) maintained at a predetermined potential is provided so that off current does not flow to the OLED but flows to the discharge line. Each pixel is provided with a TFT (hereinafter, referred to as a discharging TFT) that is turned on when the driving TFT is turned off.
One of the source region and the drain region of the FT was connected to the pixel electrode, and the other was connected to the discharge line.

With the above configuration, when the driving TFT is turned on, the discharging TFT is turned off, and the drain current of the driving TFT flows to the OLED. Conversely, when the driving TFT is turned off, the discharging TFT is turned on, and the drain current (in this case, the off current) of the driving TFT flows more actively in the discharge line than in the OLED.

One of the discharging TFT and the driving TFT is a p-channel TFT and the other is an n-channel TF.
By setting T and electrically connecting the gate electrodes of both TFTs, when one is on, the other can be turned off.

With the above configuration, even if an off current flows through the driving TFT, it is possible to prevent the OLED from emitting light, suppress a decrease in contrast, and prevent a displayed image from being disturbed.

[0029]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the structure of the light emitting device of the present invention will be described in detail.

FIG. 1A shows the OLE of the light emitting device of the present invention.
The configuration of the D panel is shown in a block diagram. Reference numeral 101 denotes a pixel portion, and a plurality of pixels 102 are formed in a matrix. Reference numeral 103 denotes a signal line driving circuit, and 104 denotes a scanning line driving circuit.

Although the signal line driving circuit 103 and the scanning line driving circuit 104 are formed on the same substrate as the pixel portion 101 in FIG. 1, the present invention is not limited to this structure. The signal line driver circuit 103, the scan line driver circuit 104, and the scan line driver circuit 104 may be formed over a different substrate from the pixel portion 101 and connected to the pixel portion 101 via a connector such as an FPC.
In FIG. 1, the signal line driver circuit 103 and the scanning line driver circuit 104 are provided one by one; however, the present invention is not limited to this structure. The number of the signal line driving circuits 103 and the number of the scanning line driving circuits 104 can be arbitrarily set by a designer.

In FIG. 1, the signal line S1 is connected to the pixel portion 101.
To Sx, power supply lines V1 to Vx, scanning lines G1 to Gy, and discharge lines C1 to Cy. Note that the number of signal lines and the number of power supply lines are not always the same. Further, the number of scanning lines and the number of discharge lines are not always the same.

The power supply lines V1 to Vx are maintained at a predetermined potential. Further, the discharge lines C1 to Cy are also maintained at a constant potential. Although FIG. 1 shows the structure of a light emitting device that displays a monochrome image, the present invention may be a light emitting device that displays a color image. In that case, the power supply lines V1 to V
The heights of the potentials of x do not need to be all the same, and may be changed for each corresponding color.

FIG. 1B shows a detailed configuration of each pixel.
In the light emitting device of the present invention, the pixel 102 has at least one signal line, at least one scanning line, at least one power supply line, and at least one discharge line. In the pixel shown in FIG. 1B, a signal line Si (i =
1 to x), a scanning line Gj (j = 1 to y), a power supply line Vi, and a discharge line Cj.

Further, in the present invention, the pixel 102 includes at least the switching TFT 105 and the driving TFT 10.
6. It has a discharge TFT 107 and an OLED 108. Note that in FIG. 1B, the storage capacitor 109 is
Although it is provided to hold the potential of the gate electrode of the FT 106, it is not necessarily provided, and may be provided as needed.

The switching TFT 105, the driving TFT 106, and the discharging TFT 107 are not limited to a single gate structure, but may have a multi-gate structure such as a double gate structure or a triple gate structure.

In FIG. 1B, the switching TFT 1
The gate electrode 05 is connected to the scanning line Gj. One of the source region and the drain region of the switching TFT 105 is connected to the signal line Si, and the other is connected to the driving TFT.
106 is connected to the gate electrode.

One of the source region and the drain region of the driving TFT 106 is connected to the power supply line Vi, and the other is connected to the OLED 1.
08 pixel electrode. On the other hand, the discharge TFT
The gate electrode 107 is connected to the gate electrode of the driving TFT 106. One of the source region and the drain region of the discharge TFT 107 is connected to the pixel electrode of the OLED 108, and the other is connected to the discharge line Cj.

The storage capacitor 109 is formed between the gate electrode of the driving TFT 106 and the power supply line Vi.

The OLED 108 has an anode and a cathode. In this specification, when the anode is used as a pixel electrode (first electrode), the cathode is called a counter electrode (second electrode).
When the cathode is used as a pixel electrode, the anode is called a counter electrode.

The switching TFT 105 has n
Either a channel TFT or a p-channel TFT may be used. Further, the driving TFT 106 and the discharging TFT 107
One is an n-channel TFT and the other is a p-channel TFT. When the anode of the OLED 108 is used as a pixel electrode, the driving TFT 106 is preferably a p-channel TFT. Conversely, when the cathode is used as a pixel electrode, the driving TFT 106 is an n-channel TFT.
Preferably, it is FT.

In the pixel shown in FIG. 1B, the scanning line Gj
Is controlled by the scanning line driving circuit 104, and a video signal is input to the signal line Si by the signal line driving circuit 103. When the switching TFT 105 is turned on, the video signal input to the signal line Si is input to the gate electrode of the driving TFT 106 and the gate electrode of the discharging TFT 107 via the switching TFT 105.

The driving TFT 106 and the discharging TFT 107
Is controlled by the potential of the video signal input to the gate electrode. Hereinafter, the operation will be described in detail. In order to make the description easy to understand, the driving TFT
106 is a p-channel TFT, and discharge TFT 107 is n
A case of a channel type TFT will be described as an example. However, the following description is valid even when the driving TFT 106 is an n-channel TFT and the discharging TFT 107 is a p-channel TFT.

FIG. 2A is a diagram schematically showing a state of connection between the driving TFT 106, the discharging TFT 107, and the OLED 108. A video signal is input from the terminal 110. Then, a predetermined potential is applied from the terminal 111 to the counter electrode. Here, I ₁ is the drain current of the driving TFT 106, I ₂ is the drain current of the discharging TFT 107,
Iel means an OLED drive current flowing through the OLED. Vds means a voltage between the source region and the drain region of the driving TFT 106, and Vel denotes O
The voltage between the pixel electrode and the counter electrode of the LED 108 (OLE
D driving voltage).

The potential of the power supply line Vi and the potential of the terminal 111 are maintained at such a level that the current Iel flowing through the OLED 108 becomes forward biased when the driving TFT 106 is turned on. The potential of the discharge line Cj is set to be lower than the potential of the power supply line Vi when the potential of the terminal 111 is lower than the potential of the power supply line Vi, and conversely, the potential of the terminal 111 is higher than the potential of the power supply line Vi. At this time, it is set to be higher than the potential of the power supply line Vi.

When the anode is used as a pixel electrode, the potential of the discharge line Cj may be kept lower than the potential of the cathode. Conversely, when the cathode is used as a pixel electrode, it may be kept higher than the potential of the anode.

In this embodiment, to make the description easy to understand, the potential of terminal 111 is lower than the potential of power supply line Vi, and the potential of discharge line Cj is kept at the same level as the potential of terminal 111. Assume that Therefore, FIG.
In this case, the voltage between the source region and the drain region of the discharge TFT 107 is maintained at the same level as the OLED drive voltage Vel.

First, FIG. 2B shows the driving TFT 106 and the discharging TFT when the potential of the video signal is sufficiently high and the gate voltage of the driving TFT 106 is sufficiently higher than the threshold value.
7 shows voltage-current characteristics of the OLED 107 and the OLED 108. FIG. 2C is an enlarged view of a portion surrounded by a dotted line in FIG. The horizontal axis represents the power supply line Vi and the terminal 111.
Are shown. The vertical axis indicates the current flowing through each element.

When the gate voltage is sufficiently higher than the threshold, p
The driving TFT 106 which is a channel type TFT is turned off in an ideal element. However, in practice, a little drain current often flows. Therefore, FIG.
As shown in (B) and (C), the driving TFT 106
It is considered that the drain current I ₁ is smaller than when it is on, but does not become 0.

On the other hand, a discharge T which is an n-channel TFT
When the potential of the video signal is sufficiently high, the FT 107 is turned on because the gate voltage becomes sufficiently higher than the threshold value. Accordingly, the discharging TFT 107 is formed as shown in FIG.
As (C), the compared with the case of off, the value of the drain current I ₂ for the voltage between the source region and the drain region is increased. In other words, in other words, the value of the voltage between the source region and the drain region with respect to the value of the drain current is smaller than in the case of the off state.

At this time, as described above, the driving TFT 1
Since 06 is off, the drain current I ₁ is smaller than when it is on. The drain current (in this case, the off current) I ₁ of the driving TFT 106 is I ₁ = I ₂ + Ie
l is always satisfied, and I ₂ is never greater than I ₁ . Therefore, the drain current I ₂ is equal to or less than I ₁ . Here, as described above, the discharge TFT 107 has a smaller value of the voltage between the source region and the drain region with respect to the value of the drain current as compared with the case where the discharge TFT 107 is off.
Since the voltage between the source region and the drain region of No. 7 is equal to Vel, Vel becomes so small that almost no current flows through the OLED. Therefore, FIG.
As shown in (B) and (C), Iel ≒ 0, and I ₁
≒ I ₂ . In other words, the intersection between the graph of the voltage-current characteristics of the discharging TFT 107 and the graph of the voltage-current characteristics of the driving TFT 106 is the operating point. Therefore, OLED1
08 does not emit light.

FIG. 16 shows a driving TFT 1005 and an OLED 1006 of the general light emitting device shown in FIG.
The state of the connection is simply shown. However, in FIG. 16, a terminal 110 to which a video signal is input and a terminal 111 to which a predetermined potential is applied to a counter electrode are denoted by the same reference numerals as those in FIG. 2A in order to make comparison with the present invention more clear. Attach. Further, in order to clarify the comparison with the present invention, the driving TFT 1005 and the OLED 1006 shown in FIG.
It is regarded as equivalent to the driving TFT 106 and the OLED 108 in FIG.

I ₁ denotes a drain current of the driving TFT 106, and Iel ′ denotes an OLED driving current flowing through the OLED 108. Vds is the driving TFT 106
Ve means the voltage between the source region and the drain region.
l ′ means a voltage between the pixel electrode and the counter electrode of the OLED 108 (OLED drive voltage).

In a general light emitting device, the intersection of the graph of the voltage-current characteristics of the OLED and the graph of the voltage-current characteristics of the driving TFT is the operating point. Therefore, FIG.
As shown in (C), the current flowing through the OLED in the general configuration corresponds to the current Iel ′ at the operating point.

Next, FIG. 3A shows the driving TFT 106 and the discharging TF when the potential of the video signal is sufficiently low and the gate voltage of the driving TFT 106 is sufficiently smaller than the threshold value.
4 shows voltage-current characteristics of T107 and OLED. FIG. 3B is an enlarged view of a portion surrounded by a dotted line in FIG. The horizontal axis represents the power supply line Vi and the terminal 111.
Are shown. The vertical axis indicates the current flowing through each element.

When the gate voltage is sufficiently smaller than the threshold, p
The driving TFT 106 which is a channel type TFT is turned on in the case of an ideal element. Therefore, the driving TFT
As shown in FIGS. 3A and 3B, the value of the drain current 106 is large with respect to the voltage between the source region and the drain region.

On the other hand, a discharge T which is an n-channel TFT
When the potential of the video signal is sufficiently low, the gate voltage of the FT 107 is sufficiently lower than the threshold, so that the FT 107 is turned off. However, in practice, a small amount of off-current often occurs. Therefore, the discharging TFT 107 is formed as shown in FIG.
As shown in (A) and (B), it is considered that the value of the drain current with respect to the voltage between the source region and the drain region is a small value but not zero.

The drain current I of the driving TFT 106
₁ always satisfies I ₁ = I ₂ + Iel. Therefore,
Iel = I ₁ −I ₂ , and Iel is the driving TFT 106
Is equal to a value obtained by subtracting the drain current (in this case, the off-state current) I ₂ of the discharging TFT 107 from the drain current I _{1 of} FIG.

In the case of a general configuration in which the discharge TFT 107 is not provided, since I ₂ = 0, I ₁ = Iel ′ inevitably.
Becomes However, by the present invention to provide a discharge the TFT 107, Iel is reduced by the amount of I _2. As Iel becomes smaller, Vel becomes smaller and Vel + Vds is always constant, so that Vds becomes larger than that of a general configuration. Therefore, the drain current I ₁ of the driving TFT 106 itself becomes the driving TFT 106 in the general configuration.
Becomes larger than the drain current. Therefore, Iel when the discharge TFT 107 is provided is (Iel′−I
₂ ) <Iel <Iel 'is satisfied. In other words, the OLED current Iel 'in the general configuration is used to calculate the discharge TFT
It becomes larger than simply subtracted value 107 and the drain current I ₂ of, Iel 'the difference between the Iel is small, not very large effect on the brightness.

Therefore, as can be seen from FIGS. 2 and 3, in the light emitting device of the present invention, even if an off current flows through the driving TFT 106, the off current flows through the discharge line via the discharging TFT 107. Almost no current flows through the OLED 108. Therefore, it is possible to prevent the OLED 108 from emitting light, suppress a decrease in contrast, and prevent display images from being disturbed.

Next, the relationship between the driving TFT 106 and the OLED driving current Iel in the light emitting device of the present invention will be described.

FIG. 4A shows that the gate voltage of the driving TFT 106 is slightly lower than the threshold value,
6, the driving TFT 106, the discharging TFT 107, and the OLED 108 when the drain current starts to increase.
5 shows the voltage-current characteristics of FIG. The horizontal axis indicates the voltage between the power supply line Vi and the terminal 111. The vertical axis indicates the current flowing through each element.

The driving TFT 106 and the discharging TFT 107
And the OLED 108 are operating so as to always satisfy I ₁ = I ₂ + Iel. Therefore, in FIG.
The value of Iel is determined so as to satisfy I ₁ = I ₂ + Iel.

On the other hand, in the case of a general light emitting device, I ₁ = I ₂
Is satisfied, the graph of the driving TFT 106 and the OLE
The point at which the graph of D108 intersects is the operating point,
The current at the operating point corresponds to Iel ′.

In FIG. 4A, the light emitting device Iel of the present invention and the OLED driving current Ie of a general light emitting device are shown.
Comparing l ', Iel' is larger. This is because the gate voltage of the discharge TFT 107 is not sufficiently lower than the threshold value, so that the drain current I ₂ of the discharge TFT 107 becomes so large that it cannot be ignored. Therefore, when the gate voltage of the driving TFT 106 becomes slightly lower than the threshold, it is considered that the luminance of the OLED is lower in the light emitting device of the present invention than in a general light emitting device.

Next, when the gate voltage of the driving TFT 106 is made smaller than that in the state of FIG.
Driving TFT 106, discharging TFT 107 and OLED
FIG. 4B shows the voltage-current characteristics of 108. The horizontal axis indicates the voltage between the power supply line Vi and the terminal 111. The vertical axis indicates the current flowing through each element.

The driving TFT 106 and the discharging TFT 107
And the OLED 108 are operating so as to always satisfy I ₁ = I ₂ + Iel. Therefore, in FIG.
The value of Iel is determined so as to satisfy I ₁ = I ₂ + Iel.

On the other hand, in the case of a general light emitting device, I ₁ = I ₂
Is satisfied, the graph of the driving TFT 106 and the OLE
The point at which the graph of D108 intersects is the operating point,
The current at the operating point corresponds to Iel ′.

As shown in FIG. 4B, the difference between Iel of the light emitting device of the present invention and Iel ′ of the general light emitting device is smaller than that of FIG. 4A. This is because the drain current I ₂ of the discharge TFT 107 decreases as the gate voltage of the discharge TFT 107 decreases. As the potential of the video signal input to the terminal 110 becomes lower and the gate voltage of the discharging TFT 107 becomes smaller, I ₂ becomes smaller. Then, as shown in FIG. 3, Iel is infinitely Iel '.
Approach.

As can be seen from FIGS. 4A and 4B, the gate voltage Vgs of the driving TFT 106 and the OLED 108
Is a graph as shown in FIG. For comparison, the relationship between the gate voltage Vgs of the driving TFT 106 and the current Iel ′ flowing through the OLED 108 in a general light emitting device is also shown.

As can be seen from FIG. 5, the slope of the graph of the light emitting device of the present invention is steeper than that of a general light emitting device using no discharge TFT. Therefore, the discharge TFT
The amplitude of the digital video signal can be made smaller as compared with the case where no is used. In the drive of the digital gray scale method of displaying a gray scale using a digital video signal,
As the amplitude of the signal is smaller, the power supply voltage of the signal line driver circuit that controls input of the digital video signal to the signal line can be reduced. Therefore, in the light emitting device of the present invention,
In the case of digital gradation driving, power consumption of the signal line driver circuit can be reduced.

In the case of the general pixel shown in FIG. 15, when the driving TFT is turned off after the organic light emitting element emits light, the voltage between the two electrodes of the organic light emitting element decreases due to free discharge. At this time, when the voltage between the two electrodes of the organic light emitting element becomes equal to or less than the threshold value of the organic light emitting element, the resistance between the two electrodes becomes exponentially large, and the discharge becomes considerably slow. Therefore, even after the driving TFT is turned off, the state in which the organic light-emitting element shines faintly continues for a relatively long time. However, in the light emitting device of the present invention, when the driving TFT is turned off, the discharge TFT is turned on, so that the charge can be forcibly extracted, and the afterglow can be prevented from remaining.

Embodiments of the present invention will be described below.

Embodiment 1 In this embodiment, a case where the light emitting device of the present invention shown in FIG. 1 is driven by a digital gradation method will be described with reference to FIG.

First, the potential of the opposing electrode of the OLED is kept at the same level as the power supply potential of the power supply line. And the scanning line G1
Are selected by a selection signal input from the scanning line driving circuit 104. As a result, the switching T of all the pixels (pixels on the first line) connected to the scanning line G1 are performed.
The FT 105 is turned on.

Then, the first bit digital video signal is input from the signal line driving circuit 103 to the signal lines (S1 to Sx). Digital video signal is TF for switching
Driving TFT 106 and discharging TFT via T105
Input to the gate electrode 107.

The driving TFT 106 and the discharging TFT 10
Reference numeral 7 controls the switching of the digital video signal based on 1 or 0 information of the digital video signal. For example, when the driving TFT 106 is turned on, the discharging TFT 107 is turned off, and when the driving TFT 106 is turned off, the discharging TFT 107 is turned on.

Next, the selection of G1 is completed, and the scanning line G is similarly set.
2 is selected by the selection signal. The switching TFTs 10 of all the pixels connected to the scanning line G2
5 is turned on, and the first bit digital video signal is input to the pixels on the second line from the signal lines (S1 to Sx). In this specification, input of a digital video signal to a pixel means that a driving TFT of the pixel is used.
This means that a digital video signal is input to the gate electrodes of the discharge TFT 106 and the discharge TFT 107. And 2
The driving TFT 106 and the discharging TFT of the pixel on the line
The switching of 107 is similar to the pixel of the first line,
Controlled by digital video signals.

Then, all the scanning lines (G3 to Gx) are also
They are sequentially selected by the selection signal. All scanning lines (G1
To Gx) is selected, and the period until the digital video signal of the first bit is input to the pixels of all lines is the writing period Ta1.

When the writing period Ta1 ends, a display period Tr1 appears next. In the display period Tr1, the potential of the counter electrode has a potential difference from the power supply potential of the power supply line to such an extent that the OLED 108 emits light when the power supply potential is applied to the pixel electrode of the OLED.

When the driving TFT 106 is turned on by the digital video signal input to the pixel during the writing period, the power supply potential is applied to the pixel electrode of the OLED 108. As a result, the OLED 108 emits light. At this time, the discharge TFT 107 is off.

Conversely, the driving TFT 106 is driven by the digital video signal input to the pixel during the writing period.
Is off, no power supply potential is applied to the pixel electrode of the OLED 108. As a result, the OLED 108 does not emit light. At this time, the discharge TFT 107 is in an ON state. Therefore, even if an off-state current flows through the driving TFT 106, the OLED 108 does not emit light because most of the off-state current flows through the discharge line.

As described above, in the display period Tr1, the OLED
108 emits light or does not emit light, and all the pixels perform display. A period during which the pixel performs display is called a display period Tr. In particular, a display period in which display is performed using the digital video signal of the first bit is referred to as a display period Tr1. In FIG. 6, for the sake of simplicity, only the display period of the pixels on the first line is particularly shown. The timing at which the display periods of all the lines are started is the same.

When the display period Tr1 ends, the writing period Ta2 starts, and the potential of the opposing electrode of the OLED becomes the same as the power supply potential of the power supply line. Then, as in the case of the writing period Ta1, all the scanning lines are sequentially selected, and the digital video signal of the second bit is input to all the pixels. A period until the digital video signal of the second bit is completely input to the pixels of all lines is referred to as a writing period Ta2.

When the writing period Ta2 ends, a display period Tr2 appears, a potential difference occurs between the counter electrode and the power supply line, and display is performed in all the pixels.

The above operation is repeated until the n-th bit digital video signal is input to the pixel, and the writing period Ta and the display period Tr appear repeatedly. When all the display periods (Tr1 to Trn) end, one image can be displayed. In the driving method of the present embodiment, the period for displaying one image is set to one frame period (F).
Call. When one frame period ends, the next frame period starts. Then, the writing period Ta1 appears again, and the above operation is repeated.

In a normal light emitting device, it is preferable to provide 60 or more frame periods per second. When the number of images displayed in one second is less than 60, flickering of the images may start to be noticeable.

In this embodiment, the sum of the lengths of all the writing periods is shorter than one frame period, and the length ratio of the display periods is Tr1: Tr2: Tr3:...: Tr (n−
1): Trn = 2 ⁰ : 2 ¹ : 2 ² : ...: 2 ^(n-2) : 2 ^(n-1)
It is necessary that A desired gradation display out of 2 ⁿ gradations can be performed by the combination of the display periods.

By calculating the sum of the lengths of the display periods in which the OLED emits light during one frame period, the gray scale displayed by the pixel in the frame period is determined. For example, if n = 8 and the luminance when the pixel emits light in all display periods is 100%, when the pixel emits light in Tr1 and Tr2, 1% luminance can be expressed.
When Tr5 and Tr8 are selected, 60% luminance can be expressed.

The display periods Tr1 to Trn may appear in any order. For example, during one frame period, the display periods can appear in the order of Tr1, Tr5, Tr2,... Next to Tr1.

In the present embodiment, the height of the potential of the counter electrode is changed between the writing period and the display period, but the present invention is not limited to this. A potential difference may always occur between the power supply line and the counter electrode. In that case, the OLED can emit light even in the writing period. Therefore, the gray scale displayed by the pixel in the frame period is determined by the sum of the length of the writing period and the length of the display period in which the OLED emits light in one frame period. In this case, the ratio of the sum of the lengths of the writing period and the display period corresponding to the digital video signal of each bit is (Ta1 + T
r1): (Ta2 + Tr2): (Ta3 + Tr3):
...: (Ta (n-1) + Tr (n-1)): (Tan +
Trn) = 2 ⁰ : 2 ¹ : 2 ² :...: 2 ⁽ⁿ⁻²⁾ : 2 ⁽ⁿ⁻¹⁾ .

(Embodiment 2) The pixel of the light emitting device of the present invention
The structure is not limited to the structure illustrated in FIG. Embodiment 1 In this embodiment, the structure of the pixel of the light emitting device of the present invention is described with reference to FIG.
An example different from (B) will be described. FIG. 7 (A),
FIGS. 17B and 17A and 17B show a configuration of a pixel of this embodiment.

The pixel shown in FIG. 7A has a first signal line Sa.
i, a second signal line Sbi, a first scanning line Gaj, a second scanning line Gbj, a power supply line Vi, and a discharge line Cj.

The pixel shown in FIG. 7A is composed of a first switching TFT 705a and a second switching TFT
705b, a driving TFT 706, a discharging TFT 707,
At least an OLED 708 and a storage capacitor 709 are provided.

Next, connection of each element and wiring of the pixel in FIG. 7A will be described more specifically.

The gate electrode of the first switching TFT 705a is connected to the first scanning line Gaj. One of a source region and a drain region of the first switching TFT 705a is connected to the first signal line Sai, and the other is connected to the gate electrode of the driving TFT 706.

The gate electrode of the second switching TFT 705b is connected to the second scanning line Gbj. One of a source region and a drain region of the second switching TFT 705b is connected to the second signal line Sbi, and the other is connected to the gate electrode of the driving TFT 706.

The gate electrode of the discharging TFT 707 is connected to the gate electrode of the driving TFT 706. One of a source region and a drain region of the discharge TFT 707 is connected to the discharge line Cj, and the other is connected to the pixel electrode of the OLED 708.

One of the source region and the drain region of the driving TFT 706 is connected to the power supply line Vi, and the other is connected to the OLED 7.
08 pixel electrode. Power line Vi and OLE
There is always a potential difference between the counter electrodes D708.

The storage capacitor 709 is connected to the power supply line Vi and the driving T
It is formed between the gate electrodes of FT706.

When the first scanning line Gaj is selected by the selection signal, the first switching TFT 705a is turned on. Then, the digital video signal input to the first signal line is input to the gate electrodes of the driving TFT 706 and the discharging TFT 707, and the pixel performs display.

Next, when the second scanning line Gbj is selected by the selection signal, the second switching TFT 70
5b turns on. Then, the digital video signal input to the second signal line is supplied to the driving TFT 706 and the discharging TFT 706.
The image is input to the gate electrode of the FT 707, and the pixel performs display.

[0102] By the digital video signal of all bits,
When each pixel performs display, one image is displayed.

In the pixel shown in FIG. 7A, the display period can be made shorter than the writing period. It is possible to display an image without lowering the frequency.

The pixel shown in FIG. 7B has at least one of a signal line Si, a scanning line Gj, a power supply line Vi, a discharge line Cj, and a capacitance line Pj.

The pixels shown in FIG. 7B are composed of a switching TFT 715, a driving TFT 716, and a discharging TF.
At least a T717, an OLED 718, and a storage capacitor 719 are provided.

Next, the connection of each element and wiring of the pixel shown in FIG. 7B will be described more specifically.

The gate electrode of the switching TFT 715 is connected to the scanning line Gj. One of a source region and a drain region of the switching TFT 715 is connected to the signal line Si, and the other is connected to the gate electrode of the driving TFT 716.

The gate electrode of the discharging TFT 717 is connected to the gate electrode of the driving TFT 716. One of a source region and a drain region of the discharge TFT 717 is connected to the discharge line Cj, and the other is connected to the pixel electrode of the OLED 718.

One of the source region and the drain region of the driving TFT 716 is connected to the power supply line Vi, and the other is connected to the OLED 7.
18 pixel electrodes. Power line Vi and OLE
There is always a potential difference between the opposing electrodes of D718.

The storage capacitor 719 includes a capacitor line Pj and a driving T
It is formed between the gate electrodes of FT716. The capacitance line Pj is kept at the same height as the power supply line Vi.

When the scanning line Gj is selected by the selection signal, the switching TFT 715 turns on. Then, a digital video signal input to the first signal line is input to the gate electrodes of the driving TFT 716 and the discharging TFT 717, and the pixel performs display.

Next, by controlling the potential of the capacitor line Pj, the gate voltages of the driving TFT 716 and the discharging TFT 717 are adjusted according to the law of charge conservation, and the driving TFT 7
16 is turned off and the discharging TFT 717 is turned on. When the driving TFT 716 is turned off, the pixel stops displaying and the display period is forcibly ended.

With the digital video signal of all bits,
When each pixel performs display, one image is displayed.

In the pixel shown in FIG. 7B, the display period can be made shorter than the writing period. It is possible to display an image without lowering the frequency.

A pixel 722 shown in FIG. 17A has at least one signal line Si, one scanning line Gj, and one power supply line Vi.

The pixel shown in FIG. 17A includes a switching TFT 725, a driving TFT 726, and a discharging TFT 726.
At least an FT 727, an OLED 728, and a storage capacitor 729 are provided.

In FIG. 17A, it is desirable that the switching TFT 725 and the discharging TFT 727 have the same polarity.

Next, the connection of each element and wiring of the pixel in FIG. 17A will be described more specifically.

The gate electrode of the switching TFT 725 is connected to the scanning line Gj. One of a source region and a drain region of the switching TFT 725 is connected to the signal line Si, and the other is connected to the gate electrode of the driving TFT 726.

The gate electrode of the discharging TFT 727 is connected to the gate electrode of the driving TFT 726. One of a source region and a drain region of the discharging TFT 727 is connected to the scanning line Gj-1, and the other is connected to the pixel electrode of the OLED 728.

The scanning line Gj-1 is a scanning line selected before the scanning line Gj is selected. Note that the discharge T of each pixel
The scanning line connected to the source region or the drain region of the FT may be any one of the scanning lines included in the pixel portion.

One of the source region and the drain region of the driving TFT 726 is connected to the power supply line Vi, and the other is connected to the OLED 7.
28 pixel electrodes. Power line Vi and OLE
There is always a potential difference between the opposing electrodes of D728.

The storage capacitor 729 is connected to the power supply line Vi and the driving T
It is formed between the gate electrodes of FT726.

When the scanning line Gj is selected by the selection signal, the switching TFT 725 is turned on. Then, the digital video signal input to the signal line is input to the gate electrodes of the driving TFT 726 and the discharging TFT 727, and the pixel performs display.

With the digital video signal of all bits,
When each pixel performs display, one image is displayed.

Note that the pixel shown in FIG. 17A is different from the pixel shown in FIGS. 1, 7A and 7B in that a scan line is used as a discharge line, so that a separate discharge line needs to be provided. Therefore, the number of wirings in the pixel portion can be reduced. When forming a shunt in this way, it is not always necessary to form a wiring only for passing off current, and a scanning line, a signal line, a power supply line, and other wirings can be used as a discharge line.

The pixel shown in FIG. 17B has a signal line Si,
It has at least one of a first scanning line Gaj, a second scanning line Gbj, a power supply line Vi, and a discharge line Cj.

The pixel shown in FIG. 17B includes a switching TFT 735, an erasing TFT 740, and a driving TFT.
At least an FT 736, a discharging TFT 737, an OLED 738, and a storage capacitor 739 are provided.

Next, the connection of each element and the wiring of the pixel in FIG. 17B will be described more specifically.

The gate electrode of the switching TFT 735 is connected to the first scanning line Gaj. One of a source region and a drain region of the switching TFT 735 is connected to the signal line Si, and the other is connected to the gate electrode of the driving TFT 736.

The gate electrode of the erasing TFT 740 is connected to the second scanning line Gbj. Also, the erasing TFT 74
0 of the source region and the drain region,
The other is connected to the gate electrode of the driving TFT 736.

The gate electrode of the discharging TFT 737 is connected to the gate electrode of the driving TFT 736. One of a source region and a drain region of the discharge TFT 737 is connected to the discharge line Cj, and the other is connected to the pixel electrode of the OLED 738.

One of the source region and the drain region of the driving TFT 736 is connected to the power supply line Vi, and the other is connected to the OLED 7.
38 pixel electrodes. Power line Vi and OLE
There is always a potential difference between the opposing electrodes of D738.

The storage capacitor 739 is connected to the power supply line Vi and the driving T
It is formed between the gate electrodes of FT736.

When the first scanning line Gaj is selected by the first selection signal, the switching TFT 735 is turned on. Then, the digital video signal input to the signal line is input to the gate electrodes of the driving TFT 736 and the discharging TFT 737, and the pixel performs display.

Next, the second scanning line G is supplied by the second selection signal.
When bj is selected, the erasing TFT 740 is turned on. Then, the potential of the power supply line Vi is changed to the driving TFT 736.
Drive TFT provided to the gate electrode and source region of
736 turns off. When the driving TFT 736 is turned off, the pixel stops displaying and the display period is forcibly ended.

With the digital video signal of all bits,
When each pixel performs display, one image is displayed.

In the pixel shown in FIG. 17B, the display period can be shorter than the writing period.
Even if the number of bits of the digital video signal increases as the number of gradations increases, it is possible to display an image without lowering the frame frequency. Note that the first scan line or the second scan line may be used as a discharge line as in the case of FIG. 17A, and in this case, the number of wires of each pixel can be reduced.

The pixels of the light emitting device of the present invention are not limited to those shown in FIG. 1, and are shown in FIGS. 7 (A), (B), and FIG.
The present invention is not limited to those shown in (A) and (B). The gate signal line of another pixel may be used instead of the power supply line without providing the power supply line. The light emitting device of the present invention only needs to have a configuration in which the off current of the driving TFT does not flow to the OLED but positively flows to the shunt. More specifically, the driving TFT
Is turned off when the TFT is on, and turned on when the driving TFT is off.
Pixel electrodes may be connected.

Embodiment 3 An example of a method for manufacturing a light emitting device of the present invention will be described with reference to FIGS. Here, the switching TFT and the driving TF of the pixel portion are used.
A method of simultaneously manufacturing T and a TFT of a driving portion provided around the pixel portion will be described in detail according to steps. The discharging TFT can be manufactured with reference to the manufacturing method of the switching TFT and the driving TFT, and is not illustrated here for simplicity of description.

First, in this embodiment, Corning # 70
A substrate 900 made of glass such as barium borosilicate glass typified by 59 glass or # 1737 glass or aluminoborosilicate glass is used. Note that the substrate 900 is not limited as long as it is a light-transmitting substrate, and a quartz substrate may be used. Further, a plastic substrate having heat resistance enough to withstand the processing temperature of this embodiment may be used.

Next, as shown in FIG.
A base film 901 made of an insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film is formed over the substrate. Although a two-layer structure is used as the base film 901 in this embodiment, a single-layer film of the insulating film or a structure in which two or more layers are stacked may be used. The first layer of the base film 901 is formed by plasma CVD.
The silicon oxynitride film 901a formed by using SiH ₄ , NH ₃ , and N ₂ O as reaction gases is
m (preferably 50 to 100 nm). In this embodiment, a 50 nm-thick silicon oxynitride film 901a (composition ratio: Si = 32%, O = 27%, N = 24%, H = 17%)
Was formed. Next, as the second layer of the base film 901,
Using a plasma CVD method, a silicon oxynitride film 901b formed by using SiH ₄ and N ₂ O as reaction gases is reduced to 50 to 2
The layer is formed to a thickness of 00 nm (preferably 100 to 150 nm). In this embodiment, a 100-nm-thick silicon oxynitride film 901b (composition ratio Si = 32%, O = 59%, N
= 7%, H = 2%).

Next, a semiconductor layer 902 is formed on the underlayer 901.
To 905 are formed. The semiconductor layers 902 to 905 are formed by forming a semiconductor film having an amorphous structure by a known means (sputtering method, L
After forming a film by a PCVD method or a plasma CVD method, a known crystallization treatment (a laser crystallization method, a thermal crystallization method, or a thermal crystallization method using a catalyst such as nickel).
Is performed and the crystalline semiconductor film obtained is patterned into a desired shape. The thickness of the semiconductor layers 902 to 905 is 25 to 80 nm (preferably 30 to 60 nm). Although there is no limitation on the material of the crystalline semiconductor film,
Preferably silicon (silicon) or silicon germanium _{(Si X Ge 1-X (} X = 0.0001~0.02)) may be formed such as an alloy. In this embodiment, the plasma CV
After a 55-nm amorphous silicon film was formed by method D, a solution containing nickel was held on the amorphous silicon film. After dehydrogenation (500 ° C., 1 hour) of this amorphous silicon film, thermal crystallization (550 ° C., 4 hours) is performed, and further, a laser annealing process for improving crystallization is performed. Thus, a crystalline silicon film was formed. Then, the crystalline silicon film is patterned by a photolithography method,
Semiconductor layers 902 to 905 were formed.

After the formation of the semiconductor layers 902 to 905, the semiconductor layers 90 to 905 are controlled to control the threshold value of the TFT.
2 to 905 may be doped with a trace amount of an impurity element (boron or phosphorus).

In the case of manufacturing a crystalline semiconductor film by a laser crystallization method, a pulse oscillation type or continuous emission type excimer laser, a YAG laser, or a YVO ₄ laser can be used. In the case of using these lasers, it is preferable to use a method in which laser light emitted from a laser oscillator is linearly condensed by an optical system and irradiated on a semiconductor film. The crystallization conditions are appropriately selected by the practitioner. When an excimer laser is used, the pulse oscillation frequency is set to 300 Hz, and the laser energy density is set to 100 to 4.
00 mJ / cm ² (typically 200 to 300 mJ / cm
² ). When a YAG laser is used, its second harmonic is used and a pulse oscillation frequency of 30 to 300 kHz is used.
And a laser energy density of 300 to 600 mJ /
cm ² (typically 350 to 500 mJ / cm ² ). And a width of 100 to 1000 μm, for example 400 μ
The laser light condensed linearly at m may be irradiated over the entire surface of the substrate, and the superposition rate (overlap rate) of the linear laser light at this time may be set to 50 to 90%.

Next, a gate insulating film 906 covering the semiconductor layers 902 to 905 is formed. The gate insulating film 906 is formed by a plasma CVD method or a sputtering method and has a thickness of 40 to
The insulating film containing silicon is formed to have a thickness of 150 nm. In this embodiment, a silicon oxynitride film (composition ratio: Si = 32%, O = 59%, N =
7%, H = 2%). Needless to say, the gate insulating film is not limited to the silicon oxynitride film, and another insulating film containing silicon may be used as a single layer or a stacked structure.

When a silicon oxide film is used, a TEOS (Tetraethyl Orthosilicate) is formed by a plasma CVD method.
e) and O ₂ were mixed, the reaction pressure was 40 Pa, and the substrate temperature was 30.
It can be formed by discharging at a high-frequency (13.56 MHz) power density of 0.5 to 0.8 W / cm ² at 0 to 400 ° C. The silicon oxide film thus manufactured can obtain favorable characteristics as a gate insulating film by subsequent thermal annealing at 400 to 500 ° C.

Then, a heat-resistant conductive layer 907 for forming a gate electrode on the gate insulating film 906 is
It is formed with a thickness of 0 nm (preferably 250 to 350 nm). The heat-resistant conductive layer 907 may be formed as a single layer,
If necessary, a laminated structure including a plurality of layers such as two layers or three layers may be employed. Ta, T for the heat-resistant conductive layer
It includes an element selected from i and W, an alloy containing the above element, or an alloy film combining the above elements. These heat-resistant conductive layers are formed by a sputtering method or a CVD method, and it is preferable to reduce the impurity concentration to reduce the resistance, and it is particularly preferable that the oxygen concentration be 30 ppm or less. In this embodiment, the W film is 3
It is formed with a thickness of 00 nm. The W film may be formed by a sputtering method using W as a target, or may be formed by a thermal CVD method using tungsten hexafluoride (WF ₆ ). In any case, it is necessary to lower the resistance in order to use it as a gate electrode, and the resistivity of the W film is 20 μΩc.
m or less. The resistivity of the W film can be reduced by enlarging the crystal grains. However, when there are many impurity elements such as oxygen in W, the crystallization is inhibited and the resistance is increased. Thus, in the case of using the sputtering method, a W target having a purity of 99.9999% is used, and further, the W film is formed with sufficient care so as not to mix impurities from the gas phase during film formation. 9 to 20 μΩcm can be realized.

On the other hand, when a Ta film is used for the heat-resistant conductive layer 907, it can be similarly formed by a sputtering method. The Ta film uses Ar as a sputtering gas. Also, if an appropriate amount of Xe or Kr is added to the gas during sputtering,
The internal stress of the film to be formed can be relaxed to prevent the film from peeling. The resistivity of the α-phase Ta film is about 20 μΩcm and can be used for the gate electrode.
The resistivity of the a-film was about 180 μΩcm, and was not suitable for use as a gate electrode. Since the TaN film has a crystal structure close to the α phase, if the TaN film is formed under the Ta film,
A phase Ta film is easily obtained. Although not shown, it is effective to form a silicon film doped with phosphorus (P) with a thickness of about 2 to 20 nm under the heat-resistant conductive layer 907. Thereby, the adhesion of the conductive film formed thereon is improved and oxidation is prevented, and at the same time, the heat-resistant conductive layer 90 is formed.
It is possible to prevent a small amount of an alkali metal element contained in 7 from diffusing into the gate insulating film 906 in the first shape. In any case, the heat-resistant conductive layer 907 has a resistivity of 10 to 5
It is preferable to set it in the range of 0 μΩcm.

Next, a resist mask 908 is formed by using a photolithography technique. And
A first etching process is performed. In this embodiment, an ICP etching apparatus is used, Cl ₂ and CF ₄ are used as etching gases, and RF (13.5) of 3.2 W / cm ² at a pressure of 1 Pa.
(6 MHz) power is supplied to form plasma. 224 mW / cm ² RF on substrate side (sample stage)
(13.56 MHz) power is applied, thereby applying a substantially negative self-bias voltage. Under these conditions, the etching rate of the W film is about 100 nm / min. First
In the etching process, the time for just etching the W film was estimated based on the etching rate, and the time obtained by increasing the etching time by 20% was set as the etching time.

By the first etching process, conductive layers 909 to 912 having the first tapered shape are formed. The angle of the tapered portion of the conductive layers 909 to 912 is 15 to 30 °
It is formed so that In order to perform etching without leaving a residue, over-etching is performed to increase the etching time at a rate of about 10 to 20%. Silicon oxynitride film (gate insulating film 9) for W film
06) is 2-4 (typically 3),
By the overetching treatment, the exposed surface of the silicon oxynitride film is etched by about 20 to 50 nm.
(FIG. 8 (B))

Then, a first doping process is performed to add an impurity element of one conductivity type to the semiconductor layer. Here, n
A step of adding an impurity element for giving a mold is performed. The mask 908 on which the conductive layer of the first shape is formed is left as it is,
Using the conductive layers 909 to 912 having the tapered shape as masks, an impurity element imparting n-type is added in a self-aligning manner by an ion doping method. An impurity element imparting n-type is added to the tapered portion at the end of the gate electrode and the gate insulating film 906.
Through the process, the dose is set to 1 × 10 ^{13 to} 5 × 10 ¹⁴ at for doping so as to reach the semiconductor layer located thereunder.
oms / cm ² and an acceleration voltage of 80 to 160 keV. As the impurity element imparting n-type, an element belonging to Group 15 of the periodic table, typically phosphorus (P) or arsenic (As) is used. Here, phosphorus (P) is used. By such an ion doping method, an impurity element imparting n-type is added to the first impurity regions 914 to 917 in a concentration range of 1 × 10 ²⁰ to 1 × 10 ²¹ atoms / cm ³ . (FIG. 8
(C))

In this step, depending on the doping conditions, the impurities flow under the first shape conductive layers 909 to 912, and the first impurity regions 914 to 917 are removed from the first shape.
May overlap with the conductive layers 909 to 912 having the shape shown in FIG.

Next, a second etching process is performed as shown in FIG. The etching process is also performed by an ICP etching apparatus, and CF ₄ and Cl ₂ are used as etching gases.
RF power of 3.2 W / cm ² (13.5
6 MHz), bias power 45 mW / cm ² (13.56 M
(Hz) at a pressure of 1.0 Pa. Conductive layers 918 to 921 having the second shape formed under these conditions
Is formed. A tapered portion is formed at the end, and the tapered shape gradually increases inward from the end. As compared with the first etching process, the ratio of isotropic etching is increased by the amount of the lower bias power applied to the substrate side, and the angle of the tapered portion is 30 to 60 °. The mask 908 is etched and its edge is shaved, and becomes a mask 922. In the step of FIG. 8D, the surface of the gate insulating film 906 is etched by about 40 nm.

Then, an impurity element imparting n-type is doped under a condition of a high acceleration voltage with a lower dose than in the first doping process. For example, when the accelerating voltage is 70 to 120
keV, a dose of 1 × 10 ¹³ / cm ² , and the first impurity regions 924 to 92 having an increased impurity concentration.
7 and second impurity regions 928 to 931 in contact with the first impurity regions 924 to 927 are formed. In this step, depending on the doping conditions, the impurity
The second impurity regions 928 to 931 extend below the conductive layers 918 to 921 of the second shape.
921 may also occur. The impurity concentration in the second impurity region is 1 × 10 ¹⁶ to 1 × 10 ^{18 at.}
ms / cm ³ . (FIG. 9A)

Then, as shown in FIG. 9B, p
In the semiconductor layers 902 and 905 forming the channel type TFT, impurity regions 933 (933) having a conductivity type opposite to one conductivity type are formed.
a, 933b) and 934 (934a, 934b). Also in this case, the second shape conductive layers 918 and 921 are used.
Is used as a mask to add an impurity element imparting a p-type, and an impurity region is formed in a self-aligned manner. At this time, a resist mask 932 is formed on the semiconductor layers 903 and 904 forming the n-channel TFT, and the entire surface is covered. The impurity regions 933 and 934 formed here are formed of diborane (B
It is formed by an ion doping method using ₂ H ₆ ). The concentration of the impurity element imparting p-type in the impurity regions 933 and 934 is
The density is set to 2 × 10 ^{20 to} 2 × 10 ²¹ atoms / cm ³ .

However, these impurity regions 933, 9
34 specifically contains an impurity element imparting n-type.
It can be divided into two areas. The third impurity regions 933a and 934a have a size of 1 × 10 ²⁰ to 1 × 10 ²¹ atoms.
includes an impurity element imparting n-type conductivity in a concentration of s / cm ^3,
The fourth impurity regions 933b and 934b are 1 × 10 ¹⁷ to 1
Contains an impurity element imparting n-type at a concentration of × 10 ²⁰ atoms / cm ³ . However, these impurity regions 9
The concentration of the p-type imparting impurity element of 33b and 934b is set to 1 × 10 ¹⁹ atoms / cm ³ or more, and the concentration of the p-type imparting impurity element is set to n in the third impurity regions 933a and 934a. By making the concentration of the impurity element giving the mold 1.5 to 3 times,
Since the third impurity region functions as a source region and a drain region of the p-channel TFT, no problem occurs.

Then, as shown in FIG. 9C, a first interlayer insulating film 937 is formed over the conductive layers 918 to 921 having the second shape and the gate insulating film 906. The first interlayer insulating film 937 may be formed using a silicon oxide film, a silicon oxynitride film, a silicon nitride film, or a stacked film obtained by combining these. In any case, the first interlayer insulating film 937 is formed from an inorganic insulating material. The thickness of the first interlayer insulating film 937 is 100 to 200 nm. When a silicon oxide film is used as the first interlayer insulating film 937,
TEOS and O ₂ are mixed by plasma CVD, the reaction pressure is 40 Pa, the substrate temperature is 300 to 400 ° C., and discharge is performed at a high frequency (13.56 MHz) power density of 0.5 to 0.8 W / cm ^2. Can be. In the case where a silicon oxynitride film is used as the first interlayer insulating film 937, a silicon oxynitride film formed from SiH ₄ , N ₂ O, and NH ₃ by a plasma CVD method, or a silicon oxynitride film formed from SiH ₄ and N ₂ O is used. What is necessary is just to form with the manufactured silicon oxynitride film. The production conditions in this case are a reaction pressure of 20 to 200 Pa and a substrate temperature of 30.
0 to 400 ° C, high frequency (60MHz) power density 0.1
~ 1.0 W / cm ² . Alternatively, as the first interlayer insulating film 937, a silicon oxynitride hydride film formed using SiH ₄ , N ₂ O, and H ₂ may be used. Similarly, the silicon nitride film is formed by SiH ₄ , N
It can be prepared from H _3.

Then, a step of activating the impurity element imparting n-type or p-type added at each concentration is performed. This step is performed by a thermal annealing method using a furnace annealing furnace. In addition, a laser annealing method or a rapid thermal annealing method (RTA method) can be applied. In the thermal annealing method, the oxygen concentration is 1 ppm or less,
Preferably in a nitrogen atmosphere of 0.1 ppm or less 400 ~
The heat treatment is performed at 700 ° C., typically 500 to 600 ° C. In this embodiment, the heat treatment is performed at 550 ° C. for 4 hours.
When a plastic substrate having a low heat-resistant temperature is used as the substrate 501, a laser annealing method is preferably used.

Subsequent to the activation step, the atmosphere gas is changed and the atmosphere gas is changed to 300 to 100% in an atmosphere containing 3 to 100% hydrogen.
A heat treatment is performed at 450 ° C. for 1 to 12 hours to hydrogenate the semiconductor layer. This step is to terminate dangling bonds of 10 ¹⁶ to 10 ¹⁸ / cm ^{3 in} the semiconductor layer by thermally excited hydrogen. As another means of hydrogenation, plasma hydrogenation (using hydrogen excited by plasma) may be performed. In any case, the semiconductor layer 9
It is preferable that the defect density in the range of 02 to 905 be 10 ¹⁶ / cm ³ or less.
% May be provided.

Then, a second interlayer insulating film 939 made of an organic insulating material is formed with an average thickness of 1.0 to 2.0 μm. As organic resin materials, polyimide, acrylic,
Polyamide, polyimide amide, BCB (benzocyclobutene) and the like can be used. For example, in the case of using a polyimide of a type that is thermally polymerized after being applied to a substrate, it is formed by firing at 300 ° C. in a clean oven.
In the case of using acrylic, a two-component type is used, and after mixing the main material and the curing agent, the whole surface is applied using a spinner and then pre-heated at 80 ° C. for 60 seconds on a hot plate. Then, it can be formed by firing in a clean oven at 250 ° C. for 60 minutes.

As described above, by forming the second interlayer insulating film 939 with an organic insulating material, the surface can be satisfactorily planarized. In addition, since organic resin materials generally have a low dielectric constant, parasitic capacitance can be reduced. However, since it is hygroscopic and not suitable as a protective film, it is preferable to use it in combination with a silicon oxide film, a silicon oxynitride film, a silicon nitride film, or the like formed as the first interlayer insulating film 937 as in this embodiment. .

Next, as shown in FIG. 10A, after forming a second interlayer insulating film 939, a second interlayer insulating film 93 is formed.
9, a passivation film 939 is formed.

The passivation film 939 is effective for preventing moisture contained in the second interlayer insulating film 939 from entering the organic light emitting layer 950 via the pixel electrode 947 and the third interlayer insulating film 982. It is. Second interlayer insulating film 939
Has an organic resin material, it is particularly effective to provide the passivation film 939 because the organic resin material contains a large amount of moisture.

In this embodiment, the passivation film 939 is used.
A silicon nitride film was used.

Thereafter, a resist mask having a predetermined pattern is formed, and a contact hole formed in each semiconductor layer and reaching an impurity region serving as a source region or a drain region is formed. The contact hole is formed by a dry etching method. In this case, first, CF is used as the etching gas.
_4, a passivation film 981 is etched using a mixed gas of O _2, then CF ₄ in the etching gas, O _2, the He
Then, the second interlayer insulating film 939 made of an organic resin material is etched using the mixed gas described above, and subsequently, the first interlayer insulating film 937 is etched using CF ₄ and O ₂ as etching gases. Further, in order to increase the selectivity with respect to the semiconductor layer, a contact hole can be formed by switching the etching gas to CHF ₃ and etching the third shape gate insulating film 570.

Then, a conductive metal film is formed by a sputtering method or a vacuum evaporation method, patterned by a mask, and then etched to form source wirings 940 to 943 and drain wirings 944 to 946. Note that in this specification, the source wiring and the drain wiring are collectively referred to as connection wiring. Although not shown, in this embodiment, this wiring is formed of a laminated film of a 50 nm-thick Ti film and a 500 nm-thick alloy film (an alloy film of Al and Ti).

Next, a transparent conductive film was placed on the
A pixel electrode 947 is formed by forming a pattern with a thickness of 0 nm and patterning (FIG. 10A). In this embodiment, indium tin oxide (IT) is used as a transparent electrode.
O) 2-20% zinc oxide (Z
A transparent conductive film mixed with nO) is used.

The pixel electrode 947 is connected to the drain wiring 9
The driving TFT is formed by overlapping with
And the drain region is electrically connected.

FIG. 11 is a top view of the pixel after the pixel electrode 947 is formed. The cross section taken along the line AA ′ in FIG.
0 (A) corresponds to the diagram of the pixel portion. In FIG. 11, reference numeral 780 denotes a discharge TFT, and reference numeral 781 denotes a storage capacitor.
FIG. 12 shows a cross section taken along line BB ′ of FIG.

The storage capacitor 781 has a capacitor wiring 793, an active layer 974, and a gate insulating film 906 formed between the capacitor wiring 793 and the active layer 974. Active layer 9
An impurity region 982 of 74 is connected to a power supply line 943.

The discharge TFT 780 includes source or drain regions 975 and 979 and LDD regions 976 and 976.
78 and an active layer having a channel formation region 977. Further, the discharging TFT 780 is connected to the gate electrode 9.
74, and a gate insulating film 906 formed between the active layer and the gate electrode 974.

The source or drain region 975 is connected to the pixel electrode 947 via the connection line 972. In addition, the source or drain region 979 is connected to the discharge line 970 via the connection wiring 971.

Next, as shown in FIG. 10B, a third interlayer insulating film 982 having an opening at a position corresponding to the pixel electrode 947 is formed. In this embodiment, when the opening is formed, the side wall is tapered by using a wet etching method. In this case, since the organic light emitting layer formed on the third interlayer insulating film 982 is not divided, if the side wall of the opening is not sufficiently gentle, the deterioration of the organic light emitting layer due to the step becomes a significant problem. Therefore, care must be taken.

Although a film made of silicon oxide is used as the third interlayer insulating film 982 in this embodiment, polyimide, polyamide, acryl, B
An organic resin film such as CB (benzocyclobutene) can also be used.

Then, before forming the organic light emitting layer 950 on the third interlayer insulating film 982, the third interlayer insulating film 982 is formed.
Is preferably subjected to a plasma treatment using argon to make the surface of the third interlayer insulating film 982 dense. With the above structure, entry of moisture from the third interlayer insulating film 982 into the organic light-emitting layer 950 can be prevented.

Next, an organic light emitting layer 950 is formed by an evaporation method, and a cathode (MgAg electrode) 951 and a protective electrode 952 are formed by an evaporation method. At this time, the organic light emitting layer 9
Prior to forming the pixel electrode 50 and the cathode 951, the pixel electrode 94 is formed.
It is desirable to perform a heat treatment on 7 to completely remove moisture. In this embodiment, the MgAg electrode is used as the cathode of the OLED, but another known material may be used.

As the organic light emitting layer 950, a known material can be used. In this embodiment, a hole transporting layer (Hole transporting layer) and a light emitting layer (Emitting layer) are used.
yer) is used as the organic light emitting layer, but it may be provided with any one of a hole injection layer, an electron injection layer and an electron transport layer. Various examples of such combinations have already been reported, and any of these configurations may be used.

In this embodiment, polyphenylene vinylene is formed as a hole transport layer by an evaporation method. The light emitting layer is formed by vapor deposition of a 30% to 40% molecular dispersion of PBD of a 1,3,4-oxadiazole derivative in polyvinyl carbazole, and about 1% of coumarin 6 is used as a green light emitting center. Has been added.

The protective electrode 952 also serves as the organic light emitting layer 95.
Although it is possible to protect 0 from moisture and oxygen, it is more preferable to provide a protective film 953. In this embodiment, a 300-nm-thick silicon nitride film is provided as the protective film 953. This protective film may be formed continuously without opening to the atmosphere after the protective electrode 952.

The protective electrode 952 is provided to prevent the deterioration of the cathode 951, and is typically a metal film containing aluminum as a main component. Of course, other materials may be used. Also,
Since the organic light emitting layer 950 and the cathode 951 are very sensitive to moisture, it is preferable to continuously form the protection electrode 952 without opening to the atmosphere to protect the organic light emitting layer from the outside air.

The thickness of the organic light emitting layer 950 is 10 to 4
00 [nm] (typically 60 to 150 [nm]), cathode 951
Has a thickness of 80 to 200 nm (typically 100 to 150 nm).
[nm]).

Thus, a light emitting device having a structure as shown in FIG. 10B is completed. Note that an overlapping portion 954 of the pixel electrode 947, the organic light emitting layer 950, and the cathode 951 is OL
It corresponds to ED.

A p-channel type TFT 960 and an n-channel type TFT 961 are TFTs included in a driving circuit.
OS is formed. The switching TFT 962 and the driving TFT 963 are TFTs included in the pixel portion, and the driving circuit TFT and the pixel portion TFT can be formed over the same substrate.

[0185] The method for manufacturing the light emitting device of the present invention is not limited to the manufacturing method described in this embodiment. The light emitting device of the present invention can be manufactured using a known method.

This embodiment can be implemented by freely combining with Embodiments 1 and 2.

Embodiment 4 In this embodiment, an external view of a light emitting device of the present invention will be described with reference to FIG.

FIG. 13A is a top view of a light emitting device formed by sealing a substrate (element substrate) on which a TFT is formed with a sealing material, and FIG.
13A is a cross-sectional view taken along line AA ′ of FIG.
FIG. 13C is a cross-sectional view taken along line BB ′ of FIG.

The pixel portion 400 provided over the substrate 4001
2, a signal line driver circuit 4003, and a sealant 4009 are provided so as to surround the first and second scan line driver circuits 4004a and 4004b. A pixel portion 4002;
A sealing material 4008 is provided over the signal line driver circuit 4003 and the first and second scan line driver circuits 4004a and 4004b. Therefore, the pixel portion 4002, the signal line driver circuit 4003, and the first and second scan line driver circuits 4004
a and b are sealed with a filler 4210 by a substrate 4001, a sealant 4009, and a sealant 4008.

The pixel portion 4 provided on the substrate 4001
002, the signal line driver circuit 4003, and the first and second scan line driver circuits 4004a and 4004b have a plurality of TFTs. In FIG. 13B, typically, a base film 4010
A driving TFT (here, an n-channel TFT and a p-channel TFT are illustrated) 4201 included in the signal line driver circuit 4003 and a pixel portion 4002 formed above
The driving TFT (TFT controlling the current to the OLED) 4202 included in FIG.

In this embodiment, a p-channel TFT or an n-channel TFT manufactured by a known method is used for the driving TFT 4201, and a p-channel TFT manufactured by a known method is used for the driving TFT 4202. Can be The pixel portion 4002 is provided with a storage capacitor (not shown) connected to a gate of the driving TFT 4202.

Driving TFT 4201 and Driving TFT 42
An interlayer insulating film (flattening film) 4301 is formed on the substrate 02, and a pixel electrode (anode) 4203 electrically connected to the drain of the driving TFT 4202 is formed thereon. As the pixel electrode 4203, a transparent conductive film having a large work function is used. As the transparent conductive film, a compound of indium oxide and tin oxide, a compound of indium oxide and zinc oxide, zinc oxide, tin oxide, or indium oxide can be used. Further, a material obtained by adding gallium to the transparent conductive film may be used.

Then, an insulating film 4302 is formed on the pixel electrode 4203, and the insulating film 4302 is
An opening is formed on 3. In this opening, an organic light emitting layer 4204 is formed on the pixel electrode 4203. For the organic light emitting layer 4204, a known organic light emitting material or inorganic light emitting material can be used. Further, the organic light emitting material includes a low molecular type (monomer type) material and a high molecular type (polymer type) material, and either may be used.

The organic light emitting layer 4204 may be formed by using a known vapor deposition technique or coating technique. The structure of the organic light emitting layer may be a stacked structure or a single layer structure by freely combining a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, or an electron injection layer.

On the organic light emitting layer 4204, a cathode 4205 made of a light-shielding conductive film (typically, a conductive film containing aluminum, copper, or silver as a main component or a laminated film of these and another conductive film). Is formed. The cathode 4
It is desirable that moisture and oxygen existing at the interface between 205 and the organic light emitting layer 4204 be eliminated as much as possible. Therefore, it is necessary to devise a method in which the organic light emitting layer 4204 is formed in a nitrogen or rare gas atmosphere, and the cathode 4205 is formed without being exposed to oxygen or moisture. In this embodiment, the above-described film formation is made possible by using a multi-chamber type (cluster tool type) film formation apparatus. And the cathode 4205
Is given a predetermined voltage.

As described above, the pixel electrode (anode) 42
03, O composed of an organic light emitting layer 4204 and a cathode 4205
An LED 4303 is formed. And OLED4303
A protective film 4303 is formed over the insulating film 4302 so as to cover. The protective film 4303 is effective in preventing oxygen, moisture, and the like from entering the OLED 4303.

A wiring 4005a is connected to a power supply line, and is electrically connected to the source region of the driving TFT 4202. The lead wiring 4005a passes between the sealant 4009 and the substrate 4001 and passes through the anisotropic conductive film 4300 to the FPC 4006.
Is electrically connected to the wiring for wiring 4301.

As the sealing material 4008, a glass material, a metal material (typically, a stainless steel material), a ceramic material, and a plastic material (including a plastic film) can be used. FRP as plastic material
(Fiberglass-Reinforced Pl
aics) plate, PVF (polyvinyl fluoride)
A film, a mylar film, a polyester film, or an acrylic resin film can be used. Further, a sheet having a structure in which an aluminum foil is sandwiched between PVF films or mylar films can also be used.

However, when the light emission direction from the OLED is directed to the cover material side, the cover material must be transparent. In that case, a transparent material such as a glass plate, a plastic plate, a polyester film or an acrylic film is used.

As the filler 4103, besides an inert gas such as nitrogen or argon, an ultraviolet curable resin or a thermosetting resin can be used, such as PVC (polyvinyl chloride), acrylic, polyimide, epoxy resin, or silicone. Resin, PVB (polyvinyl butyral) or E
VA (ethylene vinyl acetate) can be used. In this embodiment, nitrogen was used as the filler.

Further, in order to expose the filler 4103 to a hygroscopic substance (preferably barium oxide) or a substance capable of adsorbing oxygen, the substrate 400
A concave portion 4007 is provided on the one surface, and a hygroscopic substance or a substance 4207 capable of adsorbing oxygen is arranged. Then, the hygroscopic substance or the substance 4207 capable of adsorbing oxygen is held in the concave part 4007 by the concave part cover material 4208 so that the hygroscopic substance or the substance 4207 capable of adsorbing oxygen is not scattered. Note that the concave portion cover member 4208 has a fine mesh shape, and has a configuration in which air and moisture are allowed to pass, and a hygroscopic substance or a substance 4207 capable of adsorbing oxygen is not allowed to pass. By providing the hygroscopic substance or the substance 4207 which can adsorb oxygen, deterioration of the OLED 4303 can be suppressed.

As shown in FIG. 13C, the pixel electrode 42
Simultaneously with the formation of 03, a conductive film 4203a is formed so as to be in contact with the lead wiring 4005a.

The anisotropic conductive film 4300 has a conductive filler 4300a. Substrate 4001 and F
By thermocompression bonding with the PC 4006, the conductive film 4203a on the substrate 4001 and the FPC wiring 4301 on the FPC 4006 are electrically connected by the conductive filler 4300a.

This embodiment can be implemented by freely combining with Embodiments 1 to 3.

(Example 5) In the present invention, by using an organic light emitting material capable of utilizing phosphorescence from triplet excitons for light emission, external light emission quantum efficiency can be remarkably improved. Thereby, low power consumption, long life, and light weight of the OLED can be achieved.

Here, a report is shown in which triplet excitons are used to improve the external emission quantum efficiency. (T.Tsutsui, C.Adac
hi, S. Saito, Photochemical Processes in Organized
Molecular Systems, ed.K. Honda, (Elsevier Sci. Pub.,
Tokyo, 1991) p.437.)

The molecular formula of the organic luminescent material (coumarin dye) reported in the above paper is shown below.

[0208]

Embedded image

(MABaldo, DFO'Brien, Y. You, A. Shou
stikov, S. Sibley, METhompson, SRForrest, Nature
395 (1998) p.151.)

The molecular formula of the organic luminescent material (Pt complex) reported in the above article is shown below.

[0211]

Embedded image

(MABaldo, S. Lamansky, PEBurrrows,
METhompson, SRForrest, Appl.Phys.Lett., 75 (199
9) p.4.) (T.Tsutsui, M.-J.Yang, M.Yahiro, K.Nakamu
ra, T.Watanabe, T.tsuji, Y.Fukuda, T.Wakimoto, S.Ma
yaguchi, Jpn.Appl.Phys., 38 (12B) (1999) L1502.)

The molecular formula of the organic luminescent material (Ir complex) reported in the above-mentioned article is shown below.

[0214]

Embedded image

As described above, if the phosphorescence emission from the triplet exciton can be used, it is possible to realize an external emission quantum efficiency three to four times higher than the case where the fluorescence emission from the singlet exciton is used in principle. .

The structure of this embodiment can be implemented by freely combining with any of the structures of Embodiments 1 to 4.

(Embodiment 6) Since the light-emitting device is a self-luminous type, it has better visibility in a bright place and a wider viewing angle than a liquid crystal display. Therefore, it can be used for display portions of various electronic devices.

Examples of electronic equipment using the light emitting device of the present invention include a video camera, a digital camera, a goggle type display (head mounted display), a navigation system, a sound reproducing device (car audio, audio component, etc.), a notebook personal computer, Game devices, portable information terminals (mobile computers, mobile phones, portable game machines or electronic books, etc.), and image reproducing devices provided with recording media (specifically, reproducing a recording medium such as a digital video disc (DVD), Device having a display capable of displaying the image). In particular, it is desirable to use a light-emitting device for a portable information terminal that often has a chance to see a screen from an oblique direction because a wide viewing angle is important. FIG. 14 shows specific examples of these electronic devices.

FIG. 14A shows an OLED display device.
A housing 2001, a support base 2002, a display portion 2003, a speaker portion 2004, a video input terminal 2005, and the like are included.
The light emitting device of the present invention can be used for the display portion 2003. Since the light-emitting device is a self-luminous type, it does not require a backlight and can be a display portion thinner than a liquid crystal display. The OLED display device is for personal computers, TVs
All display devices for displaying information, such as for broadcast reception and advertisement display, are included.

FIG. 14B shows a digital still camera, which includes a main body 2101, a display portion 2102, an image receiving portion 2103,
An operation key 2104, an external connection port 2105, a shutter 2106, and the like are included. The light emitting device of the present invention has a display unit 210.
2 can be used.

FIG. 14C shows a notebook personal computer, which includes a main body 2201, a housing 2202, and a display portion 2.
203, keyboard 2204, external connection port 220
5, including a pointing mouse 2206 and the like. The light emitting device of the present invention can be used for the display portion 2203.

FIG. 14D shows a mobile computer, which includes a main body 2301, a display portion 2302, and a switch 230.
3, an operation key 2304, an infrared port 2305, and the like. The light emitting device of the present invention can be used for the display portion 2302.

FIG. 14E shows a portable image reproducing apparatus (specifically, a DVD reproducing apparatus) provided with a recording medium, and includes a main body 2401, a housing 2402, a display portion A 2403, a display portion B 2404, a recording medium ( DVD, etc.) reading unit 240
5, operation keys 2406, a speaker unit 2407, and the like. The display portion A 2403 mainly displays image information, and the display portion B 2404 mainly displays character information. In the light emitting device of the present invention, the display portions A, B 2403 and 2404 are used.
Can be used. Note that the image reproducing device provided with the recording medium includes a home game machine and the like.

FIG. 14F shows a goggle-type display (head-mounted display).
1, including a display unit 2502 and an arm unit 2503. The light emitting device of the present invention can be used for the display portion 2502.

FIG. 14G shows a video camera, which includes a main body 2601, a display portion 2602, a housing 2603, an external connection port 2604, a remote control receiving portion 2605, and an image receiving portion 260.
6, a battery 2607, a voice input unit 2608, operation keys 2609, and the like. The light emitting device of the present invention has a display section 260.
2 can be used.

[0226] Here, FIG. 14H illustrates a mobile phone, which includes a main body 2701, a housing 2702, a display portion 2703, a voice input portion 2704, a voice output portion 2705, operation keys 2706,
An external connection port 2707, an antenna 2708, and the like are included.
The light emitting device of the present invention can be used for the display portion 2703. Note that the display portion 2703 displays white characters on a black background, so that power consumption of the mobile phone can be suppressed.

If the light emission luminance of the organic light emitting material becomes higher in the future, it becomes possible to enlarge and project the light containing the output image information with a lens or the like and use it for a front type or rear type projector.

[0228] The above-mentioned electronic equipment is available on the Internet or C
Information distributed through an electronic communication line such as an ATV (cable television) is frequently displayed, and in particular, opportunities to display moving image information are increasing. Since the response speed of the organic light emitting material is very high, the light emitting device is preferable for displaying moving images.

[0229] In the light emitting device, since the light emitting portion consumes power, it is desirable to display information so that the light emitting portion is reduced as much as possible. Therefore, when a light emitting device is used for a portable information terminal, particularly a display portion mainly for character information such as a mobile phone or a sound reproducing device, the light emitting portion is driven to form character information with a non-light emitting portion as a background. It is desirable to do.

As described above, the applicable range of the present invention is extremely wide, and the present invention can be used for electronic devices in various fields. Further, the electronic apparatus of this embodiment may use the light emitting device having any of the structures shown in the first to fifth embodiments.

[0231]

According to the above structure, in the light emitting device of the present invention, even if an off current flows through the driving TFT, the off current flows to the discharge line via the discharging TFT.
Almost no current flows through D. Therefore, it is possible to prevent the OLED from emitting light, suppress a decrease in contrast, and prevent a displayed image from being disturbed.

In the light emitting device of the present invention, afterglow can be prevented from remaining when the driving TFT is turned off, as compared with a general light emitting device.

[Brief description of the drawings]

FIG. 1 is a block diagram of a light emitting device of the present invention and a circuit diagram of a pixel.

FIG. 2 is a diagram simply showing a configuration of a pixel of a light emitting device of the present invention and a diagram showing voltage-current characteristics of an element.

FIG. 3 is a diagram showing voltage-current characteristics of elements of a light-emitting device of the present invention.

FIG. 4 is a diagram showing voltage-current characteristics of elements of a light emitting device of the present invention.

FIG. 5 is a diagram showing voltage-current characteristics of a driving TFT of a light emitting device of the present invention.

FIG. 6 illustrates a method for driving a light emitting device of the present invention.

FIG. 7 is a circuit diagram of a pixel of the light emitting device of the present invention.

FIG. 8 illustrates a method for manufacturing a light-emitting device.

FIG. 9 illustrates a method for manufacturing a light-emitting device.

FIG. 10 illustrates a method for manufacturing a light-emitting device.

FIG. 11 is a top view of a pixel of a light-emitting device.

FIG. 12 illustrates a method for manufacturing a light-emitting device.

13A and 13B are an external view and a cross-sectional view of a light-emitting device.

FIG. 14 is a diagram of an electronic device using the light-emitting device of the present invention.

FIG. 15 is a circuit diagram of a pixel of a general light-emitting device.

FIG. 16 is a diagram simply illustrating a configuration of a pixel of a general light-emitting device.

FIG. 17 is a circuit diagram of a pixel of the light emitting device of the present invention.

Claims (20)

[Claims] 1. A light emitting device comprising a light emitting element, a first wiring, a second wiring, a first TFT, and a second TFT, wherein the light emitting device comprises: A pixel electrode included in the light-emitting element is connected to the first wiring; the pixel electrode is connected to the second wiring via the second TFT; and the first TFT is connected to the second wiring. 2. A light-emitting device, wherein one of the TFTs is on and the other is off. 2. A light emitting device comprising a light emitting element, a first wiring, a second wiring, a first TFT, and a second TFT, wherein the light emitting device comprises: A pixel electrode included in the light-emitting element is connected to the first wiring; the pixel electrode is connected to the second wiring via the second TFT; and the first TFT is connected to the second wiring. One of the two TFTs is a p-channel TFT, the other is an n-channel TFT, and the gate electrodes of the first TFT and the second TFT are
A light emitting device which is connected to each other. 3. A light emitting device having a light emitting element, a power supply line, a discharge line, a first TFT, and a second TFT, wherein the light emitting element has the first TFT via the first TFT. The pixel electrode and the power supply line are connected, the pixel electrode and the discharge line are connected via the second TFT, and one of the first TFT and the second TFT is turned on. A light emitting device wherein the other is off. 4. A light-emitting device having a light-emitting element, a power supply line, a discharge line, a first TFT, and a second TFT, wherein the light-emitting element has the first TFT via the first TFT. The pixel electrode and the power supply line are connected, the pixel electrode and the discharge line are connected via the second TFT, and one of the first TFT and the second TFT is a p-channel. And the other is an n-channel TFT. The gate electrodes of the first TFT and the second TFT are
A light emitting device which is connected to each other. 5. The light emitting device according to claim 1, wherein switching of the first TFT and the second TFT is controlled by a digital video signal. 6. A signal line, a scanning line, a light emitting element, a power supply line, a discharge line, a first TFT, a second TFT, and a third TFT.
Wherein the switching of the third TFT is controlled by the potential of the scanning line, and when the third TFT is on, the digital video signal input to the signal line is: A pixel electrode of the light emitting element and the power supply line are connected to the gate electrodes of the first and second TFTs via the first TFT. The pixel electrode and the discharge line are connected, the switching of the first TFT and the second TFT is controlled by the digital video signal, and the first TFT and the second TFT Is a light emitting device wherein one is on and the other is off. 7. A signal line, a scanning line, a light emitting element, a power supply line, a discharge line, a first TFT, a second TFT, and a third TFT.
Wherein the switching of the third TFT is controlled by the potential of the scanning line, and when the third TFT is on, the digital video signal input to the signal line is: A pixel electrode of the light emitting element and the power supply line are connected to the gate electrodes of the first and second TFTs via the first TFT. The pixel electrode and the discharge line are connected, the switching of the first TFT and the second TFT is controlled by the digital video signal, and the first TFT and the second TFT Is a p-channel TFT, the other is an n-channel TFT, and the gate electrodes of the first TFT and the second TFT are
A light emitting device which is connected to each other. 8. A signal line, a first scanning line, a second scanning line, a light emitting element, a power supply line, a discharge line, and a first TFT.
A light emitting device having a second TFT, a third TFT, and a fourth TFT, wherein switching of the third TFT is controlled by a potential of the first scanning line; The switching of the fourth TFT is controlled by the potential of the scanning line, and when the third TFT is on, the digital video signal input to the signal line is applied to the gate electrodes of the first and second TFTs. And when the fourth TFT is on, the potential of the power supply line is
A pixel electrode of the light emitting element and the power supply line are connected to the gate electrodes of the first and second TFTs via the first TFT. The pixel electrode and the discharge line are connected, the switching of the first TFT and the second TFT is controlled by the digital video signal, and the first TFT and the second TFT Is a light emitting device wherein one is on and the other is off. 9. A signal line, a first scanning line, a second scanning line, a light emitting element, a power supply line, a discharge line, and a first TFT.
A light emitting device having a second TFT, a third TFT, and a fourth TFT, wherein switching of the third TFT is controlled by a potential of the first scanning line; The switching of the fourth TFT is controlled by the potential of the scanning line, and when the third TFT is on, the digital video signal input to the signal line is applied to the gate electrodes of the first and second TFTs. And when the fourth TFT is on, the potential of the power supply line is
A pixel electrode of the light emitting element and the power supply line are connected to the gate electrodes of the first and second TFTs via the first TFT. The pixel electrode and the discharge line are connected, the switching of the first TFT and the second TFT is controlled by the digital video signal, and the first TFT and the second TFT Is a p-channel TFT, the other is an n-channel TFT, and the gate electrodes of the first TFT and the second TFT are
A light emitting device which is connected to each other. 10. A signal line, a scanning line, a light emitting element, a power supply line, a first TFT, a second TFT, and a third TFT.
And a plurality of pixels each having the following configuration. In each pixel, switching of the third TFT is controlled by the potential of the scanning line, and when the third TFT is on, the signal line is The input digital video signal is input to the gate electrodes of the first and second TFTs, and the pixel electrode of the light emitting element and the power supply line are connected via the first TFT, The pixel electrode and the scanning line of another pixel are connected via a second TFT, and the switching of the first TFT and the second TFT is controlled by the digital video signal. Wherein the first TFT and the second TFT have one turned on and the other turned off, and the third TFT and the second TFT have the same polarity. That the light-emitting device. 11. A signal line, a scanning line, a light emitting element, a power supply line, a first TFT, a second TFT, and a third TFT.
And a plurality of pixels each having the following configuration. In each pixel, switching of the third TFT is controlled by the potential of the scanning line, and when the third TFT is on, the signal line is The input digital video signal is input to the gate electrodes of the first and second TFTs, and the pixel electrode of the light emitting element and the power supply line are connected via the first TFT, The pixel electrode and the scanning line of another pixel are connected via a second TFT, and the switching of the first TFT and the second TFT is controlled by the digital video signal. One of the first TFT and the second TFT is a p-channel TFT and the other is an n-channel TFT, and the poles of the third TFT and the second TFT are There are the same, the gate electrode of the first TFT and the second TFT is
A light emitting device which is connected to each other. 12. A light emitting element, a power supply line, a discharge line, and a first
A light emitting device having a TFT and a second TFT, wherein the light emitting element has a pixel electrode, a counter electrode, and an organic light emitting layer formed between the pixel electrode and the counter electrode. When the potential of the counter electrode is lower than the potential of the power supply line, the potential of the discharge line is lower than the potential of the power supply line. When the potential of the counter electrode is higher than the potential of the power supply line, the discharge line Is higher than the potential of the power supply line, the pixel electrode and the power supply line are connected via the first TFT, and the pixel electrode and the discharge line are connected via the second TFT. Is connected, and one of the first TFT and the second TFT is off when the other is on. 13. A light emitting device, a power supply line, a discharge line, and a first
A light emitting device having a TFT and a second TFT, wherein the light emitting element has a pixel electrode, a counter electrode, and an organic light emitting layer formed between the pixel electrode and the counter electrode. A potential of the counter electrode is lower than a potential of the power supply line; a potential of the discharge line is lower than a potential of the power supply line; and a pixel electrode of the light emitting element and the power supply line via the first TFT. The pixel electrode and the discharge line are connected via the second TFT, the first TFT is a p-channel TFT, and the second TFT is an n-channel TFT A gate electrode of the first TFT and the gate electrode of the second TFT;
A light emitting device which is connected to each other. 14. A light emitting device, a power supply line, a discharge line, and a first
A light emitting device having a TFT and a second TFT, wherein the light emitting element has a pixel electrode, a counter electrode, and an organic light emitting layer formed between the pixel electrode and the counter electrode. The potential of the counter electrode is higher than the potential of the power supply line, the potential of the discharge line is higher than the potential of the power supply line, and the pixel electrode of the light emitting element and the power supply line via the first TFT. The pixel electrode and the discharge line are connected via the second TFT, the first TFT is an n-channel TFT, and the second TFT is a p-channel TFT A gate electrode of the first TFT and the gate electrode of the second TFT;
A light emitting device which is connected to each other. 15. A light emitting device, a power supply line, a discharge line, and a first
A light emitting device having a TFT and a second TFT, wherein the light emitting element has a pixel electrode, a counter electrode, and an organic light emitting layer formed between the pixel electrode and the counter electrode. The counter electrode and the discharge line are kept at the same potential, and the pixel electrode and the power supply line are connected via the first TFT. The light emitting device, wherein the pixel electrode is connected to the discharge line, and one of the first TFT and the second TFT is off when one is on. 16. A light emitting device, a power supply line, a discharge line, and a first
A light emitting device having a TFT and a second TFT, wherein the light emitting element has a pixel electrode, a counter electrode, and an organic light emitting layer formed between the pixel electrode and the counter electrode. The potential of the counter electrode and the discharge line is maintained at the same potential, and the potential of the counter electrode and the discharge line is lower than the potential of the power supply line. A pixel electrode included in the element is connected to the power supply line, the pixel electrode is connected to the discharge line via the second TFT, the first TFT is a p-channel TFT, The second TFT is an n-channel TFT, and the gate electrodes of the first TFT and the second TFT are:
A light emitting device which is connected to each other. 17. A light emitting device, a power supply line, a discharge line, and a first
A light emitting device having a TFT and a second TFT, wherein the light emitting element has a pixel electrode, a counter electrode, and an organic light emitting layer formed between the pixel electrode and the counter electrode. The potential of the counter electrode and the discharge line is maintained at the same potential. The potential of the counter electrode and the discharge line is higher than the potential of the power supply line, and the light emission is performed via the first TFT. A pixel electrode included in the element is connected to the power supply line, the pixel electrode is connected to the discharge line via the second TFT, the first TFT is an n-channel TFT, The second TFT is a p-channel TFT, and the gate electrodes of the first TFT and the second TFT are
A light emitting device which is connected to each other. 18. The method according to claim 11, wherein:
9. The light-emitting device according to item 1, wherein the organic light-emitting layer contains an organic light-emitting material capable of utilizing phosphorescence from triplet excitons for light emission. 19. The method according to claim 11, wherein:
3. The light emitting device according to claim 1, wherein switching of the first TFT and the second TFT is controlled by a digital video signal. 20. An electronic apparatus according to claim 1, wherein the light-emitting device is used.