JP2002290044A - Multilayer printed wiring board and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the accuracy of the relative position of a following process to the position of its preceding process in the manufacture of a multilayer printed wiring board. SOLUTION: In the manufacturing method of the multilayer printed wiring board, a through hole is formed in a core board and inner-layer conductor patterns are formed on the core board by using the through hole as a positional reference. Then, an insulation layer is formed on the surface of the core board, and an insulation material is filled partly or wholly into the through hole. Subsequently, via holes are formed in the insulation layer by using as a positional reference a guide mark formed together with the inner-layer conductor patterns, and a new through bole 24 whose sectional area in the parallel direction with the core board is smaller than the one of the original through hole is formed in the inside of the original through by removing a portion of the insulation material filled into the original through hole. Thereafter, outer-layer conductor patterns are formed on the core board by using the new through hole 24 as a positional reference.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a multilayer printed wiring board using a hard core board, a printed wiring board using a flexible core board, or a composite board combining a hard board and a flexible film board as a core board. The present invention relates to a multilayer printed wiring board such as a multilayer printed wiring board used as a device and a method for manufacturing the same, and more particularly, to a multilayer printed wiring board having a build-up configuration and a method for manufacturing the same.

[0002]

2. Description of the Related Art In a multilayer printed wiring board, a plurality of conductor layers (conductor patterns) formed in a circuit pattern by etching or the like are overlapped with an insulating layer electrically insulating each of the conductor layers interposed therebetween. Each layer of the conductor layer is electrically connected via a via hole provided in the insulating layer. As a method of forming a pattern of a plurality of conductor layers and connecting these conductor layers, various methods have been conventionally known. Hereinafter, a typical method using a build-up method will be described.

First, an insulating layer made of an insulating resin is formed by laminating, coating or laminating on the surface of a core substrate having an inner layer circuit (inner or lower conductive pattern) formed on the surface thereof. A small hole (via hole) for interlayer connection is formed in the insulating layer by laser or laser processing or the like, and the surface thereof is plated with copper to form a conductor layer on the surface of the insulating layer and the inner wall of the fine hole. Thereafter, the conductor layer is patterned by etching or the like to form an outer layer circuit (outer layer or upper layer conductor pattern). As described above, a printed wiring board having a multilayer structure in which the inner layer circuit and the outer layer circuit are connected via the minute holes can be formed.

[0004] Hereinafter, a manufacturing process of a four-layer build-up printed wiring board will be described with reference to the drawings. FIG. 5A and FIG. 5B are cross-sectional views showing the core substrate before the build-up process is performed. First, FIG.
As shown in (a), a through-hole 2 for interlayer conduction is formed by a known method on a substrate 1 on which a conductor layer 5 is formed by pasting a copper foil on both sides, and the through-hole 2 is plated with copper to form a conductor. The layer 3 is formed. Next, the inside of the through hole 2 is filled with the insulating resin 4 or the like, and the surface is again plated with copper to form the conductor layer 6. Thereafter, as shown in FIG. 5B, the conductor layer on the surface is patterned by a known method such as etching to form conductor patterns 7 and 8.

FIGS. 6 (a) to 6 (d) are cross-sectional views showing a process of forming the core substrate of FIG. 5 into a multilayer by a build-up method. First, as shown in FIG. 6A, an insulating resin or the like is formed on the surface of the core substrate by a method such as laminating, coating or laminating to form the insulating layer 9. Next, FIG.
As shown in (b), a non-penetrating via hole 10 is formed in the insulating layer 9 by a known method. This via hole 1
As a method for forming the insulating layer 9, a method of forming a via hole by performing exposure and development using a photosensitive insulating resin for the insulating layer 9, or a method using a carbon dioxide gas laser, a YAG laser, A method of forming via holes by removing with a laser such as an excimer laser may be used. Subsequently, as shown in FIG. 6C, the entire surface of the insulating layer 9 after the formation of the via hole is plated with copper to form the conductor layer 11. Thereafter, as shown in FIG. 6D, patterning is performed by a known method such as etching while leaving only a necessary portion of the conductor layer, and the conductor patterns 12, 1 are formed.
Form 3

[0006] Through the above steps, a printed wiring board having a multilayer structure in which the inner layer circuit and the outer layer circuit are electrically connected via the via holes can be manufactured.

[0007]

In a multilayer printed wiring board, in order to reliably electrically connect an inner layer and an outer layer with a via hole, the positions of the inner layer pattern and the via hole, and the positions of the via hole and the outer layer pattern are required. Need to be formed exactly. In order to match each position and form, some guide marks such as holes and conductive patterns are pre-positioned and provided in several places around the work where the work is performed, and the inner layer pattern is determined based on the position. , Via holes and outer layer patterns.

Usually, the following method is adopted. First, (1) a through hole serving as a guide mark is formed in a core substrate. This processing is performed simultaneously with the processing of the through-hole and the through-hole in the product. The through-hole is obtained by removing the copper plating formed on the inner wall of the through-hole in a post-process (such as an etching process at the time of forming a circuit) after the formation of the through-hole. Is a through hole. next,
(2) An inner conductor pattern is formed on the surface of the core substrate by a known method such as a photolithography method or a subtractive method, using the through hole of the guide mark processed on the core substrate as a reference of the processing position. At this time, a guide mark is formed by a conductor pattern. Next, (3) an insulating resin is formed on the surface of the core substrate by a known method such as lamination, coating or lamination to form an insulating layer. Form. Subsequently, (4) in order to electrically connect the inner layer pattern and the outer layer pattern via the via hole, the residue in the via hole is removed by a known method such as desmear, and then the insulating layer surface including the via hole is removed. Is plated with copper. Thereafter, (5) an outer layer pattern is formed by a known method such as a photolithography method or a subtractive method using the through hole of the guide mark provided in the core substrate as a reference for a processing position.

In the meantime, during each processing step, dimensional changes and variations of the core substrate (substrate), alignment errors with guide marks, dimensional variations of the processing photomask, and the like occur. Therefore, at the time of processing, an error always occurs in the positional relationship between the conductive pattern and the via hole with respect to the guide mark. Therefore, in order to form the inner layer pattern and the via hole and the via hole and the outer layer pattern with the highest relative positional accuracy, the next processing step is performed using the guide mark formed in the immediately preceding step as a position reference. Is ideal.

On the other hand, in the case where the processing in the next step and the processing in the next step are respectively performed using the same guide mark as a position reference, the guide mark is reversed in the next step and the next step. Since a processing error may occur, there is a possibility that the relative positional relationship of the next step is significantly shifted when viewed from the above next step as a reference.

In the processing steps (1) to (5),
The relationship between the guide mark and each processing step is as follows: a. An inner layer pattern is formed with reference to a guide mark formed by a through hole in a core substrate. B. Via holes are formed with reference to the guide mark formed by the inner layer pattern. C. The outer layer pattern is formed based on the position of the guide mark formed by the through hole in the core substrate.

In each of the steps a and b, the next processing step is performed using the guide mark formed in the immediately preceding step as a position reference, and the relative positional accuracy between the preceding and subsequent steps can be increased. However, in the step of forming the outer layer pattern, since the next processing step is not performed using the guide mark formed in the immediately preceding step as a position reference, the relative positional accuracy between the via hole and the outer layer pattern tends to be poor.

In order to reduce the alignment error between the via hole and the outer layer pattern, d. Form outer layer pattern with reference to guide mark by inner layer pattern e. A method is conceivable in which an outer layer pattern is formed using a guide mark formed by a via hole as a position reference.

The relative alignment error between the via hole and the outer layer pattern can be reduced in the order of d and e in comparison with c. However, when processing is performed by the above-mentioned known methods (1) to (5), the guide mark formed by the inner layer pattern of d is covered by the copper plating in the above-mentioned step (4), so that it is not visible during the outer layer pattern forming step. Gone
Positioning using the inner layer pattern is impossible.

On the other hand, since the surface of the guide mark formed by the via hole e is covered with copper plating in the above step (4), only a slight step corresponding to the thickness of the insulating layer remains on the copper plating surface. However, since the recognition of the position of the guide mark can be performed with high accuracy only by processing a sufficient contrast image obtained by irradiating the through hole and the conductor pattern with transmitted light, the light is reflected by a slight step. It is very difficult to perform stable image processing with light. Therefore, it is very difficult to stably and accurately recognize the guide mark position.

Therefore, when processing is performed by the above-mentioned known methods (1) to (5), the method c must be adopted.
In this method, a relative alignment error between the via hole and the outer layer pattern becomes large, and there is a possibility that a positional shift occurs between the two.

This state will be described with reference to FIG. FIG.
-1), FIG. 7 (b-1), and FIG. 7 (c-1) are top views, and FIG. 7 (a-2), FIG. 7 (b-2), and FIG.
Is a sectional view. In FIG. 7, 33 is a core substrate (base material), 34 is an insulating layer made of an insulating resin, 35 is a land formed in an inner layer pattern, 36 is a via hole, and 37 is a land formed in an outer layer pattern. Is shown.

FIGS. 7 (a-1) and 7 (a-2) show a state in which the relative positions of the inner layer pattern land 35 and the via hole 36 and the outer layer pattern land 37 are coincident. Outer layer pattern land 37
Is in a normal position. 7 (b-1) and 7 (b)
2B shows a state where the deviation of the relative positional relationship between the via hole 36 and the outer layer pattern land 37 has reached the limit. Further, FIGS. 7 (c-1) and 7 (c-2) show that the deviation of the relative positional relationship between the via hole 36 and the outer layer pattern land 37 exceeds the limit, and the connection in the via hole is formed by etching at the time of forming the outer layer pattern. Destruction state 3
8 is shown.

The present invention has been made to solve such problems of the prior art, and provides a multilayer printed wiring board capable of improving the relative positional accuracy between the preceding and subsequent steps, and a method of manufacturing the same. With the goal.

[0020]

According to the method of manufacturing a multilayer printed wiring board of the present invention, an insulating layer is laminated on a surface of a core substrate on which a conductive pattern of an inner layer is formed, and a via hole formed in the insulating layer is formed. A method of manufacturing a multilayer printed wiring board in which a conductor pattern of an outer layer and a conductor pattern of the inner layer laminated on the insulating layer are electrically connected via a step of forming a through hole in the core substrate, Forming a conductor pattern of an inner layer with the through-hole as a position reference, forming an insulating layer on the surface of the core substrate, and filling a part or all of the through-hole with an insulating material; A via hole is formed in the insulating layer with reference to the guide mark formed together with the conductor pattern of (a) and a portion of the insulating material in the through hole is partially removed so that a direction parallel to the substrate than the through hole is formed inside the through hole. And forming a new through hole having a small cross-sectional area, and forming an outer layer conductor pattern the new through-hole as a position reference, the object is achieved.

The insulating material filled in the through hole of the core substrate may be removed by photolithography, and the insulating material filled in the through hole of the core substrate may be removed by laser processing. Is also good.

Preferably, the surface of the new through hole is plated with copper to reinforce the hole wall surface.

The through hole of the core substrate can be used as a position reference when performing at least one of a pattern forming process and a new through hole forming process in a later step.

The new through-hole can be used as a position reference when performing a pattern forming process in a later step.

The through hole of the core substrate and the new through hole may be formed in a circular shape, and the centers of the two circular holes may be positioned coaxially, and the through hole of the core substrate and the new through hole may be formed in a circular shape. Alternatively, both circular holes may be eccentric.

The new through hole may be provided in a portion of the multilayer printed wiring board where positional accuracy is required.

Forming a new insulating layer on the surface of the substrate on which the conductor pattern is formed with the new through hole as a position reference, and filling an insulating material in a part or the whole of the new through hole; Via holes are formed in a new insulating layer based on the guide marks formed together with the lower conductor pattern, and the insulating material in the new through holes is partially removed to form the new through holes inside the new through holes. The step of forming a new through-hole having a smaller cross-sectional area in the direction parallel to the substrate than the small through-hole and the step of forming an upper-layer conductor pattern with the new through-hole as a position reference may be repeated.

The multilayer printed wiring board of the present invention is manufactured by the method for manufacturing a multilayer printed wiring board of the present invention, thereby achieving the above object.

The operation of the present invention will be described below.

According to the present invention, since the new through-hole processed at the same time as the via hole is used as a reference for positioning the outer layer pattern in the next step, the consistency of the relative position between the via hole and the outer layer pattern is conventionally determined. This method is greatly improved as compared with the method described above, and it is possible to prevent the occurrence of a defect due to a positional shift between the via hole and the outer layer pattern. In addition, since a new through hole is recognized as a guide mark, an image with sufficient contrast obtained by irradiating the through hole with transmitted light can be processed, so that image recognition processing with high positional accuracy can be performed. It is. Furthermore, in order to provide a new through hole inside the through hole provided in the core layer and use it as a guide mark,
The same location can function as different guide marks, and there is no restriction on the guide mark installation location. By repeating the process of forming the upper layer using the newly provided through hole as a guide mark, it is possible to form a multilayer wiring board having a build-up configuration of three or more layers.

In order to remove the insulating material filled in the through hole of the core substrate simultaneously with the formation of the via hole in the product, positional accuracy is required. Therefore, by removing the insulating material filled in the through-hole of the core substrate by a photolithography method or a laser processing method generally used for processing a via hole in a product, these methods can be directly used for forming a guide mark. Can be. Further, by applying copper plating to the surface of a new through hole, it is possible to reinforce the hole wall surface.

In accordance with the dimensional change of the base material between the steps, a through hole of the core substrate and a new through hole are formed in a circular shape as shown in a second embodiment described later, and the centers of both circular holes are coaxial. It may be located on top, or both circular holes may be eccentric. Further, as shown in a third embodiment described later, it is also possible to provide a new through hole in a portion where positional accuracy is required in the multilayer printed wiring board and use it as a reference hole requiring positional accuracy.

[0033]

Embodiments of the present invention will be described below. In the present invention, a multilayer printed wiring board is manufactured by the following procedure. First, (A) a through hole serving as a guide mark is formed in a core substrate. The processing of this through hole
It can be performed simultaneously with the processing of through through holes and through holes in the product. Next, (B) an inner conductor pattern is formed on the surface of the core substrate by a known method such as a photolithography method or a subtractive method, with the through hole serving as a guide mark processed on the core substrate as a position reference. At this time, a guide mark is formed by a conductor pattern. continue,
(C) An insulating resin is formed on the surface of the core substrate by a known method such as lamination, coating, lamination, or the like to form an insulating layer. At this time, an insulating material is filled in a part or the whole of the through hole of the core substrate. Thereafter, (D) via holes are formed in the insulating layer with reference to the position of the guide mark formed together with the conductor pattern of the inner layer. The processing of the via hole is a step of partially removing the insulating resin by a known method such as a photolithography method or a laser processing method. At this time, a part of the insulating material in the through hole of the core substrate filled in the above step (C) at the same time in the same coordinate system is partially removed.
A new through hole having a smaller cross-sectional area in a direction parallel to the substrate than the through hole is formed. Next, (E) in order to connect the inner layer pattern and the outer layer pattern via the via hole, after removing the residue in the via hole by a known method such as desmear, copper plating is applied to the insulating layer surface including the via hole. Apply. At this time, copper plating is also applied to the surface of the new through hole formed in the step (D), and the hole wall strength can be improved. After that, (F) the new through hole is used as a guide mark, and using this as a position reference, the conductor pattern of the outer layer is formed by a photolithography method, a subtractive method, or the like.
Process is formed by a known method.

As described above, the new through hole represents the position in the via hole processing step, and the relative positional consistency with the outer layer pattern formed using the new through hole as a reference of the processing position is greatly improved as compared with the conventional method. Therefore, it is possible to prevent the occurrence of a defect due to a displacement between the via hole and the outer layer pattern.

(Embodiment 1) FIGS. 1 and 2 are views for explaining a method of manufacturing a multilayer printed wiring board according to an embodiment of the present invention, and show steps until an outer layer pattern is formed on a core substrate. These are shown in order. FIG. 1 (a-1)
2 (g-1) (left side of each figure) are cross-sectional views of the guide mark portion, and FIGS. 1 (a-2) to 2 (g-2) (right side of each figure) are perspective views of the entire substrate. FIG. Here, for the sake of simplicity, the core substrate is shown as an example in which the process has been started from a base material structure with a double-sided copper foil, but instead of a double-sided copper-foil base material, a multilayer base material (an insulating layer and a conductive layer are used). Substrates alternately laminated)
Can also be used.

First, as shown in FIGS. 1 (a-1) and 1 (a-2), a through hole 1 is formed in a core substrate 14 on which a copper foil 17 is adhered.
5 and 16 are formed. Of these through holes, 15 is used as a guide mark, and 16 is a through hole in an actual product. This through hole is generally formed by drilling, but can also be formed by a laser processing method.

Next, as shown in FIGS. 1 (b-1) and 1 (b-2), the through holes 16 are plated with copper. At the same time, copper plating is also applied to the through hole 15 of the guide mark. Note that solder plating or gold plating may be used as the plating material.

Subsequently, FIGS. 1 (c-1) and 1 (c-2)
As shown in (1), an inner layer pattern 19 is formed on the surface of the core substrate by a known method such as a photolithography method or a subtractive method using the through hole 15 of the guide mark as a position reference. As the conductor material, copper, solder, gold, or the like can be used. At this time, the guide mark 20 using the inner layer conductor pattern is formed at the same time. Thereafter, if necessary, a surface treatment such as roughening is performed on the inner layer pattern surface in order to improve the adhesion strength to the insulating layer 21 formed in the next step.

Thereafter, FIGS. 1 (d-1) and 1 (d-2)
As shown in FIG. 3, an insulating resin is formed on the surface of the core substrate by a known method such as lamination, coating, lamination, etc.
Let it be 1. As the insulating material, an epoxy resin, an acrylic-modified epoxy resin, or the like can be used. At this time, the insulating resin is filled in the through hole 15 of the core substrate as indicated by 22. At this time, the through hole 1 of the guide hole
It is also possible to fill only a part of the space inside the space 5 without filling the space. As a method for preventing the entire inside of the through hole 15 of the guide hole from being filled with the insulating resin, for example, the following method can be considered. A semi-cured insulating resin formed in the form of a sheet or a film is placed beforehand so as to lightly contact both surfaces of the core substrate. Then, they are placed in a chamber capable of maintaining airtightness, are held under vacuum, and are pressurized and heated by lamination or lamination processing, whereby the degree of filling of the resin into the holes can be controlled. Therefore, it is possible to form a cavity in a part or to completely fill the resin.

Next, as shown in FIG. 2 (e-1) and FIG. 2 (e-2), the guide mark 20 formed by the inner conductor pattern is used.
The via hole 23 is formed in the insulating layer 21 with reference to the position. In this method, the insulating resin is partially removed by a known method such as a photolithography method or a laser processing method to process the via hole 23 in the product. At this time, the same processing is performed on the insulating resin 22 filled in the through hole 15 of the core substrate at the same time in the same coordinate system, so that the cross-sectional area in the direction parallel to the substrate is larger than that of the through hole 15. A new small through hole 24 is formed.

Subsequently, FIGS. 2 (f-1) and 2 (f-2)
As shown in (2), copper plating 39 is applied to the surface of the insulating layer including the via hole in order to connect the inner layer pattern and the outer layer pattern via the via hole. At this time, a new through hole 2
The copper plating 39 is also applied to the four surfaces, so that the hole wall strength can be improved.

Thereafter, FIGS. 2 (g-1) and 2 (g-2)
As shown in the figure, the new through hole 24 is used as a guide mark,
Using this as a position reference, the outer layer pattern 25 is formed by a known method such as a photolithography method or a subtractive method.
To form As the conductor material, copper, solder, gold, or the like can be used.

As a method of using the new through hole as a position reference, light is irradiated from the back onto the new through hole, and the contour of the new through hole is captured by a CCD camera or the like to recognize the pattern. It is possible to read the center position of the hole into the coordinate value by a known method. Therefore, at the time of the photolithography step for forming the outer layer pattern, the mask film held by the exposure machine is precisely moved to a predetermined arrangement matching the coordinate values by mechanical means to perform the exposure step. Accordingly, patterning of the outer layer circuit can be performed with the new through hole as a position reference.

If necessary, as shown in FIG.
1), FIGS. 1 (d-2) to 2 (g-1), and FIG.
By repeating the step 2), the insulating layers may be stacked in multiple stages, and a through hole of a smaller size may be formed inside the through hole of the guide mark to provide a guide mark with a different position reference in each step. .

(Embodiment 2) FIGS. 3A to 3D are views for explaining a multilayer printed wiring board according to another embodiment of the present invention. The through hole newly formed in the insulating resin filled therein has two types of shapes and positional relationships.

FIG. 3A shows the through hole 26 of the core substrate 14.
And the new through-hole 27 are circular, and the center of both circular holes is coaxial. FIG. 3 (b)
Shows a case where the through hole 26 of the core substrate 14 and the new through hole 27 are made circular, and both circular holes are eccentric. Further, FIGS. 3C and 3D show a new through hole 2.
7 shows a case where the shape of each is a quadrilateral and a cross.

Normally, the positional relationship and the shape are designed as shown in FIG. 3A. However, when the dimensional change of the base material is large between each process or when a special guide mark is to be arranged, The positional relationship as shown in FIG. Also,
Depending on the guide mark recognition device, FIG. 3 is used to improve the position recognition accuracy of a new through hole as a guide mark.
In some cases, a shape different from the circular hole as shown in FIG. 3C and FIG. 3D is more appropriate. In such a case, the same effect as the circular hole can be obtained with other shapes.

(Embodiment 3) FIG. 4 is a view for explaining a multilayer printed wiring board according to still another embodiment of the present invention. In the first and second embodiments,
Although the new through-hole has been described as a guide mark for processing outside the product, this new through-hole can also be installed in the product at the same time as the formation of the via hole, requiring positional accuracy with the outer layer pattern. It is also possible to use it as a reference hole.

FIG. 4 shows that a new through hole 3 is formed in the product 32.
This is an example in which 0 is set, and since the position matching with the outer layer pattern 31 is high, it can be used as a reference hole for component mounting.

[0050]

As described in detail above, according to the present invention,
It is possible to produce a multilayer printed wiring board having good relative positional consistency between the inner layer pattern and the via hole, and the via hole and the outer layer pattern, and the via hole and the inner layer pattern, which tend to occur in the conventional method. It is possible to suppress the occurrence of a defect due to a displacement from the outer layer pattern, thereby improving reliability and reducing manufacturing cost.

Further, the relative positional accuracy between the via hole and the inner layer pattern and the outer layer pattern is improved,
The diameter of the pattern land can be designed to be smaller in the via hole portion, and the density of the pattern can be increased.

Further, since guide marks based on different positions can be provided in the same place for each process, the installation space for guide marks can be saved.

[Brief description of the drawings]

FIG. 1 is a view showing a method of manufacturing a multilayer printed wiring board according to a first embodiment in the order of steps, and (a-1) to (d-).
1) is a sectional view, and (a-2) to (d-2) are perspective views.

FIGS. 2A to 2C are diagrams illustrating a method of manufacturing the multilayer printed wiring board according to the first embodiment in the order of steps, and include (e-1) to (g-1).
Is a sectional view, and (e-2) to (g-2) are perspective views.

FIGS. 3A to 3D are diagrams for explaining the shape and positional relationship of through holes in the multilayer printed wiring board according to the second embodiment.

FIG. 4 is a diagram for explaining positions of new through holes in the multilayer printed wiring board according to the third embodiment.

FIGS. 5A and 5B are cross-sectional views showing a core substrate before a build-up process.

FIGS. 6A to 6D are cross-sectional views showing steps of forming a core substrate into multiple layers by a build-up method in the order of steps.

FIG. 7 is a diagram showing an example of a defect due to misalignment in the related art, wherein (a-1) to (c-1) are top views,
-2) to (c-2) are cross-sectional views.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Core board (base material) 2 Through hole 3 Copper plating 4 Insulating resin filled in the through hole 5 Copper foil 6 Copper plating 7 Conductor pattern (inner layer pattern) 8 Conductor pattern (inner layer pattern) 9 Insulating layer (insulating resin) 10 via hole 11 copper plating 12 conductor pattern (outer layer pattern) 13 conductor pattern (outer layer pattern) 14 core substrate 15 through hole (guide mark) 16 through hole (product) 17 copper foil 18 copper plating 19 inner layer pattern 20 depending on inner layer pattern Guide mark 21 Insulating layer (insulating resin) 22 Insulating resin filled in through hole 23 Via hole 24 New through hole formed in through hole 25 Outer layer pattern 26 Core substrate through hole 27 New through hole 30 Product Through hole 31 outer layer pattern 32 product 33 core substrate 34 insulating layer (insulating layer) ) 35 inner layer pattern land 36 via hole 37 via hole connection 39 copper plating was destroyed by the outer pattern lands 38 etched

Claims (9)

[Claims] An insulating layer is laminated on a surface of a core substrate on which a conductor pattern of an inner layer is formed, and a conductor pattern of an outer layer laminated on the insulating layer through a via hole formed in the insulating layer is provided. A method of manufacturing a multilayer printed wiring board in which a conductor pattern of an inner layer is electrically connected, wherein a step of forming a through hole in the core substrate, and a step of forming the conductor pattern of the inner layer with the through hole as a position reference Forming an insulating layer on the surface of the core substrate and filling an insulating material in a part or the entirety of the through hole; and forming a via in the insulating layer based on the position of the guide mark formed together with the conductive pattern of the inner layer. While forming a hole,
Forming a new through-hole having a smaller cross-sectional area in a direction parallel to the substrate than the through-hole inside the through-hole by partially removing the insulating material in the through-hole; Forming a conductor pattern of an outer layer as a reference. 2. The method for manufacturing a multilayer printed wiring board according to claim 1, wherein the removal of the insulating material filled in the through holes of the core substrate is performed by a photolithography method or a laser processing method. 3. The method for manufacturing a multilayer printed wiring board according to claim 1, wherein copper plating is applied to a surface of the new through hole to reinforce a hole wall surface. 4. The method according to claim 1, wherein the through hole of the core substrate is used as a position reference when performing at least one of a pattern forming process and a new through hole forming process in a later step. A method for manufacturing a multilayer printed wiring board. 5. The method for manufacturing a multilayer printed wiring board according to claim 1, wherein the new through hole is used as a position reference when performing a pattern forming process in a later step. 6. The through hole of the core substrate and a new through hole are formed in a circular shape, and the centers of the two circular holes are located coaxially, or the two circular holes are eccentric.
The method for producing a multilayer printed wiring board according to any one of the above. 7. The method for manufacturing a multilayer printed wiring board according to claim 1, wherein said new through hole is provided in a portion of said multilayer printed wiring board where positional accuracy is required. 8. A step of forming a new insulating layer on the surface of the substrate on which the conductor pattern is formed with the new through hole as a position reference, and filling an insulating material in a part or all of the new through hole. Forming a via hole in the new insulating layer with the guide mark formed together with the underlying conductor pattern as a position reference, and removing a portion of the insulating material in the new through hole to form a via hole in the new through hole; A step of forming a further new through-hole having a smaller cross-sectional area in a direction parallel to the substrate than the new through-hole, and a step of forming an upper-layer conductive pattern with the new through-hole as a position reference are repeated. A method for manufacturing a multilayer printed wiring board according to any one of claims 1 to 7. 9. A multilayer printed wiring board manufactured by the method for manufacturing a multilayer printed wiring board according to claim 1.