JP2002231874A - Substrate for use in mounting components, electronic component device and methode for manufacturing the same - Google Patents
Substrate for use in mounting components, electronic component device and methode for manufacturing the sameInfo
- Publication number
- JP2002231874A JP2002231874A JP2001028706A JP2001028706A JP2002231874A JP 2002231874 A JP2002231874 A JP 2002231874A JP 2001028706 A JP2001028706 A JP 2001028706A JP 2001028706 A JP2001028706 A JP 2001028706A JP 2002231874 A JP2002231874 A JP 2002231874A
- Authority
- JP
- Japan
- Prior art keywords
- electronic component
- insulating resin
- wiring circuit
- plating layer
- electrode portion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0102—Calcium [Ca]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Landscapes
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体集積回路チ
ップを含む電子部品を実装する場合の、特に電磁波対策
が施された部品実装用基板、電子部品装置及びその製造
方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a component mounting board and an electronic component device provided with measures against electromagnetic waves when mounting electronic components including a semiconductor integrated circuit chip, and a method of manufacturing the same.
【０００２】[0002]
【従来の技術】先ず、図を参照しながら、従来技術の部
品実装用基板及び電子部品装置について説明する。2. Description of the Related Art First, a conventional component mounting board and an electronic component device will be described with reference to the drawings.
【０００３】なお、電子部品として半導体集積回路チッ
プ（以下、単に「ＩＣチップ」と略記する）を、そして
そのＩＣチップを実装する場合に用いられている従来技
術の部品実装用基板を採り上げて説明する。A semiconductor integrated circuit chip (hereinafter simply referred to as an “IC chip”) as an electronic component and a conventional component mounting board used for mounting the IC chip will be described. I do.
【０００４】図４は従来技術の部品実装用基板にＩＣチ
ップを実装した状態を示す封止絶縁樹脂で封止する前の
状態のＩＣ装置の断面側面図、そして図５は図４に示し
たＩＣチップを封止絶縁樹脂で封止したＩＣ装置を電子
回路基板に実装した状態を示した側面図である。FIG. 4 is a cross-sectional side view of an IC device before being sealed with a sealing insulating resin, showing a state in which an IC chip is mounted on a conventional component mounting board, and FIG. 5 is shown in FIG. FIG. 2 is a side view showing a state in which an IC device in which an IC chip is sealed with a sealing insulating resin is mounted on an electronic circuit board.
【０００５】先ず、図４を用いて従来技術のＩＣ装置１
（図５に図示）の構造を説明する。First, a prior art IC device 1 will be described with reference to FIG.
The structure (shown in FIG. 5) will be described.
【０００６】図４において、符号２はガラスエポキシ樹
脂などの有機性基板であって、この基板２の表面に金メ
ッキされた配線回路電極部３が形成されている。配線回
路電極部３は、所謂、ウルトラファインピッチリードフ
レームと称されるもので、ダイパッド部３Ａとこのダイ
パッド部３Ａの外周部に配設された複数の接続電極部３
Ｂとからなる。ダイパッド部３ＡにはＩＣチップ４が金
属半田、導電性或いは非導電性のエポキシ樹脂などの接
続材５で接着、固定され、ＩＣチップ４の複数の電極端
子が接続電極部３Ｂに金線６を用いてワイヤボンドされ
ている。また、基板２の外周部に、前記接続電極部３Ｂ
に接続されている複数本の外部リード７が取り付けられ
ている。そしてこれら外部リード７の基端部を含む内部
に存在する基板２、配線回路電極部３、ＩＣチップ４、
金線６を封止絶縁樹脂８で封止し、外部リード７を基板
２側に折り曲げて、図５に示したようなＩＣ装置１が構
成されている。In FIG. 4, reference numeral 2 denotes an organic substrate such as a glass epoxy resin, and a wiring circuit electrode portion 3 plated with gold is formed on the surface of the substrate 2. The wiring circuit electrode portion 3 is a so-called ultra-fine pitch lead frame, and includes a die pad portion 3A and a plurality of connection electrode portions 3 provided on an outer peripheral portion of the die pad portion 3A.
B. An IC chip 4 is bonded and fixed to the die pad portion 3A with a connecting material 5 such as a metal solder, a conductive or non-conductive epoxy resin, and a plurality of electrode terminals of the IC chip 4 connect gold wires 6 to the connecting electrode portion 3B. Wire bonding. Further, the connection electrode portion 3B is provided on the outer peripheral portion of the substrate 2.
Are connected to a plurality of external leads 7. The substrate 2, the wiring circuit electrode 3, the IC chip 4,
The gold wire 6 is sealed with the sealing insulating resin 8 and the external lead 7 is bent toward the substrate 2 to constitute the IC device 1 as shown in FIG.
【０００７】[0007]
【発明が解決しようとする課題】ところで、近年、例え
ば、情報通信機器においては、高性能化するために使用
されているデジタル回路は高速化が進んでおり、これに
伴い、電磁妨害雑音波（以下、単に「電磁波」と略記す
る）が発生し、この電磁波による障害の発生が増加する
状態になっている。この電磁波は、図４に矢印で示した
ように、ＩＣ装置１の全ての方向に放射される。この為
に、特にＩＣ装置１の直下に存在する電子回路基板Ｐの
配線回路Ｃａとの間に干渉問題が生じ、回路設計時に特
別な配慮をする必要があった。By the way, in recent years, for example, in information communication equipment, digital circuits used for high performance have been increased in speed, and with this, electromagnetic interference noise waves ( Hereinafter, the electromagnetic waves are simply abbreviated as “electromagnetic waves”), and the occurrence of obstacles due to the electromagnetic waves is in an increased state. This electromagnetic wave is radiated in all directions of the IC device 1 as indicated by arrows in FIG. For this reason, an interference problem occurs particularly with the wiring circuit Ca of the electronic circuit board P located immediately below the IC device 1, and special attention has to be paid when designing the circuit.
【０００８】従って、一般的には、このＩＣ装置１の直
下の電子回路基板Ｐ上には配線回路Ｃａは配線されず、
銅箔を一面に張り巡らした状態のままで、必要に応じて
グランド電極として使用されている部分である。Therefore, generally, the wiring circuit Ca is not wired on the electronic circuit board P directly below the IC device 1,
This portion is used as a ground electrode as necessary, with the copper foil stretched over the entire surface.
【０００９】しかし、これはスペースの無駄になる。こ
の無駄を無くす対策としては、図５に示したように、Ｉ
Ｃ装置１を実装しようとする電子回路基板Ｐの配線回路
Ｃａが形成されている面側の実装しようとする部分に電
磁波遮蔽シートＳを敷き、その上からＩＣ装置１を電子
回路基板Ｐの電極部Ｃｂ上に半田付けし、実装する方法
が採られている。However, this wastes space. As a measure for eliminating this waste, as shown in FIG.
An electromagnetic wave shielding sheet S is laid on the surface of the electronic circuit board P on which the wiring circuit Ca is formed on which the C device 1 is to be mounted, on which the IC device 1 is to be mounted. The method of soldering and mounting on the part Cb is adopted.
【００１０】しかし、このような対策は、電磁波遮蔽シ
ートＳが電子回路基板Ｐへの電子部品の半田付けの時の
加熱温度に耐えにくいという耐熱性の問題があり、ま
た、全体の厚みが増し、薄型電子機器に組み込むには不
向きである。However, such a measure has a problem of heat resistance that the electromagnetic wave shielding sheet S is difficult to withstand the heating temperature at the time of soldering the electronic components to the electronic circuit board P, and the total thickness is increased. However, it is not suitable for incorporating into a thin electronic device.
【００１１】また、封止絶縁樹脂８の中に電磁波吸収材
を混入したり、多層プリント配線基板の層間に電磁波遮
蔽板を介在させるといったアイディアが提案されている
が、このような対策は電子回路と直接接触するために電
磁波が漏れ、信号に悪影響を与えるとされている。Further, there have been proposed ideas such as mixing an electromagnetic wave absorbing material into the sealing insulating resin 8 and interposing an electromagnetic wave shielding plate between layers of the multilayer printed wiring board. It is said that electromagnetic waves leak due to direct contact with the device, adversely affecting the signal.
【００１２】従って、本発明は、前記のような課題を解
決しようとするものであって、本来の電気的特性を維持
しながらも、薄型電子機器に組み込む電子部品として好
適な薄型電子部品として構成でき、かつ周囲に放散しよ
うとする電磁波を削減できる部品実装用基板、電子部品
装置及びその製造方法を得ることを目的とするものであ
る。SUMMARY OF THE INVENTION Accordingly, the present invention is directed to solving the above-described problems, and is configured as a thin electronic component suitable as an electronic component incorporated in a thin electronic device while maintaining the original electrical characteristics. It is an object of the present invention to obtain a component mounting board, an electronic component device, and a method of manufacturing the same, which can reduce the electromagnetic waves that are radiated to the surroundings.
【００１３】[0013]
【課題を解決するための手段】それ故、請求項１に記載
の発明の部品実装用基板は、電気的に分離され、金属メ
ッキ層で形成された複数の配線回路電極部が電気絶縁樹
脂被膜層で裏打ちされていることを特徴とする。According to the first aspect of the present invention, there is provided a component mounting board, wherein a plurality of wiring circuit electrode portions formed of a metal plating layer are electrically isolated from each other. It is characterized by being lined with a layer.
【００１４】そして、請求項２に記載の発明の部品実装
用基板は、請求項１に記載の部品実装用基板の前記絶縁
樹脂被膜の表面に電磁波吸収材層が形成されていること
を特徴とする。According to a second aspect of the present invention, there is provided a component mounting board according to the first aspect of the present invention, wherein an electromagnetic wave absorbing material layer is formed on a surface of the insulating resin film of the component mounting board. I do.
【００１５】また、請求項３に記載の発明の部品実装用
基板は、請求項１に記載の電子部品の部品実装用基板に
おける前記金属メッキ層が複数の電気良導体金属層で積
層されていることを特徴とする。According to a third aspect of the present invention, there is provided a component mounting board according to the first aspect, wherein the metal plating layer in the electronic component component mounting board according to the first aspect is laminated with a plurality of electrically conductive metal layers. It is characterized by.
【００１６】そしてまた、請求項４に記載の発明の部品
実装用基板は、請求項１に記載の部品実装用基板におけ
る前記配線回路電極部がダイパッドと該ダイパッドの外
周部に配設された複数の接続電極とから構成されている
ことを特徴とする。According to a fourth aspect of the present invention, there is provided a component mounting board according to the first aspect of the present invention, wherein the wiring circuit electrode portion of the component mounting board according to the first aspect is provided on a die pad and an outer peripheral portion of the die pad. And the connection electrode of (1).
【００１７】更に、請求項５に記載の発明の部品実装用
基板は、請求項１に記載の部品実装用基板における前記
接続電極部の前記電気絶縁樹脂被膜層側とは反対側の面
に外部リードが接続されていることを特徴とする。Further, the component mounting board according to the invention of claim 5 is the component mounting board according to claim 1, wherein the connection electrode portion has an external surface on a surface opposite to the electric insulating resin coating layer side. The lead is connected.
【００１８】そして更に、請求項６に記載の発明の電子
部品装置は、電気絶縁樹脂被膜で裏打ちされた金属メッ
キ層の配線回路電極部の該配線回路電極部の前記電気絶
縁樹脂被膜側とは反対側の表面に電子部品が実装されて
いることを特徴とする。Further, in the electronic component device according to the present invention, preferably, the wiring circuit electrode portion of the metal plating layer lined with the electrical insulating resin film is different from the electrical insulating resin film side of the wiring circuit electrode portion. The electronic component is mounted on the opposite surface.
【００１９】そして更にまた、請求項７に記載の発明の
電子部品装置は、電気絶縁樹脂被膜で裏打ちされた金属
メッキ層の配線回路電極部の該電気絶縁樹脂被膜の表面
に電磁波吸収材層が形成されており、前記配線回路電極
部の前記電気絶縁樹脂被膜層とは反対側の表面に電子部
品が実装されていることを特徴とする。Furthermore, in the electronic component device according to the present invention, an electromagnetic wave absorbing material layer is provided on the surface of the electric insulating resin film of the wiring circuit electrode portion of the metal plating layer lined with the electric insulating resin film. An electronic component is mounted on a surface of the wiring circuit electrode portion opposite to the electric insulating resin coating layer.
【００２０】そして更にまた、請求項８に記載の発明の
電子部品装置は、請求項６または請求項７に記載の電子
部品装置における前記金属メッキ層が複数の電気良導体
金属層で積層されていることを特徴とする。Further, in the electronic component device according to the present invention, the metal plating layer in the electronic component device according to the sixth or seventh aspect is laminated with a plurality of electric conductive metal layers. It is characterized by the following.
【００２１】そして更にまた、請求項９に記載の発明の
電子部品装置は、請求項６または請求項７に記載の電子
部品装置における前記電子部品の電極端子が接続される
配線回路電極部の前記電気絶縁樹脂被膜層側とは反対側
の面に外部リードが接続されていることを特徴とする。According to a ninth aspect of the present invention, there is provided the electronic component device according to the sixth or seventh aspect, wherein the electrode terminal of the wiring circuit to which the electrode terminal of the electronic component is connected is connected. An external lead is connected to a surface on the side opposite to the electric insulating resin coating layer side.
【００２２】そして更にまた、請求項１０に記載の発明
の電子部品装置は、請求項１、請求項６、または請求項
７に記載の電子部品装置における前記金属メッキ層が第
１ニッケルメッキ層、該第１ニッケルメッキ層の表面に
成膜された金メッキ層、該金メッキ層の表面に成膜され
た第２ニッケルメッキ層、該第２ニッケルメッキ層の表
面に成膜された銅メッキ層を含んでおり、該銅メッキ層
の表面側から前記電気絶縁樹脂被膜層が裏打ちされてい
ることを特徴とする。Further, in the electronic component device according to the present invention, the metal plating layer in the electronic component device according to the first, sixth, or seventh aspect is a first nickel plating layer, A gold plating layer formed on the surface of the first nickel plating layer, a second nickel plating layer formed on the surface of the gold plating layer, and a copper plating layer formed on the surface of the second nickel plating layer. Wherein the electrically insulating resin coating layer is lined from the surface side of the copper plating layer.
【００２３】そして更にまた、請求項１１に記載の発明
の電子部品装置は、請求項６に記載の電子部品装置にお
ける前記配線回路電極部、前記電気絶縁樹脂被膜層、そ
して前記電子部品が封止絶縁樹脂で封止されていること
を特徴とする。Further, according to an eleventh aspect of the present invention, in the electronic component device according to the sixth aspect, the wiring circuit electrode portion, the electrically insulating resin coating layer, and the electronic component are sealed. It is characterized by being sealed with an insulating resin.
【００２４】そして更にまた、請求項１２に記載の発明
の電子部品装置は、請求項７に記載の電子部品装置にお
ける前記配線回路電極部、前記電気絶縁樹脂被膜層、前
記電磁波吸収材層、及び前記電子部品が封止絶縁樹脂で
封止されていることを特徴とする。そして更にまた、請
求項１３に記載の発明の電子部品装置は、請求項６また
は請求項７に記載の電子部品装置における前記配線回路
電極部がダイパッドと該ダイパッドの外周部に配設され
た複数の接続電極とから構成されていることを特徴とす
る。Further, the electronic component device according to the twelfth aspect of the present invention is the electronic component device according to the seventh aspect, wherein the wiring circuit electrode portion, the electrical insulating resin coating layer, the electromagnetic wave absorbing material layer, The electronic component is sealed with a sealing insulating resin. Still further, according to the electronic component device of the thirteenth aspect, in the electronic component device according to the sixth or seventh aspect, the wiring circuit electrode portion is disposed on a die pad and an outer peripheral portion of the die pad. And the connection electrode of (1).
【００２５】そして更にまた、請求項１４に記載の発明
の電子部品装置は、請求項１３に記載の電子部品装置に
おける前記電子部品が本体と該本体に形成されている複
数の電極端子を備えた半導体集積回路チップであり、前
記本体が前記ダイパッドに、前記各電極端子が前記各接
続電極に接続された状態で前記半導体集積回路チップが
前記配線回路電極部に実装されていることを特徴とす
る。According to a fourteenth aspect of the present invention, there is provided an electronic component device according to the thirteenth aspect, wherein the electronic component has a main body and a plurality of electrode terminals formed on the main body. A semiconductor integrated circuit chip, wherein the main body is mounted on the die pad, and the electrode terminals are connected to the connection electrodes, and the semiconductor integrated circuit chip is mounted on the wiring circuit electrode portion. .
【００２６】そして更にまた、請求項１５に記載の発明
の電子部品装置は、本体と該本体に形成されている複数
の電極端子を備えた半導体集積回路チップが実装基板に
実装されて、封止絶縁樹脂で封止された電子部品装置に
おいて、前記実装基板が複数の配線回路電極部、電気絶
縁樹脂被膜層、電磁波吸収材層から構成されており、該
配線回路電極部は更にダイパッドと複数の接続電極と複
数の外部リードで構成されており、前記電気絶縁樹脂被
膜層は前記複数の配線回路電極部に裏打ちされており、
前記電磁波吸収材層は前記絶縁樹脂被膜層の表面に形成
されており、前記半導体集積回路チップの前記本体が前
記部品実装用基板の前記ダイパッドの他の一面に、前記
各電極端子が前記各接続電極の他の一面に接続、実装さ
れており、そして前記外部リードが前記電磁波吸収材層
が形成されている側に折り曲げられていることを特徴と
する。According to still another aspect of the present invention, there is provided an electronic component device wherein a semiconductor integrated circuit chip having a main body and a plurality of electrode terminals formed on the main body is mounted on a mounting substrate and sealed. In an electronic component device sealed with an insulating resin, the mounting substrate is composed of a plurality of wiring circuit electrode portions, an electrically insulating resin coating layer, and an electromagnetic wave absorbing material layer, and the wiring circuit electrode portion further includes a die pad and a plurality of It is composed of a connection electrode and a plurality of external leads, the electrical insulating resin coating layer is lined with the plurality of wiring circuit electrode portions,
The electromagnetic wave absorbing material layer is formed on a surface of the insulating resin coating layer, the main body of the semiconductor integrated circuit chip is mounted on another surface of the die pad of the component mounting board, and the electrode terminals are connected to the respective connection surfaces. It is connected and mounted on another surface of the electrode, and the external lead is bent to the side on which the electromagnetic wave absorbing material layer is formed.
【００２７】そして更にまた、請求項１６に記載の発明
の部品実装用基板の製造方法は、金属板の一面に金属メ
ッキにより配線回路電極部を形成する第１工程と、該配
線回路電極部の表面に電気絶縁樹脂被膜層を形成する第
２工程と、前記金属板の他の一面側から前記金属メッキ
層が露出するようその金属板面の一部を除去する第３工
程とを含んでいることを特徴とする。Still further, according to a method of manufacturing a component mounting board according to the present invention, a first step of forming a wiring circuit electrode portion on one surface of a metal plate by metal plating; A second step of forming an electrically insulating resin coating layer on the surface; and a third step of removing a part of the metal plate surface so that the metal plating layer is exposed from another side of the metal plate. It is characterized by the following.
【００２８】そして更にまた、請求項１７に記載の発明
の部品実装用基板の製造方法は、金属板の一面に金属メ
ッキにより配線回路電極部を形成する第１工程と、該配
線回路電極部の表面に電気絶縁樹脂被膜層を形成する第
２工程と、該電気絶縁樹脂被膜層の表面に電磁波吸収材
層を形成する第２工程と、前記金属板の他の一面側から
前記金属メッキ層が露出するよう、その金属板面の一部
を除去する第４工程とを含んでいることを特徴とする。Still further, according to the method of manufacturing a component mounting board according to the present invention, a first step of forming a wiring circuit electrode portion on one surface of a metal plate by metal plating is provided. A second step of forming an electrically insulating resin coating layer on the surface, a second step of forming an electromagnetic wave absorbing material layer on the surface of the electrically insulating resin coating layer, and the metal plating layer being formed on the other side of the metal plate. And a fourth step of removing a part of the surface of the metal plate so as to be exposed.
【００２９】そして更にまた、請求項１８に記載の発明
の電子部品装置の製造方法は、金属板の一面に金属メッ
キにより配線回路電極部を形成する第１工程と、該配線
回路電極部の表面に電気絶縁樹脂被膜層を形成する第２
工程と、前記金属板の他の一面側から前記金属メッキ層
が露出するよう、その金属板面の一部を除去する第３工
程と、該露出した金属メッキ層の面に電子部品を接続す
る第４工程と、前記配線回路電極部、前記電気絶縁樹脂
被膜層、前記電子部品を封止絶縁樹脂で封止する第５工
程とを含んでいることを特徴とする。Still further, according to the method of manufacturing an electronic component device of the present invention, a first step of forming a wiring circuit electrode portion on one surface of a metal plate by metal plating, and a surface of the wiring circuit electrode portion To form an electrically insulating resin coating layer on the second
A step of removing a part of the metal plate surface so that the metal plating layer is exposed from the other surface side of the metal plate, and connecting an electronic component to the exposed surface of the metal plating layer. The method includes a fourth step and a fifth step of sealing the wiring circuit electrode portion, the electrical insulating resin coating layer, and the electronic component with a sealing insulating resin.
【００３０】そして更にまた、請求項１９に記載の発明
の電子部品装置の製造方法は、金属板の一面に金属メッ
キにより配線回路電極部を形成する第１工程と、該配線
回路電極部の表面に電気絶縁樹脂被膜層を形成する第２
工程と、該電気絶縁樹脂被膜層の表面に電磁波吸収材層
を形成する第３工程と、前記金属板の他の一面側から前
記金属メッキ層が露出するようその金属板面の一部を除
去する第４工程と、該露出した金属メッキ層の面に電子
部品を接続する第５工程と、前記配線回路電極部、前記
電気絶縁樹脂被膜層、前記電磁波吸収材層、前記電子部
品を封止絶縁樹脂で封止する第６工程と、前記金属板の
残部を前記電磁波吸収材層側に折り曲げる第７工程とを
含んでいることを特徴とする。Still further, according to the method of manufacturing an electronic component device of the present invention, a first step of forming a wiring circuit electrode portion on one surface of a metal plate by metal plating, and a surface of the wiring circuit electrode portion To form an electrically insulating resin coating layer on the second
A step of forming an electromagnetic wave absorbing material layer on the surface of the electrically insulating resin coating layer; and removing a part of the metal plate surface so that the metal plating layer is exposed from the other surface of the metal plate. A fourth step of connecting an electronic component to the exposed surface of the metal plating layer, and sealing the wiring circuit electrode portion, the electrically insulating resin coating layer, the electromagnetic wave absorbing material layer, and the electronic component. A sixth step of sealing with an insulating resin and a seventh step of bending the remaining part of the metal plate toward the electromagnetic wave absorbing material layer side are included.
【００３１】そして更にまた、請求項２０に記載の発明
の電子部品装置の製造方法は、請求項１６、請求項１
７、請求項１８、または請求項１９に記載の電子部品装
置の製造方法における前記金属板が銅合金板からなり、
前記金属メッキ層が前記銅合金板の表面に成膜された第
１ニッケルメッキ層、該第１ニッケルメッキ層の表面に
成膜された金メッキ層、該金メッキ層の表面に成膜され
た第２ニッケルメッキ層、該第２ニッケルメッキ層の表
面に成膜された銅メッキ層から構成されていることを特
徴とする。Further, the method for manufacturing an electronic component device according to the present invention is described in claim 16 and claim 1.
7. The method for manufacturing an electronic component device according to claim 18, wherein the metal plate comprises a copper alloy plate,
A first nickel plating layer formed on the surface of the copper alloy plate, a gold plating layer formed on the surface of the first nickel plating layer, and a second nickel plating layer formed on the surface of the gold plating layer. It is characterized by comprising a nickel plating layer and a copper plating layer formed on the surface of the second nickel plating layer.
【００３２】それ故、請求項１に記載の発明によれば、
配線回路電極部そのものをより薄く、かつ配線回路を精
密に形成でき、また、電気絶縁樹脂被膜層が複数の配線
回路電極部を裏打ちし、それらを一体的に支持し、更に
また、電子部品を実装する配線回路電極部を必然的に沈
んだ構造に仕上げることができるので、電子部品を実装
した場合に電子部品装置全体の厚みをより薄くできる。Therefore, according to the first aspect of the present invention,
The wiring circuit electrode part itself can be made thinner and the wiring circuit can be formed precisely, and the electrically insulating resin coating layer lines the wiring circuit electrode parts and supports them integrally. Since the wiring circuit electrode portion to be mounted can be finished to a structure that is necessarily sunk, the thickness of the entire electronic component device can be further reduced when the electronic component is mounted.
【００３３】そして、請求項２に記載の発明によれば、
請求項１に記載の発明の作用に加えて、電磁波吸収材層
が電子部品を実装する配線回路電極部に隣接して存在す
ることから電子部品から直下に放射する電磁波を実質的
に発生源において遮蔽することができる。According to the second aspect of the present invention,
In addition to the function of the invention according to claim 1, since the electromagnetic wave absorbing material layer is present adjacent to the wiring circuit electrode portion on which the electronic component is mounted, the electromagnetic wave radiated directly downward from the electronic component is substantially generated at the source. Can be shielded.
【００３４】また、請求項３に記載の発明によれば、請
求項１に記載の発明の作用に加えて、より微細に、そし
てより精密に加工しやすく、また、配線回路電極部を薄
膜構造に仕上げることができる。According to the third aspect of the present invention, in addition to the function of the first aspect of the present invention, finer and more precise processing is facilitated, and the wiring circuit electrode portion is formed in a thin film structure. Can be finished.
【００３５】そしてまた、請求項４に記載の発明によれ
ば、請求項１に記載の発明の作用に加えて、ＩＣチップ
のような電子部品をワイヤボンドまたはフリップチップ
方式で組み立てることができる。According to the fourth aspect of the invention, in addition to the operation of the first aspect, an electronic component such as an IC chip can be assembled by a wire bond or flip chip method.
【００３６】更に、請求項５に記載の発明によれば、請
求項１に記載の発明の作用に加えて、外部の電子回路基
板に表面実装し易い構造に形成できる。Further, according to the fifth aspect of the invention, in addition to the effect of the first aspect of the invention, it is possible to form a structure which can be easily surface-mounted on an external electronic circuit board.
【００３７】更にまた、請求項６に記載の発明によれ
ば、配線回路電極部そのものをより薄く、かつ配線回路
を精密に形成され、また、電気絶縁樹脂被膜層が複数の
配線回路電極部を裏打ちし、それらを一体的に支持し、
更にまた、電子部品を実装する配線回路電極部を窪んだ
構造に仕上げられている部品実装用基板の前記窪んだ配
線回路電極部に電子部品を実装できるので、電子部品装
置の厚みを全体としてより薄くすることができる。Further, according to the present invention, the wiring circuit electrode portion itself can be made thinner and the wiring circuit can be formed precisely, and the electrically insulating resin coating layer can form a plurality of wiring circuit electrode portions. Lining, supporting them together,
Furthermore, since the electronic component can be mounted on the recessed wiring circuit electrode portion of the component mounting substrate in which the wiring circuit electrode portion for mounting the electronic component is finished in a recessed structure, the thickness of the electronic component device can be reduced as a whole. Can be thin.
【００３８】そして更にまた、請求項７に記載の発明に
よれば、配線回路電極部そのものをより薄く、かつ配線
回路を精密に形成され、また、電気絶縁樹脂被膜層が複
数の配線回路電極部を裏打ちし、それらを一体的に支持
し、更にまた、電子部品を実装する配線回路電極部を窪
んだ構造に仕上げられている部品実装用基板の前記窪ん
だ配線回路電極部に電子部品を実装できるので、電子部
品装置の厚みを全体としてより薄くすることができ、そ
して電子部品から発生する電磁波を遮蔽することができ
る。According to the seventh aspect of the present invention, the wiring circuit electrode portion itself can be made thinner and the wiring circuit can be formed precisely, and the electrically insulating resin coating layer can be formed in a plurality of wiring circuit electrode portions. Backing, integrally supporting them, and further mounting the electronic component on the recessed wiring circuit electrode portion of the component mounting board in which the wiring circuit electrode portion for mounting the electronic component is finished in a recessed structure. Therefore, the thickness of the electronic component device can be made thinner as a whole, and the electromagnetic wave generated from the electronic component can be shielded.
【００３９】そして更にまた、請求項８に記載の発明に
よれば、請求項６及び請求項７に記載の発明の作用に加
えて、部品実装用基板がより微細に、そしてより精密に
加工されることから電子部品装置をより一層薄い厚み構
造に仕上げることができる。According to the invention of claim 8, in addition to the functions of the invention of claims 6 and 7, the component mounting board is processed more finely and more precisely. Therefore, the electronic component device can be finished to a thinner thickness structure.
【００４０】そして更にまた、請求項９に記載の発明に
よれば、請求項６及び請求項７に記載の発明の作用に加
えて、電子部品装置を外部の電子回路基板に表面実装し
易い構造に形成できる。According to the ninth aspect of the present invention, in addition to the functions of the sixth and seventh aspects, a structure in which the electronic component device is easily surface-mounted on an external electronic circuit board is provided. Can be formed.
【００４１】そして更にまた、請求項１０に記載の発明
によれば、請求項１、請求項６、または請求項７に記載
の発明の作用に加えて、強度の強く、抵抗の低い、そし
てボンディング性の良好な電極が得られる。According to a tenth aspect of the present invention, in addition to the functions of the first, sixth, or seventh aspect of the present invention, the strength is high, the resistance is low, and bonding is performed. An electrode having good properties can be obtained.
【００４２】そして更にまた、請求項１１に記載の発明
によれば、請求項６に記載の発明の作用に加えて、実装
した電子部品及び主な部品実装用基板部分を密封できる
好ましくない外部環境から保護することができる。According to the eleventh aspect of the present invention, in addition to the function of the sixth aspect of the present invention, an undesired external environment capable of sealing the mounted electronic components and the main component mounting board portion. Can be protected from
【００４３】そして更にまた、請求項１２に記載の発明
によれば、請求項７に記載の発明の作用に加えて、実装
した電子部品及び主な部品実装用基板部分を密封できる
好ましくない外部環境から保護することができる。According to the twelfth aspect of the present invention, in addition to the function of the seventh aspect of the present invention, an undesired external environment capable of sealing the mounted electronic components and the main component mounting board portion. Can be protected from
【００４４】そして更にまた、請求項１３に記載の発明
によれば、請求項６及び請求項７に記載の発明の作用に
加えて、ＩＣチップのような電子部品をワイヤボンドま
たはフリップチップ方式で組み立てることができる。According to the thirteenth aspect of the present invention, in addition to the functions of the sixth and seventh aspects, an electronic component such as an IC chip is formed by a wire bond or flip chip method. Can be assembled.
【００４５】そして更にまた、請求項１４に記載の発明
によれば、請求項１３に記載の発明の作用に加えて、Ｉ
Ｃチップをワイヤボンドまたはフリップチップ方式で組
み立てることができる。Further, according to the invention of claim 14, in addition to the effect of the invention of claim 13, I
The C chip can be assembled by wire bonding or flip chip method.
【００４６】そして更にまた、請求項１５に記載の発明
によれば、配線回路電極部そのものがより薄く、配線回
路を微細に、かつ精密に形成でき、また、複数の配線回
路電極部が電気絶縁樹脂被膜層で裏打ちされ、それらが
一体的に支持され、更にまた、ＩＣチップを実装する配
線回路電極部を窪んだ構造に仕上げられている部品実装
用基板の前記窪んだ配線回路電極部にＩＣチップを実装
できるので、電子部品装置の厚みを全体としてより薄く
することができ、そしてＩＣチップから放射される電磁
波を遮蔽でき、電子部品装置を外部の電子回路基板に表
面実装し易く、そして実装した場合に、電子回路基板に
形成されている電子回路に及ぼす悪影響を軽減すること
ができる。According to the present invention, the wiring circuit electrode portion itself is thinner, the wiring circuit can be formed finely and precisely, and the plurality of wiring circuit electrode portions are electrically insulated. Backed by a resin coating layer, they are integrally supported, and furthermore, the IC is mounted on the recessed wiring circuit electrode portion of the component mounting board in which the wiring circuit electrode portion for mounting the IC chip is finished in a recessed structure. Since the chip can be mounted, the thickness of the electronic component device can be reduced as a whole, and the electromagnetic wave radiated from the IC chip can be shielded, and the electronic component device can be easily surface-mounted on an external electronic circuit board, and mounted. In this case, adverse effects on electronic circuits formed on the electronic circuit board can be reduced.
【００４７】そして更にまた、請求項１６に記載の発明
によれば、フォトプロセスに電解メッキと化学的エッチ
ングを使用して、より高精度の配線回路電極部を備えた
部品実装用基板を作成することができる。Further, according to the present invention, a component mounting board having a more accurate wiring circuit electrode portion is prepared by using electrolytic plating and chemical etching in a photo process. be able to.
【００４８】そして更にまた、請求項１７に記載の発明
によれば、フォトプロセスに電解メッキと化学的エッチ
ングを使用して、より高精度の配線回路電極部と電磁波
吸収材層とを備えた部品実装用基板を作成することがで
きる。According to the seventeenth aspect of the present invention, a component having a more accurate wiring circuit electrode portion and an electromagnetic wave absorbing material layer by using electrolytic plating and chemical etching in a photo process. A mounting substrate can be created.
【００４９】そして更にまた、請求項１８に記載の発明
によれば、フォトプロセスに電解メッキ、化学的エッチ
ング及びワイヤボンディングまたはフリップチップ方式
を使用して、より高精度の配線回路電極部に電子部品を
実装し、樹脂封止された電子部品装置を作成することが
できる。Further, according to the present invention, an electronic component is provided on a wiring circuit electrode portion with higher precision by using electrolytic plating, chemical etching and wire bonding or a flip chip method in a photo process. And an electronic component device sealed with resin can be produced.
【００５０】そして更にまた、請求項１９に記載の発明
によれば、フォトプロセスに電解メッキ、化学的エッチ
ング及びワイヤボンディングまたはフリップチップ方式
を使用して、より高精度の配線回路電極部に電子部品を
固定し、その電子部品から直下に放射される電磁波をも
遮蔽でき、全体が樹脂封止された表面実装形式の電子部
品装置を作成することができる。According to the nineteenth aspect of the present invention, the electronic component is provided on the electrode portion of the wiring circuit with higher precision by using electrolytic plating, chemical etching and wire bonding or a flip chip method in the photo process. Can be fixed, an electromagnetic wave radiated immediately below the electronic component can be shielded, and a surface-mounted electronic component device entirely sealed with resin can be produced.
【００５１】そして更にまた、請求項２０に記載の発明
によれば、請求項１６、請求項１７、請求項１８または
請求項１９に記載の発明の作用に加えて、強度の強く、
抵抗の低い、そしてボンディング性の良好な電極を形成
することができる。According to the twentieth aspect of the present invention, in addition to the effects of the sixteenth, seventeenth, eighteenth, or nineteenth aspects, the strength is high.
An electrode having low resistance and good bonding properties can be formed.
【００５２】[0052]
【発明の実施の形態】以下、図を用いて、本発明の一実
施形態の部品実装用基板、電子部品装置及びその製造方
法を説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A component mounting board, an electronic component device, and a method of manufacturing the same according to an embodiment of the present invention will be described below with reference to the drawings.
【００５３】なお、以下の説明においても、電子部品の
一つとして半導体集積回路チップ（以下、単に「ＩＣチ
ップ」と略記する）を、そしてそのＩＣチップを実装す
る場合に用いられている部品実装用基板を採り上げて説
明する。In the following description, a semiconductor integrated circuit chip (hereinafter simply abbreviated as “IC chip”) as one of the electronic components, and the component mounting used in mounting the IC chip. A description will be given by taking a substrate for use.
【００５４】図１は本発明の一実施形態の部品実装用基
板、ＩＣ装置及びその製造方法を説明するための製造工
程図、図２は本発明の一実施形態のＩＣ装置の断面側面
図、そして図３は図２に示したＩＣ装置を電子機器に組
み込む電子回路基板に実装した状態を示す側面図であ
る。FIG. 1 is a manufacturing process diagram for explaining a component mounting board, an IC device and a method of manufacturing the same according to one embodiment of the present invention. FIG. 2 is a cross-sectional side view of the IC device according to one embodiment of the present invention. FIG. 3 is a side view showing a state where the IC device shown in FIG. 2 is mounted on an electronic circuit board incorporated in an electronic device.
【００５５】先ず、図１を用いて、本発明の部品実装用
基板及びＩＣ装置の製造方法を説明する。First, a method for manufacturing a component mounting board and an IC device according to the present invention will be described with reference to FIG.
【００５６】図１Ａに示したように、先ず、金属板１１
を用意する。この金属板１１の材質としては、通常のリ
ードフレームに用いられているものと同様の材質の銅合
金を用いるとよい。その厚みは１００〜２００μｍ程度
のものを用いる。As shown in FIG. 1A, first, the metal plate 11
Prepare As a material of the metal plate 11, a copper alloy having the same material as that used for a normal lead frame may be used. Its thickness is about 100 to 200 μm.
【００５７】次に、金属板１１の表面にフォトレジスト
を塗布し、フォトレジスト写真法を用いてマスク（不図
示）を作成し、図１Ｂに示したように、電解メッキ法で
配線回路電極部１２を形成する。配線回路電極部１２
は、この例では、電子部品としてＩＣチップを実装する
場合に用いられるものであって、中央部に形成されてい
る一つのダイパッド部１２Ａとこのダイパッド部１２Ａ
に外周部に形成、配設された複数の接続電極部１２Ｂな
どとから構成されている。このダイパッド部１２Ａは従
来技術のリードフレームのダイパッド部に相当する部分
であり、接続電極部１２Ｂは従来技術のリードフレーム
のインナーリード或いはアウターリードに相当する部分
である。Next, a photoresist is applied to the surface of the metal plate 11, a mask (not shown) is formed by using a photoresist photo method, and as shown in FIG. 1B, a wiring circuit electrode portion is formed by an electrolytic plating method. 12 is formed. Wiring circuit electrode section 12
Is used in this example when an IC chip is mounted as an electronic component, and one die pad portion 12A formed in the center portion and this die pad portion 12A
And a plurality of connection electrode portions 12B formed and arranged on the outer peripheral portion. The die pad portion 12A is a portion corresponding to the die pad portion of the conventional lead frame, and the connection electrode portion 12B is a portion corresponding to the inner lead or the outer lead of the conventional lead frame.
【００５８】また、この電解メッキ工程では、金属板１
１のマスクが形成されている一面に、例えば、先ず、ニ
ッケル（Ｎｉ）をメッキし、そのニッケル層の表面に金
（Ａｕ）をメッキし、次に、その金メッキ層の表面に再
度ニッケル（Ｎｉ）をメッキし、最後にこのニッケル層
の表面に銅（Ｃｕ）をメッキして銅メッキ層を形成す
る。In this electrolytic plating step, the metal plate 1
For example, first, nickel (Ni) is plated on one surface on which the mask 1 is formed, gold (Au) is plated on the surface of the nickel layer, and then nickel (Ni) is again plated on the surface of the gold plated layer. ), And finally, copper (Cu) is plated on the surface of the nickel layer to form a copper plating layer.
【００５９】最初にメッキしたニッケルメッキ層は、金
属板１１に銅合金を用いた場合、その銅合金板からの銅
が金メッキ層中へ拡散することを防止するためのバリア
ー層である。銅が金メッキ層に拡散すると、後記するよ
うに、金線２３のワイヤボンド時に、ボンド不良が起こ
り易くなるので、これを防ぐために設けた層である。金
メッキ層は金線２３のボンドのためと電気を流し易くす
るための層であり、表面酸化防止の効果もある。次のニ
ッケルメッキ層は金線ボンドの際、下地が柔らかいと強
度不足になるため、硬いニッケルを用いてボンド性能を
向上させようとする層である。拡散バリヤー層としても
機能する。銅メッキ層は厚くして電気抵抗を下げるよう
にする。The nickel plating layer plated first is a barrier layer for preventing the copper from the copper alloy plate from diffusing into the gold plating layer when a copper alloy is used for the metal plate 11. If copper diffuses into the gold plating layer, as will be described later, bonding failure tends to occur at the time of wire bonding of the gold wire 23. This is a layer provided to prevent this. The gold plating layer is a layer for bonding the gold wire 23 and facilitating the flow of electricity, and has an effect of preventing surface oxidation. The next nickel plating layer is a layer for improving the bonding performance by using hard nickel because the strength is insufficient if the base is soft at the time of gold wire bonding. Also functions as a diffusion barrier layer. The copper plating layer is made thick to reduce the electric resistance.
【００６０】以上のようにメッキ層を組み合わせること
により、ボンディング性の良い、抵抗の低い電極を形成
することができる。By combining the plating layers as described above, an electrode having good bonding properties and low resistance can be formed.
【００６１】これらメッキ層は必要に応じて層数を増や
してもよい。また、各メッキ層の材質を必要に応じて変
更させてもよい。配線回路電極部１２を構成する各ライ
ンピッチは、例えば、３０〜５０μｍ程度にでき、メッ
キ層の総厚みは、例えば、２５〜３５μｍ程度とする。The number of these plating layers may be increased if necessary. Further, the material of each plating layer may be changed as needed. The line pitch of the wiring circuit electrode portion 12 can be, for example, about 30 to 50 μm, and the total thickness of the plating layer is, for example, about 25 to 35 μm.
【００６２】次に、図１Ｃに示したように、これらの配
線回路電極部１２の表面に電気絶縁樹脂被膜層１３を形
成する。Next, as shown in FIG. 1C, an electrically insulating resin coating layer 13 is formed on the surface of these wiring circuit electrode portions 12.
【００６３】電気絶縁樹脂としては、ポリイミド樹脂を
用いる。ポリイミド樹脂を形成する方法としては、例え
ば、ポリイミド樹脂の前駆体であるポリアミックス酸の
シートを接着した後、フォトマスクを使用してアルカリ
エッチングした後、加熱してポリイミド化する方法を採
るとよい。A polyimide resin is used as the electric insulating resin. As a method for forming the polyimide resin, for example, after bonding a sheet of polyamic acid, which is a precursor of the polyimide resin, after performing alkali etching using a photomask, it is good to adopt a method of heating and polyimide. .
【００６４】次に、この電気絶縁樹脂被膜層１３の表面
に電磁波吸収材層１４を形成する。この処理を施す場
合、電磁波吸収材が配線回路電極部１２にはみ出して接
触しないように行う必要がある。Next, an electromagnetic wave absorbing material layer 14 is formed on the surface of the electrically insulating resin coating layer 13. When this process is performed, it is necessary to prevent the electromagnetic wave absorbing material from protruding into and coming into contact with the wiring circuit electrode portion 12.
【００６５】この電磁波吸収材層１４の材料としては、
Ｎｉ−Ｚｎ系のようなフェライトの厚さ０．３〜１ｍｍ
程度の焼結板を接着してもよいが、一度粒径１〜７０μ
ｍ（１０μｍ中心）程度の粉末にして、エポキシ樹脂な
どと混合し、ペースト化してスクリーン印刷法で塗布
し、加熱硬化させてシート化させてもものを用いてもよ
い。また、軟磁性金属を鱗片状に粉砕して使用しても同
じ効果が得られる。更に、このような混合物を事前にシ
ート状に加工して、そのシートを用いてもよい。この場
合は、電気絶縁樹脂被膜層１３の表面に接着する。The material of the electromagnetic wave absorbing material layer 14 is as follows.
Ferrite thickness of 0.3 to 1 mm such as Ni-Zn
About a sintered plate, but once the particle size is 1 to 70μ
Alternatively, a powder having a particle size of about m (10 μm center), mixed with an epoxy resin or the like, formed into a paste, applied by a screen printing method, and cured by heating to form a sheet may be used. Also, the same effect can be obtained by pulverizing and using a soft magnetic metal in a scale shape. Further, such a mixture may be processed into a sheet in advance and the sheet may be used. In this case, it adheres to the surface of the electrically insulating resin coating layer 13.
【００６６】次に、この電磁波吸収材層１４が形成され
ている状態の金属板１１の裏面（配線回路電極部１２側
とは反対側）を、フォトマスクを用いてエッチングする
（図１Ｅ）。このエッチング加工に当たっては、図１Ｅ
に示したように、ダイパッド部１２Ａの裏面部分の金属
板１１は全てをエッチングするが、接続電極部１２Ｂの
裏面部分の金属板１１は一部分を残すようにエッチング
し、接続電極部１２Ｂと接続された構造の外部リード部
１５となる金属板１１を残す。その結果、ダイパッド部
１２Ａ及び大部分の接続電極部１２Ｂは沈んだ構造にな
り、いわゆるダイパッド沈めの構造のリードフレームと
同様の部品実装用基板１０になる。Next, the back surface (the side opposite to the wiring circuit electrode portion 12 side) of the metal plate 11 on which the electromagnetic wave absorbing material layer 14 is formed is etched using a photomask (FIG. 1E). In this etching process, FIG.
As shown in (2), the metal plate 11 on the back surface of the die pad portion 12A is entirely etched, but the metal plate 11 on the back surface of the connection electrode portion 12B is etched so as to leave a portion, and is connected to the connection electrode portion 12B. The metal plate 11 serving as the external lead portion 15 having the above structure is left. As a result, the die pad portion 12A and most of the connection electrode portions 12B have a sunken structure, and the component mounting board 10 is similar to a lead frame having a so-called die pad sunken structure.
【００６７】エッチング液としては、前記の金属メッキ
層の実施例の場合は、ニッケルが侵されない薬品として
アルカリを用い、先ず、銅合金板である金属板１１の銅
をエッチングする。銅のエッチングが終了後、次にニッ
ケル層をエッチングして金メッキ層を露出させる。実際
の外部リード１５は数１０〜数１００本存在する。As the etchant, in the case of the above-described embodiment of the metal plating layer, an alkali is used as a chemical which does not attack nickel, and first, copper of the metal plate 11 which is a copper alloy plate is etched. After the copper etching is completed, the nickel layer is then etched to expose the gold plating layer. There are several tens to hundreds of actual external leads 15.
【００６８】このようにして本発明の部品実装用基板１
０が完成する。Thus, the component mounting board 1 of the present invention
0 is completed.
【００６９】なお、この部品実装用基板１０に実装する
電子部品が電磁波を発生させないものか、微小量に止ま
るものである場合は、その電子部品に電磁遮蔽を施す必
要は無いので、前記電磁波吸収材層１４を施す工程を省
略してもよい。従って、この場合の部品実装用基板１０
としては、前記電磁波吸収材層１４が無いものとなる。When the electronic components mounted on the component mounting board 10 do not generate electromagnetic waves or are small in amount, there is no need to apply electromagnetic shielding to the electronic components. The step of applying the material layer 14 may be omitted. Therefore, in this case, the component mounting substrate 10
As a result, there is no electromagnetic wave absorbing material layer 14.
【００７０】次に、図１Ｆに示したように、電子部品の
一つである複数の電極端子がアクティブ面に形成されて
いるＩＣチップ２１を金属半田、樹脂などの接続材２２
を用いてダイパッド部１２Ａの金メッキ層に固定し、前
記複数本の各電極端子を金線２３を用いて各接続電極部
１２Ｂにワイヤボンドして接続し、実装する。Next, as shown in FIG. 1F, an IC chip 21 having a plurality of electrode terminals, which are one of the electronic components, formed on an active surface is connected to a connecting material 22 such as metal solder or resin.
Is fixed to the gold plating layer of the die pad portion 12A, and each of the plurality of electrode terminals is wire-bonded to each connection electrode portion 12B using the gold wire 23 and mounted.
【００７１】そして、図１Ｇに示したように、各接続電
極部１２Ｂ側に接続されている外部リード１５の端部の
一部分を含めて、それらの内部に存在するＩＣチップ２
１、接続材２２、金線２３、ダイパッド部１２Ａ、電気
絶縁樹脂被膜層１３、電磁波吸収材層１４の部分に封止
絶縁樹脂２４を注入、充填し、その後、加熱硬化させて
封止する。As shown in FIG. 1G, the IC chips 2 existing inside the external leads 15 including a part of the ends of the external leads 15 connected to the respective connection electrode portions 12B are included.
1. A sealing insulating resin 24 is injected and filled into portions of the connecting material 22, the gold wire 23, the die pad portion 12A, the electric insulating resin coating layer 13, and the electromagnetic wave absorbing material layer 14, and then heat-cured for sealing.
【００７２】このようにして本発明の一実施形態のＩＣ
装置２０が得られる。As described above, the IC according to one embodiment of the present invention
The device 20 is obtained.
【００７３】次に、このようなＩＣ装置２０は、電子回
路基板Ｐに最終的に実装されることから、図２に示した
ように、全ての外部リード１５は前記電磁波吸収材層１
４側に折り曲げられる。なお、図２に示したＩＣ装置２
０は図１Ｇに図示のＩＣ装置２０を上下を反転させた状
態で図示したものである。Next, since such an IC device 20 is finally mounted on the electronic circuit board P, as shown in FIG. 2, all the external leads 15 are connected to the electromagnetic wave absorbing material layer 1.
Folded to four sides. The IC device 2 shown in FIG.
Reference numeral 0 denotes the IC device 20 shown in FIG. 1G in a state where the IC device 20 is turned upside down.
【００７４】このように外部リード１５の折り曲げ加工
を施すことにより、この形状のＩＣ装置２０を図３に示
したように電子回路基板Ｐの電極部Ｃｂに金属半田を用
いて表面実装すると、その電磁波吸収材層１４がＩＣチ
ップ２１の直下に存在することになり、ＩＣチップ２１
から放射される電磁波を遮断し、電子回路基板Ｐ上に形
成されている電子回路部Ｃａに悪影響を及ぼすことがな
い。By bending the external leads 15 in this manner, when the IC device 20 having this shape is surface-mounted on the electrode portion Cb of the electronic circuit board P using metal solder as shown in FIG. The electromagnetic wave absorbing material layer 14 exists immediately below the IC chip 21, and the IC chip 21
This shields electromagnetic waves radiated from the electronic circuit portion P and does not adversely affect the electronic circuit portion Ca formed on the electronic circuit board P.
【００７５】なお、このダイパッド部１２Ａに実装する
ＩＣチップ２１が電磁波を発生させないものか、極微小
量に留まるものである場合は、そのＩＣチップ２１に電
磁遮蔽を施す必要は無いことから、前記電磁波吸収材層
１４が無く、厚みがより薄いＩＣ装置２０として構成す
ることができる。If the IC chip 21 mounted on the die pad portion 12A does not generate an electromagnetic wave or stays in an extremely small amount, it is not necessary to apply electromagnetic shielding to the IC chip 21. It is possible to configure the IC device 20 having no electromagnetic wave absorbing material layer 14 and a smaller thickness.
【００７６】また、図３に示したように、電子回路基板
Ｐ側とは反対側にもＩＣ装置２０から矢印で示したよう
に電磁波が放出されるが、この電磁波の放出による悪影
響を防止するためには、このＩＣ装置２０が実装された
電子回路基板Ｐを搭載する電子機器側で対策を講じるこ
とができる。即ち、外付けでＩＣ装置２０の電子回路基
板Ｐ側とは反対側の封止絶縁樹脂２４の表面を電磁波遮
蔽板（不図示）で覆うことにより解決することができ
る。As shown in FIG. 3, electromagnetic waves are also emitted from the IC device 20 to the side opposite to the electronic circuit board P side, as indicated by arrows, but the adverse effects due to the emission of the electromagnetic waves are prevented. For this purpose, a countermeasure can be taken on the electronic device side on which the electronic circuit board P on which the IC device 20 is mounted. That is, the problem can be solved by externally covering the surface of the sealing insulating resin 24 on the side opposite to the electronic circuit board P side of the IC device 20 with an electromagnetic wave shielding plate (not shown).
【００７７】前記の実施形態の製造工程では、図示の工
程の他に、洗浄工程、マスキング工程、カッティング工
程などがあるが、図１は主工程のみを示したものであ
り、他の工程は省略したことを付言しておく。In the manufacturing process of the above-described embodiment, there are a cleaning process, a masking process, a cutting process, and the like in addition to the illustrated processes. FIG. 1 shows only the main process, and other processes are omitted. I will add that
【００７８】また、前記の実施形態の電子部品装置で
は、電子部品としてＩＣチップを採り上げたが、本発明
においては、ＩＣチップのみに限定されるものではな
く、他の能動素子であってもよく、また、能動素子のみ
ではなく、受動素子のみ、或いは両者が混在した状態の
電子部品であってもよく、また、電子部品装置としては
単品の電子部品が実装されたものに限定されるものでは
なく、複数の、及び又は異なる形式の電子部品を集積し
て構成された集積型電子部品装置であってもよく、従っ
て、本発明の部品実装用基板１０の構成、構造、特に配
線回路電極部１２のそれらも異なってくることを付言し
ておく。Further, in the electronic component device of the above embodiment, an IC chip is used as an electronic component. However, in the present invention, the present invention is not limited to the IC chip alone, and other active elements may be used. In addition, not only the active element but also the passive element alone or an electronic component in which both are mixed may be used, and the electronic component device is not limited to a device in which a single electronic component is mounted. Instead, an integrated electronic component device configured by integrating a plurality of and / or different types of electronic components may be used. Therefore, the configuration and structure of the component mounting board 10 of the present invention, particularly the wiring circuit electrode portion It should be noted that those of the 12 also differ.
【００７９】[0079]
【発明の効果】以上説明したように、本発明によれば、 １．フォトプロセスに電解メッキを使用して配線回路を
形成する方法を採ったので、従来技術のように銅箔をエ
ッチングして得られた部品実装用基板より高精度の微細
な配線ラインが得られる ２．パッケージの下面側に電磁波吸収材を封入したこと
から、ＩＣチップの下方への電磁波の放射が防止できる
ので、回路干渉を心配することなく回路設計ができ、設
計効率の向上を図ることができる など、数々の優れた効果が得られる。As described above, according to the present invention, there are provided: Since a method of forming a wiring circuit by using electrolytic plating in the photo process is employed, a fine wiring line with higher precision than a component mounting substrate obtained by etching a copper foil as in the related art can be obtained. . Since the electromagnetic wave absorbing material is sealed on the lower surface side of the package, radiation of electromagnetic waves below the IC chip can be prevented, so that circuit design can be performed without worrying about circuit interference and design efficiency can be improved. Many excellent effects can be obtained.
【図１】 本発明の一実施形態の部品実装用基板、ＩＣ
装置及びその製造方法を説明するための製造工程図であ
る。FIG. 1 shows a component mounting board and an IC according to an embodiment of the present invention.
It is a manufacturing process figure for explaining a device and its manufacturing method.
【図２】 本発明の一実施形態のＩＣ装置（電子部品装
置）の側面図である。FIG. 2 is a side view of an IC device (electronic component device) according to an embodiment of the present invention.
【図３】 図２に示したＩＣ装置を電子回路基板に実装
した状態を示す側面図である。FIG. 3 is a side view showing a state where the IC device shown in FIG. 2 is mounted on an electronic circuit board.
【図４】 従来技術の部品実装用基板にＩＣチップを実
装した状態を示す封止絶縁樹脂で封止する前の状態のＩ
Ｃ装置の断面側面図である。FIG. 4 shows a state in which an IC chip is mounted on a component mounting board according to the prior art, which is in a state before being sealed with a sealing insulating resin.
It is sectional side view of C apparatus.
【図５】 図４に示したＩＣチップを封止絶縁樹脂で封
止したＩＣ装置を電子回路基板に実装した状態を示した
側面図である。5 is a side view showing a state in which the IC device in which the IC chip shown in FIG. 4 is sealed with a sealing insulating resin is mounted on an electronic circuit board.
１０…本発明の一実施形態の部品実装用基板、１１…金
属板、１２…配線回路電極部、１２Ａ…ダイパッド部、
１２Ｂ…接続電極部、１３…電気絶縁樹脂被膜層、１４
…電磁波吸収材層、１５…外部リード部、２０…本発明
の一実施形態のＩＣ装置（電子部品装置）、２１…ＩＣ
チップ、２２…接続材、２３…金線、２４…封止絶縁樹
脂、Ｐ…電子回路基板、Ｃａ…配線回路部、Ｃｂ…電極
部10: Component mounting board according to one embodiment of the present invention, 11: metal plate, 12: wiring circuit electrode portion, 12A: die pad portion,
12B: connection electrode portion, 13: electric insulating resin coating layer, 14
... Electromagnetic wave absorbing material layer, 15 ... External lead part, 20 ... IC device (electronic component device) of one embodiment of the present invention, 21 ... IC
Chip, 22 connecting material, 23 gold wire, 24 sealing insulating resin, P electronic circuit board, Ca wiring circuit section, Cb electrode section
───────────────────────────────────────────────────── フロントページの続き (72)発明者 草野 英俊 東京都品川区北品川６丁目７番35号ソニー 株式会社内 Ｆターム(参考） 5E321 AA17 GG11 5F067 AA00 AA01 BD08 CC02 DA05 DA16 DC11 DC14 DC17 DC19 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Hidetoshi Kusano 6-35, Kita-Shinagawa, Shinagawa-ku, Tokyo F-term within Sony Corporation (reference) 5E321 AA17 GG11 5F067 AA00 AA01 BD08 CC02 DA05 DA16 DC11 DC14 DC17 DC19
Claims (20)
された複数の配線回路電極部が電気絶縁樹脂被膜層で裏
打ちされていることを特徴とする部品実装用基板。1. A component mounting board, wherein a plurality of wiring circuit electrode portions electrically separated and formed of a metal plating layer are lined with an electrically insulating resin coating layer.
層が形成されていることを特徴とする請求項１に記載の
部品実装用基板。2. The component mounting board according to claim 1, wherein an electromagnetic wave absorbing material layer is formed on a surface of the insulating resin film.
属層で積層されていることを特徴とする請求項１に記載
の部品実装用基板。3. The component mounting board according to claim 1, wherein said metal plating layer is laminated with a plurality of electrically conductive metal layers.
イパッドの外周部に配設された複数の接続電極とから構
成されていることを特徴とする請求項１に記載の部品実
装用基板。4. The component mounting board according to claim 1, wherein the wiring circuit electrode portion is composed of a die pad and a plurality of connection electrodes disposed on an outer peripheral portion of the die pad.
層側とは反対側の面に外部リードが接続されていること
を特徴とする請求項４に記載の部品実装用基板。5. The component mounting board according to claim 4, wherein an external lead is connected to a surface of the connection electrode portion opposite to the surface of the electrically insulating resin coating layer.
ッキ層の配線回路電極部の前記電気絶縁樹脂被膜側とは
反対側の表面に電子部品が実装されていることを特徴と
する電子部品装置。6. An electronic component device wherein an electronic component is mounted on a surface of a metal plating layer lined with an electrically insulating resin film opposite to the electrically insulating resin film side of a wiring circuit electrode portion. .
ッキ層の配線回路電極部の該電気絶縁樹脂被膜の表面に
電磁波吸収材層が形成されており、前記配線回路電極部
の前記電気絶縁樹脂被膜層とは反対側の表面に電子部品
が実装されていることを特徴とする電子部品装置。7. An electromagnetic wave absorbing material layer is formed on a surface of said electric insulating resin film of a wiring circuit electrode portion of a metal plating layer lined with an electric insulating resin film, and said electric insulating resin of said wiring circuit electrode portion is formed. An electronic component device, wherein an electronic component is mounted on a surface opposite to the coating layer.
属層で積層されていることを特徴とする請求項６または
請求項７に記載の電子部品装置。8. The electronic component device according to claim 6, wherein said metal plating layer is laminated with a plurality of electrically conductive metal layers.
線回路電極部の前記電気絶縁樹脂被膜層側とは反対側の
面に外部リードが接続されていることを特徴とする請求
項６または請求項７に記載の電子部品装置。9. An external lead is connected to a surface of the wiring circuit electrode portion to which an electrode terminal of the electronic component is connected, the surface being opposite to the side of the electrically insulating resin coating layer. The electronic component device according to claim 7.
キ層、該第１ニッケルメッキ層の表面に成膜された金メ
ッキ層、該金メッキ層の表面に成膜された第２ニッケル
メッキ層、該第２ニッケルメッキ層の表面に成膜された
銅メッキ層を含んでおり、該銅メッキ層の表面側から前
記電気絶縁樹脂被膜層が裏打ちされていることを特徴と
する請求項１、請求項６、または請求項７に記載の電子
部品装置。10. The metal plating layer is a first nickel plating layer, a gold plating layer formed on a surface of the first nickel plating layer, a second nickel plating layer formed on a surface of the gold plating layer, 7. A copper plating layer formed on a surface of a nickel plating layer, wherein the electrically insulating resin coating layer is lined from the surface side of the copper plating layer. An electronic component device according to claim 7.
脂被膜層、そして前記電子部品が封止絶縁樹脂で封止さ
れていることを特徴とする請求項６に記載の電子部品装
置。11. The electronic component device according to claim 6, wherein the wiring circuit electrode portion, the electrical insulating resin coating layer, and the electronic component are sealed with a sealing insulating resin.
脂被膜層、前記電磁波吸収材層、及び前記電子部品が封
止絶縁樹脂で封止されていることを特徴とする請求項７
に記載の電子部品装置。12. The wiring circuit electrode portion, the electrical insulating resin coating layer, the electromagnetic wave absorbing material layer, and the electronic component are sealed with a sealing insulating resin.
An electronic component device according to claim 1.
ダイパッドの外周部に配設された複数の接続電極とから
構成されていることを特徴とする請求項６または請求項
７に記載の電子部品装置。13. The electronic component according to claim 6, wherein the wiring circuit electrode portion includes a die pad and a plurality of connection electrodes disposed on an outer peripheral portion of the die pad. apparatus.
れている複数の電極端子を備えた半導体集積回路チップ
であり、前記本体が前記ダイパッドに、前記各電極端子
が前記各接続電極に接続された状態で前記半導体集積回
路チップが前記配線回路電極部に実装されていることを
特徴とする請求項１３に記載の電子部品装置。14. A semiconductor integrated circuit chip comprising: a main body; and a plurality of electrode terminals formed on the main body, wherein the main body is connected to the die pad, and each of the electrode terminals is connected to each of the connection electrodes. 14. The electronic component device according to claim 13, wherein the semiconductor integrated circuit chip is mounted on the wiring circuit electrode portion in a state where the electronic component device is mounted.
電極端子を備えた半導体集積回路チップが実装基板に実
装されて、封止絶縁樹脂で封止された電子部品装置にお
いて、 前記実装基板が複数の配線回路電極部、電気絶縁樹脂被
膜層、電磁波吸収材層から構成されており、 該配線回路電極部は更にダイパッドと複数の接続電極と
複数の外部リードで構成されており、 前記電気絶縁樹脂被膜層は前記複数の配線回路電極部に
裏打ちされており、 前記電磁波吸収材層は前記絶縁樹脂被膜層の表面に形成
されており、 前記半導体集積回路チップの前記本体が前記部品実装用
基板の前記ダイパッドの他の一面に、前記各電極端子が
前記各接続電極の他の一面に接続、実装されており、 そして前記外部リードが前記電磁波吸収材層が形成され
ている側に折り曲げられていることを特徴とする電子部
品装置。15. An electronic component device in which a semiconductor integrated circuit chip having a main body and a plurality of electrode terminals formed on the main body is mounted on a mounting substrate and sealed with a sealing insulating resin. Comprises a plurality of wiring circuit electrode portions, an electrically insulating resin coating layer, and an electromagnetic wave absorbing material layer. The wiring circuit electrode portion further comprises a die pad, a plurality of connection electrodes, and a plurality of external leads. An insulating resin coating layer is lined with the plurality of wiring circuit electrode portions, the electromagnetic wave absorbing material layer is formed on a surface of the insulating resin coating layer, and the main body of the semiconductor integrated circuit chip is used for mounting the component. On the other surface of the die pad of the substrate, the electrode terminals are connected and mounted on the other surface of the connection electrodes, and the external leads are formed with the electromagnetic wave absorbing material layer. An electronic component device which is bent to the side.
回路電極部を形成する第１工程と、 該配線回路電極部の表面に電気絶縁樹脂被膜層を形成す
る第２工程と、 前記金属板の他の一面側から前記金属メッキ層が露出す
るようその金属板面の一部を除去する第３工程とを含む
部品実装用基板の製造方法。16. A first step of forming a wiring circuit electrode portion on one surface of a metal plate by metal plating, a second step of forming an electrically insulating resin coating layer on a surface of the wiring circuit electrode portion, A third step of removing a part of the metal plate surface so that the metal plating layer is exposed from the other surface side.
回路電極部を形成する第１工程と、 該配線回路電極部の表面に電気絶縁樹脂被膜層を形成す
る第２工程と、 該電気絶縁樹脂被膜層の表面に電磁波吸収材層を形成す
る第３工程と、 前記金属板の他の一面側から前記金属メッキ層が露出す
るよう、その金属板面の一部を除去する第４工程とを含
む部品実装用基板の製造方法。17. A first step of forming a wiring circuit electrode portion on one surface of a metal plate by metal plating, a second step of forming an electrically insulating resin coating layer on a surface of the wiring circuit electrode portion, A third step of forming an electromagnetic wave absorbing material layer on the surface of the coating layer; and a fourth step of removing a part of the metal plate surface so that the metal plating layer is exposed from the other side of the metal plate. A method for manufacturing a component mounting board, including
回路電極部を形成する第１工程と、 該配線回路電極部の表面に電気絶縁樹脂被膜層を形成す
る第２工程と、 前記金属板の他の一面側から前記金属メッキ層が露出す
るよう、その金属板面の一部を除去する第３工程と、 該露出した金属メッキ層の面に電子部品を接続する第４
工程と、 前記配線回路電極部、前記電気絶縁樹脂被膜層、前記電
子部品を封止絶縁樹脂で封止する第５工程とを含む電子
部品装置の製造方法。18. A first step of forming a wiring circuit electrode portion on one surface of a metal plate by metal plating, a second step of forming an electrically insulating resin coating layer on a surface of the wiring circuit electrode portion, A third step of removing a part of the metal plate surface so that the metal plating layer is exposed from the other side, and a fourth step of connecting an electronic component to the exposed surface of the metal plating layer.
And a fifth step of sealing the wiring circuit electrode portion, the electrically insulating resin film layer, and the electronic component with a sealing insulating resin.
回路電極部を形成する第１工程と、 該配線回路電極部の表面に電気絶縁樹脂被膜層を形成す
る第２工程と、 該電気絶縁樹脂被膜層の表面に電磁波吸収材層を形成す
る第３工程と、 前記金属板の他の一面側から前記金属メッキ層が露出す
るよう、その金属板面の一部を除去する第４工程と、 該露出した金属メッキ層の面に電子部品を接続する第５
工程と、 前記配線回路電極部、前記電気絶縁樹脂被膜層、前記電
磁波吸収材層、前記電子部品を封止絶縁樹脂で封止する
第６工程と、 前記金属板の残部を前記電磁波吸収材層側に折り曲げる
第７工程とを含む電子部品装置の製造方法。19. A first step of forming a wiring circuit electrode portion on one surface of a metal plate by metal plating, a second step of forming an electrically insulating resin coating layer on the surface of the wiring circuit electrode portion, A third step of forming an electromagnetic wave absorbing material layer on the surface of the coating layer; and a fourth step of removing a part of the metal plate surface so that the metal plating layer is exposed from another side of the metal plate. A fifth step of connecting an electronic component to the exposed surface of the metal plating layer;
And a sixth step of sealing the wiring circuit electrode portion, the electrical insulating resin coating layer, the electromagnetic wave absorbing material layer, and the electronic component with a sealing insulating resin, and the remaining portion of the metal plate is an electromagnetic wave absorbing material layer. And a seventh step of bending to the side.
金属メッキ層が前記銅合金板の表面に成膜された第１ニ
ッケルメッキ層、該第１ニッケルメッキ層の表面に成膜
された金メッキ層、該金メッキ層の表面に成膜された第
２ニッケルメッキ層、該第２ニッケルメッキ層の表面に
成膜された銅メッキ層から構成されていることを特徴と
する請求項１５、請求項１６、請求項１７、または請求
項１８に記載の電子部品装置の製造方法。20. A first nickel plating layer formed on a surface of the copper alloy plate, wherein the metal plate is formed of a copper alloy plate, and the metal plating layer is formed on a surface of the first nickel plating layer. 16. A gold plating layer, a second nickel plating layer formed on a surface of the gold plating layer, and a copper plating layer formed on a surface of the second nickel plating layer. 19. The method for manufacturing an electronic component device according to claim 16, 17 or 18.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001028706A JP2002231874A (en) | 2001-02-05 | 2001-02-05 | Substrate for use in mounting components, electronic component device and methode for manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001028706A JP2002231874A (en) | 2001-02-05 | 2001-02-05 | Substrate for use in mounting components, electronic component device and methode for manufacturing the same |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2002231874A true JP2002231874A (en) | 2002-08-16 |
Family
ID=18893162
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001028706A Pending JP2002231874A (en) | 2001-02-05 | 2001-02-05 | Substrate for use in mounting components, electronic component device and methode for manufacturing the same |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2002231874A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1309069C (en) * | 2003-02-07 | 2007-04-04 | 精工爱普生株式会社 | Semiconductor device and its mfg. method circuit substrate and electronic appts. |
| DE102016103967A1 (en) | 2015-05-25 | 2016-12-01 | Fuji Electric Co., Ltd. | Semiconductor device and manufacturing method thereof |
| DE102016103967B4 (en) | 2015-05-25 | 2024-10-02 | Fuji Electric Co., Ltd. | Semiconductor device and manufacturing method thereof |
-
2001
- 2001-02-05 JP JP2001028706A patent/JP2002231874A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1309069C (en) * | 2003-02-07 | 2007-04-04 | 精工爱普生株式会社 | Semiconductor device and its mfg. method circuit substrate and electronic appts. |
| DE102016103967A1 (en) | 2015-05-25 | 2016-12-01 | Fuji Electric Co., Ltd. | Semiconductor device and manufacturing method thereof |
| US10236244B2 (en) | 2015-05-25 | 2019-03-19 | Fuji Electric Co., Ltd. | Semiconductor device and production method therefor |
| DE102016103967B4 (en) | 2015-05-25 | 2024-10-02 | Fuji Electric Co., Ltd. | Semiconductor device and manufacturing method thereof |
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