JP2002223036A - Semiconductor laser element and method for manufacturing it - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor laser element in which a lower-part laser and an upper-part laser can emit light surely independently of each other, and to provide a method for manufacturing it. SOLUTION: The lower-part laser 50 is formed in an n-type GaAs substrate 1, and the upper-part laser 60 is formed on the lower-part laser 50. The upper- part laser 60 generates an oscillation wavelength which is different from that of the lower-part laser 50. The current constriction layer of the lower-part laser 50 is composed of an n-type Al0.7GaAs part 9, an n-type GaAs 10 and a p-type GaAs 11. The current constitution layer of the upper-part laser 60 is an n-type GaAs current constriction layer 24.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor laser device used for, for example, an optical information recording / reproducing system and a method for manufacturing the same.

[0002]

2. Description of the Related Art In recent years, semiconductor laser devices have been actively researched and developed as key devices for optical information recording / reproducing systems. In this context, DVDs (digital versatile discs) have been put into practical use from CDs (compact discs) due to demands for higher density and larger capacity. And
There is a demand for a DVD optical information recording / reproducing system to be able to reproduce CDs and read CD data in order to inherit and utilize the optical information recording / reproducing systems and data up to now.

A DVD pickup uses a semiconductor laser having a wavelength band of 635 to 650 nm. on the other hand,
A pickup for a CD uses a 780 nm semiconductor laser. Generally, the shorter the wavelength, the smaller the beam diameter of the readout light.
Even with m-band semiconductor lasers, most CDs, for example, music CDs, CD-ROMs (read only memories),
Although it is possible to read CD data, the reflectance of the recording surface of a CD-R (recordable) is 635-65.
Low for light with a wavelength of 0 nm, CD-R reproduction, CD
-R data cannot be read.

Therefore, in order to enable reproduction and data reading from both DVD and CD, a pickup having two semiconductor lasers in one pickup has been devised and put into practical use. However, as a result of incorporating two semiconductor lasers in one pickup, there is a problem that the size of the pickup increases, and there is a problem that the cost increases due to an increase in the number of parts.

Conventionally, as a semiconductor laser device for solving these problems, for example, Japanese Unexamined Patent Publication No.
Japanese Patent Publication No. 8 (JP-A) No. 8 discloses an example. JP-A-11-112108
19, a lower laser 1050 and an upper laser 1060 formed on the lower laser 1050 and emitting light having a wavelength different from the wavelength of light emitted from the lower laser 1050, as shown in FIG. And That is, the semiconductor laser device of FIG. 19 includes two light emitting regions each emitting light of a different wavelength.

[0006] The lower laser 1050 is made of n-type GaAs.
Substrate 1011, n-type AlGaInP cladding layer 101
2. GaInP well layer, AlGaInP barrier layer and A
Quantum well active layer 101 composed of lGaInP guide layer
3. First p-type AlGaInP cladding layer 1014, Al
GaInP etching stop layer 1015, second p-type A
1GaInP cladding layer 1016, n-type GaAs block layer 1017, and p-type GaAs contact layer 1018
It is composed of The upper laser 1060 is
p-type AlGaAs cladding layer 1022, AlGaAs active layer 1023, first n-type AlGaAs cladding layer 102
4. AlGaAs etching stop layer 1025, second
n-type AlGaAs cladding layer 1026, p-type GaAs block layer 1027, and n-type GaAs contact layer 10
Consists of 28. Reference numerals 1032 and 1036 denote n (-) electrodes, and 1034 denotes a p (+) electrode.

[0007]

However, FIG.
Since the current blocking layer (current constriction layer) 1027 of the upper laser 1060 is of a p-type,
There is a disadvantage that the upper laser 1060 is easily turned on, and current leakage is likely to occur in the upper laser 1060.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a semiconductor laser device and a method of manufacturing the same, which can surely emit light from a lower laser and an upper laser independently of each other.

[0009]

According to the present invention, there is provided a semiconductor laser device comprising: a first laser section formed on a substrate; and a first laser section formed on the first laser section. 1. A one-chip semiconductor laser device having at least a second laser section for generating a laser beam having a wavelength different from the wavelength of the laser beam of the section, wherein the semiconductor laser element comprises a conductive layer for the current constriction layers of the first laser section and the second laser section. It is characterized in that the type is n-type.

According to the semiconductor laser device having the above-described structure, the conductivity type of the current confinement layers of the first laser portion and the second laser portion is n-type, so that the second laser portion emits light. In addition, the current confinement layer of the second laser unit is less likely to be turned on, and current leakage does not occur in the second laser unit. Further, the first laser unit and the second laser unit can emit light independently and reliably.

In one embodiment of the present invention, the first laser portion and the second laser portion have ridge stripes substantially parallel to each other in a buried ridge structure.

As a result, the same good characteristics as those of a normal one-chip one-wavelength laser can be obtained.

In one embodiment, the semiconductor laser device is located above the ridge stripe of the first laser unit, is substantially parallel to the ridge stripe of the first and second laser units, and is located on the second laser unit. A groove having a depth deeper than the light emitting layer and not blocking the current path of the first laser unit;

According to the semiconductor laser device of the one embodiment, by forming the groove, the ungrown portion and the p-type inverted portion located above the ridge stripe of the first laser portion are removed. As a result, it is possible to reliably prevent a current leak from occurring in the second laser section.

In one embodiment of the present invention, the upper surface electrode of the first laser portion and the upper surface electrode of the second laser portion are separated so as to have a step, and the second electrode portion has a second step.
The upper surface electrode of the laser unit and the lower surface electrode of the second laser unit are separated so as to have a step.

Thus, an optimal ohmic electrode can be formed for each contact layer of the upper electrode of the first laser unit, the upper electrode of the second laser unit, and the lower electrode of the second laser unit.

In one embodiment of the present invention, the P electrode, which is the upper electrode of the first laser section, and the N electrode, which is the lower electrode of the second laser section, are common electrodes.

As a result, the number of lead bonds can be reduced, the lead bond area is widened, and the process can be simplified.

In one embodiment of the present invention, the growth temperature of the second laser portion is lower than the growth temperature of the first laser portion.

Thus, the dopant diffusion in the first laser section can be suppressed. As a method for enabling the low-temperature growth of the second laser portion, for example, there is a molecular beam epitaxy (hereinafter, referred to as MBE) method.

In one embodiment of the present invention, the second laser portion is grown by a solid source molecular beam epitaxy method.

Thus, the first laser section is made of AlGa.
Even in the case of an InP-based material, active hydrogen decomposed during the growth of the second laser portion does not make the p-type dopant (impurity) of the first laser portion inactive. Therefore, a decrease in the carrier concentration in the first laser section can be prevented.

In one embodiment of the present invention, a method of manufacturing a semiconductor laser device comprises the steps of: forming upper electrodes of the first and second laser portions;
A negative resist is used in the photolithography process for providing the lower surface electrode of the laser unit.

As a result, unlike the case where a positive resist is used in the above-described photolithography process, no resist remains due to insufficient UV exposure on the side wall of the step.
Unnecessary electrode material does not remain. That is, since a negative resist is used in the photolithography process for providing the upper surface electrodes of the first and second laser portions and the lower surface electrode of the second laser portion, there is a step on the upper surfaces of the first and second laser portions. However, no resist remains on the side wall of the step, and unnecessary electrode material can be completely removed, so that the occurrence of current leakage can be reliably prevented.

The manufacturing method of the semiconductor laser element of one embodiment, the surface treatment and resist removal after development in the photolithography process is carried out by UV-O ₃ ashing.

Thus, even if a negative resist is used in the photolithography process, damage to the semiconductor layer can be prevented, and the resist can be completely removed.

If the surface treatment after development in the photolithography step is a strong treatment such as plasma ashing, the semiconductor layer will be damaged. In addition, a strong process such as plasma ashing damages the semiconductor layer even when removing the resist. Further, the resist cannot be completely removed by ordinary organic cleaning or remover processing.

[0028]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a semiconductor laser device according to the present invention will be described in detail with reference to the illustrated embodiments.

FIG. 1 is a view showing the structure of a semiconductor laser device according to one embodiment of the present invention. As shown in FIG. 1, this semiconductor laser device is a one-chip semiconductor laser device, and includes a lower laser 50 as a first laser portion formed on an n-type GaAs substrate 1 and a lower laser 50 on the lower laser 50. An upper laser 60 as a second laser unit which is formed and generates a laser beam having a wavelength different from the wavelength of the laser beam of the lower laser 50 is provided. The lower laser 50 and the upper laser 60 are formed with parallel ridge stripes 51 and 61 having a buried ridge structure.

The lower laser 50 comprises an n-type GaAs buffer layer 2, an n-type Al _0.5 GaAs cladding layer 3, a non-doped AlGaAs MQW (Multiple Quantum Well) active layer 4 as a light emitting layer, a p-type Al
_{A 0.5} GaAs first cladding layer 5 and a p-type GaAs etching stop layer 6 are provided on an n-type GaAs substrate 1. A ridge stripe 51 is provided on the p-type GaAs etching stop layer 6. The ridge stripe 51 includes a p-type Al _0.5 GaAs second cladding layer 7 and a p-type GaAs cap layer 8. The ridge stripe 51 is made of n-type Al.
_0.7 GaAs layer 9, n-type GaAs layer 10, and p-type G
It is sandwiched from both sides by a current confinement layer 52 made of the aAs layer 11. That is, both side surfaces of the ridge stripe 51 are buried with the current confinement layer 52. On the ridge stripe 51 and the current confinement layer 52, a p-type GaAs contact layer 12, a non-doped Al
_0.5 GaAs etching stop layers 13 are sequentially stacked.

The upper laser 60 is made of n-type GaAs.
s contact layer 14, n-type GaAs buffer layer 15,
n-type GaInP buffer layer 16, n-type (Al _0.72
Ga) InP clad layer 17, non-doped GaInP / AlGaInPMQW active layer 18 as a light emitting layer, p-type (Al _0.72 Ga) InP first clad layer 19, and non-doped GaInP etching stop layer 20. Then, on the non-doped GaInP etching stop layer 20, p-type (Al _0.72 Ga) In
P second cladding layer 21, p-type GaInP intermediate layer 22, p
A ridge stripe 61 composed of the type GaAs cap layer 23 is provided. This ridge stripe 61 is n
The GaAs current confinement layer 24 is sandwiched from both sides. That is, both sides of the ridge stripe 61 are n
GaAs current confinement layer 24 is embedded. Also,
The ridge stripe 61 is provided so as to be separated from the ridge stripe 51 of the lower laser 50 by 10 μm or more in the lateral direction. A p-type GaAs contact layer 25 is provided on the ridge stripe 51 and the current confinement layer 24.

The N (-) electrode of the lower laser 50 is provided under the n-type GaAs substrate 1 and is composed of AnGe / Ni
It is composed of an electrode 26 and a Mo / Au electrode 27. Then, as a P (+) electrode of the lower laser 50, an Au / AuZn electrode 31 is provided in a portion where the portion above the p-type GaAs contact layer 12 is removed by etching. on the other hand,
As an N electrode of the upper laser 60, an AuGe electrode 30 is provided in a portion where the upper portion of the n-type GaAs buffer layer 15 is selectively etched away. The P electrode of the upper laser 60 is composed of the Au / AuZn electrode 28 and Mo.
/ Au electrode 29 and is provided on the p-type GaAs contact layer 25. Here, the above Au / AuZ
The electrode composed of the n-electrode 28 and the Mo / Au electrode 29 is the upper electrode of the upper laser 60. The AuGe electrode 30 is a lower electrode of the upper laser 60, and Au / Au
The Zn electrode 31 is an upper electrode of the lower laser 50. The upper surface electrode of the upper laser 60 is an electrode on the side opposite to the n-type GaAs substrate 1, and the lower surface electrode of the upper laser 60 is an electrode on the n-type GaAs substrate 1 side.
The upper electrode of the lower laser 50 is n-type GaAs.
The electrode on the opposite side of the substrate 1.

In order to use the N electrode of the upper laser 60 and the P electrode of the lower laser 50 as a common electrode, A
Mo is applied on the uGe electrode 30 and the Au / AuZn electrode 31.
/ Au electrode 32 is provided. As described above, the P electrode, which is the upper electrode of the lower laser 50, and the upper laser 60
By using the N-electrode, which is the lower surface electrode, as a common electrode, the number of lead bonds can be reduced, the lead bond area is widened, and the process can be simplified.

In the upper laser 60, a groove 33 is formed in a portion of the lower laser 50 located above the ridge stripe 51. This groove 33 is made of Mo / A
n-type GaInP buffer layer 16
Up to the top.

The semiconductor laser device having the above structure can be manufactured as follows.

First, as shown in FIG. 2, MOCVD is performed on the n-type GaAs substrate 1 at a growth temperature of 665 to 750 ° C.
Do with. Thus, on the n-type GaAs substrate 1, an n-type GaAs buffer layer 2 having a thickness of 0.5 μm and a thickness of 1..
6 μm n-type Al _0.5 GaAs cladding layer 3 and 60 ° thick Al _0.27 G as non-doped MQW active layer 4
aAs + (100 mm thick Al _0.128 GaAs ×
8, Al _{0 . 35} GaAs x 7) + thickness 6
0% Al _0.27 GaAs, p-type Al _0.5 GaAs
First cladding layer 5, p-type GaAs etching stop layer 6 having a thickness of 28 °, p-type Al _0.5 G having a thickness of 1.23 μm
An aAs second cladding layer 107 and a p-type GaAs cap layer 108 having a thickness of 0.75 μm are sequentially grown.

Next, the p-type Al _0.5 GaAs second cladding layer 107 is formed by photolithography and etching.
Then, the p-type GaAs cap layer 108 is formed in a ridge shape, and the ridge stripe 51 as shown in FIG.
Provided on the aAs etching stop layer 6. here,
Using a mixture of sulfuric acid and hydrogen peroxide, p-type Al _{. 5}
After the etching is performed partway through the GaAs second cladding layer 107, the etching is stopped at the p-type GaAs etching stop layer 6 using hydrofluoric acid having selectivity for GaAs. Reference numeral 34 in FIG. 3 denotes a resist mask formed by the photolithography.

Subsequently, as shown in FIG. 4, the resist mask 34 is removed, and a second MOCVD is performed at a growth temperature of 6 ° C.
Perform at 85-750 ° C. Thereby, the above-mentioned p-type GaAs
1.0 μm thick n-type A on the etching stop layer 6
l _0.7 GaAs layer 9, 0.3 μm thick n-type GaAs
A layer 10 and a p-type GaAs layer 11 having a thickness of 0.65 μm are sequentially laminated to form current confinement layers 52 on both sides of the ridge stripe 51. That is, the side surface of the ridge stripe 51 is embedded. At this time, with the formation of the current confinement layer 52, the ridge stripe 51 is formed.
The unnecessary layer 36 is laminated thereon.

Subsequently, as shown in FIG. 5, after a resist mask 35 is laminated on the current confinement layer 52, the unnecessary layer 36 exposed from the resist opening is completely removed using the resist mask 35 as a mask. Remove by etching.
That is, the etching removal is performed until the surface of the p-type GaAs cap layer 8 is exposed. Here, etching removal is performed with a time control using a mixed solution of sulfuric acid and hydrogen peroxide solution.

Next, as shown in FIG. 6, after the resist mask 35 is removed, a third MOCVD is performed at a growth temperature of 585 to 700 ° C. As a result, a 5.5 μm thick p-type GaAs contact layer 12, a 100 ° thick non-doped Al _0.5 GaAs etching stop layer 113, are formed on the ridge stripe 51 and the current confinement layer 52.
And n-type GaAs contact layer 114 having a thickness of 2.0 μm
Grow sequentially.

Next, after performing a sulfuric acid treatment as a growth pretreatment, a solid source MBE method is performed at a growth temperature of 480 to 490 ° C.
Do with. As a result, as shown in FIG.
An n-type Ga layer having a thickness of 0.25 μm is formed on the contact layer 114.
As buffer layer 115, n-type Ga having a thickness of 0.25 μm
InP buffer layer 116, n-type (A
l _0.72 Ga) InP cladding layer 117 and 500 nm thick (Al _0.5
Ga) InP + (50 mm thick InGaP × 4, thickness 5)
0 ° (Al _0.5 Ga) InP × 3) + thickness 500 °
(Al _0.5 Ga) InP, 0.17 μm-thick p-type (Al _0.72 Ga) InPInP first cladding layer 11
9, a non-doped GaInP etching stop layer 120 having a thickness of 80 ° and a p-type (Al _0.72
Ga) InP second cladding layer 121, p-type GaInP intermediate layer 122, and p-type GaAs cap layer 123 are sequentially grown.

Next, as shown in FIG. 8, an alumina film having a thickness of 1500 ° was formed by p-type Ga by electron beam (EB) evaporation.
After being vapor-deposited on the surface of the As cap layer 123, a p-type (Al _0.72 G
a) The InP second cladding layer 21, the p-type GaInP intermediate layer 22, and the p-type GaAs cap layer 23 are formed in a ridge shape. Thus, the ridge stripe 61 is formed on the non-doped GaInP etching stop layer 120. At this time, the ridge stripe 61 is provided so as to be separated from the ridge stripe 51 of the lower laser 50 by 10 μm or more in the horizontal direction. Here, a mixed solution of sulfuric acid and hydrogen peroxide is used to form the p-type GaAs cap layer 123.
Is etched. Thereafter, using a mixed solution of bromine and phosphoric acid, the p-type GaInP intermediate layer 122 and the p-type (Al
_0.72 Ga) Etching is performed partway through the InP second cladding layer 21. Then, the etching is stopped at the non-doped GaInP etching stop layer 120 using phosphoric acid having selectivity to GaInP. In FIG. 8, reference numeral 37 denotes a patterned alumina film;
Is a resist mask.

Next, as shown in FIG. 9, after removing the resist mask 38, a second solid source MBE method is performed at a growth temperature of 600.degree. Thereby, n-type Ga of 1.58 μm thickness is formed on both sides of the ridge stripe 61.
An As current confinement layer 24 is formed. That is, the ridge stripe 61 is embedded. At this time, the unnecessary layer 40 is laminated on the alumina film 37 with the formation of the n-type GaAs current confinement layer 24.

Subsequently, as shown in FIG. 10, the unnecessary layer 40 exposed from the resist opening is completely removed by etching using the resist mask 39 as a mask. That is, the etching removal is performed until the surface of the alumina film 37 is exposed. Here, etching is stopped at the alumina film 37 using a mixed solution of sulfuric acid and hydrogen peroxide having selectivity to the alumina film.

Next, as shown in FIG. 11, after removing the resist mask 39, the alumina film 37 is removed with hydrofluoric acid. Then, by performing the third solid source MBE growth method at a growth temperature of 600 ° C., a 4.0 μm thick p-type GaAs contact layer 125 is grown on the ridge stripe 61 and the n-type GaAs current confinement layer 124. FIG. 18 is an enlarged structural view of a main part at this time. In FIG. 18, the MBE growth portion located above the ridge stripe 51 of the lower laser 50 is surrounded by a small circle, and the portion surrounded by the small circle, that is, the MBE growth portion is enlarged and shown in a large circle. As shown in the great circle of FIG.
The P-based growth layer above the P buffer layer 116 is not grown because of the unevenness. Further, the n-type GaAs current confinement layer 124 is inverted to the p-type due to a difference in plane orientation due to unevenness particularly when Si is used as a dopant. That is, a pn inversion layer (shaded portion in FIG. 18) is formed in the n-type GaAs current confinement layer 124.

Next, as an electrode forming step, as shown in FIG. 12, photolithography and etching of a rectangular region are performed to form a p-type GaAs contact layer 225,
n-type GaAs current confinement layer 224, non-doped GaInP
Etching stop layer 220, p-type (Al _0.72 G
a) An InP first cladding layer 219, a non-doped MQW active layer 218, an n-type (Al _0.72 Ga) InP cladding layer 217, and an n-type GaInP buffer layer 16 are formed. Here, p-type GaAs is used by using a mixed solution of ammonia and hydrogen peroxide having selectivity for GaInP.
s contact layer 125, n-type GaAs current confinement layer 124
Is removed by etching until reaching the non-doped GaInP etching stop layer 120. And further, GaAs
Non-doped GaInP with hydrochloric acid having selectivity to s
Etching stop layer 120, p-type (Al _0.72 G
a) InPInP first cladding layer 119, non-doped M
QW active layer 18, n-type (Al _0.72 Ga) InP cladding layer 117, and n-type GaInP buffer layer 11
6 is removed by etching. This etching removal is performed until the n-type GaAs buffer layer 115 is exposed.

Further, as shown in FIG. 13, photolithography and etching for a rectangular area are performed to form an n-type GaAs buffer layer 15, an n-type GaAs contact layer 14, and a non-doped Al _0.5 GaAs etching stop layer 13. Form. Here, Al
_The n-type GaAs buffer layer 115 and the n-type GaAs contact layer 114 until the mixed solution of citric acid and hydrogen peroxide having selectivity to _0.5 GaAs reaches the non-doped Al _0.5 GaAs etching stop layer 113. Is removed by etching. Until hydrofluoric acid having selectivity to GaAs reaches the p-type GaAs contact layer 12, non-doped Al _0.5 GaAs is further added.
The etching of the etching stop layer 113 is removed.
Thereafter, a sulfuric acid treatment is performed to remove surface alteration due to resist damage of hydrofluoric acid.

Next, as shown in FIG.
By depositing e and performing photolithography and etching, the AuGe film is patterned to form an AuGe electrode 30 as an N electrode of the upper laser 60. Here, the resist used in the photolithography is a negative resist. This is because, if a positive resist is used in this step, the resist film thickness on the rectangular step becomes thicker than other portions, the ultraviolet light does not penetrate at the time of exposure, the resist remains, and electrode etching occurs. Hindered, leaving a bad electrode layer,
This is because it causes a current leak. Therefore, since the resist used in the photolithography is a negative resist, it is possible to reliably prevent the occurrence of current leakage. The etching is performed with a mixed solution of iodine, ammonium iodide, and ethanol.
Then, surface treatment and resist removal after development when the negative resist used is carried out using a UV-O ₃ asher. Accordingly, the semiconductor layer is not damaged as in the case where plasma ashing is used, and the resist cannot be completely removed as in the case of organic cleaning or remover processing. That is, the resist can be completely and reliably removed.

Next, as shown in FIG. 15, a pattern of a P electrode of the upper laser 60 and a pattern of a P electrode of the lower laser 50 are formed by photolithography, and Au / AuZn is vapor-deposited from above them. The lift-off is performed to form the Au / AuZn electrode 31 as the P electrode of the lower laser 50 and to form the Au / AuZn electrode 128 which is one component of the P electrode of the upper laser 60.

Subsequently, as shown in FIG.
After evaporating o / Au, photolithography and etching are performed to obtain Mo / Au electrodes 32 and 12.
9 is formed. By forming the Mo / Au electrode 32,
The P electrode of the lower laser 50 and the N electrode of the upper laser 60 are common electrodes. Here, in particular, the resist used in the photolithography is a negative resist. This is because, if a positive resist is used in this step, the resist film thickness on the rectangular step becomes thicker than other portions, the ultraviolet light does not penetrate at the time of exposure, the resist remains, and electrode etching occurs. This is because they are hindered and cause current leakage. Therefore, since the resist used in the photolithography is a negative resist, it is possible to reliably prevent the occurrence of current leakage. The etching of Au is performed by using a mixture of iodine, ammonium iodide and ethanol, and the etching of Mo is performed by using a hydrogen peroxide solution. The surface treatment and the resist removal after development when using the negative resist are performed by UV.
-O ₃ performed using asher. Accordingly, the semiconductor layer is not damaged as in the case of using plasma ashing, and the resist cannot be completely removed as in the case of organic cleaning or remover processing. That is,
The resist can be completely and reliably removed.

Then, as shown in FIG. 17, by performing photolithography and etching, the upper laser 60 is positioned above the ridge stripe 51 of the lower laser 50, is parallel to the ridge stripes 51 and 61, and is non-doped. GaInP / AlGaInPMQ
A groove 33 is formed that is deeper than the W active layer 18 and has a depth that does not interrupt the current path of the lower laser 50. That is, in order to form this groove 33, the etching removal is n
The process is performed until the surface of the GaInP buffer layer 16 is exposed. Thereby, the Mo / Au electrodes 29, A
u / AuZn electrode 28, p-type GaAs contact layer 2
5, n-type GaAs current confinement layer 24, non-doped GaIn
P etching stop layer 20, p-type (Al _0.72 G
a) InPInP first cladding layer 19, non-doped MQ
The W active layer 18 and the n-type (Al _0.72 Ga) InP clad layer 17 are formed. Here, the above Mo / Au
The electrode 129 was etched with Au using a mixed solution of iodine, ammonium iodide and ethanol, and Mo with hydrogen peroxide. The etching of the Au / AuZn electrode 28 is performed as follows.
The pn inversion of the p-type GaAs contact layer 25 and the n-type GaAs current confinement layer 24 is performed using a mixed solution of ammonia and hydrogen peroxide having selectivity for GaInP with a mixed solution of iodine, ammonium iodide, and ethanol. The layer has been etched away. Then, etching is continued using the mixed solution of the ammonia and the hydrogen peroxide solution until the surface of the n-type GaInP buffer layer 16 is exposed.

Finally, an AuGe / Ni electrode 26 as an N electrode of the lower laser 50 is provided under the n-type GaAs substrate 1.
Is formed by sputtering and an electrode alloy is formed.
By forming Au27 by sputtering, the semiconductor laser device of the present embodiment can be obtained as shown in FIG.

According to the semiconductor laser device thus manufactured, when driving the lower laser 50, the electrodes 32 and 2 are driven.
While a drive voltage is applied between the electrodes 7 to inject a current, when the upper laser 60 is driven, a drive voltage is applied between the electrodes 29 and 32 to inject a current. At this time, the upper laser 6
Since the 0 current confinement layer is n-type, it is difficult for the current confinement layer of the upper laser 60 to turn on when the upper laser 60 is driven. Therefore, the current leak of the upper laser 60 is suppressed, and the lower laser 50 and the upper laser 60 can be reliably driven independently of each other.

Since the lower laser 50 and the upper laser 60 are formed with ridge stripes 51 and 61 having a buried ridge structure parallel to each other, good characteristics similar to those of a normal one-chip one-wavelength laser can be obtained. Can be.

Further, as shown in FIG.
Under the influence of the 0 ridge stripe 51 unevenness, an MBE ungrown portion and a pn inversion layer are formed above the ridge stripe 51, and there is a concern that current leakage may occur in the pn inversion layer portion of the upper laser 60. Since the groove 33 is formed above the ridge stripe 51 of the lower laser 50, the current path due to the portion inverted to the p-type is cut off, and the occurrence of current leak in the upper laser 60 can be reliably prevented.

The upper electrode of the lower laser 50 and the upper electrode of the upper laser 60 are separated so as to have a step, and the upper electrode of the upper laser 60 and the lower electrode of the upper laser 60 have a step. As a result, an optimal ohmic electrode can be formed for each contact layer of the lower laser 50 and the upper laser 60. That is, the p-type GaAs contact layer 12 and the p-type G
Optimum ohmic electrodes can be formed for each of the aAs contact layer 25 and the n-type GaAs buffer layer 15. Since the upper electrode of the lower laser 50 and the lower electrode of the upper laser 60 are a common electrode, the upper electrode of the lower laser 50 and the upper
Lead bonding to the lower electrode can be easily performed.

Since the growth temperature of the upper laser 60 is lower than the growth temperature of the lower laser 50, the dopant diffusion in the lower laser 50 can be suppressed.

The upper laser 60 is connected to a solid source M
Since the growth is performed by the BE method, a decrease in the carrier concentration in the lower laser 50 can be prevented.

The present invention has many embodiments, and the present invention is not limited to the above-described embodiments, such as semiconductor materials and electrode materials to be used. The thickness of each layer of the semiconductor laser device is an example.

In the above embodiment, the lower laser 5
The zero ridge stripe 51 and the ridge stripe 61 of the upper laser 60 are parallel to each other, but the ridge stripes 51 and 61 may be substantially parallel to each other.

Although the grooves 33 are parallel to the ridge stripes 51 and 61 in the above embodiment, they may be substantially parallel to the ridge stripes 51 and 61. The groove 33 is formed from the upper surface of the Mo / Au electrode 29 to the n-type GaI.
Although the groove has reached the upper surface of the nP buffer layer 16, the groove does not have to penetrate the p-type contact layer of the lower laser 50.
In short, the ridge stripe 51 of the lower laser 50
The groove formed above is made of non-doped GaInP / AlG
What is necessary is just to be deeper than the aInPMQW active layer 18 and shallower than the lower surface of the p-type GaAs contact layer.

[0062]

According to the present invention, in a structure in which a plurality of semiconductor laser elements that generate different oscillation wavelengths in one chip are stacked, good characteristics can be provided in each semiconductor laser element, and at the same time, the process can be performed. It can be simplified.

[Brief description of the drawings]

FIG. 1 is a structural diagram of a semiconductor laser device according to an embodiment of the present invention.

FIG. 2 is a structural diagram for explaining one process of manufacturing the semiconductor laser device.

FIG. 3 is a structural diagram for explaining one process of manufacturing the semiconductor laser device.

FIG. 4 is a structural diagram for explaining one process of manufacturing the semiconductor laser device.

FIG. 5 is a structural view for explaining one process of manufacturing the semiconductor laser device.

FIG. 6 is a structural diagram for explaining one process of manufacturing the semiconductor laser device.

FIG. 7 is a structural diagram for explaining one process of manufacturing the semiconductor laser device.

FIG. 8 is a structural diagram for explaining one process of manufacturing the semiconductor laser device.

FIG. 9 is a structural diagram for explaining one process of manufacturing the semiconductor laser device.

FIG. 10 is a structural diagram for explaining one process of manufacturing the semiconductor laser device.

FIG. 11 is a structural diagram for explaining one process of manufacturing the semiconductor laser device.

FIG. 12 is a structural diagram for explaining one process of manufacturing the semiconductor laser device.

FIG. 13 is a structural diagram for explaining one process of manufacturing the semiconductor laser device.

FIG. 14 is a structural diagram for explaining one process of manufacturing the semiconductor laser device.

FIG. 15 is a structural diagram for explaining one process of manufacturing the semiconductor laser device.

FIG. 16 is a structural diagram for explaining one process of manufacturing the semiconductor laser device.

FIG. 17 is a structural diagram for explaining one process of manufacturing the semiconductor laser device.

FIG. 18 is a view showing an MBE ungrown portion and a pn inversion layer above a ridge stripe of a lower laser in the semiconductor laser device.

FIG. 19 is a structural view of a conventional semiconductor laser device.

[Explanation of symbols]

Reference Signs List 1 n-type GaAs substrate 2 n-type GaAs buffer layer 3 n-type Al _0.5 GaAs cladding layer 4 non-doped AlGaAs MQW active layer 5 p-type Al _0.5 GaAs first cladding layer 6 p-type GaAs etching stop layer 7 p-type Al _{0 5.5} GaAs second cladding layer 8 p-type GaAs cap layer 9 n-type Al _0.7 GaAs layer 10 n-type GaAs layer 11 p-type GaAs layer 12 p-type GaAs contact layer 13 non-doped Al _0.5 GaAs etching stop layer 14 n -Type GaAs contact layer 15 n-type GaAs buffer layer 16 n-type GaInP buffer layer 17 n-type (Al _0.72 Ga) InP cladding layer 18 non-doped GaInP / AlGaInPMQW active layer 19 p-type (Al _0.72 Ga) InP first cladding Layer 20 Flop GaInP etching stop layer 21 p-type _(Al 0.72 Ga) InP second clad layer 22 p-type GaInP intermediate layer 23 p-type GaAs cap layer 24 n-type GaAs current confinement layer 25 p-type GaAs contact layer 26 Ange / Ni electrode 27 Mo / Au electrode 28 Au / AuZn electrode 29 Mo / Au electrode 30 AuGe electrode 31 Au / AuZn electrode 32 Mo / Au electrode 33 Groove 37 Alumina film 40 Unnecessary layer 50 Lower laser 51 Lower laser ridge stripe 52 Current confinement layer 60 Upper laser 61 Ridge stripe of upper laser

 ────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Masahiko Sakata 22-22 Nagaikecho, Abeno-ku, Osaka-shi, Osaka F-term (reference) 5F073 AA26 AA53 AA55 AA74 AB06 BA05 CA04 CA14 CB02 CB07 CB22 CB23 DA05 DA23 EA04

Claims (9)

[Claims] 1. A first laser section formed on a substrate, and a second laser section formed on the first laser section and generating a laser beam having a wavelength different from the wavelength of the laser beam of the first laser section. A semiconductor laser device having at least one of the following, wherein the conductivity type of the current confinement layers of the first laser portion and the second laser portion is n-type. 2. The semiconductor laser device according to claim 1, wherein said first laser portion and said second laser portion have ridge stripes substantially parallel to each other in a buried ridge structure. Laser element. 3. The semiconductor laser device according to claim 2, wherein the semiconductor laser device is located above the ridge stripe of the first laser unit, and is substantially parallel to the ridge stripe of the first and second laser units. A semiconductor laser device comprising a groove deeper than a light emitting layer of a second laser unit and having a depth that does not interrupt a current path of the first laser unit. 4. The semiconductor laser device according to claim 1, wherein the upper surface electrode of the first laser unit and the upper surface electrode of the second laser unit are separated so as to have a step. And an upper surface electrode of the second laser unit and a lower surface electrode of the second laser unit are separated so as to have a step. 5. The semiconductor laser device according to claim 4, wherein a P electrode serving as an upper surface electrode of the first laser unit and an N electrode serving as a lower surface electrode of the second laser unit are used as a common electrode. Characteristic semiconductor laser device. 6. The method of manufacturing a semiconductor laser device according to claim 1, wherein a growth temperature of said second laser portion is lower than a growth temperature of said first laser portion. A method for manufacturing a semiconductor laser device. 7. The method of manufacturing a semiconductor laser device according to claim 1, wherein said second laser portion is grown by a solid source molecular beam epitaxy method. Device manufacturing method. 8. The method for manufacturing a semiconductor laser device according to claim 1, wherein an upper surface electrode of said first and second laser units and a lower surface electrode of said second laser unit are provided. A semiconductor laser device using a negative resist in a photolithography process. 9. The method of manufacturing a semiconductor laser device according to claim 8, the surface treatment and resist removal after development in the photolithography process, a semiconductor laser device which is characterized in that the UV-O ₃ ashing Production method.