JP2005175450A - Compound semiconductor device, manufacturing method therefor, and optical disk apparatus equipped with this compound semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a compound semiconductor device which is suitable for constituting a semiconductor laser apparatus emitting a red laser beam, and which reduces manufacturing process steps of the semiconductor laser apparatus greatly and raises its manufacturing yield realizing both low oscillation threshold current and high reliability of the semiconductor laser apparatus. <P>SOLUTION: The compound semiconductor device has a GaAs substrate 101, a ground semiconductor layer 107 laminated on the GaAs substrate 101 consisting of III to V group compound semiconductor as crystal material which contains P and does not contain Al, and a right above semiconductor layer 108 consisting of III to V group compound as crystal material containing P, Al and In, which forms stripe shape ridges 130 on a surface of the layer 107. An electrode layer 111 covers tops and side planes of the ridges 130 and ridge 130 side portions of an upper plane of the ground semiconductor layer 107. Density of dopant which determines a type of electric conduction of the ground semiconductor layer 107 is chosen 1×10<SP>17</SP>cm<SP>-3</SP>or less in order to stop current at an interface between the ground semiconductor layer 107 and the electrode layer 111. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a compound semiconductor device suitable for constituting a semiconductor laser device that emits red laser light and a method for manufacturing the same.

  The present invention also relates to an optical disk device provided with a compound semiconductor device constituting such a semiconductor laser device.

  Compound semiconductor devices using compound semiconductors are applied to various electronic devices and optical devices. Semiconductor laser devices, which are one of typical optical devices, are roughly classified into two types according to their application fields: light sources for optical fiber communication and light sources for optical disk devices.

  There are various optical disk devices such as a compact disk (CD), a laser disk (LD), and a digital video disk (DVD), but a 650 nm band red laser having a larger information storage capacity than a CD optical disk device. Demand for DVD optical disk devices using light is rapidly increasing. In order to realize the performance improvement and cost reduction of the DVD optical disk device, it is essential to improve the semiconductor laser device used for the light source.

  A semiconductor laser device used in an optical disk device is required to have a low oscillation threshold current and high reliability. Conventionally, in order to realize these, a ridge embedded structure has been frequently used. The ridge-embedded structure combines the function of confining light in a striped optical waveguide using the refractive index difference and the function of preventing wasteful current from flowing outside the active layer. Can be realized. Moreover, since the active layer is not exposed to the air during the manufacturing process, high reliability can be realized. This ridge-embedded semiconductor laser device is manufactured through three crystal growths using a molecular beam epitaxy method (MBE method), a metal organic chemical vapor deposition method (MOCVD method), or the like.

  As a conventional 650 nm band InGaAlP red semiconductor laser device for a DVD optical disk device using a buried ridge structure, a device as shown in FIG. 14 is known (for example, Patent Document 1 (Japanese Patent Laid-Open No. 62-200786)). No.))). This semiconductor laser device includes an n-GaAs buffer layer 512 and an n-InGaP buffer layer 513 on an n-GaAs substrate 511. On the buffer layer 513, a double heterojunction structure composed of an n-InGaAlP cladding layer 514, an InGaP active layer 515, and p-InGaAlP cladding layers 516, 517, 518 is formed. Here, the clad layer 517 has a low Al composition and acts as an etching stop layer described later. The clad layer 518 is processed into a stripe shape, thereby forming a stripe ridge in the p clad layer. A p-InGaAlP contact layer 519 and a p-GaAs contact layer 520 are formed on the cladding layer 518. An n-GaAs current blocking layer 521 is formed on the side surfaces of the double heterojunction structure and the contact layer 520. A p-GaAs contact layer 522 is formed on the contact layer 520 and the current blocking layer 521. A metal electrode 523 is deposited on the upper surface of the contact layer 522, and a metal electrode 524 is deposited on the lower surface of the substrate 511.

  In this structure, the current confinement is performed by the contact layer 520 and the current blocking layer 521, and the optical waveguide is performed by the clad layer 518 formed in the striped mesa. The buffer layer 513 is for improving the quality of the InGaAlP-based crystal formed on GaAs. The contact layer (intermediate contact layer) 519 is intended to reduce the electrical resistance between the cladding layer 518 and the contact layer 520, has a larger band gap than the contact layer 520, and more than the cladding layer 518. As long as the band gap is small.

  The conventional semiconductor laser device is manufactured by processes as shown in FIGS. 15 (a) to 15 (f).

First, as shown in FIG. 15A, a pressure less than atmospheric pressure using a metal group III organic metal (trimethylindium, trimethylgallium, trimethylaluminum) and a group V hydride (arsine, phosphine) as raw materials. An n-GaAs first buffer layer 512 (Se-doped, 0.5 μm thick) on an n-GaAs substrate 511 (Si-doped, 3 × 10 ¹⁸ cm ⁻³ ) having a plane orientation (100) by the MOCVD method below. 3 × 10 ¹⁸ cm ⁻³ ), 0.5 μm thick n-InGaP second buffer layer 513 (Se doped, 3 × 10 ¹⁸ cm ⁻³ ), 1.5 μm thick n-In _0.5 Ga _0.2 Al _0.3 P first cladding layer 514 (Se doped, 1 × 10 ¹⁸ cm ⁻³ ), 0.1 μm thick In _0.5 Ga _0.5 P active layer 515, 0.1 μm thick p-In _0.5 Ga _0.2 Al _0.3 P second layer Double clad 516 ^{(Mg-doped, 2 × 10 18 cm -3)} , a thickness of 0.02μm which acts as an etch stop layer _{p-In 0.5 Ga 0.4 Al 0.1} P third cladding layer 517 (Mg-doped, 2 × 10 ¹⁸ cm ^{- 3} ), p-In _0.5 Ga _0.2 Al _0.3 P fourth clad layer 518 (Mg-doped, 2 × 10 ¹⁸ cm ⁻³ ) having a thickness of 1.4 μm, p-In having a thickness of 0.01 μm as an intermediate contact layer _0.5 Ga _0.4 Al _0.1 P first contact layer 519 (Mg doped, 2 × 10 ¹⁸ cm ⁻³ ) and 0.5 μm thick p-GaAs second contact layer 520 (Mg doped, 2 × 10 ¹⁸ cm ⁻³ ) Are sequentially grown to form a double hetero wafer. Subsequently, a SiO ₂ film 526 is formed in a stripe shape having a width of 5 μm and a thickness of 0.1 μm on the second contact layer 520 by thermal decomposition of silane gas and photolithography.

Next, as shown in FIG. 15B, the SiO ₂ film 526 is used as a mask, the second contact layer 520 is etched by a GaAs selective etchant to expose the first contact layer 519, and a GaAs stripe having a width of 3 μm is formed. A mesa 527 is formed.

  Next, as shown in FIG. 15C, using the GaAs stripe mesa 527 as a mask, the first contact layer 519 and the fourth cladding layer 518 are etched with a selective etchant of InGaAlP until the third cladding layer 517 is exposed. Thus, the striped mesa 528 is formed.

  By processing this wafer with a selective etchant of GaAs, the second contact layer 520 is etched to reduce its width, and a striped ridge 529 having the shape shown in FIG. 15D is formed. The selective etchant of GaAs is a mixture of 28% ammonia water, 35% hydrogen peroxide water and water in a ratio of 1: 30: 9, and is used at 20 ° C. The selective etchant of InGaAlP is sulfuric acid or phosphoric acid and is used at a temperature of 40 to 130 ° C.

Next, by MOCVD under reduced pressure using trimethylgallium and arsine as raw materials, an n-GaAs current blocking layer 521 (Se doped, 5 × 10 ¹⁸ cm ⁻³ ) as shown in FIG. Grows 0.5 μm. At this time, the growth is performed by raising the temperature to 700 ° C. while introducing diluted phosphine gas, switching the phosphine gas flow to an arsine gas flow, waiting for about 1 second, and then introducing trimethylgallium organometallic gas. As a result, no growth of GaAs is observed on the SiO ₂ film 526, and a wafer having a cross-sectional shape shown in FIG.

Next, after removing the SiO ₂ film 526, as shown in FIG. 15 (f), a p-GaAs third contact layer 522 (Mg doped, 5 × 10 ¹⁸ cm ⁻³ ) with a thickness of 3 μm is formed on the entire surface by MOCVD. grow up. Thereafter, the Au / Zn electrode 523 is deposited on the third contact layer 522 and the Au / Ge electrode 524 is deposited on the lower surface of the substrate 511 by a normal electrode process, whereby the laser wafer having the structure shown in FIG. Can be obtained.

  The ridge-embedded semiconductor laser device manufactured as described above has a feature that it is possible to achieve both low oscillation threshold current and high reliability as described above, and is widely used as a red light source for DVD.

However, since this ridge-embedded semiconductor laser device is manufactured by performing crystal growth three times as described above, the manufacturing cost increases and the number of processes increases, so that the manufacturing yield tends to decrease. There's a problem.
JP-A-62-200786

  Accordingly, an object of the present invention is suitable for configuring a semiconductor laser device that emits red laser light, while reducing both the low oscillation threshold current and high reliability of the semiconductor laser device, and greatly reducing the manufacturing process. An object of the present invention is to provide a compound semiconductor device capable of improving the manufacturing yield and a manufacturing method thereof.

  Another object of the present invention is to provide an optical disk device including a compound semiconductor device constituting such a semiconductor laser device.

In order to solve the above problems, the compound semiconductor device of the present invention is
A base semiconductor layer made of a III-V group compound semiconductor containing P and not containing Al, which is laminated on a GaAs substrate,
A semiconductor layer immediately above that forms a stripe-shaped ridge formed on the surface of the base semiconductor layer using a III-V group compound containing P, Al and In as a crystal material;
An electrode layer covering a top and at least one side surface of the ridge, and an electrode layer covering a portion corresponding to a side of the ridge among the upper surface of the base semiconductor layer;
An impurity doping concentration that determines the conductivity type of at least a portion in contact with the electrode layer in the base semiconductor layer is 1 × 10 ¹⁷ cm ⁻³ or less so that current is blocked at the interface between the base semiconductor layer and the electrode layer. It is characterized by being set to.

  Here, “conductivity type” refers to n-type or p-type.

  The “III-V group compound semiconductor containing P and not containing Al” is, for example, InGaP or InGaAsP, and the “III-V group compound containing P, Al, and In” is, for example, InGaAlP (however, the composition is all It is a notation in which the ratio is omitted.)

Further, the impurity doping concentration for determining the conductivity type may be set to 1 × 10 ¹⁷ cm ⁻³ or less not only in the portion in contact with the electrode layer in the base semiconductor layer but also in the entire region of the base semiconductor layer. .

  In the compound semiconductor device of the present invention, a base semiconductor layer and an immediately above semiconductor layer are generally grown on a GaAs substrate in order and stacked, and the immediately above semiconductor layer is etched so as to form a stripe-shaped ridge. It can be easily produced by exposing the underlying semiconductor layer and forming an electrode layer thereon. In this case, the crystal growth process can be completed once at the manufacturing stage. Therefore, as compared with the case of manufacturing a semiconductor laser device having a general ridge buried structure, the manufacturing process is greatly reduced, and the manufacturing yield is improved. Therefore, the compound semiconductor device of the present invention and the semiconductor laser device configured by applying the compound semiconductor device are manufactured at low cost.

When a current is passed between the electrode layer of the compound semiconductor device of the present invention and the GaAs substrate, the doping concentration of the impurity that determines the conductivity type of the portion of the base semiconductor layer in contact with the electrode layer is 1 × 10 ¹⁷ cm. Since it is set to ⁻³ or less, current is blocked at the interface between the base semiconductor layer and the electrode layer on the side of the ridge. Therefore, current can flow only through the junction between the electrode layer and the top of the ridge. Thereby, current confinement is performed. Accordingly, in the crystal growth step, an InGaAlP-based semiconductor layer group (semiconductor layer group including an active layer for performing laser oscillation) is stacked between the GaAs substrate and the underlying semiconductor layer, thereby red laser light. Can be suitably configured.

  In addition, the semiconductor laser device configured by applying the compound semiconductor device of the present invention can achieve both low oscillation threshold current and high reliability (details will be given later with data).

  In addition, it is desirable that another electrode layer that forms an ohmic junction with this surface is provided on the surface of the semiconductor substrate opposite to the surface on which the layers are stacked. As a result, energization is easily performed between the two electrode layers through the semiconductor layer group including the active layer, and laser oscillation is realized.

  Further, it is desirable that the ridge has a forward mesa-shaped cross section. In that case, at the manufacturing stage of the compound semiconductor device, for example, an electrode layer is simply deposited on the ridge, and the electrode layer is formed on the top and side surfaces of the ridge and on the side of the ridge among the top surface of the base semiconductor layer. The part corresponding to is continuously covered. That is, the electrode layer does not break between the top of the ridge and the top surface of the base semiconductor layer. Therefore, the compound semiconductor device of the present invention and the semiconductor laser device configured by applying the compound semiconductor device are manufactured with a high yield and at a low cost.

  In one embodiment of the compound semiconductor device, the ridge includes the semiconductor layer immediately above, an InGaP layer sequentially stacked on the semiconductor layer directly above, and a GaAs layer.

  In the compound semiconductor device of this embodiment, the top of the ridge (contact layer) and the electrode layer are formed by configuring the contact layer by setting the impurity doping concentration that determines the conductivity type of the GaAs layer to a certain value or more. Can be easily set to form an ohmic junction. Thereby, the contact resistance between the top of the ridge and the electrode layer can be reduced. Moreover, since the InGaP layer is provided between the semiconductor layer immediately above and the GaAs layer, an increase in resistance value due to an energy band offset generated between the semiconductor layer directly above and the GaAs layer can be prevented. Therefore, the element resistance can be reduced.

  In the compound semiconductor device according to one embodiment, the ridge further includes an InGaAs layer stacked on the GaAs layer.

  In the compound semiconductor device of this embodiment, the top of the ridge (contact layer) and the electrode layer are formed by configuring the contact layer by setting the impurity doping concentration that determines the conductivity type of the InGaAs layer to a certain value or more. Can be easily set to form an ohmic junction. Thereby, the contact resistance between the top of the ridge and the electrode layer can be reduced. As a result, the stripe width of the ridge can be further reduced. As a result, it is possible to reduce the oscillation threshold current and improve the kink generation output of the semiconductor laser device configured by applying this compound semiconductor device.

  In a compound semiconductor device according to an embodiment, the crystal material forming the semiconductor layer immediately above is made of either InGaAlP or InGaAlAsP.

  In the compound semiconductor device of one embodiment, the crystal material forming the base semiconductor layer is made of either InGaP or InGaAsP.

  According to the two embodiments, etching selectivity can be provided between the base semiconductor layer and the semiconductor layer immediately above. Therefore, the ridge can be easily formed with good controllability at the manufacturing stage of the compound semiconductor device.

  In one embodiment of the compound semiconductor device, the base semiconductor layer has a thickness of 30 mm or more.

  In the compound semiconductor device according to this embodiment, since the layer thickness of the base semiconductor layer is 30 mm or more, in the manufacturing stage of the compound semiconductor device, the semiconductor layer immediately above is etched to form a striped ridge. Etching is stopped at the base semiconductor layer in the depth direction, and it becomes easy to expose the base semiconductor layer to the side of the ridge. Therefore, the ridge can be easily formed with good controllability.

  In a compound semiconductor device according to an embodiment, the thickness of the base semiconductor layer is 0.1 μm or more and 0.4 μm or less.

  In the compound semiconductor device according to this embodiment, since the layer thickness of the base semiconductor layer is 0.1 μm or more, current flows at the interface between the portion of the base semiconductor layer corresponding to the side of the ridge and the electrode layer. Sufficiently blocked. Therefore, current confinement is effectively performed without regrowth of the current blocking layer or insertion of an insulating film. Further, since the layer thickness of the base semiconductor layer is 0.4 μm or less, when a current flows between the electrode layer and the GaAs substrate through the base semiconductor layer (the portion corresponding to the portion immediately below the ridge). The device resistance does not increase substantially.

In the compound semiconductor device of one embodiment,
At a position in contact with the lower surface of the underlying semiconductor layer between the GaAs substrate and the underlying semiconductor layer, the doping concentration of an impurity having the same conductivity type as that of the underlying semiconductor layer and defining the conductivity type is 1 ×. A second semiconductor layer set to 10 ¹⁷ cm ⁻³ or less,
The total thickness of the base semiconductor layer and the second semiconductor layer is not less than 0.1 μm and not more than 0.4 μm.

In the compound semiconductor device of this embodiment, the second semiconductor layer provided between the GaAs substrate and the base semiconductor layer in contact with the lower surface of the base semiconductor layer has the same conductivity type as that of the base semiconductor layer. Since it has a mold and the doping concentration of the impurity that determines its conductivity type is set to 1 × 10 ¹⁷ cm ⁻³ or less, it functions in the same manner as the above-mentioned base semiconductor layer. Therefore, even when the layer thickness of the base semiconductor layer is less than 0.1 μm, the total thickness of the base semiconductor layer and the second semiconductor layer is 0.1 μm or more, so that a sufficient current confinement property is obtained. Is obtained. In addition, since the sum of the thicknesses of the base semiconductor layer and the second semiconductor layer is 0.4 μm or less, the base semiconductor layer and the second semiconductor layer (among the ridge just below the ridge) between the electrode layer and the GaAs substrate. In the case where a current is passed through a portion corresponding to (1), the element resistance does not substantially increase.

  The crystal material forming the second semiconductor layer is preferably a III-V group compound containing P, Al, and In, and may be, for example, InGaAlAsP.

In one embodiment, the compound semiconductor device is characterized in that a doping concentration of impurities that determine a conductivity type of the GaAs layer included in the ridge is 5 × 10 ¹⁸ cm ⁻³ or more.

In the compound semiconductor device of this embodiment, since the doping concentration of the impurity that determines the conductivity type of the GaAs layer included in the ridge is 5 × 10 ¹⁸ cm ⁻³ or more, it is between the electrode layer and the GaAs substrate. Thus, the element resistance can be sufficiently reduced when a current is applied. As a result, power consumption can be reduced.

In one embodiment, the compound semiconductor device is characterized in that the doping concentration of impurities that determine the conductivity type of the InGaAs layer included in the ridge is 5 × 10 ¹⁸ cm ⁻³ or more.

In the compound semiconductor device of this embodiment, since the doping concentration of the InGaAs layer immediately below the electrode layer is 5 × 10 ¹⁸ cm ⁻³ or more, a current flows between the electrode layer and the GaAs substrate. In addition, the element resistance can be sufficiently reduced. As a result, power consumption can be reduced.

  In a compound semiconductor device according to an embodiment, the crystal material forming the base semiconductor layer is made of InGaP, and a Ga composition ratio in a group III element in the InGaP is 0.367 or more and 0.665 or less.

In the compound semiconductor device of this embodiment, the crystal material forming the base semiconductor layer is made of InGaP, and the Ga composition ratio in the group III element in InGaP (value of x when expressed as In _1-x Ga _x P) ) Is 0.367 or more and 0.665 or less, crystallinity deterioration and resistance increase caused by lattice mismatch at the interface with the semiconductor layer formed above and below the base semiconductor layer do not occur. Therefore, good element characteristics can be maintained.

  In a compound semiconductor device according to an embodiment, the crystal material forming the base semiconductor layer is made of InGaAsP, and a lattice mismatch rate between the base semiconductor layer and the GaAs substrate is ± 1.5% or less. Here, the lattice mismatch rate being ± 1.5% or less means that the absolute value of the lattice mismatch rate is 1.5% or less.

  In the compound semiconductor device of this embodiment, the crystal material forming the base semiconductor layer is made of InGaAsP, and the lattice mismatch rate between the base semiconductor layer and the GaAs substrate is ± 1.5% or less. Even when the composition of the layer is InGaAsP, crystallinity is not deteriorated and resistance is not increased. Therefore, good element characteristics can be maintained.

  In a compound semiconductor device according to an embodiment, a semiconductor layer group including an active layer for performing laser oscillation is provided between the GaAs substrate and the base semiconductor layer.

  In the compound semiconductor device of this embodiment, a semiconductor layer group including an active layer for performing laser oscillation is provided between the GaAs substrate and the underlying semiconductor layer. Thereby, a semiconductor laser device is configured.

When energized between the electrode layer and the GaAs substrate, the active layer desirably oscillates between two end faces perpendicular to the direction in which the ridge extends in a stripe shape. Thereby, stable laser oscillation is possible.

  The semiconductor layer between the GaAs substrate and the active layer is preferably a first conductivity type, and the semiconductor layer between the active layer and the electrode layer is preferably a second conductivity type. The “first conductivity type” refers to one conductivity type of n-type or p-type, and the “second conductivity type” refers to the other conductivity type of n-type and p-type.

  The compound semiconductor device according to an embodiment further includes a stripe structure having a height equal to or higher than the ridge on the surface of the base semiconductor layer on both sides of the semiconductor layer immediately above the stripe ridge. To do.

  In the compound semiconductor device according to this embodiment, a so-called junction in which an electrode provided on the ridge side is die-bonded to a stem or a heat dissipator in order to have a striped structure having a height higher than the ridge on both sides of the ridge. Even when down-type mounting is performed, the ridge portion can be prevented from being damaged.

  In one embodiment of the compound semiconductor device, the electrode layer is further formed on the stripe structure.

  In the compound semiconductor device according to this embodiment, since the electrode layer is formed on the stripe structure, the conductor of the stem and the radiator and the stripe structure are used in the junction down type mounting described above. It becomes possible to easily establish electrical continuity with the upper electrode layer.

  In one embodiment of the compound semiconductor device, the stripe structure is formed of a semiconductor layer, and an insulator is inserted at the interface between the stripe structure and the electrode layer.

  In the compound semiconductor device according to this embodiment, since an insulator is inserted at the interface between the stripe structure and the electrode layer, current flows from the electrode layer to the underlying semiconductor layer via the stripe structure. Does not flow. Therefore, it is possible to provide a compound semiconductor device having a low threshold current value without causing excessive leakage current.

Here, as the insulator, in addition to an inorganic insulator such as SiO ₂ or SiN _x , an organic resin or the like can be suitably applied.

In the compound semiconductor device according to one embodiment, the stripe structure includes a semiconductor layer, and the impurity doping concentration that determines the conductivity type of the semiconductor layer in contact with the electrode layer at least at the top of the stripe structure has the stripe structure. It is characterized by being set to 1 × 10 ¹⁷ cm ⁻³ or less so that current is blocked at the interface between the top of the structure and the electrode layer.

In the compound semiconductor device of this embodiment, an insulator or the like is separately provided by setting the doping concentration of the semiconductor layer at the top of the stripe structure and in contact with the electrode layer to 1 × 10 ¹⁷ cm ⁻³ or less. Without interruption, the current can be cut off at the interface between the electrode layer and the stripe structure. Therefore, it is possible to form a stripe-shaped structure effective for preventing ridge breakage during junction down type mounting at low cost.

  In the compound semiconductor device according to one embodiment, the electrode layer is a conductor formed on the electrode layer, and the stripe structure is a conductor.

In the compound semiconductor device according to this embodiment, the stripe-shaped structure is formed on the electrode layer and is a conductor, so that the ridge portion of the ridge portion is made conductive with the stem or the heat radiating body and the electrode layer. Breakage can be prevented. At this time, there is an effect that the heat generated in the active layer can be released to the outside more efficiently. Furthermore, since it is not necessary to form an insulator for interrupting current or a semiconductor layer having a doping concentration of 1 × 10 ¹⁷ cm ⁻³ or less, the manufacturing process can be simplified, the yield can be improved, and the manufacturing cost can be reduced. An apparatus can be provided.

The method for manufacturing the compound semiconductor device of the present invention includes:
A base semiconductor layer having a doping concentration of an impurity defining a conductivity type of 1 × 10 ¹⁷ cm ⁻³ or less on a GaAs substrate using at least a group III-V compound semiconductor containing P and not containing Al as a crystal material; A crystal growth step of sequentially stacking a semiconductor layer directly on the crystal material of a group III-V compound containing Al and In;
Forming an etching mask having a stripe pattern on the semiconductor layer immediately above;
Using the etching mask, a portion corresponding to the side of the etching mask is removed by etching to form a stripe-shaped ridge made of the semiconductor layer directly on the surface of the underlying semiconductor layer. And an etching step of exposing a portion of the base semiconductor layer corresponding to the side of the ridge,
An electrode forming step of forming an electrode layer so as to cover a portion corresponding to the side of the ridge among the top and at least one side surface of the ridge and the upper surface of the base semiconductor layer after removing the etching mask; ,
It is characterized by including.

  According to the method for manufacturing a compound semiconductor device of the present invention, the above-described compound semiconductor device is easily manufactured. In addition, since the crystal growth process can be completed once in the manufacturing stage, the manufacturing process is greatly reduced and the manufacturing yield is improved as compared with the case of manufacturing a semiconductor laser device having a general ridge buried structure. . Therefore, the compound semiconductor device of the present invention and the semiconductor laser device configured by applying the compound semiconductor device are manufactured at low cost. In the manufactured compound semiconductor device, current is blocked at the interface between the base semiconductor layer and the electrode layer on the side of the ridge.

  In the method for manufacturing a compound semiconductor device according to one embodiment, an etching rate for the base semiconductor layer in the etching step is slower than an etching rate for the semiconductor layer directly above.

  In the method of manufacturing a compound semiconductor device according to this embodiment, when the portion corresponding to the side of the etching mask is removed by etching in the semiconductor layer immediately above, the etching can be easily stopped at the base semiconductor layer. it can. Therefore, the ridge can be easily formed with good controllability.

In the method of manufacturing a compound semiconductor device according to one embodiment,
In the crystal growth step, an InGaP layer and a GaAs layer are further stacked in this order on the semiconductor layer immediately above,
In the etching step, a portion corresponding to the side of the etching mask among the GaAs layer, InGaP layer, and the semiconductor immediately above is subjected to etching, and this etching is performed from the upper surface side of the GaAs layer with respect to the depth direction. It is characterized in that it is carried out by a dry etching method until the middle of the layer, and then by a wet etching method from the middle of the semiconductor layer immediately above until the underlying semiconductor layer is exposed.

  According to the method of manufacturing a compound semiconductor device of this embodiment, the etching progress in the lateral direction can be relatively reduced while etching is performed by the dry etching method. Therefore, the ridge can be easily formed in a forward mesa shape with good controllability.

  In one embodiment of the compound semiconductor device manufacturing method, after etching by the dry etching method and the wet etching method, the end portion of the InGaP layer remaining in a manner protruding sideways from between the side surfaces of the semiconductor layer immediately above and the GaAs layer And a step of removing by cleaning with pure water to which ultrasonic waves are applied.

  According to the method for manufacturing a compound semiconductor device of this embodiment, the end portion of the InGaP layer remaining in a mode of projecting laterally from between the side surfaces of the semiconductor layer immediately above and the GaAs layer is pure water to which ultrasonic waves are applied. Removed by washing. Therefore, the ridge can be easily formed in a forward mesa shape with good controllability.

  A method for manufacturing a compound semiconductor device according to an embodiment is characterized in that the InGaP layer has a thickness of 0.1 μm or less.

  According to the method of manufacturing a compound semiconductor device of this embodiment, since the thickness of the InGaP layer is 0.1 μm or less, it remains in a mode in which it protrudes laterally between the semiconductor layer directly above and the GaAs layer. The edge of the InGaP layer is easily removed by pure water cleaning with ultrasonic waves.

  In one embodiment of the method for manufacturing a compound semiconductor device, the frequency of ultrasonic waves applied to the pure water cleaning is 20 kHz to 350 kHz.

  According to the method of manufacturing a compound semiconductor device of this embodiment, since the frequency of ultrasonic waves applied to the pure water cleaning is 20 kHz to 350 kHz, destructive cavitation occurs in pure water at random, and The end portion of the InGaP layer remaining in a manner protruding sideways between the semiconductor layer immediately above and the GaAs layer is further easily removed.

A method of manufacturing a compound semiconductor device according to one embodiment includes:
In the crystal growth step, an InGaAlP layer having a smaller Al mixed crystal ratio in the group III element than the semiconductor layer immediately above and a GaAs layer are stacked in this order on the semiconductor layer directly above.
In the etching step, the portion corresponding to the side of the etching mask is removed by etching from the GaAs layer, InGaAlP layer, and immediately above semiconductor layer, and this etching is performed from the upper surface side of the GaAs layer in the depth direction. It is characterized in that it is carried out by a dry etching method halfway up the semiconductor layer immediately above, and then carried out by a wet etching method until the base semiconductor layer is exposed from the middle of the semiconductor layer directly above.

  According to the method for manufacturing a compound semiconductor device of this embodiment, the etching progress in the lateral direction can be relatively reduced during the etching by the dry etching method as compared with the case by the wet etching method. Therefore, the ridge can be easily formed in a forward mesa shape with good controllability.

  In one embodiment of the method for manufacturing a compound semiconductor device, the etching gas used in the dry etching method is a chlorine-based gas.

  Here, “chlorine-based gas” means a gas containing chlorine or a chlorine compound.

  In the manufacturing method of the compound semiconductor device according to this embodiment, since the chlorine-based gas is used as the etching gas during the etching by the dry etching method, the etching progress in the lateral direction can be almost eliminated. As a result, when the etching by the dry etching method is completed, the side surface of the semiconductor layer left immediately below the etching mask becomes almost perpendicular to the substrate surface. Therefore, the ridge can be easily formed in a forward mesa shape with good controllability by performing etching by a wet etching method from the middle of the semiconductor layer immediately above until the underlying semiconductor layer is exposed.

  In one embodiment of the method for manufacturing a compound semiconductor device, an inert gas is added to the chlorine-based gas.

  In the manufacturing method of the compound semiconductor device according to this embodiment, since the inert gas is added to the chlorine-based gas, the side surface of the semiconductor layer left immediately below the etching mask when etching is performed by a dry etching method. Roughness is prevented.

  In one embodiment of the method of manufacturing a compound semiconductor device, the etchant used in the wet etching method is a mixed aqueous solution in which phosphoric acid or sulfuric acid is added to hydrogen peroxide.

  In the method of manufacturing a compound semiconductor device according to this embodiment, since the etchant used in the wet etching method is a mixed aqueous solution in which phosphoric acid or sulfuric acid is added to hydrogen peroxide, anisotropy for forming a normal mesa shape Etching can be suitably performed, and a forward mesa-shaped ridge can be formed very simply.

  In one embodiment of the method of manufacturing a compound semiconductor device, the crystal growth step includes stacking a semiconductor layer group including an active layer for performing laser oscillation between the GaAs substrate and the underlying semiconductor layer. To do.

  According to the compound semiconductor device manufacturing method of this embodiment, a semiconductor laser device is manufactured.

  An optical disk device according to the present invention is a compound semiconductor device according to the present invention having a semiconductor layer group including an active layer for performing laser oscillation between the GaAs substrate and the underlying semiconductor layer. Features. In other words, the optical disc apparatus of the present invention includes a semiconductor laser device configured by applying the compound semiconductor device of the present invention.

  As described above, since the semiconductor laser device configured by applying the compound semiconductor device of the present invention can achieve both low oscillation threshold current and high reliability, the optical disk device of the present invention can read and write data at high speed. Long-term reliability can be realized. Further, since the semiconductor laser device configured by applying the compound semiconductor device of the present invention is manufactured at a low cost, the optical disk device of the present invention is also manufactured at a low cost.

  The compound semiconductor device of the present invention is suitable for constructing a semiconductor laser device that emits red laser light, and achieves both low oscillation threshold current and high reliability of the semiconductor laser device, while greatly reducing the manufacturing process, The production yield can be improved.

  Further, according to the method for manufacturing a compound semiconductor device of the present invention, such a compound semiconductor device can be manufactured by a manufacturing process greatly reduced as compared with the case of manufacturing a semiconductor laser device having a general ridge buried structure. It can be manufactured with a good production yield, and therefore can be manufactured at low cost.

  Furthermore, the optical disc apparatus of the present invention can read and write data at high speed, realize long-term reliability, and is manufactured at low cost.

  Hereinafter, the present invention will be described in detail with reference to the illustrated embodiments.

[First Embodiment]
FIG. 1 is a cross-sectional view showing a schematic structure of a semiconductor laser device according to a first embodiment configured by applying the compound semiconductor device of the present invention, and FIG. 2 is a perspective view of the semiconductor laser device.

In this semiconductor laser device, an n-In _0.5 Ga _0.5 P buffer layer 102, an n-In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P lower cladding layer 103, a multiple quantum well active layer 104, p -In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P first upper cladding layer 105, p-In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P second upper cladding layer 106 as the second semiconductor layer, and p as the underlying semiconductor layer The -In _0.5 Ga _0.5 P etch stop layer 107 is sequentially stacked. The multiple quantum well active layer 104 includes an In _0.5 Ga _0.5 P quantum well layer (strain 0.22%, layer thickness 50 mm, 4 layers) and an In _0.5 (Ga _0.5 Al _0.5 ) _0.5 P barrier layer (layer thickness from the substrate side). 500 Å, 50 Å 3 layers, 500 Å) are alternately arranged. Further, a p-In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P third upper cladding as a semiconductor layer immediately above the p-In _0.5 Ga _0.5 P etch stop layer 107 so as to form a forward mesa stripe-shaped ridge 130. A layer 108, a p-In _0.5 Ga _0.5 P intermediate layer 109 as an InGaP layer, and a p ⁺ -GaAs contact layer 110 as a GaAs layer are provided. Further, the top and side portions of the ridge 130 and the upper surface of the etch stop layer 107 (the portion corresponding to the side of the ridge 130 excluding the portion directly below the ridge 130) are continuously covered, and Ti / A p-side electrode 111 made of a multilayer metal thin film formed by stacking Pt / Au layers is provided. Note that 111a, 111b, and 111c represent portions that cover the top and side portions of the ridge 130 and the upper surface of the etch stop layer 107 (this is appropriately referred to as an “electrode portion”). The contact resistance between the electrode portion 111a and the top of the ridge 130 (contact layer 110) has a sufficiently low value (1 × 10 ⁻⁶ Ωcm ² ). On the other hand, the interface formed between the electrode portion 111c and the etch stop layer 107 has a function of blocking a downward current in FIG. An n-side electrode 112 made of a multilayer metal thin film made of AuGe / Ni / Au is formed on the back side of the substrate 101 as another electrode layer. As shown in FIG. 2, this semiconductor laser device is divided into chip sizes having a desired resonator length, and reflection films (not shown) are coated on both end faces of the ridge 130 perpendicular to the stripe direction. . Thus, an InGaAlP red semiconductor laser device is configured.

  This semiconductor laser device is manufactured as follows.

First, an n-In _0.5 Ga _0.5 P buffer layer 102 (layer thickness: 0.25 μm, Si doping concentration: 1 × 10 ¹⁸ cm ^{−3 is formed on} the entire (100) plane of the n-GaAs substrate 101 shown in FIG. ), N-In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P lower cladding layer 103 (layer thickness: 1.2 μm, Si doping concentration: 1 × 10 ¹⁸ cm ⁻³ ), multiple quantum well active layer 104, p-In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P first upper cladding layer 105 (layer thickness: 0.2 μm, Be doping concentration: 1 × 10 ¹⁸ cm ⁻³ ), p-In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P second upper cladding layer 106 (thickness: 0.1 [mu] m, Be doping ^{concentration: 1 × 10 17 cm -3)} , p-In 0.5 Ga 0.5 P etching stop layer 107 (thickness: 50 Å, Be doping concentration: 1 × 10 ¹⁷ cm ^-3 ), p-In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P third upper cladding layer 108 (layer thickness: 1.2 μm, Be doping concentration: 1.3 × 10 ¹⁸ cm ⁻³ ), p-In _0.5 Ga _0.5 P intermediate layer 109 (layer thickness: 500 μm, Be doping concentration) : 7 × 10 ¹⁸ cm ⁻³ ), p ⁺ -GaAs contact layer 110 (layer thickness: 0.3 μm, Be doping concentration: 2 × 10 ¹⁹ cm ⁻³ ) successively by MBE method (molecular beam epitaxy method) Crystal growth is performed (crystal growth process).

  Next, a resist mask 113 (mask width 3.5 μm) as an etching mask is formed on a region (see FIG. 1) where the ridge 130 is to be formed by a photolithography process. The resist mask 113 is formed so as to extend in a stripe shape in the <0-11> direction corresponding to the direction in which the ridge 130 to be formed extends.

  Next, as shown in FIGS. 3 to 5, portions of the semiconductor layers 110, 109, 108 corresponding to the sides of the resist mask 113 are removed by etching (etching process).

Specifically, in this etching step, as shown in FIG. 3, first, p-In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P third upper cladding layer from the upper surface side of the p ⁺ -GaAs contact layer 110 in the depth direction. Etching is performed by a dry etching method until the middle of 108. In this example, a 1: 1 mixed gas of Cl ₂ and BCl ₃ was used as an etching gas, and Ar gas was added as an inert gas. The pressure during dry etching was 10 mTorr. Since a chlorine-based gas is used as an etching gas, the progress of etching in the lateral direction can be almost eliminated, and as a result, the semiconductor layers 110, 109, The side surface 108 of 108 becomes a shape substantially perpendicular to the substrate surface.

Subsequently, as shown in FIG. 4, until the p-In _0.5 Ga _0.5 P etch stop layer 107 is exposed from the middle of the p-In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P third upper cladding layer 108 in the depth direction. Etching is removed by a wet etching method. In this example, a mixed aqueous solution of phosphoric acid and hydrogen peroxide is used as the etchant. As a result, the side surface S of the p ⁺ -GaAs contact layer 110 and the p-In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P third upper cladding layer 108 has a shape (forward mesa) that forms an inclined surface with respect to the substrate surface. On the other hand, the p-In _0.5 Ga _0.5 P intermediate layer 109 is not etched, and its end 109 b remains in a manner protruding sideways from the side surface S of the upper and lower layers 110 and 108.

Subsequently, as shown in FIG. 5, pure water cleaning with ultrasonic waves is performed to remove the end 109 b of the p-In _0.5 Ga _0.5 P intermediate layer 109. Thus, a forward mesa-shaped ridge 130 having slopes 130b on both sides is formed. At this time, the ultrasonic wave applied to the pure water cleaning is an ultrasonic band (20 KHz to 350 kHz). Thereafter, the resist mask 113 is removed.

  Subsequently, as shown in FIG. 6, Ti (layer thickness: 1000 Å) / Pt (layer thickness: 500 Å) / Au (layer thickness: 3000 と し て) is used as the p-side electrode 111 on the surface side by using an electron beam evaporation method. A metal thin film is formed in order (electrode formation process).

  Subsequently, as shown in FIG. 1, the n-GaAs substrate 101 is ground to a desired thickness from the back surface side. Then, a metal thin film is laminated and formed in the order of AuGe (layer thickness: 1500 Å) / Ni (layer thickness: 150 Å) / Au (layer thickness: 3000 Å) as the n-side electrode 112 using a resistance heating vapor deposition method from the back side.

Thereafter, the electrode material is alloyed by heating to 390 ° C. for 1 minute in an N ₂ or H ₂ atmosphere. Thus, a semiconductor laser device is obtained.

  Note that pure water cleaning with ultrasonic waves may be performed after the resist mask 113 is removed.

  In the present embodiment, an InGaAlP-based semiconductor laser device has been described as an example. However, the present invention is not limited to this, and it goes without saying that the present invention can be applied to other compound semiconductor devices using InGaAlP-based materials.

  The InGaAlP red semiconductor laser device according to the present embodiment has a feature that the crystal growth process is performed once as described above. Therefore, compared to the conventional ridge-embedded InGaAlP-based red semiconductor laser device manufactured through three crystal growths, the manufacturing cost can be significantly reduced, and the number of process steps is reduced, so the yield is improved. There is an effect of doing. Therefore, the semiconductor laser device of this embodiment is manufactured at low cost.

In the above-described semiconductor laser device, when energized between the p-side electrode 111 and the n-side electrode 112 during operation, the electrode portion 111a that covers the top of the ridge 130 and the electrode portion 111b that covers the side surface of the ridge 130 are provided. Current is injected only from the portion, and no current is injected from the electrode portion 111 c covering the p-In _0.5 Ga _0.5 P etch stop layer 107. In order to provide a semiconductor laser device that realizes current confinement corresponding to the function of such a known current blocking layer, does not deteriorate element resistance, and has long-term reliability, the following will be described. It is important to have a configuration.

First, the impurity concentration (p-type impurity in this example) of the semiconductor layer in the region where current is to be blocked (the portion in contact with the p-side electrode 111 on the side of the ridge 130) is set to 1 × 10 ¹⁷ cm ⁻³ or less. It is essential. In the semiconductor laser device, as will be described later, an extremely thin (300 mm or less) etch stop layer is used so that the oscillated laser beam is not absorbed. In that case, the doping concentration of the semiconductor layer immediately below it (second upper cladding layer 106 in this example) also needs to be 1 × 10 ¹⁷ cm ⁻³ or less. FIG. 7 shows a comparison graph of current confinement property and current supply stability when the doping concentration of the region where current is desired to be blocked is made at 1 × 10 ¹⁷ cm ⁻³ and 1 × 10 ¹⁸ cm ⁻³ . In the semiconductor laser device of the first embodiment, the voltage during the oscillation operation was around +2 V (2.17 V in this example), but the leakage current at that time is 1 × 10 ¹⁷ cm as can be seen from FIG. ^In the case of ⁻³ doping, it was about 2 × 10 ⁻⁴ A, and the leakage current value did not change even when the current was applied multiple times (in this example, 5 times). On the other hand, in the case of 1 × 10 ¹⁸ cm ⁻³ doping, the initial leakage current value at +2 V (first energization) is about 100 times that of the 17th power doping, and when energization is repeated (second energization), further 10 It has increased more than twice. As described above, the doping concentration of the low doping concentration semiconductor layer (corresponding to the etch stop layer 107 and the second upper cladding layer 106 in this example; the same applies hereinafter) is desirably 1 × 10 ¹⁷ cm ⁻³ or less. At this time, the low doping concentration semiconductor layer cannot perform sufficient current confinement unless the layer thickness is about 0.1 μm or more. Furthermore, in order to prevent deterioration of the element resistance in the energized region (in the stripe), the thickness of the low doping concentration semiconductor layer must be 0.4 μm or less even if it is thick. By adopting such a configuration, it is possible to obtain a stable current constriction property even during long-term energization. Further, in order to realize a desired optical design and reduce the element resistance, an upper cladding layer (in this example, the first upper cladding layer 105) having a higher doping is provided immediately below the low doping concentration semiconductor layer. It is desirable to have. Adjustment of the thickness of the upper cladding layer required from the optical design is performed in the upper cladding layer of the high doping. At the same time, in order to reduce the resistance of the current injection region, the impurity doping concentration of the p ⁺ -GaAs contact layer 110 forming the top of the ridge 130 is set to 5 × 10 ¹⁸ cm ⁻³ or more. When the p-side electrode 111 made of a non-alloy electrode material (Ti / Pt / Au) is formed thereon under such conditions, the contact resistance between the p-side electrode 111 and the contact layer 110 is a sufficiently low value. (1 × 10 ⁻⁶ Ωcm ² ) can be realized, and good current injection can be performed even for a fine stripe structure. Further, in order to draw the electrode from the top of the ridge 130 to the side of the ridge 130, it is necessary to eliminate the mesa step using some means in the inverted mesa shape, but the ridge 130 is a forward mesa as in this embodiment. If it has a shape, it is possible to make an electrical connection to an external circuit on a relatively wide and high-strength region on the side of the ridge 130 without taking such another means.

  In addition, when the distance from the p-side electrode 111 to the active layer 104 is about 2 μm or less as in the present embodiment, AuZn generally used as the p-side electrode material considers unintended Zn diffusion, It is better not to use it.

In this embodiment, In _0.5 Ga _0.5 P is used as the crystal material of the etch stop layer 107. However, if the thickness is at least 30 mm, sufficient selective etching can be obtained by the above-described manufacturing process. Further, the Ga mixed crystal ratio in the InGaP layer does not need to be 0.5, and as a result of investigation, if it is 0.367 or more and 0.665 or less, there is no deterioration in device characteristics, and good process controllability is exhibited. I understood that.

  Furthermore, in the semiconductor laser device, considering the quantum effect, it is important to set the composition and layer thickness of the etch stop layer 107 so that the band gap of the etch stop layer 107 does not absorb oscillation laser light. . Thereby, good characteristics can be obtained.

  However, depending on the application, a self-pulsation type semiconductor laser can be realized by setting the composition of the etch stop layer 107 so as to absorb the laser beam. In this case, for example, when the thickness of the etch stop layer 107 is about 0.1 μm, it can function as a saturable absorption layer.

  When Al is included as the crystal material of the cladding layer 106 immediately below the etch stop layer 107 as in this embodiment, it is more preferable not to remove the etch stop layer 107. The reason is that when the InGaAlP clad layer 106 containing Al is exposed to the atmosphere during the manufacturing process, the oxidation of Al is induced, and the surface level resulting from the Al oxidation subsequently forms the electrode 111 on the upper part. In addition, it becomes a leak path and deteriorates the current confinement property. Moreover, the level resulting from such Al oxidation also reduces the reliability.

  In the present embodiment, as described above, in the etching step for forming the ridge 130, the side surfaces of the semiconductor layers 110, 109, and 108 are first processed into a substantially vertical shape V by using a dry etching method, and then the wet etching method. Then, it was molded into a slope S having a forward mesa taper angle. As described above, first, the stripe-shaped ridge is roughly prepared in advance by using the dry etching method, so that the controllability of the stripe width of the ridge 130 after the wet etching is greatly improved. As a result, the processing accuracy of the width of the contact layer for current injection is improved, so that variations in element resistance can be reduced.

In addition, as in this embodiment, in order to vertically etch the GaAs, InGaP, and InGaAlP materials forming the semiconductor layers 110, 109, and 108 by dry etching, an inorganic film such as SiO ₂ or SiN _{x is used} as an etching mask. Instead, it is effective to use a resist mask and use Cl ₂ as an etching gas. Further, when the Cl ₂ flow rate is 10, by adding BCl ₃ at a ratio of 1 to 10, the verticality is further improved and the roughness of the side surface of the semiconductor layer left immediately below the etching mask is reduced. Furthermore, when an inert gas such as Ar gas is added, the plasma is stabilized and the ion bombardment is increased even in the plasma state of slower ions, so that damage to the semiconductor laser device can be reduced as a result. Lifespan can be improved.

  Also, in the etching process for forming the ridge 130, anisotropic etching for forming a normal mesa shape can be suitably performed by using a mixed aqueous solution of phosphoric acid and hydrogen peroxide water in the wet etching method. .

In the semiconductor laser device configured as described above, the intermediate layer 109 made of InGaP is provided immediately below the p ⁺ -GaAs contact layer 110, thereby preventing the element resistance from deteriorating. However, since the InGaP intermediate layer 109 is made of the same material as the etch stop layer 107, the end portion 109b of the InGaP intermediate layer 109 is the upper and lower layers as shown in FIG. 4 after etching by the dry etching method and the wet etching method described above. 110 and 108 remain in a manner of projecting sideways from the side surface S. Therefore, in this embodiment, the end portion 109b of the InGaP intermediate layer 109 is removed by applying ultrasonic waves in the water washing step after etching. The ultrasonic wave to be applied is effective from 20 kHz to 350 kHz in the Ultrasonic band. When this type of ultrasonic wave is applied, destructive cavitation occurs randomly in pure water, so the protruding end 109b is extremely efficient. It can be destroyed and removed well. However, if the thickness of the InGaP intermediate layer 109 is 0.1 μm or more, many burrs are left on the side surface of the forward mesa after the removal. Therefore, the thickness of the InGaP intermediate layer 109 is preferably 0.1 μm or less. Even if the layer thickness is 0.1 μm or less, the effect as the intermediate layer is sufficiently maintained. When megasonic wave ultrasonic waves (750 kHz to 3 MHz) are applied, the generated cavitation is non-destructive and occurs only on the surface where the vibrator faces, so the effect of removing the protruding end 109b is eliminated. Is not enough.

  The InGaAlP red semiconductor laser device according to the present embodiment has an oscillation threshold current of 40 mA, an optical output of 150 mW at which end face breakdown (COD) occurs, and is manufactured through three conventional crystal growth steps. Compared to the device, it is not inferior. Further, it showed stable operation for 2500 hours or more in a pulse aging test at 70 ° C. and 100 mW, and it was found that it has sufficient characteristics and reliability as a light source for optical disks.

[Second Embodiment]
FIG. 8 is a cross-sectional view showing a schematic structure of the semiconductor laser device of the second embodiment configured by applying the compound semiconductor device of the present invention. In the present embodiment, the configurations of the semiconductor layer and the electrode layer (p-side electrode) at the top of the ridge are different from those in the first embodiment.

This semiconductor laser device includes an n-In _0.5 Ga _0.5 P buffer layer 202, an n-In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P lower cladding layer 203, a multiple quantum well active layer 204, p on an n-GaAs substrate 201. -In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P first upper cladding layer 205, p-In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P second upper cladding layer 206 as the second semiconductor layer, and p as the underlying semiconductor layer An —In _0.15 Ga _0.85 As _0.3 P _0.7 etch stop layer 207 is sequentially stacked. The multiple quantum well active layer 204 includes an In _0.5 Ga _0.5 P quantum well layer (strain 0.22%, layer thickness: 50 ：, 4 layers) and an In _0.5 (Ga _0.5 Al _0.5 ) _0.5 P barrier layer (layers from the substrate side). Thickness 500 mm, 50 mm 3 layers, 500 mm) are alternately arranged. In addition, a p-In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P layer as an upper semiconductor layer is formed on the p-In _0.15 Ga _0.85 As _0.3 P _0.7 etch stop layer 207 so as to form a forward mesa stripe-shaped ridge 230. Three upper cladding layers 208, p-In _0.5 (Ga _0.75 Al _0.25 ) _0.5 P intermediate layer 209, p-GaAs contact layer 210, p-In _x Ga _1-x As graded layer 211 (from bottom to top in FIG. 8) The composition ratio x gradually changes from 0 to 0.5 toward the surface.) And a p ⁺ -In _0.5 Ga _0.5 As contact layer 212 is provided. Further, the electrode layer is formed by continuously covering the top and side portions of the ridge 230 and the upper surface of the etch stop layer 207 (the portion corresponding to the side of the ridge 230 except directly below the ridge 230). A p-side electrode 213 made of a multilayer metal thin film formed by stacking Ti / Pt / Au in this order is provided. Reference numerals 213a, 213b, and 213c denote portions covering the top and side portions of the ridge 230 and the upper surface of the etch stop layer 207 (referred to as “electrode portions” as appropriate). The contact resistance between the electrode portion 213a and the top of the ridge 230 (contact layer 212) has a sufficiently low value (1 × 10 ⁻⁶ Ωcm ² or less). On the other hand, the interface formed between the electrode portion 213c and the etch stop layer 207 has a function of blocking a downward current in FIG. An n-side electrode 214 made of a multilayer metal thin film made of AuGe / Ni / Au is formed on the back side of the substrate 101 as another electrode layer. As in the first embodiment, this semiconductor laser device is divided into chip sizes having a desired resonator length, and both end surfaces perpendicular to the stripe direction of the ridge 230 are coated with reflection films (not shown). Yes. Thus, an InGaAlP red semiconductor laser device is configured.

  This semiconductor laser device is manufactured as follows.

First, an n-In _0.5 Ga _0.5 P buffer layer 202 (layer thickness: 0.25 μm, Si doping concentration: 1 × 10 ¹⁸ cm ⁻³ ) is formed on the entire (100) plane of the n-GaAs substrate 201 shown in FIG. , N-In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P lower cladding layer 203 (layer thickness: 1.2 μm, Si doping concentration: 1 × 10 ¹⁸ cm ⁻³ ), multiple quantum well active layer 204, p-In _0.5 ( Ga _0.3 Al _0.7 ) _0.5 P first upper cladding layer 205 (layer thickness: 0.2 μm, C doping concentration: 1 × 10 ¹⁸ cm ⁻³ ), p-In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P second upper cladding layer Layer 206 (layer thickness: 0.1 μm, C doping concentration: 1 × 10 ¹⁷ cm ⁻³ ), p-In _0.15 Ga _0.85 As _0.3 P _0.7 etch stop layer 207 (strain −1.4%, layer thickness: 50 μm, C doping concentration: 1 × 10 ¹⁷ cm ⁻³ ), p-In _0.5 ( Ga _0.3 Al _0.7 ) _0.5 P third upper cladding layer 208 (layer thickness: 1.2 μm, C doping concentration: 1.3 × 10 ¹⁸ cm ⁻³ ), p-In _0.5 (Ga _0.75 Al _0.25 ) _0.5 P intermediate layer 209 (layer thickness: 500 mm, C doping concentration: 7 × 10 ¹⁸ cm ⁻³ ), p-GaAs contact layer 210 (layer thickness: 0.3 μm, C doping concentration: 1 × 10 ¹⁹ cm ⁻³ ), p-In _x Ga _1-x As graded layer 211 (x: 0 → 0.5, layer thickness: 500 mm, C doping concentration: 2 × 10 ¹⁹ cm ⁻³ ) and p ⁺ -In _0.5 Ga _0.5 As contact layer 212 (layer Crystal growth is sequentially performed by MOCVD (metal organic chemical vapor deposition) (thickness: 0.1 μm, C doping concentration: 2 × 10 ¹⁹ cm ⁻³ ) (crystal growth step).

  Next, a resist mask 215 (mask width: 3 μm) as an etching mask is formed on a region where the ridge 230 is to be formed (see FIG. 8) by a photolithography process. The resist mask 215 is formed so as to extend in a stripe shape in the <0-11> direction corresponding to the direction in which the ridge 230 to be formed extends.

  Next, as shown in FIGS. 9 to 10, portions of the semiconductor layers 212, 211, 210, 209, and 208 corresponding to the sides of the resist mask 215 are removed by etching (etching process).

Specifically, in this etching step, first, as shown in FIG. 9, the p-In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P-th layer is formed from the upper surface side of the p ⁺ -In _0.5 Ga _0.5 As contact layer 212 in the depth direction. The middle upper cladding layer 208 is removed by etching by dry etching. In this example, a mixed gas of Cl ₂ and SiCl ₄ was used as an etching gas, and He gas was added as an inert gas. The pressure during dry etching was 10 mTorr. Since the chlorine-based gas is used as the etching gas, the etching progress in the lateral direction can be almost eliminated as in the first embodiment. As a result, at the end of the dry etching, the etching gas is directly below the resist mask 215. The side surfaces V of the semiconductor layers 212, 211, 210, 209, and 208 that are left on are substantially perpendicular to the substrate surface.

Subsequently, as shown in FIG. 10, the p-In _0.15 Ga _0.85 As _0.3 P _0.7 etch stop layer 207 is formed from the middle of the p-In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P third upper cladding layer 208 in the depth direction. Etching is removed by wet etching until exposed. In this example, a mixed aqueous solution of sulfuric acid and hydrogen peroxide is used as the etchant. At this time, unlike in the first embodiment, the p-In _0.5 (Ga0.75Al0.25) _0.5 P intermediate layer 209 is also etched in the same manner as the upper and lower layers. As a result, it is possible to form the forward mesa-shaped ridge 230 having the slopes 230b on both sides without performing pure water cleaning with ultrasonic waves. Thereafter, the resist mask 215 is removed.

  Subsequently, as shown in FIG. 11, Pt (layer thickness: 250 Å) / Ti (layer thickness: 500 Å) / Pt (layer thickness: 500 と し て) / as the p-side electrode 213 on the surface side using an electron beam evaporation method. A metal thin film is formed in the order of Au (layer thickness: 3000 mm) (electrode formation step).

  Subsequently, as shown in FIG. 8, the n-GaAs substrate 201 is ground to a desired thickness from the back surface side. Then, a metal thin film is laminated and formed in the order of AuGe (layer thickness: 1500 Å) / Ni (layer thickness: 150 Å) / Au (layer thickness: 3000 Å) as the n-side electrode 112 using a resistance heating vapor deposition method from the back side.

Thereafter, heating is performed at 390 ° C. for 1 minute in an N ₂ or H ₂ atmosphere, and an alloying process for the p-side electrode 213 and the n-side electrode 214 is performed. Thus, a semiconductor laser device is obtained.

In the present embodiment, differences from the first embodiment will be particularly described. First, in the present embodiment, the In _0.5 Ga _0.5 As contact layer 212 having an In composition ratio of 0.5 in the group III element is provided on the top of the ridge 230 in contact with the p-side electrode 213 that performs current injection. Further, an In _x Ga _1-x As graded layer 211 is inserted at a position in contact with the contact layer 212 to absorb a difference in lattice constant from GaAs and to stack a good InGaAs crystal. By changing the In composition of the dud layer 211, the In composition x at the interface with the underlying GaAs layer 210 is 0, and x at the interface with the InGaAs contact layer 212 is 0.5. By adopting such a configuration, it is possible to maintain a good contact resistance even with the ridge 230 having a narrower stripe width than that in the first embodiment. As a result, the current density injected into the active layer 204 immediately below the ridge 230 can be increased, and the threshold current can be reduced. The oscillation threshold current value in the semiconductor laser device of this embodiment was 36 mA.

If the doping concentration of the InGaAs contact layer 212 is at least 5 × 10 ¹⁸ cm ⁻³ or more, good device resistance can be realized. Further, if the In composition ratio in the group III element in the InGaAs layer 212 is at least larger than 0, the effect of reducing the resistance is generated as compared with the GaAs contact layer, but about 0.5 is appropriate. Even if it is more than that, the layer thickness required for the graded layer 211 is increased, although it is not very effective in reducing the contact resistance, and as a result, the width of the top of the ridge 230 is decreased.

  In the present embodiment, InGaAsP is used as the crystal material forming the etch stop layer 207. If the lattice mismatch with the GaAs substrate is within ± 1.5%, the composition of InGaAsP can be suitably used without degrading the quality of the crystal laminated thereon.

  Further, in the semiconductor laser device of the present embodiment, in addition to the limitation of the lattice mismatch rate of the InGaAsP layer that forms the etch stop layer 207, the band gap of the etch stop layer 207 has a value that does not absorb oscillation laser light. It is important to set the composition and layer thickness of the etch stop layer 207.

  Also in this embodiment, it is better not to remove the etch stop layer 207. The reason is to avoid that the Al contained in the InGaAlP cladding layer 206 immediately below the etch stop layer 207 is exposed to the atmosphere during the manufacturing process and oxidized as in the first embodiment. Also in this case, it is possible to design the etch stop layer 207 as a saturable absorption layer and obtain a self-pulsation laser.

  In the present embodiment, InGaAlP having an Al mixed crystal ratio smaller than that of the third upper cladding layer 208 is used as the crystal material forming the intermediate layer 209 inserted between the third upper cladding layer 208 and the GaAs layer 210. At this time, when etching is performed using a mixed aqueous solution of sulfuric acid and hydrogen peroxide solution, the InGaAsP etch stop layer 207 is not etched, and only InGaAs, InGaAlP, and GaAs constituting the stripe structure are removed by etching. Therefore, the forward mesa-shaped ridge 230 can be formed very simply.

Further, in the dry etching prior to the wet etching, in this embodiment, the same amount of SiCl ₄ gas is mixed with the Cl ₂ gas, and further, He gas is added for etching. When SiCl ₄ gas is used, compared with BCl ₃ used in the first embodiment, there is an effect that the etching rate can be increased while maintaining the vertical etching property. Further, even when He gas was added, the same effect as the Ar gas of the first embodiment was obtained.

  As described above, the semiconductor laser device of this embodiment achieves a favorable value of the oscillation threshold current value of 36 mA, and realizes kink-free up to 150 mW, which is the end face breaking light output, due to the effect of narrowing the stripe width. I was able to. The semiconductor laser device also realizes a stable operation of 2500 hours or more in a pulse aging test at 70 ° C. and 100 mW, similarly to the semiconductor laser device of the first embodiment.

[Third Embodiment]
FIG. 12 is a cross-sectional view showing a schematic structure of a semiconductor laser device according to a third embodiment configured by applying the compound semiconductor device of the present invention. This embodiment is different from the first embodiment and the second embodiment in that stripe structures are formed on both sides of the ridge.

  Hereinafter, the configuration and manufacturing method of the stripe structure formed on both sides of the ridge will be described in particular, and the description of the components common to the first and second embodiments will be omitted.

In this semiconductor laser device, p-In _0.5 (Ga _0.3 Al) as a semiconductor layer directly above is formed so as to form a ridge 330 having a forward mesa stripe shape on a p-In _0.5 Ga _0.5 P etch stop layer 307 as a base semiconductor layer. _0.7 ) A _0.5 P third upper cladding layer 308, a p-In _0.5 Ga _0.5 P intermediate layer 309 as an InGaP layer, and a p ⁺ -GaAs contact layer 310 as a GaAs layer are provided. Further, on both sides of the ridge 330, in addition to the third upper cladding layer 308, the InGaP layer 309, and the GaAs layer 310 similar to the ridge 330, the p-In _0.5 Ga _0.5 P current interruption laminated on the GaAs layer 310 is also provided. A stripe structure 313 having a layer 314 and extending in the same direction as the ridge is formed. Due to the presence of the current blocking layer 314, the height of the stripe structure 313 is higher than the height of the ridge 330.

  Covers the top and side surfaces of the ridge 330, the top surface of the etch stop layer 307 (the portion corresponding to the side of the ridge 330, except directly below the ridge 330), and the side and top portions of the stripe structure 313. Thus, a p-side electrode 311 made of a multilayer metal thin film formed by laminating Ti / Pt / Au in this order is provided as an electrode layer. As described above, the height h2 from the surface of the p-side electrode 311 on the etch stop layer 307 to the surface of the p-side electrode 311 on the stripe structure 313 is the surface of the p-side electrode 311 on the etch stop layer 307. To a surface of the p-side electrode 311 on the ridge 330 is higher than the height h1.

The contact resistance between the electrode 311 and the top of the ridge 330 (contact layer 310) is a sufficiently low value (1 × 10 ⁻⁶ Ωcm ² ) as in the first embodiment, while the electrode 311 and the etch stop The interface formed by the layer 307 and the stripe-shaped structure 313 has a function of blocking a downward current in FIG. An n-side electrode 312 made of a multilayer metal thin film made of AuGe / Ni / Au is formed on the back side of the substrate 301 as another electrode layer. As in FIG. 2, this semiconductor laser device is divided into chips having a desired resonator length, and reflection films (not shown) are coated on both end faces of the ridge 330 perpendicular to the stripe direction. Thus, an InGaAlP red semiconductor laser device is configured.

  This semiconductor laser device is manufactured as follows.

First, an n-In _0.5 Ga _0.5 P buffer layer 302 (layer thickness: 0.25 μm, Si doping concentration: 1 × 10 ¹⁸ cm ⁻³ ), n-In is formed on the entire (100) plane of the n-GaAs substrate 301. _0.5 (Ga _0.3 Al _0.7 ) _0.5 P lower cladding layer 303 (layer thickness: 1.2 μm, Si doping concentration: 1 × 10 ¹⁸ cm ⁻³ ), multiple quantum well active layer 304, p-In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P first upper cladding layer 305 (layer thickness: 0.2 μm, Be doping concentration: 1 × 10 ¹⁸ cm ⁻³ ), p-In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P second upper cladding layer 306 (layer) Thickness: 0.1 μm, Be doping concentration: 1 × 10 ¹⁷ cm ⁻³ ), p-In _0.5 Ga _0.5 P etch stop layer 307 (layer thickness: 50 μm, Be doping concentration: 1 × 10 ¹⁷ cm ⁻³ ), p _{-In 0.5 (Ga 0.3 Al 0.7)} 0.5 P third upper Rudd layer 308 (thickness: 1.2 [mu] m, Be doping ^{concentration: 1.3 × 10 18 cm -3)} , p-In 0.5 Ga 0.5 P intermediate layer 309 (thickness: 500 Å, Be doping concentration: 7 × 10 ¹⁸ cm ⁻³ ), p ⁺ -GaAs contact layer 310 (layer thickness: 0.3 μm, Be doping concentration: 2 × 10 ¹⁹ cm ⁻³ ), p-In _0.5 Ga _0.5 P current blocking layer 314 (layer thickness 0.2 μm) , Be doping concentration: 1 × 10 ¹⁷ cm ⁻³ ) is sequentially grown by MBE method (molecular beam epitaxy method).

  Next, an etching mask using a resist is formed on the region where the stripe-shaped structure 313 is formed, and the InGaP current blocking layer 314 in other regions is removed by etching using HCl, and then the resist mask is peeled off. To do.

  Next, a resist mask as an etching mask is formed by a photolithography process over a region (see FIG. 12) where the ridge 330 and the stripe structure 313 are to be formed. The resist mask is formed so as to extend in a stripe shape in the <0-11> direction corresponding to the direction in which the ridge 330 and the stripe structure 313 to be formed extend.

  Next, portions of the semiconductor layers 310, 309, and 308 corresponding to the sides of the resist mask are removed by etching to expose the p-InGaP etch stop layer 307, which is a base semiconductor layer.

  Thereafter, the semiconductor laser device of the third embodiment is completed through the same steps as the method of manufacturing the semiconductor laser device of the first embodiment. In this semiconductor laser device, a so-called junction down type chip mounting in which the electrode 311 side is die-bonded to a heat radiator called a stem or a submount.

  In this semiconductor laser device, as described above, the junction down type mounting in which the electrode 311 on the side close to the active layer where the laser oscillation occurs is die-bonded to the stem or the heat radiator is performed, so that the heat generated in the active layer is dissipated. It is easy to improve element reliability. At this time, in this embodiment, since the stripe structure 313 having a height higher than that of the ridge 330 by the current blocking layer 314 is provided on both sides of the ridge 330, the junction down type mounting is performed. In this case, no stress is applied to the ridge 330 and the ridge is not damaged.

Further, since the current blocking layer 314 is formed subsequent to the contact layer 310 as part of the crystal growth process, the manufacturing process is simplified compared to the case where a process for forming a current blocking insulating film or the like is performed separately. Can be The current blocking layer 314 is formed so as to have an impurity doping concentration of 1 × 10 ¹⁷ cm ⁻³ or less, and even if the electrode 311 is directly provided thereon, the Schottky barrier formed at the interface is formed. Therefore, sufficient current interruption can be realized.

  In the third embodiment, since the electrode layer 311 is formed on the stripe-shaped structure 313 having a height higher than that of the ridge 330, the conductor of the stem or the radiator is used in the junction down type mounting described above. On the other hand, it becomes a structure which takes electrical continuity between the electrode layers 311 on the stripe structure 313, and current injection necessary for laser oscillation can be easily performed.

Accordingly, there is provided a semiconductor laser device that can realize junction type mounting that can improve heat dissipation and improve element reliability without damaging the ridge 330 and that can be manufactured at a low manufacturing cost, and a manufacturing method thereof. Will be able to.
Of course, an insulator may be inserted at the interface between the stripe structure 313 and the electrode layer 311. By forming the insulator, current does not flow from the electrode layer 311 to the base semiconductor layer 307 through the stripe structure 313. Therefore, an excessive leakage current is not generated, and thus a compound semiconductor device having a low threshold current value can be provided.

  In this case, the above-described current blocking layer 314 is not necessarily formed, and the semiconductor layer structure on the semiconductor substrate is configured such that the uppermost layer is a contact layer, as in the first or second embodiment. Also good. At this time, since the insulator is not on the ridge 330 but is present on the stripe structure side, the height on the stripe structure side can be increased, so that the damage of the ridge can be prevented.

Here, as the insulator, in addition to an inorganic insulator such as a silicon oxide film (SiO ₂ ) or a silicon nitride film (SiN _x ), an organic resin (for example, a polyimide resin) can be suitably applied.

  Furthermore, in the third embodiment described above, the example in which the electrode 311 is formed on the stripe-shaped structure has been described. However, for example, the stripe-shaped structure may be formed on the electrode 311. As an example of this, a stripe-shaped structure having conductivity and having a height higher than the ridge is formed by gold plating or the like on both sides of the ridge portion of the semiconductor laser device of the first embodiment or the second embodiment. Can be realized.

  In this case, the step of forming the current blocking layer and the insulator described above can be eliminated, and further, a conductor excellent in heat conduction is formed in the heat dissipation path between the active layer and the stem or the heat sink. There is also an effect that heat dissipation is further improved.

[Fourth Embodiment]
FIG. 13 shows an example of the structure of an optical disc apparatus 400 according to the present invention. This is for writing data on the optical disc 401 or reproducing the written data. As the light emitting element used at that time, the semiconductor laser device of the first embodiment described above (wavelength 650 nm band). 402 is provided.

  This optical disk device will be described in more detail. When writing, the signal light emitted from the semiconductor laser device 402 is converted into parallel light by the collimator lens 403, passes through the beam splitter 404, and the polarization state is adjusted by the λ / 4 polarizing plate 405. The light is condensed and applied to the optical disc 401. At the time of reading, the optical disc 401 is irradiated with a laser beam without a data signal along the same path as at the time of writing. The laser light is reflected on the surface of the optical disc 401 on which data is recorded, passes through the laser light irradiation objective lens 406 and the λ / 4 polarizing plate 405, is reflected by the beam splitter 404, and changes the 90 ° angle, and then receives light. The light is condensed by the element objective lens 407 and is incident on the signal detecting light receiving element 408. The recorded data signal is converted into an electric signal by the intensity of the laser beam incident in the signal detecting light receiving element 408 and is reproduced by the signal light reproducing circuit 409 to the original signal.

  In the optical disk apparatus according to the fourth embodiment, since the semiconductor laser device 402 that operates at a higher light output than before is used, it is possible to read and write data even if the rotational speed of the disk is further increased. Therefore, the access time to the disk, which has been a problem particularly during writing, has become much shorter than a device using a conventional semiconductor laser device. Further, since the semiconductor laser device 402 can be manufactured at a lower cost than before, an optical disk device that can be operated more comfortably can be provided at a low cost.

  Here, an example in which the semiconductor laser device 402 according to the first embodiment is applied to a recording / reproducing optical disc device has been described. However, an optical disc recording device, an optical disc reproducing device using the same wavelength 650 nm band, and other wavelength bands (for example, Needless to say, the present invention can also be applied to an optical disc apparatus of a 780 nm band.

  Furthermore, the compound semiconductor device of the present invention is not limited to the above-described embodiment. For example, the thickness and number of well layers and barrier layers constituting the quantum well active layer of the semiconductor laser device may be used. Of course, various changes can be made without departing from the scope of the invention. In addition, the individual components of the first embodiment, the second embodiment, and the third embodiment can be interchanged with each other.

It is a cross-sectional schematic diagram of a surface perpendicular to the stripe direction of the semiconductor laser device of the first embodiment configured by applying the compound semiconductor device of the present invention. It is a perspective view of the semiconductor laser device. It is a cross-sectional schematic diagram of a surface perpendicular to the stripe direction after completion of etching by the dry etching method in the manufacturing process of the semiconductor laser device. It is a cross-sectional schematic diagram of a surface perpendicular to the stripe direction after completion of etching by the wet etching method in the manufacturing process of the semiconductor laser device. It is a cross-sectional schematic diagram of a surface perpendicular to the stripe direction after completion of pure water cleaning with ultrasonic waves in the manufacturing process of the semiconductor laser device. It is a cross-sectional schematic diagram of a surface perpendicular to the stripe direction after the formation of the p-side electrode in the manufacturing process of the semiconductor laser device. It is the graph which compared the current constriction property by the difference in doping concentration, and energization stability. It is a cross-sectional schematic diagram of a surface perpendicular to the stripe direction of the semiconductor laser device of the second embodiment configured by applying the compound semiconductor device of the present invention. It is a cross-sectional schematic diagram of a surface perpendicular to the stripe direction after completion of etching by the dry etching method in the manufacturing process of the semiconductor laser device. It is a cross-sectional schematic diagram of a surface perpendicular to the stripe direction after completion of etching by the wet etching method in the manufacturing process of the semiconductor laser device. It is a cross-sectional schematic diagram of a surface perpendicular to the stripe direction after the formation of the p-side electrode in the manufacturing process of the semiconductor laser device. It is a cross-sectional schematic diagram of a surface perpendicular to the stripe direction of the semiconductor laser device of the third embodiment configured by applying the compound semiconductor device of the present invention. It is the schematic explaining the structure of the optical disk apparatus of 4th Embodiment of this invention. It is a cross-sectional schematic diagram of a surface perpendicular to the stripe direction in a conventional InGaAlP semiconductor laser device. It is a cross-sectional schematic diagram for demonstrating the manufacturing method of the said conventional InGaAlP type semiconductor laser apparatus.

Explanation of symbols

101, 201 n-GaAs substrate 102, 202 n-InGaP buffer layer 103, 203 n-InGaAlP lower cladding layer 104, 204 multiple quantum well active layer 105, 205 p-InGaAlP first upper cladding layer 106, 206 p-InGaAlP second Second upper cladding layer 107 p-InGaP etch stop layer 207 p-InGaAsP etch stop layer 108, 208 p-InGaAlP third upper cladding layer 109 p-InGaP intermediate layer 130, 230, 330 Ridge 209 p-InGaAlP intermediate layer 110, 210 p-GaAs contact layer 211 p-In _x Ga _{1 -x} As graded layer 212 p-InGaAs contact layer 111, 213, 311 p-side electrode 112, 214 n-side electrode 113, 215 resist mask 313 Striped structure 400 Optical disc device 401 Optical disc 402 Semiconductor laser device 403 Collimator lens 404 Beam splitter 405 Polarizing plate 406 Laser light irradiation objective lens 407 Reproduction light objective lens 408 Signal detection light receiving element 409 Signal light reproduction circuit 511 n− GaAs substrate 512 n-GaAs buffer layer 513 n-InGaP buffer layer 514 n-InGaAlP cladding layer 515 n-InGaP active layer 516, 517, 518 p-InGaAlP cladding layer 519 p-InGaAlP contact layer 520 p-GaAs contact layer 521 n -GaAs current blocking layer 522 p-GaAs contact layer 523 and 524 a metal electrode 526 SiO ₂ film 527, 528 striped mesa 529 strike Type-like ridge

Claims (30)

A base semiconductor layer made of a III-V group compound semiconductor containing P and not containing Al, which is laminated on a GaAs substrate,
A semiconductor layer immediately above that forms a stripe-shaped ridge formed on the surface of the base semiconductor layer using a III-V group compound containing P, Al and In as a crystal material;
An electrode layer covering a top and at least one side surface of the ridge, and an electrode layer covering a portion corresponding to a side of the ridge among the upper surface of the base semiconductor layer;
An impurity doping concentration that determines the conductivity type of at least a portion in contact with the electrode layer in the base semiconductor layer is 1 × 10 ¹⁷ cm ⁻³ or less so that current is blocked at the interface between the base semiconductor layer and the electrode layer. A compound semiconductor device, characterized in that it is set to The compound semiconductor device according to claim 1,
2. The compound semiconductor device according to claim 1, wherein the ridge includes the semiconductor layer immediately above, an InGaP layer stacked on the semiconductor layer immediately above, and a GaAs layer. The compound semiconductor device according to claim 2,
The compound semiconductor device, wherein the ridge further includes an InGaAs layer laminated on the GaAs layer. The compound semiconductor device according to claim 1,
The compound semiconductor device, wherein the crystal material forming the semiconductor layer immediately above is made of either InGaAlP or InGaAlAsP. The compound semiconductor device according to claim 1,
A compound semiconductor device, wherein the crystalline material forming the base semiconductor layer is made of either InGaP or InGaAsP. The compound semiconductor device according to claim 1,
A compound semiconductor device, wherein the thickness of the base semiconductor layer is 30 mm or more. The compound semiconductor device according to claim 1,
A compound semiconductor device, wherein a thickness of the base semiconductor layer is 0.1 μm or more and 0.4 μm or less. The compound semiconductor device according to claim 1,
At a position in contact with the lower surface of the underlying semiconductor layer between the GaAs substrate and the underlying semiconductor layer, the doping concentration of an impurity having the same conductivity type as that of the underlying semiconductor layer and defining the conductivity type is 1 ×. A second semiconductor layer set to 10 ¹⁷ cm ⁻³ or less,
A compound semiconductor device, wherein a total thickness of the base semiconductor layer and the second semiconductor layer is 0.1 μm or more and 0.4 μm or less. The compound semiconductor device according to claim 2,
A compound semiconductor device, wherein a doping concentration of an impurity for determining a conductivity type of the GaAs layer included in the ridge is 5 × 10 ¹⁸ cm ⁻³ or more. The compound semiconductor device according to claim 3,
A compound semiconductor device, wherein a doping concentration of an impurity that determines a conductivity type of the InGaAs layer included in the ridge is 5 × 10 ¹⁸ cm ⁻³ or more. The compound semiconductor device according to claim 1,
A compound semiconductor device, wherein a crystal material forming the base semiconductor layer is made of InGaP, and a Ga composition ratio in a group III element in the InGaP is 0.367 or more and 0.665 or less. The compound semiconductor device according to claim 1,
A compound semiconductor device, wherein a crystal material forming the base semiconductor layer is made of InGaAsP, and a lattice mismatch ratio between the base semiconductor layer and the GaAs substrate is ± 1.5% or less. The compound semiconductor device according to claim 1,
A compound semiconductor device comprising a semiconductor layer group including an active layer for performing laser oscillation between the GaAs substrate and a base semiconductor layer. The compound semiconductor device according to claim 13,
A compound semiconductor device, further comprising a stripe structure having a height equal to or higher than the ridge on the surface of the base semiconductor layer on both sides of the semiconductor layer immediately above the stripe ridge. The compound semiconductor device according to claim 14,
The compound semiconductor device, wherein the electrode layer is further formed on the stripe structure. The compound semiconductor device according to claim 15,
The stripe structure is composed of a semiconductor layer,
A compound semiconductor device, wherein an insulator is inserted in an interface between the stripe structure and the electrode layer. The compound semiconductor device according to claim 15,
The stripe structure is composed of a semiconductor layer,
The doping concentration of the impurity that determines the conductivity type of the semiconductor layer in contact with the electrode layer at least at the top of the stripe structure is 1 × so that current is blocked at the interface between the top of the stripe structure and the electrode layer. A compound semiconductor device characterized by being set to 10 ¹⁷ cm ⁻³ or less. The compound semiconductor device according to claim 14,
2. The compound semiconductor device according to claim 1, wherein the stripe structure is a conductor formed on the electrode layer. A base semiconductor layer having a doping concentration of an impurity defining a conductivity type of 1 × 10 ¹⁷ cm ⁻³ or less on a GaAs substrate using at least a group III-V compound semiconductor containing P and not containing Al as a crystal material; A crystal growth step of sequentially stacking a semiconductor layer directly on the crystal material of a group III-V compound containing Al and In;
Forming an etching mask having a stripe pattern on the semiconductor layer immediately above;
Using the etching mask, a portion corresponding to the side of the etching mask is removed by etching to form a stripe-shaped ridge made of the semiconductor layer directly on the surface of the underlying semiconductor layer. And an etching step of exposing a portion of the base semiconductor layer corresponding to the side of the ridge,
An electrode forming step of forming an electrode layer so as to cover a portion corresponding to the side of the ridge among the top and at least one side surface of the ridge and the upper surface of the base semiconductor layer after removing the etching mask; ,
The manufacturing method of the compound semiconductor device characterized by the above-mentioned. In the manufacturing method of the compound semiconductor device according to claim 19,
A method of manufacturing a compound semiconductor device, wherein an etching rate for the base semiconductor layer in the etching step is slower than an etching rate for the semiconductor layer immediately above. In the manufacturing method of the compound semiconductor device according to claim 19,
In the crystal growth step, an InGaP layer and a GaAs layer are further stacked in this order on the semiconductor layer immediately above,
In the etching step, a portion corresponding to the side of the etching mask among the GaAs layer, InGaP layer, and the semiconductor immediately above is subjected to etching, and this etching is performed from the upper surface side of the GaAs layer with respect to the depth direction. A method of manufacturing a compound semiconductor device, comprising: performing a dry etching method halfway through a layer, and subsequently performing a wet etching method from the middle of the semiconductor layer immediately above until the underlying semiconductor layer is exposed. In the manufacturing method of the compound semiconductor device according to claim 21,
After the etching by the dry etching method and the wet etching method, the end of the InGaP layer remaining in a mode protruding sideways from between the side surfaces of the semiconductor layer immediately above and the GaAs layer is removed by pure water cleaning with ultrasonic waves. And a method of manufacturing a compound semiconductor device. In the manufacturing method of the compound semiconductor device according to claim 22,
A method of manufacturing a compound semiconductor device, wherein the InGaP layer has a thickness of 0.1 μm or less. In the manufacturing method of the compound semiconductor device according to claim 22,
A method of manufacturing a compound semiconductor device, wherein the frequency of ultrasonic waves applied to the pure water cleaning is 20 kHz to 350 kHz. In the manufacturing method of the compound semiconductor device according to claim 19,
In the crystal growth step, an InGaAlP layer having a smaller Al mixed crystal ratio in the group III element than the semiconductor layer immediately above and a GaAs layer are stacked in this order on the semiconductor layer directly above.
In the etching step, the portion corresponding to the side of the etching mask is removed by etching from the GaAs layer, InGaAlP layer, and immediately above semiconductor layer, and this etching is performed from the upper surface side of the GaAs layer in the depth direction. A method of manufacturing a compound semiconductor device, comprising performing a dry etching method halfway through the semiconductor layer immediately above, and then performing a wet etching method from the middle of the semiconductor layer immediately above until the underlying semiconductor layer is exposed. In the manufacturing method of the compound semiconductor device of Claim 21 or 25,
A manufacturing method of a compound semiconductor device, wherein an etching gas used in the dry etching method is a chlorine-based gas. The method of manufacturing a compound semiconductor device according to claim 26,
A manufacturing method of a compound semiconductor device, wherein an inert gas is added to the chlorine-based gas. In the manufacturing method of the compound semiconductor device according to claim 19,
An etchant used in the wet etching method is a mixed aqueous solution in which phosphoric acid or sulfuric acid is added to hydrogen peroxide solution. In the manufacturing method of the compound semiconductor device according to claim 19,
A method of manufacturing a compound semiconductor device, comprising: laminating a semiconductor layer group including an active layer for performing laser oscillation between the GaAs substrate and a base semiconductor layer in the crystal growth step. An optical disk device comprising the compound semiconductor device according to claim 18.

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