JP2002208843A5 - - Google Patents
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- Publication number
- JP2002208843A5 JP2002208843A5 JP2001346954A JP2001346954A JP2002208843A5 JP 2002208843 A5 JP2002208843 A5 JP 2002208843A5 JP 2001346954 A JP2001346954 A JP 2001346954A JP 2001346954 A JP2001346954 A JP 2001346954A JP 2002208843 A5 JP2002208843 A5 JP 2002208843A5
- Authority
- JP
- Japan
- Prior art keywords
- signal
- amplifier
- comparator
- output
- threshold
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000000295 complement effect Effects 0.000 claims 4
- 230000003321 amplification Effects 0.000 claims 1
- 238000003199 nucleic acid amplification method Methods 0.000 claims 1
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP00125758.3 | 2000-11-24 | ||
| EP00125758A EP1152530B1 (en) | 2000-11-24 | 2000-11-24 | Circuit for providing a logical output signal in accordance with crossing points of differential signals |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2002208843A JP2002208843A (ja) | 2002-07-26 |
| JP2002208843A5 true JP2002208843A5 (https=) | 2005-07-07 |
| JP3935338B2 JP3935338B2 (ja) | 2007-06-20 |
Family
ID=8170471
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001346954A Expired - Lifetime JP3935338B2 (ja) | 2000-11-24 | 2001-11-13 | 差動信号の交差点に従って論理出力信号を送り出すための回路 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US6448806B1 (https=) |
| EP (1) | EP1152530B1 (https=) |
| JP (1) | JP3935338B2 (https=) |
| DE (1) | DE60001923T2 (https=) |
Families Citing this family (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6703866B1 (en) * | 2000-12-19 | 2004-03-09 | International Business Machines Corporation | Selectable interface for interfacing integrated circuit modules |
| US7397848B2 (en) | 2003-04-09 | 2008-07-08 | Rambus Inc. | Partial response receiver |
| US7092472B2 (en) * | 2003-09-16 | 2006-08-15 | Rambus Inc. | Data-level clock recovery |
| US7126378B2 (en) | 2003-12-17 | 2006-10-24 | Rambus, Inc. | High speed signaling system with adaptive transmit pre-emphasis |
| US7233164B2 (en) * | 2003-12-17 | 2007-06-19 | Rambus Inc. | Offset cancellation in a multi-level signaling system |
| US7151367B2 (en) * | 2004-03-31 | 2006-12-19 | Teradyne, Inc. | Method of measuring duty cycle |
| WO2006019007A1 (ja) * | 2004-08-16 | 2006-02-23 | Advantest Corporation | 差動コンパレータ回路、テストヘッド、及び試験装置 |
| US7294993B2 (en) * | 2004-08-25 | 2007-11-13 | International Rectifier Corporation | Method and apparatus for customizing of a power supply based on load characteristic data |
| US7734866B2 (en) * | 2005-08-04 | 2010-06-08 | Rambus Inc. | Memory with address-differentiated refresh rate to accommodate low-retention storage rows |
| US7524077B2 (en) * | 2006-09-07 | 2009-04-28 | Hartman Michael S | Lamp and illuminated hardscape |
| US7808282B2 (en) * | 2008-11-25 | 2010-10-05 | Pericom Semiconductor Corp. | Out-of-band signaling using detector with equalizer, multiplier and comparator |
| US7786762B2 (en) * | 2009-01-21 | 2010-08-31 | Xilinx, Inc. | Generic buffer circuits and methods for out of band signaling |
| US8476934B2 (en) | 2011-07-21 | 2013-07-02 | National Semiconductor Corporation | Circuitry and method for differential signal detection with integrated reference voltage |
| US8933729B1 (en) * | 2012-03-30 | 2015-01-13 | Rambus Inc. | Stacked receivers |
| CN105652070B (zh) * | 2016-01-21 | 2018-11-30 | 烽火通信科技股份有限公司 | 一种差分信号幅度检测电路 |
| KR102409877B1 (ko) * | 2017-12-21 | 2022-06-20 | 에스케이하이닉스 주식회사 | 수신 회로 및 이를 이용하는 집적 회로 시스템 |
| US11271566B2 (en) * | 2018-12-14 | 2022-03-08 | Integrated Device Technology, Inc. | Digital logic compatible inputs in compound semiconductor circuits |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3331109B2 (ja) * | 1996-01-23 | 2002-10-07 | 株式会社アドバンテスト | 半導体試験装置の比較器 |
| US6377073B1 (en) * | 1999-11-30 | 2002-04-23 | Texas Instruments Incorporated | Structure and method for reduction of power consumption in integrated circuit logic |
| US6281699B1 (en) * | 2000-03-15 | 2001-08-28 | Teradyne, Inc. | Detector with common mode comparator for automatic test equipment |
-
2000
- 2000-11-24 EP EP00125758A patent/EP1152530B1/en not_active Expired - Lifetime
- 2000-11-24 DE DE60001923T patent/DE60001923T2/de not_active Expired - Lifetime
-
2001
- 2001-09-21 US US09/957,922 patent/US6448806B1/en not_active Expired - Lifetime
- 2001-11-13 JP JP2001346954A patent/JP3935338B2/ja not_active Expired - Lifetime
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