JP2002190623A - Thermoelectric element array unit and manufacturing method of it, and thermoelectric module using the same - Google Patents

Thermoelectric element array unit and manufacturing method of it, and thermoelectric module using the same

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Publication number
JP2002190623A
JP2002190623A JP2000387553A JP2000387553A JP2002190623A JP 2002190623 A JP2002190623 A JP 2002190623A JP 2000387553 A JP2000387553 A JP 2000387553A JP 2000387553 A JP2000387553 A JP 2000387553A JP 2002190623 A JP2002190623 A JP 2002190623A
Authority
JP
Japan
Prior art keywords
type
thermoelectric element
thermoelectric
holes
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000387553A
Other languages
Japanese (ja)
Inventor
Seishi Takagi
清史 高木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Okano Electric Wire Co Ltd
Original Assignee
Okano Electric Wire Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Okano Electric Wire Co Ltd filed Critical Okano Electric Wire Co Ltd
Priority to JP2000387553A priority Critical patent/JP2002190623A/en
Publication of JP2002190623A publication Critical patent/JP2002190623A/en
Pending legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To easily manufacture a thermoelectric element array unit in which a plurality of thermoelectric elements of p-type and n-type is provided. SOLUTION: An element forming laminated body 23 is formed by arranging an upper mold 21 and a lower mold 22 respectively on upper side and lower side of an insulating spacer 15 comprising a plurality of integral through-holes 14. The molds 21 and 22 are provide with through-holes 20 of the same number, the same diameter and the same aligned positions as the insulating spacer 15. A p-n selecting means 24 comprising selection holes 25 for p-type hole selection is arranged on the lower side of the element forming laminated body 23. The laminated body 23 is immersed in a solution of a p-type material to fill the holes of the laminated body 23 which led to the selection holes 25 with the solution, followed by cooling to form p-type thermoelectric elements. Next, the p-n selecting means is replaced for that of n-type hole selection and the laminated body 23 is immersed in an n-type solution, thereby forming n-type thermoelectric elements in the rest of the holes of the laminated body 23. The p-n selecting means 24 and the molds 21 and 22 are removed, and the thermoelectric element array unit can be obtained.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、電流を通電するこ
とにより冷却・加熱を行うペルチェ素子や、発電を生じ
せしめるゼーベック素子等の熱電素子を配列してユニッ
ト化した熱電素子配列ユニットおよびその製造方法並び
に熱電素子配列ユニットを用いた熱電モジュールに関す
るものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thermoelectric element array unit in which thermoelectric elements such as a Peltier element for cooling and heating by applying a current and a Seebeck element for generating electric power are arranged and formed into a unit, and a production thereof. The present invention relates to a method and a thermoelectric module using a thermoelectric element array unit.

【0002】[0002]

【従来の技術】熱電素子として一般的に知られているペ
ルチェ素子は、ビスマス・テルル等の金属間化合物にア
ンチモン、セレン等の元素を添加することにより、p、
n型素子を形成し、このp、n型素子を注入電極を介在
させ交互に直列に並べ、該直列素子の両端に、電圧を印
加し、電流を流すことにより、素子と電極界面で冷却・
加熱効果を生ぜしめる素子であり、図11(a)、
(b)に示す構成をとる。又、その具体的構成は、p、
nの熱電素子1を直列に接続する電極2等を形成した厚
さ0.3〜1mm程度のアルミナ(Al)等のセ
ラミック薄板等からなる絶縁性基板3、4を上下に対向
して配置し、上記電極3、4間に直径0.6〜3mm程
度、長さ0.5〜3mm程度のp型、n型のビスマス・
テルル等からなる熱電素子1を配置してなる。尚、これ
ら熱電素子1と、電極2間や、リード素子電極5間は図
示しない半田等により固定されている。図中、6はリー
ド端子である。
2. Description of the Related Art A Peltier device generally known as a thermoelectric device is obtained by adding an element such as antimony or selenium to an intermetallic compound such as bismuth tellurium.
An n-type element is formed, and the p-type and n-type elements are alternately arranged in series with an injection electrode interposed therebetween. A voltage is applied to both ends of the series element, and a current is caused to flow.
It is an element that produces a heating effect, and is shown in FIG.
The configuration shown in FIG. The specific configuration is p,
The insulating substrates 3 and 4 made of a thin ceramic plate or the like made of alumina (Al 2 O 3 ) or the like having a thickness of about 0.3 to 1 mm on which electrodes 2 and the like for connecting the n thermoelectric elements 1 in series are formed. P-type and n-type bismuth having a diameter of about 0.6 to 3 mm and a length of about 0.5 to 3 mm between the electrodes 3 and 4.
A thermoelectric element 1 made of tellurium or the like is arranged. The thermoelectric element 1 and the electrodes 2 and the lead element electrodes 5 are fixed by solder or the like (not shown). In the figure, reference numeral 6 denotes a lead terminal.

【0003】熱電素子1は従来、以下の二つの方法で作
られることが一般的である。 インゴット切断法:BiTeにセレン、アンチモン
等の元素を適当量添加して、図示しない700℃〜90
0℃に保たれた融液からブリッジマン炉等を用いて直径
数十センチのインゴットを図15(a)に示すように作
成し、更にこれをウェハ状にスライシングし、更に図1
5(b)に示すように、該ウェハ8を、ダイサー9等の
切断手段により切断して上記所定寸法に素子1を形成す
る。尚、p型、n型の素子1はそれぞれ合金組成を調整
して別個に作成される。
Conventionally, thermoelectric elements 1 are generally manufactured by the following two methods. Ingot cutting method: Bi 2 Te 3 is added with an appropriate amount of an element such as selenium, antimony, etc.
Using a Bridgman furnace or the like, an ingot having a diameter of several tens of centimeters was prepared from the melt maintained at 0 ° C. as shown in FIG.
As shown in FIG. 5B, the wafer 8 is cut by a cutting means such as a dicer 9 to form the device 1 having the predetermined dimensions. The p-type and n-type elements 1 are separately manufactured by adjusting the alloy composition.

【0004】型内成長法:図12(a)の斜視図に示す
ようにカーボンやアルミナ等からなる二つ割の成形型1
0を合わせ、図示しない位置決め・固定手段により固定
し、図13のようにBiTeにセレン、アンチモン
等の元素を適当量添加した700℃〜900℃に保たれ
た融液11に浸漬し、融液から成形型10を引き上げる
ことにより、図12(b)に示す角柱或いは円柱状の素
子を得る。得られた素子は、図14に示すように、図示
しない固定治具に取りつけられた後、長さ0.5〜3m
m程度の所定寸法に切断してモジュールに組み込む熱電
素子1とする。なお、BiTeにセレンを添加する
ことによりp型の熱電素子材料となり、BiTe
アンチモンを添加することによりn型の熱電素子材料と
なる。
In-mold growth method: As shown in the perspective view of FIG.
0, fixed by a positioning / fixing means (not shown), and immersed in a melt 11 maintained at 700 ° C. to 900 ° C. obtained by adding an appropriate amount of elements such as selenium and antimony to Bi 2 Te 3 as shown in FIG. Then, by pulling up the mold 10 from the melt, a prismatic or columnar element shown in FIG. As shown in FIG. 14, the obtained element was attached to a fixing jig (not shown), and then was 0.5 to 3 m in length.
The thermoelectric element 1 is cut into a predetermined dimension of about m and incorporated into a module. The addition of selenium to Bi 2 Te 3 results in a p-type thermoelectric element material, and the addition of antimony to Bi 2 Te 3 results in an n-type thermoelectric element material.

【0005】次に熱電素子1を組み立てて熱電モジュー
ルを作成する方法について示すが、従来以下の二つの製
造方法(組立て方法)が採られていた。 直接組立て法:図16に示すように、アルミナ等のセラ
ミック製の整列治具12を、あらかじめ電極2を形成
し、更に半田をメッキ等により形成したアルミナ等から
なる回路基板4の上に載せ、所定寸法に切断されたp及
びn型熱電素子1を交互に整列治具12の配列孔13内
に入れて並べ、トンネル炉内で熱電素子1と基板4の電
極2間を固定する。固定後、整列治具12を外し、上下
を入れ替え上側に回路基板3を載せ、同様の方法で熱処
理し、半田等で固定することで熱電モジュールを作成す
る。
Next, a method of assembling the thermoelectric element 1 to produce a thermoelectric module will be described. Conventionally, the following two manufacturing methods (assembly methods) have been adopted. Direct assembly method: As shown in FIG. 16, a ceramic alignment jig 12 made of alumina or the like is placed on a circuit board 4 made of alumina or the like on which electrodes 2 are formed in advance and solder is formed by plating or the like. The p-type and n-type thermoelectric elements 1 cut to a predetermined size are alternately placed in the arrangement holes 13 of the alignment jig 12, and are fixed between the thermoelectric elements 1 and the electrodes 2 of the substrate 4 in a tunnel furnace. After the fixing, the alignment jig 12 is removed, the circuit board 3 is placed on the upper side, the circuit board 3 is placed on the upper side, the heat treatment is performed in the same manner, and the thermoelectric module is fixed by soldering or the like.

【0006】スペーサ組立て法:熱電素子1を、図17
(a)に示すように所定の本数に対応する貫通孔14を
設けた薄板のセラミックやガラス/エポキシ樹脂等から
なる絶縁性スペーサ15を複数枚、所定の距離離間して
配置し、p型、n型の素子1を棒状のまま、交互に突き
通し、エポキシ接着剤を、貫通孔14と熱電素子1間に
塗布し、硬化させることにより固定する。しかる後、切
断治具(図示せず)にスペーサごと、一体化体を装着
し、図17(b)に示すように、ダイシングソー等の切
断手段により熱電素子1を切断線16に沿って切断し、
図9に示す熱電素子配列ユニット(絶縁性スペーサ15
に複数のp型とn型の熱電素子1が交互に配列固定され
たスペーサ/素子複合体)17を作る。かかる工程の
後、熱電素子配列ユニット17の上下に前記、直接組み
立て法と同様の半田固定法により基板3、4を配置し、
図9(b)に示す熱電モジュールを得る。
[0006] Spacer assembling method: Thermoelectric element 1 is
As shown in (a), a plurality of insulating spacers 15 made of a thin ceramic or glass / epoxy resin or the like provided with through holes 14 corresponding to a predetermined number are arranged at a predetermined distance from each other, and a p-type, The n-type elements 1 are pierced alternately while keeping the rod shape, and an epoxy adhesive is applied between the through hole 14 and the thermoelectric element 1 and cured to be fixed. Thereafter, the integrated body is attached together with the spacer to a cutting jig (not shown), and the thermoelectric element 1 is cut along the cutting line 16 by a cutting means such as a dicing saw as shown in FIG. And
The thermoelectric element array unit shown in FIG.
Then, a spacer / element complex 17 in which a plurality of p-type and n-type thermoelectric elements 1 are alternately arranged and fixed is formed. After this step, the substrates 3 and 4 are arranged above and below the thermoelectric element array unit 17 by the same solder fixing method as the direct assembly method,
The thermoelectric module shown in FIG. 9B is obtained.

【0007】尚、BiTeをベースとする熱電素子
1は、銅や銀からなる電極材と直接、半田付けにより良
好な電気的・機械的接続をすることが困難なため、通
常、熱電素子1の両端部にNi.Auメッキ等を用いる
ことが多いがこの場合、図10に示すように、熱電素子
1の中間部に、メッキレジスト等を形成する絶縁のため
のコーティング18を設けメッキ19が形成される。
Incidentally, the thermoelectric element 1 based on Bi 2 Te 3 is usually difficult to make good electrical and mechanical connection by soldering directly to an electrode material made of copper or silver. Ni. In many cases, Au plating or the like is used. In this case, as shown in FIG. 10, a coating 19 for insulation for forming a plating resist or the like is provided in a middle portion of the thermoelectric element 1 to form a plating 19.

【0008】[0008]

【発明が解決しようとする課題】インゴット切断法や型
内成長法のいずれにおいても、小径・短尺の熱電素子1
をp、nそれぞれに切断して作る方法においては、端部
にメッキを行う際に、両端子間のメッキ短絡が生じやす
い問題点があった。そのために図10に示すように中間
部にメッキが付着することを防止するためのレジストコ
ーティング18を一本、一本確実に施し、又、熱電素子
1の放熱特性を損じることが無いようにメッキ後に、こ
のコーティング18を完全に除去することを行っていた
が、工程が煩雑であり、かつコーティング18の完全被
覆・除去のために多大な工数がかかる問題点があった。
In both the ingot cutting method and the in-mold growth method, a small-diameter and short thermoelectric element 1 is required.
Is cut into p and n, respectively, when plating the ends, there is a problem that a plating short-circuit easily occurs between both terminals. For this purpose, as shown in FIG. 10, one resist coating 18 for preventing the plating from adhering to the intermediate portion is surely applied, and the plating is performed so as not to impair the heat radiation characteristics of the thermoelectric element 1. Later, the coating 18 was completely removed. However, there was a problem that the process was complicated and a large number of steps were required to completely cover and remove the coating 18.

【0009】また、型内成長法により作成した多数の熱
電素子1を図17に示すように、絶縁性スペーサ15の
貫通孔14に挿入していく方法においては、該Bi
合金が極めて脆く、かつ小応力に対して変形しやす
い性質を持つため、1mm以下の素子1については貫通
孔自体を1.2mm以上にとる必要があり、熱電モジュ
ールの素子冷却面での均熱性を保持するための条件であ
る素子1の高密度配列が困難であるという問題点があっ
た。
Moreover, many of the thermoelectric element 1 was made by mold growth method as shown in FIG. 17, in the method of gradually inserted into the through hole 14 of the insulating spacer 15, the Bi 2 T
e 3 alloy is extremely brittle, and because of its deformable properties to small stresses, the following elements 1 1 mm must take through holes themselves than 1.2 mm, in the element cooling surface of the thermoelectric module There is a problem that it is difficult to arrange the elements 1 at a high density, which is a condition for maintaining the heat uniformity.

【0010】また、この方法ではスペーサ15があるた
めに熱電素子の両端の短絡現象は生じない利点はある
が、スペーサ15と貫通孔14を一体化するためのエポ
キシ接着剤の塗布・乾燥・硬化に時間がかかる欠点と放
熱性を損なわないために行うはみ出し部分のエポキシ樹
脂除去が困難である欠点を有している。
Although this method has the advantage that the short-circuit phenomenon does not occur at both ends of the thermoelectric element due to the presence of the spacer 15, the application, drying and curing of an epoxy adhesive for integrating the spacer 15 and the through hole 14 is performed. And the disadvantage that it is difficult to remove the epoxy resin from the protruding portion so as not to impair the heat dissipation.

【0011】更に、いずれの方法においてもp、n素子
1を手作業で交互に配列することは極めて面倒であり、
自動化するために高価な部品挿入・配設機を使用せざる
を得なく、又、この場合でも、一個一個の配列に時間が
かかる問題点があった。
Further, in any of the methods, it is extremely troublesome to arrange the p and n elements 1 alternately by hand.
An expensive component insertion / placement machine has to be used for automation, and even in this case, there is a problem that it takes time to arrange each of them.

【0012】本発明においては、p、n各熱電素子を切
断したり、個別に挿入することなく、又、メッキ短絡が
生じにくく、更にエポキシ樹脂等を用いることなく、多
数本の熱電素子を高密度に配列することが可能な熱電素
子配列ユニットおよびその製造方法並びに熱電素子ユニ
ットを用いた熱電モジュールを提供することを目的とす
る。
In the present invention, a large number of thermoelectric elements can be mounted without cutting or inserting each of the p and n thermoelectric elements, hardly causing a plating short circuit, and without using an epoxy resin or the like. It is an object of the present invention to provide a thermoelectric element array unit capable of being arranged at a high density, a method for manufacturing the same, and a thermoelectric module using the thermoelectric element unit.

【0013】[0013]

【課題を解決するための手段】本発明は上記目的を達成
するために、次のような構成をもって、課題を解決する
手段としている。すなわち、本発明の熱電素子配列ユニ
ットは、複数の貫通孔を有する絶縁性スペーサにp型の
熱電素子とn型の熱電素子が前記複数の貫通孔の隣合う
孔に交互に挿通固定されて該絶縁性スペーサの表裏両面
から熱電素子が突設されている熱電素子配列ユニットに
おいて、前記熱電素子は融液状態で前記絶縁性スペーサ
の貫通孔壁面に接触させた後に冷却固体化する凝固固定
によって接着剤を用いずに絶縁スペースの貫通孔に固定
保持されている構成をもって課題を解決する手段として
いる。
Means for Solving the Problems In order to achieve the above object, the present invention has the following structure to solve the problems. That is, in the thermoelectric element array unit of the present invention, a p-type thermoelectric element and an n-type thermoelectric element are alternately inserted and fixed in holes adjacent to the plurality of through holes in an insulating spacer having a plurality of through holes. In a thermoelectric element array unit in which thermoelectric elements protrude from both front and back surfaces of an insulating spacer, the thermoelectric elements are bonded in a molten state by solidification fixation, which is brought into contact with a through hole wall surface of the insulating spacer and then cooled and solidified. This is a means for solving the problem by having a configuration fixed and held in the through hole of the insulating space without using an agent.

【0014】また、熱電素子配列ユニットの製造方法の
第1の発明は、複数の貫通孔を有する絶縁性スペーサに
p型の熱電素子とn型の熱電素子が前記複数の貫通孔の
隣合う孔に交互に挿通固定されて該絶縁性スペーサの表
裏両面から熱電素子が突設されている熱電素子配列ユニ
ットの製造方法において、絶縁性スペーサの複数の各貫
通孔に対応する貫通孔を備えた少なくとも一対の素子成
形手段を孔位置を合わせて前記絶縁性スペーサの表裏両
面に重ね合わせ着脱自在に一体化することで素子形成積
層体を形成し、この素子形成積層体の少なくとも表裏一
方側にp型とn型を択一的に選択する選択孔を設けたp
n選択手段を配置し、選択孔を素子形成積層体のp型と
n型の一方側となる孔に合わせてp型とn型の一方を選
択し、然る後に、素子形成積層体を選択したp、nの一
方側材料の融液に浸漬して選択孔から該選択孔に通じる
素子形成積層体の孔に融液を充填させ、然る後に冷却硬
化してp、nの一方側の熱電素子を素子形成積層体の選
択された孔内に成形し、次に、同様にしてpn選択手段
によりp、nの他方側となる素子形成積層体の孔を選択
して、素子形成積層体を選択したp、nの他方側の融液
に浸漬し前記一方側の熱電素子成形の場合と同様にp、
nの他方側の熱電素子を素子形成積層体の残りの孔内に
成形し、然る後に前記pn選択手段と素子成形手段を絶
縁性スペーサから取り除いて熱電素子配列ユニットを得
る構成としたことをもって、課題を解決する手段として
いる。
Further, a first invention of a method of manufacturing a thermoelectric element array unit is characterized in that a p-type thermoelectric element and an n-type thermoelectric element are formed in an insulating spacer having a plurality of through-holes adjacent to the plurality of through-holes. In the method for manufacturing a thermoelectric element array unit in which the thermoelectric elements are alternately inserted and fixed and the thermoelectric elements protrude from both the front and back surfaces of the insulating spacer, at least a plurality of through holes corresponding to the plurality of through holes of the insulating spacer are provided. A pair of element forming means are aligned on the hole position and are superposed on the front and back surfaces of the insulating spacer to be removably integrated to form an element forming laminate, and a p-type is formed on at least one of the front and back sides of the element forming laminate. And a p provided with a selection hole for selectively selecting n-type
An n selection means is arranged, and the selection hole is aligned with a hole on one side of the p-type and the n-type of the element formation laminate, and one of the p-type and the n-type is selected, and then the element formation laminate is selected. The melt is filled in the melt of the material on one side of p and n, and the melt is filled into the hole of the element forming laminate from the select hole to the select hole, and then cooled and hardened to form a melt on one side of p and n. A thermoelectric element is formed in a selected hole of the element-forming laminate, and then a hole of the element-forming laminate on the other side of p and n is selected by pn selection means in the same manner. Is immersed in the melt on the other side of the selected p and n, and p and
The thermoelectric element on the other side of n is formed in the remaining hole of the element forming laminate, and then the pn selection means and the element forming means are removed from the insulating spacer to obtain a thermoelectric element array unit. Means to solve the problem.

【0015】さらに、熱電素子配列ユニットの製造方法
の第2の発明は、前記第1の発明の製造方法の構成を備
えたものにおいて、素子形成積層体にpn選択手段を配
置した組を複数組積層方向に配置して、複数組を一括的
にp、nの選択した融液に浸漬し、複数の熱電素子配列
ユニットを一括的に形成する構成をもって、課題を解決
する手段としている。
Further, a second invention of a method of manufacturing a thermoelectric element array unit includes the structure of the manufacturing method of the first invention, wherein a plurality of sets in which pn selection means are arranged in an element forming laminate are provided. The means for solving the problem is a configuration in which a plurality of sets are arranged in the stacking direction, and a plurality of sets are collectively immersed in a melt selected by p and n to form a plurality of thermoelectric element array units at a time.

【0016】さらに、熱電素子配列ユニットの製造方法
の第3の発明は、前記第1又は第2の発明の製造方法の
構成を備えたものにおいて、pn選択手段が板状に形成
されていることを特徴とする。
Further, a third invention of a method for manufacturing a thermoelectric element array unit includes the structure of the manufacturing method of the first or second invention, wherein the pn selection means is formed in a plate shape. It is characterized by.

【0017】さらに、熱電素子配列ユニットの製造方法
の第4の発明は、前記第1又は第2の発明の製造方法の
構成を備えたものにおいて、pn選択手段はp型を選択
するp型板状部材と、n型を選択するn型板状部材との
2種類の板状部材により構成され、p型を選択するとき
はp型板状部材を素子形成積層体に配置し、n型を選択
するときはn型板状部材を素子形成積層体に配置して、
素子形成積層体のp型となる孔とn型となる孔を択一的
に選択することを特徴とする。
Further, a fourth invention of a method of manufacturing a thermoelectric element array unit includes the structure of the manufacturing method of the first or second invention, wherein the pn selection means selects a p-type plate. And an n-type plate member for selecting the n-type. When selecting the p-type, the p-type plate-like member is arranged in the element forming laminate, and the n-type is selected. When selecting, arrange the n-type plate member in the element forming laminate,
It is characterized in that a p-type hole and an n-type hole of the element forming laminate are selectively selected.

【0018】さらに、熱電素子配列ユニットの製造方法
の第5の発明は、前記第1又は第2の発明の製造方法の
構成を備えたものにおいて、pn選択手段がメッシュ状
に形成され、メッシュの網目孔が素子形成積層体の選択
された孔に融液を導入する選択孔と成し、メッシュの網
目の交差部が素子形成積層体の非選択孔への融液の導入
を阻止する融液導入阻止部としたことを特徴とする。
Further, a fifth invention of a method of manufacturing a thermoelectric element array unit includes the structure of the manufacturing method of the first or second invention, wherein the pn selection means is formed in a mesh shape, and The mesh holes constitute selection holes for introducing the melt into the selected holes of the element-forming laminate, and the intersections of the mesh meshes prevent the introduction of the melt into the non-selection holes of the element-forming laminate. It is characterized in that it is an introduction blocking part.

【0019】さらに、熱電素子配列ユニットの製造方法
の第6の発明は、前記第1乃至第5の何れかの発明の製
造方法の構成を備えたものにおいて、素子形成積層体の
孔内にp型の熱電素子とn型の熱電素子を形成した後、
素子形成積層体からpn選択手段をとり除いて熱電素子
の端面が露出している素子形成積層体の表裏両面を研磨
し、然る後に熱電素子の両端面に導体金属をメッキ形成
し、然る後に、絶縁性スペーサから素子成形手段を取り
除くことを特徴とする。
Further, a sixth invention of a method of manufacturing a thermoelectric element array unit includes the structure of the manufacturing method according to any one of the first to fifth inventions, wherein p is formed in a hole of the element forming laminate. After forming the type thermoelectric element and the n-type thermoelectric element,
The pn selection means is removed from the element forming laminate, the front and back surfaces of the element forming laminate where the end faces of the thermoelectric element are exposed are polished, and then a conductive metal is formed on both end faces of the thermoelectric element by plating. Later, the element molding means is removed from the insulating spacer.

【0020】さらに、熱電モジュールの本発明は、絶縁
性スペーサの表裏両面から熱電素子が突設されている熱
電素子配列ユニットが上下の基板間に配設され、各熱電
素子の端部が上下の各基板側の電極に接続されてp型の
熱電素子とn型の熱電素子とが交互に直列接続されてい
る熱電モジュールにおいて、前記熱電素子配列ユニット
は前記第1乃至第6の製造方法の何れかによって製造さ
れた熱電素子配列ユニットが使用されていることを特徴
とする。
Further, in the thermoelectric module according to the present invention, a thermoelectric element array unit having thermoelectric elements protruding from both front and back surfaces of an insulating spacer is disposed between upper and lower substrates, and an end of each thermoelectric element is disposed between upper and lower substrates. In a thermoelectric module in which p-type thermoelectric elements and n-type thermoelectric elements are connected to electrodes on each substrate side and are alternately connected in series, the thermoelectric element array unit may be any one of the first to sixth manufacturing methods. A thermoelectric element array unit manufactured by the above method is used.

【0021】本発明においては、素子形成積層体の少な
くとも表裏一方面側にpn選択手段を配置し、例えば、
pn選択手段をp型の選択位置にして、素子形成積層体
とpn選択手段の一体化物をpn選択手段を、例えば、
下側にしてp型材料の融液に浸漬することにより、pn
選択手段の選択孔からp型材料が素子形成積層体のp型
の孔に入り込んで充填され、その後の引き上げ冷却によ
って、素子形成積層体のp型の複数の孔にp型の熱電素
子が一括的に形成される。
In the present invention, pn selection means is disposed on at least one of the front and back surfaces of the element forming laminate.
The pn selection unit is set to the p-type selection position, and the integrated body of the element forming laminate and the pn selection unit is set to the pn selection unit, for example,
By immersing in the melt of the p-type material on the lower side, pn
The p-type material enters the p-type hole of the element-forming laminate from the selection hole of the selection means and is filled, and the p-type thermoelectric elements are collectively placed in the plurality of p-type holes of the element-forming laminate by cooling after being pulled up. Is formed.

【0022】同様に、pn選択手段をn型の選択位置に
して、素子形成積層体とpn選択手段の一体化物をpn
選択手段を下側にしてn型材料の融液に浸漬し、p型の
素子形成と同様な工程を経ることにより、素子形成積層
体のn型の複数の孔にn型の熱電素子が一括的に形成さ
れる。
Similarly, the pn selection means is set at the n-type selection position, and the integrated element forming laminate and the pn selection means are pn-selected.
By immersing the device in the melt of the n-type material with the selection means on the lower side and performing the same steps as in the formation of the p-type device, the n-type thermoelectric elements are collectively placed in the plurality of n-type holes of the element-formed laminate. Is formed.

【0023】本発明においては、pn選択手段により
p、nを択一的に選択して素子形成積層体をp型の融液
とn型の融液に交互に浸漬するだけの工程により、絶縁
性スペーサの複数の貫通孔にp型とn型の熱電素子が交
互に規則正しく配列された熱電素子配列ユニットが容易
に作成される。本発明の熱電素子配列ユニットにあって
は、絶縁性スペーサの貫通孔壁面と熱電素子の固定は溶
融状態の熱電素子材料が固体化する凝固の固定力で固定
されるので、接着剤の使用は不要となり、接着剤を用い
ることによる接着剤塗布、乾燥等の煩雑、非効率性の作
業から開放されるとともに、接着剤による放熱性の阻害
要因も取り除かれるので、信頼性の高い高品質の熱電素
子配列ユニットを低コストで提供でき、この熱電素子配
列ユニットを使用した熱電モジュールの信頼性、高性能
化が図れ、併せて、生産性改善の低コスト化が達成可能
となるものである。
In the present invention, the p-n selection means selects p and n alternatively, and the element-forming laminate is simply immersed alternately in the p-type melt and the n-type melt, thereby providing insulation. A thermoelectric element array unit in which p-type and n-type thermoelectric elements are alternately and regularly arranged in a plurality of through holes of a conductive spacer can be easily produced. In the thermoelectric element array unit of the present invention, the fixing of the through hole wall surface of the insulating spacer and the thermoelectric element is fixed by the fixing force of solidification in which the thermoelectric element material in a molten state is solidified. This eliminates the need for complicated and inefficient operations such as applying and drying adhesives due to the use of adhesives, and also eliminates the factors that impede heat dissipation due to adhesives. The element arrangement unit can be provided at low cost, and the reliability and performance of the thermoelectric module using the thermoelectric element arrangement unit can be improved, and at the same time, the cost reduction of productivity can be achieved.

【0024】[0024]

【発明の実施の形態】以下、本発明の実施形態例を図面
に基づき説明する。なお、以下の説明において、従来例
と共通の構成部分には共通の符号を付して、重複説明は
省略又は簡略化する。本発明に係る熱電素子配列ユニッ
ト17は図9に示したものと同様に、絶縁性スペーサ1
5に複数のp型とn型の熱電素子を交互に配列形成され
た、スペーサ/素子複合体のもので、その特徴点は、絶
縁性スペーサ15の貫通孔14の部分において熱電素子
1は接着剤を用いずに固定保持されていることである。
この特徴を有する熱電素子配列ユニット17の製造方法
の実施形態例を以下に説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following description, the same components as those of the conventional example will be denoted by the same reference numerals, and redundant description will be omitted or simplified. The thermoelectric element array unit 17 according to the present invention is the same as that shown in FIG.
5 is a spacer / element composite in which a plurality of p-type and n-type thermoelectric elements are alternately arranged and formed. The feature of the composite is that the thermoelectric element 1 is bonded at the through hole 14 of the insulating spacer 15. That is, it is fixed and held without using an agent.
An embodiment of a method for manufacturing the thermoelectric element array unit 17 having this feature will be described below.

【0025】図1〜図6は本発明に係る熱電素子配列ユ
ニット17の製造方法の一実施形態例を示すもので、図
2に示すものは熱電素子配列ユニットを構成する絶縁性
スペーサ15であり、厚さ0.1〜1mm程度の耐熱基
板からなり、所定数(通常、同数で構成されるp素子と
n素子の本数の和)の貫通孔14が設けられている。ま
た、図1は前記熱電素子配列ユニット(複合体製造)の
ためのセットアップであり、それぞれに前記絶縁性スペ
ーサ15の貫通孔14と同数で同径の貫通孔20が同じ
配列形態で設けられた耐熱性の成形上型21と耐熱性の
成形下型22とを有している。この成形上型21と成形
下型22は素子形成手段を構成するものである。
FIGS. 1 to 6 show an embodiment of a method for manufacturing a thermoelectric element array unit 17 according to the present invention. FIG. 2 shows an insulating spacer 15 constituting the thermoelectric element array unit. And a heat-resistant substrate having a thickness of about 0.1 to 1 mm, and provided with a predetermined number (usually, the sum of the number of p-elements and n-elements of the same number). FIG. 1 shows a setup for the thermoelectric element arrangement unit (composite production), in which through holes 20 having the same number and the same diameter as the through holes 14 of the insulating spacer 15 are provided in the same arrangement. It has a heat-resistant upper mold 21 and a heat-resistant lower mold 22. The upper molding die 21 and the lower molding die 22 constitute element forming means.

【0026】絶縁性スペーサ15の上側に成形上型21
が配置され、絶縁性スペーサ15の下側に成形下型22
が配置されて、互いの孔位置を合わせて、成形下型22
と、絶縁性スペーサ15と、成形上型21とが積層され
て素子形成積層体23として分解着脱可能に適宜の保持
手段(図示せず)を用いて機械的に一体化されている。
そして素子形成積層体23の裏面側(下面側)に板状部
材のpn選択手段24が配置されている。
The upper mold 21 is provided above the insulating spacer 15.
Is disposed on the lower side of the insulating spacer 15.
Are arranged and the positions of the holes are aligned with each other to form the lower mold 22.
The insulating spacer 15 and the upper mold 21 are laminated, and are mechanically integrated as an element forming laminated body 23 using an appropriate holding means (not shown) so as to be detachable and detachable.
Then, a pn selection means 24 of a plate-like member is arranged on the back surface side (lower surface side) of the element forming laminate 23.

【0027】本実施形態例では、pn選択手段24は前
記素子形成積層体23の複数の孔(14,20)のう
ち、p型となる孔を選択するp型選択の板状部材と、n
型となる孔を選択するn型選択の板状部材との2種類の
板状部材とからなり、p型選択の板状部材(p型板状部
材)には素子形成積層体23の孔のうち、p型孔の選択
位置に貫通孔25を形成したものであり、n型選択の板
状部材(n型板状部材)には素子形成積層体23の孔の
うち、n型孔の選択位置に貫通孔25を形成したもので
ある。p型とn型の板状部材は選択的に交換使用され
る。
In the present embodiment, the pn selection means 24 comprises a p-type selection plate-like member for selecting a p-type hole from among the plurality of holes (14, 20) of the element forming laminate 23;
It is composed of two types of plate members, i.e., an n-type selection plate member for selecting a hole to be a mold, and a p-type selection plate member (p-type plate member). The through-hole 25 is formed at the selected position of the p-type hole, and the n-type selected plate-like member (n-type plate-like member) has the n-type hole selected from the holes of the element forming laminate 23. A through hole 25 is formed at a position. The p-type and n-type plate members are selectively used for replacement.

【0028】なお、本実施形態例においては、図示され
ていないが、これら成形上型21、絶縁性スペーサ1
5、成形下型22、pn選択手段24の4要素を機械的
に一体化し、又、それぞれの要素に開けられた貫通孔を
適切に位置決めする耐熱性の位置決め手段及び保持手段
を有している。上記機械的に一体化した4要素(素子形
成積層体23とpn選択手段24との積層一体化物)を
p型とn型の融液11に浸漬して(p型の融液に浸漬す
る場合はp型の板状部材24を使用し、n型の融液に浸
漬する場合はn型の板状部材24を使用して融液に浸漬
する)目的とする熱電素子配列ユニット17を作製し、
さらにその作製した熱電素子配列ユニット17を使用し
て熱電モジュールを組み立てるがその具体的実施例を以
下に説明する。
Although not shown in the embodiment, the upper mold 21 and the insulating spacer 1 are not shown.
5. The four elements of the lower mold 22 and the pn selection means 24 are mechanically integrated, and a heat-resistant positioning means and a holding means for appropriately positioning the through holes formed in the respective elements are provided. . When the above four mechanically integrated elements (laminated integrated body of the element forming laminate 23 and the pn selection means 24) are immersed in the p-type and n-type melts 11 (when immersed in the p-type melt). Uses a p-type plate member 24 and, when immersed in an n-type melt, uses the n-type plate member 24 to immerse in the melt). ,
Further, a thermoelectric module is assembled using the produced thermoelectric element array unit 17, and a specific example thereof will be described below.

【0029】[0029]

【実施例】(実施例1)熱電素子配列ユニットの製造に
際して先ず、図3(a)に示すように、グラファイト等
からなる箱状の融液浴26に、BiTeにSb
を固溶させて生成したp型の熱電素子材料を700
〜800℃に加温・溶融させ、10mm平方で0.2m
m厚さの96%アルミナスペーサ板を絶縁性スペーサ1
5として使用し、成形上型21と成形下型はともに0.
3mm厚さのグラファイト板により形成した。成形上型
21と絶縁性スペーサ15と成形下型22とを機械的に
着脱自在に一体化した素子形成積層体23の下面側に、
0.2mm厚さのグラファイト板からなるp、n選択手
段(図3(a)の例ではp型板状部材)24を設けたも
のを、基板側面に設けた図示しない白金製のファスナー
からなる位置決め手段により一体化し保持した。なお、
各部材21、15、23、24の貫通孔直径は何れも
0.6mmとした。
EXAMPLES (Example 1) When manufacturing a thermoelectric element array unit, first, as shown in FIG. 3A, a box-shaped melt bath 26 made of graphite or the like was placed in Bi 2 Te 3 and Sb 2 T was placed.
The p-type thermoelectric element material that is generated by a solid solution of e 3 700
Heated and melted to ~ 800 ° C, 0.2mm in 10mm square
Insulating spacer 1 with 96% alumina spacer plate of m thickness
5 and the upper mold 21 and the lower mold are both 0.1.
It was formed by a graphite plate having a thickness of 3 mm. On the lower surface side of an element forming laminate 23 in which the upper molding die 21, the insulating spacer 15, and the lower molding die 22 are mechanically detachably integrated,
The p and n selection means (p-type plate-like member in the example of FIG. 3A) 24 made of a 0.2 mm thick graphite plate is replaced by a platinum fastener (not shown) provided on the side surface of the substrate. It was integrated and held by the positioning means. In addition,
Each member 21, 15, 23, 24 had a through hole diameter of 0.6 mm.

【0030】一体化後、これを400℃のベルト炉内で
約5分間、予熱した(本例においてはアルミナスペーサ
に機械加工により貫通孔を形成したため微細な凹凸が貫
通孔(貫通孔の壁面)に存在し、融液11に直接浸漬し
た場合に亀裂が生ずることを避けるために行ったが、内
面に平滑な加工がされている場合には予熱工程は必ずし
も必要ではない)。
After the integration, this was preheated in a belt furnace at 400 ° C. for about 5 minutes (in this example, a through hole was formed by machining the alumina spacer, so that fine irregularities were formed in the through hole (wall surface of the through hole). This was done to avoid cracking when immersed directly in the melt 11, but the preheating step is not necessarily required if the inner surface is smooth-worked).

【0031】図示するようにpn選択手段(本例におい
ては素子形成積層体23のp型素子成形用の孔に相当す
る部分のみに貫通孔を設けた板)24は積層体下部に図
示しない白金製のファスナーによる合体手段を用いて合
体され、p融液にその上面が液面の下になる程度に浸漬
する。なお、浸漬工程時には素子形成積層体23の非選
択側の孔が融液に覆われるが、融液は粘度が高く、非選
択側の孔の一端側はpn選択手段(板状部材)24によ
って閉鎖されているので、これら非選択側の孔に融液が
入り込むことはない。
As shown in the figure, a pn selecting means (a plate having a through hole only in a portion corresponding to a hole for forming a p-type element of the element forming laminate 23 in this example) 24 is a platinum not shown below the laminate. And is immersed in the p melt so that the upper surface thereof is below the liquid level. In the immersion step, the holes on the non-selection side of the element forming laminate 23 are covered with the melt. However, the melt has a high viscosity, and one end of the holes on the non-selection side is formed by pn selection means (plate-like member) 24. Since it is closed, the melt does not enter these non-selected holes.

【0032】融液内に5分間浸漬を行いp融液が、p、
n選択手段24に設けられた貫通の選択孔(p孔)25
から成形下型22、スペーサ15、成形上型21のそれ
ぞれのp貫通孔を通して積層体上面に噴出体として導出
凝固することを確認したのち、次に素子形成積層体23
とpn選択手段24の合体物全体を融液11から1〜2
mm/分の速度で引き上げ、冷却し、p型に設定された
(p型選択用の)pn選択手段24を取り外す。
After immersion in the melt for 5 minutes, the p melt becomes p,
A through selection hole (p hole) 25 provided in the n selection means 24
From the lower mold 22, the spacer 15, and the upper mold 21 through the respective p through holes to be ejected onto the upper surface of the laminate as an ejected body and then solidified.
And the entirety of the pn selection means 24 from the melt 11 to 1 to 2
It is pulled up at a speed of mm / min, cooled, and the pn selection means 24 set for p-type (for p-type selection) is removed.

【0033】次に、素子形成積層体23の下部に残存し
たp素子余剰部27を切断・除去した後、図3(b)に
示すようにpn選択手段24として、n型の板状部材
(素子形成積層体23のn型素子成形用の孔に相当する
部分のみに貫通孔を設けた板)24を素子形成積層体2
3の裏面(下面)に取りつけ、図示しない位置決め手
段、及び保持手段により合体し、図4(b)に示すよう
にBiTeにBiSeを固溶させて生成したn
型融液で満たされた融液浴(n型)26に浸漬し、同様
に熱電素子1のn素子(n型素子)を成長させ、引き上
げにより冷却固体化する。そして、pn選択手段24を
取り外し(図5参照)、素子形成積層体23の上下両面
を研磨することにより、熱電素子1の両端面が平坦に加
工され、絶縁性スペーサ15からの上下の突き出し量が
一定に揃えられる。
Next, after cutting and removing the p-element surplus portion 27 remaining at the lower portion of the element-forming laminate 23, as shown in FIG. A plate 24 provided with a through hole only in a portion corresponding to the hole for forming the n-type element of the element forming laminate 23
4 is attached to the back surface (lower surface) of No. 3 and combined by a positioning means and a holding means (not shown), and as shown in FIG. 4B, n 2 formed by dissolving Bi 2 Se 3 in Bi 2 Te 3.
The thermoelectric element 1 is immersed in a melt bath (n-type) 26 filled with the mold melt, and the n-type element (n-type element) of the thermoelectric element 1 is similarly grown and solidified by cooling. Then, the pn selection means 24 is removed (see FIG. 5), and the upper and lower surfaces of the element forming laminate 23 are polished, whereby both end surfaces of the thermoelectric element 1 are flattened, and the upper and lower protrusion amounts from the insulating spacer 15 are obtained. Are constantly aligned.

【0034】尚、熱電素子1の両端面にメッキを行う場
合は、絶縁性スペーサ15から成形下型22と成形上型
21を取り去る前に、前記研磨工程の後に、ニッケルメ
ッキ等を行う。そして、メッキ後、絶縁性スペーサ15
から成形下型22と成形上型21を取り去ることによ
り、図6に示すような目的とする熱電素子配列ユニット
17が得られる。
When plating both end surfaces of the thermoelectric element 1, nickel plating or the like is performed after the polishing step before removing the lower mold 22 and the upper mold 21 from the insulating spacer 15. Then, after plating, the insulating spacer 15
By removing the lower molding die 22 and the upper molding die 21 from, the intended thermoelectric element array unit 17 as shown in FIG. 6 is obtained.

【0035】その後、図9に示す既知の方法(従来例)
と同様にモジュール化(熱電モジュールの組立て)を行
う。すなわち、上記実施例で作製した熱電素子配列ユニ
ット17を基板3、4間に配置し、基板側の電極2と熱
電素子1の端面メッキ部分を半田接続することによって
本発明の熱電モジュールが作製される。
Thereafter, a known method shown in FIG. 9 (conventional example)
(Module assembly). That is, the thermoelectric element array unit 17 produced in the above embodiment is arranged between the substrates 3 and 4, and the electrode 2 on the substrate side and the end-plated portion of the thermoelectric element 1 are connected by soldering, whereby the thermoelectric module of the present invention is produced. You.

【0036】尚、本例においてはp、n選択手段として
板状部材を用いたが、これに限らず、例えば、図8に示
すように、貫通孔14、20孔径の1/2〜2/3程度
の線径のプラチナ等の高温耐性を有するメッシュ(金属
網)を用いることも可能である。この場合、p、n選択
は網目の移動によって実行できる。熱電素子1の融液材
料は粘度が高く、図8(c)に示すようにメッシュ28
が配置された場合、網目の交差部30に位置する貫通孔
20には融液が入り込まないので、この交差部30は融
液導入阻止部として機能する。したがって、融液はメッ
シュ28の網目孔29に対向する(対面する)位置の貫
通孔20に選択的に入り込む。このことから、図8
(c)の状態は、メッシュ28によって、n型の貫通孔
20が選択された状態にある。
In this embodiment, a plate-like member is used as the p and n selecting means. However, the present invention is not limited to this. For example, as shown in FIG. It is also possible to use a mesh (metal net) having a high temperature resistance such as platinum having a wire diameter of about 3 or the like. In this case, the selection of p and n can be performed by moving the mesh. The melt material of the thermoelectric element 1 has a high viscosity, and as shown in FIG.
Is arranged, the melt does not enter into the through-hole 20 located at the intersection 30 of the mesh, so that the intersection 30 functions as a melt introduction preventing portion. Therefore, the melt selectively enters the through-hole 20 at a position facing (facing) the mesh hole 29 of the mesh 28. From this, FIG.
In the state shown in FIG. 3C, the n-type through hole 20 is selected by the mesh 28.

【0037】例えば、A方向をメッシュ28の移動方向
とし、素子形成積層体23の貫通孔のA方向の配列ピッ
チをsとし、網目の交差部30のA方向の配列ピッチを
2sとしたとき、図8(c)の状態からメッシュ28を
A方向にsだけ移動することにより、素子形成積層体2
3のp型の孔が選択されることとなり、メッシュ28の
網位置を所定量移動することでp型の孔とn型の孔を択
一的に切り換え選択でき、p型とn型の孔選択が容易に
実行できるため好ましい。
For example, when the direction A is the moving direction of the mesh 28, the arrangement pitch of the through holes of the element forming laminate 23 in the direction A is s, and the arrangement pitch of the intersections 30 in the direction A is 2s, By moving the mesh 28 by s in the direction A from the state of FIG.
3, the p-type hole and the n-type hole can be selectively switched by moving the mesh position of the mesh 28 by a predetermined amount, and the p-type hole and the n-type hole can be selected. This is preferable because the selection can be easily performed.

【0038】(実施例2)図7は複数の熱電素子配列ユ
ニット17を一括的に形成する本発明の実施例を示す。
この実施例2は前記実施例1で説明した素子形成積層体
23とpn選択手段24を積層一体化した組を介在手段
31を介して上下方向に複数組(図7では2組)連接
し、この連接組をp型材料の融液とn型材料の融液に交
互に浸漬することにより、前記実施例1で説明した場合
と同様に素子形成積層体23の孔にp型とn型の熱電素
子1を形成する。この製造に際し、勿論、複数の連接組
をp型材料の融液に浸漬する場合は、pn選択手段24
によってp型の孔を選択し、n型材料の融液に浸漬する
場合は、pn選択手段24によってn型の孔を選択する
ことは実施例1の場合と同様である。
(Embodiment 2) FIG. 7 shows an embodiment of the present invention in which a plurality of thermoelectric element array units 17 are collectively formed.
In the second embodiment, a plurality of sets (two sets in FIG. 7) in which the element forming laminated body 23 and the pn selection means 24 described in the first embodiment are stacked and integrated are connected in the vertical direction via the intervening means 31. By alternately immersing the connecting set in the melt of the p-type material and the melt of the n-type material, the p-type and n-type holes are formed in the holes of the element formation laminate 23 in the same manner as described in the first embodiment. The thermoelectric element 1 is formed. In this manufacturing, of course, when a plurality of connecting sets are immersed in the melt of the p-type material, the pn selection means 24 is used.
When selecting a p-type hole and dipping it in a melt of an n-type material, selecting the n-type hole by the pn selection means 24 is the same as in the first embodiment.

【0039】素子形成積層体23内の孔にp型とn型の
熱電素子1を形成した後、介在手段31の部分を切断す
ることで、連接組を各組に分離し、各組毎に、素子形成
積層体23とpn選択手段24の積層一体化物からpn
選択手段24を取り除く。そして、素子形成積層体23
の表裏両面を研磨して各熱電素子1の端面に導体金属を
メッキした後、絶縁性スペーサ15から成形上型21と
成形下型22を取り外すことにより、目的とする熱電素
子配列ユニット17を得る。その後、この熱電素子配列
ユニット17を使用して実施例1と同様に熱電モジュー
ルを組立て製造する。
After the p-type and n-type thermoelectric elements 1 are formed in the holes in the element forming laminate 23, the intervening means 31 is cut to separate the connecting sets into individual sets. Pn from the integrated laminate of the element forming laminate 23 and the pn selecting means 24
The selection means 24 is removed. Then, the element forming laminate 23
After the front and back surfaces are polished and the end surface of each thermoelectric element 1 is plated with a conductive metal, the molding upper mold 21 and the molding lower mold 22 are removed from the insulating spacer 15 to obtain the intended thermoelectric element array unit 17. . Thereafter, a thermoelectric module is assembled and manufactured using the thermoelectric element array unit 17 in the same manner as in the first embodiment.

【0040】なお、本発明は上記実施形態例および実施
例に限定されることなく様々な実施の形態を採り得る。
例えば、上記例では、pn選択手段24として板状部材
を使用する場合、p型とn型の板状部材を用意して、p
型の融液に浸漬するときとn型の融液に浸漬するときと
で交換使用したが、メッシュを使用する場合と同様に、
1枚の板状部材にp型選択用の孔とn型選択用の孔を共
に設けておき、この板状部材をスライド移動してp型と
n型の孔選択(素子形成積層体23の孔の選択)を行う
ようにしてもよい。
The present invention can adopt various embodiments without being limited to the above embodiments and examples.
For example, in the above example, when a plate member is used as the pn selection means 24, p-type and n-type plate members are prepared and p
When immersed in the melt of the mold and when immersed in the melt of the n-type, they were used interchangeably, but as in the case of using the mesh,
One plate-like member is provided with both a p-type selection hole and an n-type selection hole, and the plate-like member is slid to select the p-type and n-type holes (for the element-forming laminate 23). (Selection of holes).

【0041】また、上記例では、pn選択手段24は素
子形成積層体23の裏面側(下面側)のみに設けたが表
面側(上面側)のみに設けてもよく、さらには、pn選
択手段24を素子形成積層体23の表裏両面側に設けて
もよい。このように表裏両面側に設けた場合は、素子形
成積層体23を融液に浸漬したとき、非選択側の素子形
成積層体23内の孔に融液が入り込もうとすることをよ
り確実に防止することができる。
In the above example, the pn selection means 24 is provided only on the back side (lower side) of the element forming laminate 23, but may be provided only on the front side (upper side). 24 may be provided on both front and back surfaces of the element forming laminate 23. When provided on both the front and back surfaces in this way, when the element forming laminate 23 is immersed in the melt, the melt is more reliably prevented from entering the holes in the non-selected side element forming laminate 23. can do.

【0042】さらに、上記例では、熱電素子1の両端面
に導体メッキを施したが、熱電素子1の材料として半田
接続性が良好の材料が使用された場合は、このメッキ工
程は省略することも可能である。
Furthermore, in the above example, conductor plating was applied to both end faces of the thermoelectric element 1. However, if a material having good solder connectivity is used as the material of the thermoelectric element 1, this plating step is omitted. Is also possible.

【0043】[0043]

【発明の効果】本発明によれば、p型、n型の熱電素子
を個別に切断、配列することが無く、したがって、素子
配列の誤りや、素子配列等の取り扱い時に素子が脆性破
損する等の問題を除去でき、又、熱電素子の大きさが広
いものも素子数の多いものもほぼ同一の時間で製造出き
る等、生産性が高い。
According to the present invention, the p-type and n-type thermoelectric elements are not individually cut and arranged, so that the element arrangement is incorrect, and the elements are brittlely damaged when handling the element arrangement. The problem described above can be eliminated, and a thermoelectric element having a large size and a large number of elements can be manufactured in almost the same time, resulting in high productivity.

【0044】また、熱電素子の径の小さなものの高密度
配列が可能であり、熱電モジュールに使用した場合に、
均一な冷却・加熱効果が得られるため、通信用レーザダ
イオード等の温度制御用のモジュールとして有効であ
る。
Further, it is possible to arrange high-density thermoelectric elements having a small diameter.
Since a uniform cooling / heating effect can be obtained, it is effective as a temperature control module such as a communication laser diode.

【0045】さらに、熱電素子端面のメッキ等の端部処
理が簡易であり、かつ、そのメッキ処理時に熱電素子の
端部間周面へのコーティング処理が不要となり、また、
メッキ後にそのコーティングを取り除く作業も不要とな
る。
Further, the end processing such as plating of the end face of the thermoelectric element is simple, and at the time of the plating processing, the coating processing on the peripheral surface between the ends of the thermoelectric element becomes unnecessary.
There is no need to remove the coating after plating.

【0046】さらに、絶縁性スペーサの貫通孔に融液が
直接接触し、貫通孔内面の微小突起(孔内壁面の凹凸)
等に融液状の素子材料が食い込んで、その後の冷却によ
り素子材料が固体化することによって熱電素子が絶縁性
スペーサの貫通孔に凝固固定されるため、熱電素子と絶
縁性スペーサとの固定に接着剤等が不要であり、接着作
業が省略できるとともに、当然に従来例においては必要
であった接着剤のはみ出し部分の除去工程も省略でき
る。
Further, the melt comes into direct contact with the through hole of the insulating spacer, and a minute protrusion on the inner surface of the through hole (unevenness on the inner wall surface of the hole).
Since the melted element material penetrates into the material, etc., and the element material is solidified by subsequent cooling, the thermoelectric element is solidified and fixed in the through hole of the insulating spacer, so it adheres to the fixing between the thermoelectric element and the insulating spacer No adhesive is required, so that the bonding operation can be omitted, and of course, the step of removing the protruding portion of the adhesive which is necessary in the conventional example can be omitted.

【0047】さらに、熱電素子の長さが直接成長法に比
べ短いため、素子形成工程の時間を短くすることができ
る。
Further, since the length of the thermoelectric element is shorter than that of the direct growth method, the time of the element formation step can be shortened.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係る熱電素子配列ユニットの製造時の
セットアップ状態を示す図である。
FIG. 1 is a view showing a setup state at the time of manufacturing a thermoelectric element array unit according to the present invention.

【図2】本実施形態例の熱電素子配列ユニットを構成す
る絶縁性スペーサの構成説明図である。
FIG. 2 is a configuration explanatory view of an insulating spacer constituting the thermoelectric element array unit of the embodiment.

【図3】本実施形態例における熱電素子配列ユニットの
製造方法の融液浸漬工程の説明図である。
FIG. 3 is an explanatory diagram of a melt immersion step of the method for manufacturing a thermoelectric element array unit in the embodiment.

【図4】p型融液浴とn型融液浴を示す図である。FIG. 4 is a diagram showing a p-type melt bath and an n-type melt bath.

【図5】素子形成積層体内に熱電素子を形成した後、素
子形成積層体からpn選択手段を取り外した状態の図で
ある。
FIG. 5 is a view showing a state in which a pn selection unit is removed from the element formation laminate after forming the thermoelectric element in the element formation laminate.

【図6】素子形成積層体の成形上型21と成形下型22
を絶縁性スペーサ15から取り外す状態の図である。
FIG. 6 is a diagram illustrating an upper mold 21 and a lower mold 22 of an element forming laminate.
FIG. 5 is a diagram showing a state in which the is removed from the insulating spacer 15.

【図7】熱電素子配列ユニットを複数一括的に作製する
実施例の説明図である。
FIG. 7 is an explanatory view of an embodiment in which a plurality of thermoelectric element array units are collectively manufactured.

【図8】pn選択手段としてメッシュを使用した熱電素
子配列ユニットの本発明に係る製造方法の説明図であ
る。
FIG. 8 is an explanatory diagram of a method for manufacturing a thermoelectric element array unit using a mesh as a pn selection means according to the present invention.

【図9】熱電素子配列ユニットを使用した熱電モジュー
ルの組立て状態の説明図である。
FIG. 9 is an explanatory diagram of an assembled state of a thermoelectric module using the thermoelectric element array unit.

【図10】熱電素子の両端にメッキを施す従来例の説明
図である。
FIG. 10 is an explanatory diagram of a conventional example in which both ends of a thermoelectric element are plated.

【図11】一般的な熱電モジュールの組立て状況の説明
図である。
FIG. 11 is an explanatory diagram of an assembly state of a general thermoelectric module.

【図12】型内成長法による熱電素子の作製説明図であ
る。
FIG. 12 is a diagram illustrating the production of a thermoelectric element by an in-mold growth method.

【図13】型内成長法による熱電素子の成長工程の説明
図である。
FIG. 13 is an explanatory diagram of a step of growing a thermoelectric element by an in-mold growth method.

【図14】成長形成した熱電素子の材料を切断して所定
長さの熱電素子を形成する説明図である。
FIG. 14 is an explanatory view of cutting a material of a grown thermoelectric element to form a thermoelectric element of a predetermined length.

【図15】インゴット切断法による熱電素子の作製法の
説明図である。
FIG. 15 is an explanatory diagram of a method for manufacturing a thermoelectric element by an ingot cutting method.

【図16】熱電モジュールの直接組立て法の説明図であ
る。
FIG. 16 is an explanatory view of a method of directly assembling a thermoelectric module.

【図17】熱電モジュールのスペーサ組立て法の説明図
である。
FIG. 17 is an explanatory diagram of a spacer assembling method of the thermoelectric module.

【符号の説明】[Explanation of symbols]

1 熱電素子 15 絶縁性スペーサ 17 熱電素子配列ユニット 21 成形上型 22 成形下型 23 素子形成積層体 24 pn選択手段 25 選択孔(貫通孔) DESCRIPTION OF SYMBOLS 1 Thermoelectric element 15 Insulating spacer 17 Thermoelectric element arrangement unit 21 Molding upper mold 22 Molding lower mold 23 Element formation laminated body 24 pn selection means 25 Selection hole (through hole)

Claims (8)

【特許請求の範囲】[Claims] 【請求項1】 複数の貫通孔を有する絶縁性スペーサに
p型の熱電素子とn型の熱電素子が前記複数の貫通孔の
隣合う孔に交互に挿通固定されて該絶縁性スペーサの表
裏両面から熱電素子が突設されている熱電素子配列ユニ
ットにおいて、前記熱電素子は融液状態で前記絶縁性ス
ペーサの貫通孔壁面に接触させた後に冷却固体化する凝
固固定によって接着剤を用いずに絶縁スペースの貫通孔
に固定保持されていることを特徴とする熱電素子配列ユ
ニット。
1. A p-type thermoelectric element and an n-type thermoelectric element are alternately inserted into and fixed to an insulating spacer having a plurality of through holes in holes adjacent to the plurality of through holes. In the thermoelectric element array unit in which the thermoelectric elements are protruded from, the thermoelectric elements are insulated without using an adhesive by solidification fixation, which is brought into contact with the through hole wall surface of the insulating spacer in a molten state and then solidified by cooling. A thermoelectric element array unit fixedly held in a through hole of a space.
【請求項2】 複数の貫通孔を有する絶縁性スペーサに
p型の熱電素子とn型の熱電素子が前記複数の貫通孔の
隣合う孔に交互に挿通固定されて該絶縁性スペーサの表
裏両面から熱電素子が突設されている熱電素子配列ユニ
ットの製造方法において、絶縁性スペーサの複数の各貫
通孔に対応する貫通孔を備えた少なくとも一対の素子成
形手段を孔位置を合わせて前記絶縁性スペーサの表裏両
面に重ね合わせ着脱自在に一体化することで素子形成積
層体を形成し、この素子形成積層体の少なくとも表裏一
方側にp型とn型を択一的に選択する選択孔を設けたp
n選択手段を配置し、選択孔を素子形成積層体のp型と
n型の一方側となる孔に合わせてp型とn型の一方を選
択し、然る後に、素子形成積層体を選択したp、nの一
方側材料の融液に浸漬して選択孔から該選択孔に通じる
素子形成積層体の孔に融液を充填させ、然る後に冷却硬
化してp、nの一方側の熱電素子を素子形成積層体の選
択された孔内に成形し、次に、同様にしてpn選択手段
によりp、nの他方側となる素子形成積層体の孔を選択
して、素子形成積層体を選択したp、nの他方側の融液
に浸漬し前記一方側の熱電素子成形の場合と同様にp、
nの他方側の熱電素子を素子形成積層体の残りの孔内に
成形し、然る後に前記pn選択手段と素子成形手段を絶
縁性スペーサから取り除いて熱電素子配列ユニットを得
る熱電素子配列ユニットの製造方法。
2. An insulating spacer having a plurality of through holes, a p-type thermoelectric element and an n-type thermoelectric element are alternately inserted and fixed in holes adjacent to the plurality of through holes, and are fixed to both sides of the insulating spacer. In the method for manufacturing a thermoelectric element array unit in which thermoelectric elements are protruded from at least one pair of element forming means having through holes corresponding to a plurality of through holes of an insulating spacer, the positions of the holes are aligned to adjust the insulating property. An element forming laminate is formed by being superposed on the front and back surfaces of the spacer so as to be detachably integrated, and a selection hole for selectively selecting p-type and n-type is provided on at least one side of the element forming laminate. P
An n selection means is arranged, and the selection hole is aligned with a hole on one side of the p-type and the n-type of the element formation laminate, and one of the p-type and the n-type is selected, and then the element formation laminate is selected. The melt is filled in the melt of the material on one side of p and n, and the melt is filled into the hole of the element forming laminate from the select hole to the select hole, and then cooled and hardened to form a melt on one side of p and n. A thermoelectric element is formed in a selected hole of the element-forming laminate, and then a hole of the element-forming laminate on the other side of p and n is selected by pn selection means in the same manner. Is immersed in the melt on the other side of the selected p and n, and p and
n of the other side of the thermoelectric element array unit is formed into the remaining hole of the element forming laminate, and then the pn selection means and the element molding means are removed from the insulating spacer to obtain a thermoelectric element array unit. Production method.
【請求項3】 素子形成積層体にpn選択手段を配置し
た組を複数組積層方向に配置して、複数組を一括的に
p、nの選択した融液に浸漬し、複数の熱電素子配列ユ
ニットを一括的に形成する請求項2記載の熱電素子配列
ユニットの製造方法。
3. A plurality of sets in which pn selection means are arranged in the element forming laminate are arranged in the stacking direction, and the plurality of sets are collectively immersed in a melt selected from p and n to form a plurality of thermoelectric element arrays. 3. The method for manufacturing a thermoelectric element array unit according to claim 2, wherein the units are collectively formed.
【請求項4】 pn選択手段が板状に形成されているこ
とを特徴とする請求項2又は請求項3記載の熱電素子配
列ユニットの製造方法。
4. The method for manufacturing a thermoelectric element array unit according to claim 2, wherein the pn selection means is formed in a plate shape.
【請求項5】 pn選択手段はp型を選択するp型板状
部材と、n型を選択するn型板状部材との2種類の板状
部材により構成され、p型を選択するときはp型板状部
材を素子形成積層体に配置し、n型を選択するときはn
型板状部材を素子形成積層体に配置して、素子形成積層
体のp型となる孔とn型となる孔を択一的に選択する請
求項2又は請求項3記載の熱電素子配列ユニットの製造
方法。
5. The pn selection means is composed of two types of plate members, a p-type plate member for selecting a p-type and an n-type plate member for selecting an n-type. When the p-type plate member is arranged in the element forming laminate and n-type is selected, n
The thermoelectric element array unit according to claim 2 or 3, wherein the template-like member is disposed in the element-forming laminate, and the p-type hole and the n-type hole of the element-forming laminate are selectively selected. Manufacturing method.
【請求項6】 pn選択手段がメッシュ状に形成され、
メッシュの網目孔が素子形成積層体の選択された孔に融
液を導入する選択孔と成し、メッシュの網目の交差部が
素子形成積層体の非選択孔への融液の導入を阻止する融
液導入阻止部とした請求項2又は請求項3記載の熱電素
子配列ユニットの製造方法。
6. The pn selection means is formed in a mesh shape,
The mesh holes of the mesh form selection holes for introducing the melt into the selected holes of the element-forming laminate, and the intersections of the mesh mesh prevent the introduction of the melt into the non-selection holes of the element-forming laminate. The method for producing a thermoelectric element array unit according to claim 2 or 3, wherein the melt introduction preventing portion is used.
【請求項7】 素子形成積層体の孔内にp型の熱電素子
とn型の熱電素子を形成した後、素子形成積層体からp
n選択手段をとり除いて熱電素子の端面が露出している
素子形成積層体の表裏両面を研磨し、然る後に熱電素子
の両端面に導体金属をメッキ形成し、然る後に、絶縁性
スペーサから素子成形手段を取り除くことを特徴とする
請求項2乃至請求項6の何れか1つに記載の熱電素子配
列ユニットの製造方法。
7. After forming a p-type thermoelectric element and an n-type thermoelectric element in a hole of the element-forming laminate, the p-type thermoelectric element is removed from the element-forming laminate.
After removing the n-selecting means, the front and back surfaces of the element forming laminate where the end faces of the thermoelectric element are exposed are polished, and then a conductive metal is formed on both end faces of the thermoelectric element by plating. The method for manufacturing a thermoelectric element array unit according to any one of claims 2 to 6, wherein the element molding means is removed from the device.
【請求項8】 絶縁性スペーサの表裏両面から熱電素子
が突設されている熱電素子配列ユニットが上下の基板間
に配設され、各熱電素子の端部が上下の各基板側の電極
に接続されてp型の熱電素子とn型の熱電素子とが交互
に直列接続されている熱電モジュールにおいて、前記熱
電素子配列ユニットは請求項2乃至請求項7の何れか1
つに記載の製造方法によって製造された熱電素子配列ユ
ニットが使用されていることを特徴とする熱電モジュー
ル。
8. A thermoelectric element array unit having thermoelectric elements protruding from both front and back surfaces of an insulating spacer is disposed between upper and lower substrates, and an end of each thermoelectric element is connected to an electrode on each of the upper and lower substrates. The thermoelectric element array unit according to any one of claims 2 to 7, wherein the p-type thermoelectric elements and the n-type thermoelectric elements are alternately connected in series.
A thermoelectric module, wherein a thermoelectric element array unit manufactured by the manufacturing method described in (1) is used.
JP2000387553A 2000-12-20 2000-12-20 Thermoelectric element array unit and manufacturing method of it, and thermoelectric module using the same Pending JP2002190623A (en)

Priority Applications (1)

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Application Number Priority Date Filing Date Title
JP2000387553A JP2002190623A (en) 2000-12-20 2000-12-20 Thermoelectric element array unit and manufacturing method of it, and thermoelectric module using the same

Publications (1)

Publication Number Publication Date
JP2002190623A true JP2002190623A (en) 2002-07-05

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Application Number Title Priority Date Filing Date
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Country Link
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110416400A (en) * 2019-07-03 2019-11-05 合肥圣达电子科技实业有限公司 A kind of assembling equipment and assemble method for semiconductor cooler

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110416400A (en) * 2019-07-03 2019-11-05 合肥圣达电子科技实业有限公司 A kind of assembling equipment and assemble method for semiconductor cooler
CN110416400B (en) * 2019-07-03 2023-11-07 合肥圣达电子科技实业有限公司 Assembling equipment and assembling method for semiconductor refrigerator

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