JP2002176135A - Laminated semiconductor device and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a laminated semiconductor device which is superior in a heat dissipating characteristic. SOLUTION: Semiconductor modules 100, 101 in which semiconductor chips 9 are mounted on main faces on one side of insulating materials and in which plated films 5 for heat dissipation are formed on main faces on the other side are manufactured. When they are laminated on an interposer 200, a paste 15 which is superior in thermal conductivity is dropped on the plated films 5, and the plated films 5 and the semiconductor chips 9 are thermally connected.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device constructed by laminating a plurality of wiring boards on which semiconductor chips are mounted on a base substrate, a stacked semiconductor device, and a method of manufacturing the same.

[0002]

2. Description of the Related Art In recent years, a small memory card equipped with a flash memory has been rapidly expanding its market for portable information devices such as digital still cameras and portable information terminals. In particular, in the field of digital cameras, it is already becoming mainstream, and is trying to solidify its position as an alternative to MD and floppy (registered trademark) disks. Against this background, there is a need for smaller memory cards consisting only of flash memory to have higher recording capacity, smaller size, lighter weight, and lower cost, and various memory IC package structures and mounting structures are conceivable. Have been. Generally, TSOP
And the like, and a method of directly connecting a bare chip to the base substrate by wire bonding, flip chip mounting, or the like. However, the number of chips that can be mounted in the same area is determined by the area that the chip absolutely occupies, that is, the chip size. Therefore, when further increasing the memory capacity is intended, if the chip size cannot be reduced, a mounting structure in which the chips are stacked in the direction normal to the main surface of the wiring board is required. FIG. 5 shows a stacked semiconductor device 6 in which four semiconductor packages packaged by the TAB mounting method are stacked and connected to an interposer.
An example of 0 is shown.

[0005] A semiconductor chip 61 is flip-chip bonded to a TAB tape 62. Leads 63 for electrically connecting to the outside from the TAB tape 62
Are extended. The semiconductor chip is sealed with a thermosetting resin 64 such as an epoxy resin to constitute individual semiconductor packages. Four types of semiconductor packages differing only in the length of the leads 63 are prepared, and are sequentially mounted on the interposer 65 in ascending order of the length of the leads.

[0004]

However, in recent years,
As the drive frequency and the capacity of the memory increase, the amount of heat generated in the memory chip increases. Because of this heat,
The temperature of the package has risen, and malfunctions have been likely to occur. In particular, in a stacked semiconductor device, since the distance between semiconductor chips serving as heat sources is arranged close to each other on the order of several hundreds of microns, the influence of heat on each other cannot be ignored. In addition, it is difficult to position and stack semiconductor packages by stacking with leads, and a simple mounting form that can be produced with high yield is required. The present invention has been made in view of such a problem, and provides a semiconductor device having a stacked mounting structure capable of reducing a temperature rise of a package by radiating heat generated in a chip, and a method of manufacturing the same. The purpose is.

[0005]

SUMMARY OF THE INVENTION In order to solve the above problems, the present invention provides a semiconductor chip having flexibility, a wiring pattern electrically connected to electrodes of the semiconductor chip, and an externally provided wiring pattern. In a semiconductor device having a plurality of flexible first wiring boards provided with connection electrodes electrically connected to the first wiring board, at least one main surface of the first wiring board on which the semiconductor chip is not mounted is provided. The present invention provides a semiconductor device including a metal film provided in a portion and a connecting member for thermally connecting the metal film to a semiconductor chip mounted on another first wiring board. At this time, it is preferable that the connection member is made of a material having adhesiveness. At this time, a metal film formed on the main surface of the second wiring board, and a connection member for thermally connecting the metal film and the semiconductor chip mounted on the first wiring board are provided. Is preferred. Further, according to the present invention, a semiconductor chip having flexibility with respect to a wiring pattern provided on one main surface is flip-chip mounted, and a metal is formed on a region corresponding to a region where the semiconductor chip is mounted on the other main surface. When a plurality of semiconductor packages each having a flexible wiring board on which a film is provided are sequentially stacked on an interposer such that the semiconductor chip faces the interposer, a conductive adhesive material is provided on the metal film. And a step of thermally connecting the semiconductor chip and the metal film to each other.

[0006]

Embodiments of the present invention will be described below in detail with reference to the drawings. <Semiconductor Package and Manufacturing Method> A semiconductor device of the present embodiment and a manufacturing method thereof will be described with reference to FIGS.
In the flexible substrate shown in FIG.
Is a holding member made of, for example, a sheet having a thickness of 25 μm and having flexibility, and made of an electrically insulating synthetic resin sheet. The material is, for example, polyimide.

On one main surface of the insulating substrate 1, a wiring pattern 2 having a thickness of 12 μm and a connection land 3 having a diameter of φ500 μm are formed by a conductive member such as copper. The connection land 3 is a terminal for passing an electric signal flowing through the wiring pattern 2 to the outside.
Is electrically connected to another connection land 3 ′ formed on the other main surface of the insulating substrate 1 via the second connection land 3 ′. The other main surface has a thickness 18 made of a metal material such as copper.
A μm plating film 5 and a connection terminal 6 having a diameter of φ1 mm and electrically connected to the plating film 5 are formed. The plating film 5 should not be electrically short-circuited with the connection land 3 '.
It is provided over substantially the entire surface of the insulating substrate 1. Also,
The connection terminal 6 is a member considering heat conductivity for transferring the heat of the plating film 5 to the outside. The other connection terminal 6 ′ provided on one main surface of the insulating substrate 1 via the through hole 7.
Is electrically connected to Since the member having good conductivity has excellent heat conductivity, the same material as the wiring pattern may be used.

The connection lands 3, 3 'and the connection terminals 6,
6 'is a bump electrode. A copper plating film having a thickness of 20 to 40 μm is applied only on the connection lands 3 and the connection terminals 6 ′ by an electroplating method, an electroless plating method, or the like, and a nickel plating film is laminated thereon. Further, a solder layer 8 having a thickness of 10 to 20 μm is formed on the nickel plating film. Since the nickel plating film is a barrier metal layer for suppressing a change in the composition of the copper plating film, it is not particularly necessary when copper plating is not performed.

These bump electrodes are portions which protrude most from the surface of the insulating substrate 1 in the thickness direction. This stabilizes the process of stacking the individual semiconductor devices and improves the yield. As shown in FIG. 1B, the semiconductor chip 9 is mounted on such a flexible substrate so as to be electrically connected to the wiring pattern 2. The semiconductor chip 9 has a thickness of about 50 μm and has flexibility, and is flip-chip connected to the wiring pattern 2 via a gold bump 9 a having a height of 10 to 30 μm.

In flip-chip connection of the semiconductor chip 9, first, an anisotropic conductive member 10 in which conductive particles are dispersed in a thermosetting resin is connected to the semiconductor chip 9 on the wiring pattern 2.
Is applied between the insulating substrate 1 and the semiconductor chip 9 and pressed with a bonding tool BT in a state where the element forming surface of the semiconductor chip 1 faces the wiring pattern 2 from above. It is electrically connected via the Au bump 9a. At this time, the bonding tool BT pressurizes and heats the semiconductor chip 1, and performs thermocompression bonding at a temperature of, for example, 180 degrees. Thereby, the anisotropic conductive member 10 is hardened, and the semiconductor chip 9 is electrically connected to the wiring pattern 2, and the surface of the semiconductor chip 9 facing the insulating substrate 1 (the surface on which the element is formed) and the outer periphery Is sealed.

At this time, the outer periphery of the semiconductor chip 9 is deformed as the anisotropic conductive member 10 contracts.
Is flexible and does not crack. The semiconductor chip 9 has flexibility that can be bent and deformed, and for that purpose, the thickness needs to be 80 μm or less. In the step of thinning the semiconductor chip 9 so as not to cause cracking or chipping when curved, after the step of grinding the back surface of the element forming surface of the semiconductor chip, the back surface is polished using an elastic polishing pad. It is preferable that the corners of the chip are chamfered by adding a step of performing the above.
If a flexible semiconductor chip is used, a wiring board using an epoxy resin containing glass fiber as an insulating material may be used, but by using a flexible wiring board as in the present embodiment. As a result, the sealing process is stabilized, and the yield can be further improved. Thus, the semiconductor package 100 shown in FIG. 1C can be obtained. The flip-chip connection is performed by solder bonding, pressure bonding,
It can be replaced by other methods such as ultrasonic bonding. In order to reduce the thickness of the stacked semiconductor device, it is desirable to use flip-chip connection. However, a lead or a wire may be used for connection, and the connection may be performed by any method such as collective bonding or single point bonding. I can do it.

Further, by electrically connecting the power supply terminal or the ground terminal of the semiconductor chip 9 to the connection terminals 6 and 6 ', the stability of the electrical operation of the semiconductor package 100 can be increased. At this time, the connection terminals 6,
When mounted on another wiring board, 6 'needs to be electrically connected to a power supply wiring or a ground wiring of the wiring board. Since the plating film 5 is expected to have a heat radiation effect, the thickness is preferably as large as possible.

<Laminated Semiconductor Device and Manufacturing Method Thereof> Next, a laminated semiconductor device configured by sequentially stacking four semiconductor packages 100 on an interposer and a manufacturing method thereof will be described. As shown in FIG. 2A, the interposer 200 is formed of a highly rigid electric insulating material such as a glass epoxy resin so as to have substantially no flexibility. A connection land 11 serving as a base electrode is formed of metal. The connection land 11 is electrically connected to an external electrode 13 formed on the other main surface via a through hole 14 or an internal wiring (not shown). Further, the heat dissipation wiring layer 14 is provided in a region where the semiconductor device is mounted. The heat dissipation wiring layer 14 is connected to the through hole 13 and is electrically connected to the ground or power supply external electrode 12.

First, a paste 15 having excellent thermal conductivity is dropped onto a region including or near the heat dissipation wiring layer 14 so as not to short-circuit the connection land 11. The semiconductor package 9 is pressed by the mount tool MT so that the semiconductor chip 9 is pressed against the paste 15 and the solder layer 8 of the bump electrode is joined to the connection land 11.
Position 00 and mount. The position of the semiconductor package 100 is temporarily fixed by the adhesive force of the paste 15.
Further, the semiconductor chip 9 and the heat dissipation wiring layer 14 are thermally connected. The paste 15 may be made of a material having an adhesive property such as a silicone-based pressure-sensitive adhesive and having a large amount of metal powder such as aluminum as a conductive material to improve conductivity. . In addition, the sheet may be in a deformable sheet form instead of the paste form. The heat conductivity of the paste 15 may be at least higher than that of air. In order to prevent the semiconductor chip from being deformed, it is preferable to use a material that does not harden or liquefy due to the process temperature and heat radiation from the semiconductor chip 9. Then, the paste 15 is dropped on the plating film 5 of the mounted semiconductor package 100, and another semiconductor package 100 is mounted so that the bump electrodes are joined to each other. This is sequentially repeated, and four semiconductor packages 100 are stacked on the interposer 200. In the semiconductor package 101 mounted on the uppermost layer, the solder layer 8 is not formed on the bump electrode on the surface on which the plating film 5 is formed. The four semiconductor packages 100, 101 mounted in this manner are arranged such that the connection lands 3, 3 'and the connection terminals 6, 6' are electrically connected to each other in a row in the stacking direction. I have.

Next, as shown in FIG. 2B, the heater tool HT is pressed against the connection lands 3 ′ and the connection terminals 6 of the semiconductor package 101 stacked on the uppermost layer for a predetermined period of time. Perform heating. When the connection lands 3 'and the connection terminals 6 are pressurized, the adjacent bump electrodes come into close contact with each other. Thereby, heat from the heater tool HT is transmitted to the connection lands 3, 3 ', the connection terminals 6, 6', and the solder layer 8. After the solder layer 8 is heated and melted, and the heater tool HT is retracted, it is cooled and solidified by natural heat radiation to form a solder ball. This allows the connection land 3,
3 'and the connection terminals 6 and 6' can be electrically connected and fixed in a thermally connected state.

Next, as shown in FIG. 3, a paste 15 is dropped on the plating layer 5 of the semiconductor package 101, and an adhesive 22 is dropped on the interposer 200, and a metal cap 21 is placed so as to cover the whole. Cap 21
The opening end of the interposer 200 is
And the back surface of the metal cap 21 and the plating film 5 are thermally connected by the paste 15. As a result, each semiconductor package is connected to the metal cap 21.
Sealed.

After sealing, if necessary, a flux is applied to the external electrode 12, and a solder ball having a diameter of, for example, 0.1 to 0.5 mm is attached thereto and heated by a reflow furnace to obtain a height.
A solder ball bump of about 0.05 to 0.5 mm is fixedly formed. Thus, a stacked semiconductor device can be obtained.

Note that the stacked semiconductor device of the present invention can be sealed so as to obtain the same effect by sealing with a resin. The stacked semiconductor device of the embodiment shown in FIG. 4 has a heat sink 31 thermally connected to the semiconductor package 101 via the paste 15. This heat sink 3
By sealing the semiconductor package with the epoxy resin 32 so that 1 is exposed to the outside, a stacked semiconductor device in which the semiconductor chip is thermally connected to the outside can be obtained.

In the stacked semiconductor device of the present embodiment formed by the above-described steps, the thickness of the semiconductor package including the semiconductor chip controlled to have a thickness of 80 μm or less is 80 to 100 μm. Pitch between 100 and 16
The thickness is 0 μm, and the stacked connection is performed in such a manner that the semiconductor element is housed in the gap between the respective wiring boards. In addition, each semiconductor chip is thermally connected, so that an external device and the semiconductor chip can be thermally connected, and the heat generated from each semiconductor chip is radiated to the outside or the external device. It becomes easier to do. Therefore, destruction and malfunction of the semiconductor element due to heat can be suppressed.

Further, since the means for thermally connecting is a viscous member, the mounting of the semiconductor package can be performed with high positioning accuracy. In addition, since both the semiconductor chip and the wiring board holding the semiconductor chip are made of a flexible member, failure due to deformation due to pressure or the like is reduced, and handling during mounting is facilitated. Also,
Since the laminated semiconductor device is formed of a member having a predetermined rigidity such as a glass epoxy substrate, a metal cap, and a metal heat sink, it can be easily handled when mounted on an external device.

[0021]

As described in detail above, according to the semiconductor device and the method of manufacturing the same of the present invention, it is possible to provide a structure capable of suppressing a malfunction of a semiconductor element due to a rise in temperature.

[Brief description of the drawings]

FIGS. 1A to 1C are schematic diagrams showing an embodiment of a semiconductor module manufacturing process.

FIGS. 2A and 2B are schematic diagrams of an embodiment showing a step of stacking semiconductor modules.

FIG. 3 is a schematic view illustrating a configuration of a stacked semiconductor device of the present invention.

FIG. 4 is a schematic view showing another configuration of the stacked semiconductor device of the present invention.

FIG. 5 is a schematic view showing a conventional stacked semiconductor device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Insulating board, 2 ... Wiring pattern, 3, 3 '... Connection land, 4, 7 ... Through hole, 5 ... Plating film, 6, 6' ...
Connection terminal, 8: solder layer, 9: semiconductor chip, 9a: gold bump, 10: anisotropic conductive member, BT: bonding tool, MT: mount tool, HT: heater tool, 1
DESCRIPTION OF SYMBOLS 1 ... Connection land, 12 ... External electrode, 13 ... Through hole, 14 ... Heat dissipation wiring layer, 15 ... Paste, 21 ... Metal cap, 22 ... Adhesive, 31 ... Heat dissipation plate, 32 ... Epoxy resin, 100, 101 ... Semiconductor Module, 200 ... Interposer

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Masayuki Arakawa 1-3-3 Shinmachi, Ome-shi, Tokyo Toshiba Digital Media Engineering Co., Ltd. In-house F term (reference) 5F036 AA01 BA23 BB21 BC33 BD01

Claims (4)

[Claims] 1. A flexible semiconductor chip comprising a flexible semiconductor chip, a wiring pattern electrically connected to electrodes of the semiconductor chip, and connection electrodes for electrically connecting the wiring pattern to the outside. In the semiconductor device in which the first wiring substrate is stacked, a metal film is provided on at least a part of a main surface of the first wiring substrate on which the semiconductor chip is not mounted, and the metal film is provided on the first wiring substrate. A semiconductor device comprising: a connection member for thermally connecting a semiconductor chip mounted on one wiring board. 2. The semiconductor device according to claim 1, wherein the connection member is made of an adhesive material. 3. The method according to claim 1, wherein the metal film formed on the main surface of the second wiring board having substantially no flexibility and the semiconductor chip mounted on the first wiring board are thermally connected to the metal film. 2. The semiconductor device according to claim 1, further comprising: a connection member that connects to the semiconductor device. 4. A semiconductor chip having flexibility with respect to a wiring pattern provided on one main surface is flip-chip mounted, and a metal on a region corresponding to a region where the semiconductor chip is mounted on the other main surface. When a plurality of semiconductor packages each having a flexible wiring board on which a film is provided are sequentially stacked on an interposer such that the semiconductor chip faces the interposer, a conductive adhesive material is provided on the metal film. And a step of thermally connecting the semiconductor chip and the metal film to each other.