JP2002164625A - Printed wiring board and reliability testing method for the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To detect inconvenience that long condition reliability and long insulation reliability are predicted in a printed wiring board which is die-punched. SOLUTION: Conductor patterns for test 11a to 11h, which are used for the reliability test of the printed wiring board 10, are formed near the die punching work parts 13a and 13b in the printed wiring board 10. A prescribed environment condition is given to the printed wiring board 10, voltage is applied to the conductor patterns for test 11a and 11h and long connection reliability and long insulation reliability are evaluated.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board on which a conductor pattern is formed and a method for testing the reliability of the printed wiring board. About the method.

[0002]

2. Description of the Related Art Generally, a printed wiring board used for various kinds of electronic equipment is formed by a die punching process using a die.

[0003] The quality of a printed wiring board formed by such a die-punching process depends on the die accuracy of the die used for the die-punching process, the degree of abrasion of the die, the die installation conditions, the die processing. Affected by the conditions and the design conditions of the printed wiring board, for example, when a mold with a high degree of wear is used, chipping, cracking, delamination, etc., near the outer portion or slit of the punched printed wiring board are used. Failures may occur and have a significant effect on the electrical characteristics of the printed wiring board.

Conventionally, the detection and determination of the degree of defects such as chipping in the manufacturing process of a printed wiring board is generally performed by visual inspection, and the determination largely depends on the subjective judgment of the operator. Therefore, depending on the skill level and individual differences of the workers, sometimes the printed wiring boards having defects such as chipping are shipped as non-defective products, or the printed wiring boards originally belonging to the range of non-defective products are discarded as defective products. In some cases, such a problem may occur.

As one means for solving such a problem, Japanese Patent Application Laid-Open No. 11-68264 discloses a "printed circuit board".
Is disclosed. In the "printed circuit board" disclosed in Japanese Patent Application Laid-Open No. H11-68264, a dummy pattern and a land for detecting a defect are provided in a vacant area in contact with the outer shape of the printed circuit board, and a voltage is applied to the dummy pattern via the land. By electrically measuring the presence or absence of the disconnection, a defect such as chipping is detected. As a result, it is possible to objectively detect a defect of the manufactured printed wiring board, and it is possible to efficiently manufacture a stable quality printed wiring board.

[0006]

However, Japanese Patent Application Laid-Open No.
The "printed circuit board" disclosed in US Pat.
Defects such as chipping at the time of manufacturing of the printed wiring board can be detected, but defects that predict long-term connection reliability and long-term insulation reliability in the subsequent mounting process, assembly process, long-term use, etc. of the printed wiring board There is a problem that cannot be detected.

For example, a manufactured printed wiring board is
In addition to the heat treatment performed in the mounting process and the like, the temperature changes between high and low temperatures are repeated in the market by turning on and off the power of the electronic device using the printed wiring board. Due to this change in the temperature environment, defects such as chipping, cracking, and delamination, which occurred during the die-punching process of the printed wiring board, may progress. In this case,
Even if a defect does not reach the level of a defective product at the time of punching a printed wiring board, the defect may reach the level of a defective product due to the subsequent progress.

[0008] In addition, ion migration in the printed wiring board may cause a decrease in insulation resistance or a short circuit. Ion migration in a printed wiring board means that when a voltage is applied for a long time under high humidity between conductive patterns of a printed wiring board disposed in close proximity via an insulating layer, copper constituting the conductive pattern Metal material is ionized, and the metal ions move on the surface of the insulating layer disposed between the conductor patterns while forming dentite (resin-like precipitate).
This is a phenomenon that lowers the insulation resistance of the insulating layer and eventually causes a short circuit of the insulating layer. In particular, in recent years, as printed wiring boards have become denser and thinner, the conductor patterns of the printed wiring boards are often configured close to each other, and such ion migration has become an increasingly important issue. Is coming. In addition, it is known that the dentite proceeds along a groove such as a crack of the insulating layer, and a defect such as a crack at the time of manufacturing a printed wiring board promotes this ion migration. This causes a reduction in insulation resistance of the layer and a short circuit.

The present invention has been made in view of the above points, and detects a defect in which a long-term connection reliability and a long-term insulation reliability in a mounting process of a printed wiring board, a long-term use and the like are predicted. It is an object of the present invention to provide a printed wiring board and a method for testing the reliability of the printed wiring board that can perform the method.

[0010]

According to the present invention, in order to solve the above-mentioned problems, in a printed wiring board which has been subjected to a die punching process, the printed wiring board is provided in the vicinity of the die punched portion of the printed wiring board. There is provided a printed wiring board having a test conductor pattern used for a reliability test.

Here, the test conductor pattern is used for detecting a defect in which long-term connection reliability and long-term insulation reliability are predicted. In the printed wiring board of the present invention, preferably, the test conductor pattern has a polygonal conductor pattern having at least one side parallel to the die-punched portion.

Further, in the printed wiring board of the present invention, preferably, the polygonal conductor pattern is used as an electrode pattern in a reliability test. In the printed wiring board of the present invention, preferably, the test conductor pattern is a comb-shaped conductor pattern formed in parallel with the die-punched portion.

In the printed wiring board of the present invention, preferably, the test conductor pattern includes a first through hole penetrating the upper and lower surfaces of the printed wiring board;
And has a first through-hole and a second through-hole that is not conductively connected.

In the printed wiring board according to the present invention, preferably, the test conductor pattern is a pattern formed by connecting a plurality of conductor patterns perpendicular to the die-punched portion in a continuous manner.

In the printed wiring board according to the present invention, preferably, the test conductor pattern is a pattern formed by connecting a plurality of through holes in a single line.

In the printed wiring board of the present invention, preferably, the test conductor pattern is formed on a discarded plate portion of the printed wiring board. Also, in the reliability test method of the printed wiring board die-cut,
A test conductor pattern for use in a reliability test of the printed wiring board is provided in the vicinity of the die punched portion of the printed wiring board, and by applying a voltage to the test conductor pattern, the reliability of the printed wiring board is improved. A reliability test method for a printed wiring board characterized by performing a reliability test is provided.

By doing so, it is possible to detect a defect that also predicts long-term connection reliability and long-term insulation reliability. In the method for testing the reliability of a printed wiring board according to the present invention, preferably, the application of the voltage to the test conductor pattern is performed after a predetermined environmental condition is applied to the printed wiring board.

In the method for testing the reliability of a printed wiring board of the present invention, preferably, the predetermined environmental condition includes a reflow environmental condition in a humidified state. Also,
In the reliability test method of the printed wiring board of the present invention,
Preferably, the predetermined environmental condition includes a voltage application environmental condition in a high temperature and high humidity state.

In the method for testing the reliability of a printed wiring board according to the present invention, preferably, the predetermined environmental condition includes a thermal shock environmental condition. In the printed wiring board reliability test method of the present invention, preferably, the reliability test includes a printed wiring board insulation resistance measurement test.

In the printed wiring board reliability test method of the present invention, the reliability test preferably includes a printed wiring board conduction resistance measurement test. In the printed wiring board reliability test method of the present invention, preferably, the reliability test is performed before dividing the printed wiring board into boards.

Further, in the printed wiring board reliability test method of the present invention, preferably, the reliability test is performed after the printed wiring board is divided.

[0022]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a plan view showing a configuration of a printed wiring board 10 according to the present embodiment.

In the case of the example shown in FIG.
Is a two-piece board from which two mounting boards can be taken out, and a die-punched portion 13a, 1a, which is obtained by punching the printed wiring board 10 into a perforated shape using a die.
3b separates the areas of the punched plate portions 12a and 12b, which will be the mounting substrate, and the area of the discarded plate portion 14. Discard plate 1 near mold punching parts 13a and 13b
Test conductor patterns 11a to 11f used for a reliability test of the printed wiring board 10 are formed on the fourth side, and test conductor patterns 11g and 11h are formed on the edge of the printed wiring board 10. Also, the punched plate 12
The conductor patterns a, 12b are provided with conductor patterns (not shown), whereby the punched plate portions 12a, 12b have a function as a mounting board.

As a material of the printed wiring board 10, for example, a material in which an insulating material such as paper or glass cloth is impregnated with an insulating resin such as a polyimide resin or an epoxy resin is used as an insulating layer. It is desirable to use metal foil, metal plating, or the like as the test conductor patterns 11a to 11h and the conductor patterns formed on the punched plate portions 12a and 12b.

FIGS. 2 to 12 are diagrams showing examples of the configuration of a test conductor pattern formed on the printed wiring board 10. FIG. Hereinafter, a configuration example of each test conductor pattern will be sequentially described.

FIG. 2 is a plan view illustrating a test conductor pattern 20 used for evaluating the long-term insulation reliability of the printed wiring board 10. The test conductor pattern 20 includes a polygonal conductor pattern 22a, 22b having at least one side parallel to the die punched portions 13a, 13b, and a comb-shaped conductor pattern formed parallel to the die punched portions 13a, 13b. 21.

The polygonal conductor patterns 22a and 22b are polygons having an area of at least a predetermined area, preferably at least 3 mm ² , and may have any shape such as a triangle, a quadrangle or a pentagon without any particular limitation. Is also good. As described above, by providing the polygonal conductor patterns 22a and 22b having a certain area or more, it is possible to artificially create the condition in which a defect such as chipping, cracking or delamination is most likely to occur in the test conductor pattern 20. It becomes possible. That is, it is known that defects such as chipping appear remarkably in places where there is a large difference between coarseness and denseness of the conductor pattern formed on the printed wiring board 10, and as described above, the polygonal conductor pattern 22a having a certain area or more. , 22b are provided near the edges of the polygonal conductive patterns 22a, 22b, in particular, a condition in which defects such as chipping are likely to occur. Accordingly, the minimum reliability condition in the printed wiring board 10 can be formed in the test conductor pattern 20, and the reliability of the test conductor pattern 20 can be confirmed.
The reliability of the whole can be confirmed in a pseudo manner.

The polygonal conductor patterns 22a, 22b
Is used as an electrode pattern during a reliability test. In the case of the test conductor pattern 20, the polygon conductor patterns 22a and 22b are
A long-term insulation reliability evaluation of the printed wiring board 10 is performed by applying a voltage with one of the electrodes a and 22b as a positive electrode and the other as a negative electrode.

The comb-shaped conductor pattern 21 is a conductor pattern formed by combining two comb-shaped electrodes which are formed in parallel with the die-cut portions 13a and 13b and are not conductively connected to each other. The electrodes are electrically connected to the polygonal conductor patterns 22a and 22b, respectively. Desirably, the shape and dimensions of the comb-shaped conductor pattern 21 are set so that the minimum reliability condition in the printed wiring board 10 is formed in the comb-shaped conductor pattern 21. In this case, the conductor spacing between the comb-shaped electrodes in the comb-shaped conductor pattern 21 is reduced so that the influence of ion migration is remarkable.
It is desirable that the distance be smaller than the minimum conductor interval of the conductor pattern. Examples of the shape and dimensions of the comb-shaped conductor pattern 21 include, for example, a conductor width of 75 μm, a conductor interval of 75 μm.
μm, and the minimum distance from the die-cut sections 13a and 13b is set to 0.3 mm.

The evaluation of the long-term insulation reliability of the printed wiring board 10 using the test conductor pattern 20 was carried out under the high humidity conditions, as described above, for the polygonal conductor patterns 22a and 22b.
This is done by applying a voltage in between. Thereby, a potential difference can be generated between the two comb-shaped electrodes constituting the comb-shaped conductor pattern 21, and the printed wiring board 1
An evaluation of the migration resistance of 0 can be made.

FIG. 3 is also a plan view illustrating a test conductor pattern 30 used for evaluating the long-term insulation reliability of the printed wiring board 10. Hereinafter, the description will focus on the differences from the test conductor pattern 20 shown in FIG.

The test conductor pattern 30 is formed of polygonal conductor patterns 32a and 32b and a comb-shaped conductor pattern 31, similarly to the test conductor pattern 20 shown in FIG. Is different from the test conductor pattern 20 only in that Solder resist 33 is formed of solder resist removal portions 33a, 33 on polygonal conductor patterns 32a, 32b.
b, is provided on the entire surface of the test conductor pattern 30 except for the solder resist removal portions 33a, 33
The polygon conductor patterns 32a and 32b are exposed to the outside only by b. The long-term insulation reliability evaluation of the printed wiring board 10 is performed by applying a voltage to the polygonal conductor patterns 32a and 32b from the exposed portions.

FIG. 4 is also a perspective view illustrating a test conductor pattern 40 used for long-term insulation reliability evaluation of the printed wiring board 10. Hereinafter, the description will focus on differences from the test conductor pattern 30 shown in FIG.

The test conductor pattern 40 includes a comb-shaped conductor pattern 41 and polygonal conductor patterns 42a and 42b similar to the test conductor pattern 30 shown in FIG. The conductor pattern constituted by the conductor patterns 46a and 46b is combined with the discard plate portion 14 of the printed wiring board 10.
This is an example in which a solder resist 43 having solder resist removal portions 43a and 43b and a solder resist 47 having solder resist removal portions 47a and 47b are provided on the respective surfaces. Is configured in the same manner as the test conductor pattern 30.

In the test conductor pattern 40, similarly to the test conductor pattern 30, the polygonal conductor patterns 42 a and 42 b exposed to the outside from the solder resist removal portions 43 a and 43 b and the solder resist removal portion 47
a, the polygonal conductor patterns 46a, 4b exposed from 47b
By applying a voltage to 6b, a long-term insulation reliability evaluation of the printed wiring board 10 can be performed as in the case of the test conductor pattern 30. However, in the case of the test conductor pattern 40, since the conductor patterns are configured to face each other with the discard plate portion 14 interposed therebetween, the polygon conductor patterns 42 a and the polygon conductor patterns 46 a By applying a voltage so that a potential difference is generated between the printed wiring board 46 and the polygonal conductor pattern 46b, the long-term insulation reliability in the thickness direction of the printed wiring board 10 can also be evaluated.

FIGS. 5 and 6 show a test conductor pattern 50 used for long-term insulation reliability evaluation of the printed wiring board 10.
FIG. Here, FIG. 5 is a plan view showing the configuration of the test conductor pattern 50, and FIG.
It is the perspective view.

The test conductor pattern 50 has a polygonal conductor pattern 52 formed on the surface of the discard plate portion 14 with at least one side parallel to the die-cut portions 13a and 13b.
a, 52b, first through holes 51a, 51b, 51e, 51f, which are first through holes penetrating the upper and lower surfaces of the disposal plate portion 14 of the printed wiring board 10, the first through holes, and the first through holes. The through holes 51c, 51d, 51g, and 51h, which are second through holes that are not conductively connected to the through holes, and the through holes 51i that connect the polygonal conductor pattern 52b to the lower surface of the discard plate portion 14 by conductor. I have.

As shown in FIG. 6, through holes 51a,
51b, 51e, and 51f are polygonal conductor patterns 52a.
Are electrically connected to the through holes 51c, 51d, 51
g, 51h, and 51i are conductively connected to the polygonal conductive pattern 52b.

The through-hole 51a and the through-hole 51b, the through-hole 51c and the through-hole 51d, the through-hole 51e and the through-hole 51f, and the through-hole 51g and the through-hole 51h are respectively formed in two rows in parallel. And a through hole 51d, a through hole 51c between the through hole 51b and the through hole 51e, a through hole 51e between the through hole 51c and the through hole 51g, and a through hole 51d between the through hole 51c and the through hole 51g. Hall 51
h, through holes 51f are arranged respectively.

It is desirable that the shape and dimensions of the through holes 51a to 51h be set so that the minimum reliability condition in the printed wiring board 10 is formed in the test conductor pattern 50. In the case of the conductor pattern 50 for use, it is desirable that the pitch between the through holes 51a to 51h is narrower than the pitch between the through holes of the conductor pattern in the punched plate portions 12a and 12b so that the influence of ion migration is remarkably exhibited. Examples of the shape and dimensions of the through holes 51a to 51h include, for example, a through hole diameter of 0.35 mm,
The through hole land diameter is 0.6 mm, the through hole pitch is 0.8 mm, and the minimum distance from the die punched portions 13a and 13b to the through holes 51a to 51h is 0.7 mm.
To be configured.

Evaluation of the long-term insulation reliability of the printed wiring board 10 using the test conductor pattern 50 is performed by applying a voltage between the polygon conductor patterns 52a and 52b under high humidity. Thereby, between the through holes 51a and 51b and the through holes 51c and 51d, and between the through holes 51c and 51d and the through holes 51c and 51d.
e, 51f, and a potential difference can be generated between the through holes 51e, 51f and the through holes 51g, 51h, and the migration resistance between the through holes of the printed wiring board 10 can be evaluated.

FIG. 7 is a plan view illustrating a test conductor pattern 60 used for long-term insulation reliability evaluation of the printed wiring board 10. Hereinafter, description will be made focusing on differences from the test conductor pattern 50 shown in FIGS. 5 and 6.

The test conductor pattern 60 has polygonal conductor patterns 62a, 62b and through holes 61a to 61b, similarly to the test conductor pattern 50 shown in FIGS.
Although the conductor pattern is formed by 1i, the only difference from the test conductor pattern 50 is that a solder resist 63 is provided on the surface thereof. The solder resist 63 is provided on the entire surface of the test conductor pattern 60 except for the solder resist removal portions 63a and 63b on the polygonal conductor patterns 62a and 62b, whereby the solder resist 63 is provided only by the solder resist removal portions 63a and 63b. Square conductor pattern 6
2a and 62b are exposed outside. The long-term insulation reliability evaluation of the printed wiring board 10 is performed by applying a voltage to the polygonal conductor patterns 62a and 62b from the exposed portion.

FIG. 8 is a plan view illustrating a test conductor pattern 70 used for evaluating the long-term connection reliability of the printed wiring board 10. Hereinafter, differences from the test conductor patterns 20 to 60 used in the above-described long-term insulation reliability evaluation will be mainly described.

The test conductor pattern 70 includes polygonal conductor patterns 72a and 72b, at least one side of which is parallel to the die-punched portions 13a and 13b, and a plurality of conductors perpendicular to the die-punched portions 13a and 13b. The pattern is formed by a meandering pattern 71 which is a pattern formed by connecting the patterns in a series.

As in the case of the test conductor patterns 20 to 60 used in the long-term insulation reliability evaluation, the polygonal conductor patterns 72a and 72b have a certain area or more, preferably
A polygon composed of an area of 3 mm ² or more, a triangle,
Any shape such as a quadrangle or a pentagon may be used without particular limitation. Thus, by providing the polygonal conductor patterns 72a and 72b having a certain area or more, it is possible to simulate the most susceptible conditions such as chipping, cracking, and delamination. The reliability of the whole can be confirmed in a pseudo manner.

The polygonal conductor patterns 72a, 72b
Is used as an electrode pattern at the time of a reliability test. In the case of the test conductor pattern 70, by applying a voltage to the polygonal conductor patterns 72a and 72b,
The long-term connection reliability evaluation of the printed wiring board 10 will be performed.

Both ends of the meandering pattern 71 are conductively connected to polygonal conductor patterns 72a and 72b, respectively.
The shape and dimensions of the meandering pattern 71 are
It is preferable that the minimum reliability condition is set in the meandering pattern 71. In the case of the test conductor pattern 70 used for long-term connection reliability evaluation, the influence of disconnection or the like caused by defects such as chipping is remarkably exhibited.
It is desirable that the width of the conductor pattern in the meandering pattern 71 is configured to be smaller than the width of the conductor pattern of the conductor pattern in the blanking portions 12a and 12b. Meandering pattern 71
As an example of the shape dimensions of, for example, conductor width 75μm,
Conductor spacing 75 μm, die punched parts 13a, 13b
The minimum distance from is set to 0.3 mm.

In evaluating the long-term connection reliability of the printed wiring board 10 using the test conductor pattern 70, a voltage is applied between the polygonal conductor patterns 72a and 72b as described above, and the conduction of the meandering pattern 71 is confirmed. This is done by:

FIG. 9 is also a plan view illustrating a test conductor pattern 80 used for evaluating the long-term connection reliability of the printed wiring board 10. Hereinafter, the above-described test conductor pattern 7
The following description focuses on the differences from 0.

The test conductor pattern 80 has a polygonal conductor pattern 82a, 82b and a meandering pattern 81, similar to the test conductor pattern 70 shown in FIG. 8, and has a solder resist 83 on its surface.
Is different from the test conductor pattern 70 only. The solder resist 83 has a polygonal conductor pattern 82
a, 82b are provided on the entire surface of the test conductor pattern 80 except for the solder resist removal portions 83a, 83b, whereby the solder resist removal portions 83a, 83b are provided.
Only by this means, the polygonal conductor patterns 82a and 82b are exposed to the outside. The long-term insulation reliability evaluation of the printed wiring board 10 is performed by applying a voltage to the polygonal conductor patterns 82a and 82b from the exposed portions.

FIGS. 10 and 11 show the printed wiring board 1.
FIG. 3 is a configuration diagram illustrating a test conductor pattern 90 used for long-term connection reliability evaluation of 0; Here, FIG. 10 is a plan view showing the configuration of the test conductor pattern 90, and FIG. 11 is a perspective view thereof.

The test conductor pattern 90 has a polygonal conductor pattern 92 formed on the surface of the discard plate 14 at least one side of which is parallel to the die-cut portions 13a and 13b.
a, 92b, and the discard plate portion 14 of the printed wiring board 10
Through holes 91a to 91h penetrating the upper and lower surfaces of the
It is constituted by.

As shown in FIG. 11, through holes 91a
Through hole 91b, through hole 91c and through hole 91d, through hole 91e and through hole 91
f, the through-hole 91g and the through-hole 91h are respectively formed in two rows in parallel, the through-hole 91a is a through-hole 91b, the through-hole 91b is a through-hole 91c, and the through-hole 91c is a through-hole 91d.
The through hole 91d is a through hole 91f; the through hole 91f is a through hole 91e; the through hole 91e is a through hole 91g; the through hole 91g is a through hole 91h; Are connected to one another through a conductor. The through-holes 91a located at the ends of the through-holes 91a to 91h that are connected by one conductor are connected to the polygonal conductor pattern 92a, and the through-hole 91h located at the other end is connected to the polygonal conductor pattern 92b. Connected.

It is desirable that the shape and dimensions of the through holes 91a to 91h are set so that the minimum reliability condition in the printed wiring board 10 is formed in the test conductor pattern 90. In the case of the conductor pattern 90, the through-holes 91a are formed so that the influence of disconnection or the like resulting from defects such as chipping is remarkable.
It is desirable that the through-hole diameter and the through-hole land diameter of ~ 91h be smaller than the through-hole diameter and the through-hole land diameter of the through-hole of the conductor pattern in the punched plate portions 12a and 12b. Through hole 9
Examples of the shape and dimensions of 1a to 91h include, for example, a through hole diameter of 0.35 mm and a through hole land diameter of 0.6.
mm, the through-hole pitch is 0.8 mm, and the minimum distance from the die-punched portions 13a, 13b to the through-holes 91a to 91h is 0.7 mm.

The evaluation of the long-term connection reliability of the printed wiring board 10 using the test conductor pattern 90 is performed by applying a voltage between the polygon conductor patterns 92a and 92b. Thereby, the through holes 91a to 91h
Can be confirmed, and long-term connection reliability evaluation such as disconnection of a through hole in the printed wiring board 10 caused by a crack or the like can be performed.

FIG. 12 is a plan view illustrating a test conductor pattern 100 used for evaluating the long-term connection reliability of the printed wiring board 10. Hereinafter, a description will be given focusing on differences from the test conductor pattern 90 shown in FIGS. 10 and 11.

The test conductor pattern 100 is formed of polygonal conductor patterns 102a and 102b and through holes 101a to 101h, similarly to the test conductor pattern 90 shown in FIGS. Is different from the test conductor pattern 90 only in that a solder resist 103 is provided. The solder resist 103 includes the polygonal conductor patterns 102a and 102b.
It is provided on the entire surface of the test conductor pattern 100 excluding the upper solder resist cut portions 103a and 103b, so that the polygonal conductor patterns 102a and 102b are exposed to the outside only by the solder resist cut portions 103a and 103b. Becomes Evaluation of the long-term connection reliability of the printed wiring board 10 is performed by applying a voltage to the polygonal conductor patterns 102a and 102b from the exposed portions.

FIGS. 13 and 14 are plan views illustrating a printed wiring board on which the above-described test conductor patterns are arranged. The printed wiring board 110 includes a discard plate 114
Punching part 1 for separating the die and the punching plate 112a
The test conductor patterns 20, 70, and 90 are disposed on the side of the discard plate 114 near 13a.
The test conductor patterns 50, 70, and 90 are provided on the side of the discard plate 114 near the die-punched portion 113 b for separating the test conductor patterns 50, 70, 90 b
This is an example in which test conductor patterns 20 and 50 are provided at an edge portion of a printed wiring board 110, respectively. With this configuration, the test conductor pattern 20 evaluates the long-term insulation reliability of the conductor pattern in the punched plate portions 112a and 112b, and the test conductor pattern 50 evaluates the through-hole insulation in the punched plate portions 112a and 112b. The evaluation of the long-term insulation reliability between the holes is performed by the test conductor pattern 70 using the punched plate portions 112a and 112b.
The evaluation of the long-term connection reliability of the conductor pattern in the inside is performed by the test conductor pattern 90 using the punched plate portion 112a,
It is possible to evaluate the long-term connection reliability of the through-holes in 112b.

The printed wiring board 120 includes the discard plate 12
The test conductor patterns 50, 70, and 90 are provided on the side of the discarding plate portion 124 near the die punching portion 123a that separates the punching plate portion 4 from the punching plate portion 122a.
The test conductor patterns 20, 70, and 9 are provided on the side of the discard plate portion 124 near the die punching portion 123b for separating the conductor patterns 2b and 2b.
0 is an example in which test conductor patterns 20 and 50 are provided at the edge portion of the printed wiring board 120, respectively. With this configuration, the test conductor pattern 20 evaluates the long-term insulation reliability of the conductor pattern in the punched plate portions 122a and 122b, and the test conductor pattern 50 evaluates the through insulation in the punched plate portions 122a and 122b. The evaluation of the long-term insulation reliability between the holes is performed by the test conductor pattern 70 using the punched plate portions 122a and 122a.
Evaluation of long-term connection reliability of conductor pattern in b
The test conductor pattern 90 allows the punched plate portion 122
It is possible to evaluate the long-term connection reliability of the through-holes a and 122b, respectively.

Next, a procedure for evaluating the reliability of the printed wiring board 10 provided with the test conductor patterns 11a to 11h shown in FIG. 1 will be described. As shown in FIG.
The printed wiring board 10 is provided with a punched plate portion 12 from die punched portions 13a and 13b punched in a perforated shape.
It is possible to divide the substrates a and 12b from the discarded plate part 14, and to divide the cut-out plate parts 12a, 12a,
2b will be used as a mounting substrate for electronic devices and the like. The reliability evaluation of the printed wiring board 10 provided with the test conductor pattern is roughly divided into a case where the evaluation is performed before the substrate division and a case where the reliability is evaluated after the substrate division. In addition to the die punching process, it is possible to evaluate the influence of defects such as chipping, cracking, and delamination caused by pressurization or the like at the time of substrate division on reliability.

First, the case where the reliability evaluation is performed before the printed wiring board 10 is divided will be described. FIG.
9 is a flowchart for explaining a reliability evaluation procedure performed before substrate division.

Step S1: First, as the initial value, the test conductor pattern 1 of the printed wiring board 10
A voltage is applied to the polygonal conductor patterns 1a to 11h, and the insulation resistance between the test conductor patterns 11a to 11h, between layers, between through holes, and the like is measured. Thereby, it is possible to confirm the initial state in which the defect such as the chipping caused by the die punching process gives the insulation reliability through the measurement results of the test conductor patterns 11a to 11h.

Step S2: Similarly, as an initial value, a voltage is applied to the polygonal conductor patterns of the test conductor patterns 11a to 11h of the produced printed wiring board 10,
The conduction resistance of the test conductor patterns 11a to 11h, the through holes and the like is measured. Thereby, the initial state in which the defect such as the chipping caused by the die punching process gives the connection reliability is changed to the test conductor patterns 11a to 11c.
It can be confirmed through the measurement result at 11h.

Step S3: Based on the measurement results of steps S1 and S2, it is determined whether or not the insulation reliability and connection reliability of the printed wiring board 10 have reached the acceptable line. Here, if it is determined that the insulation reliability and the connection reliability have reached the acceptable line, the process proceeds to step S5. When it is determined that the insulation reliability or the connection reliability has not reached the acceptable line, the process proceeds to step S4.

Step S4: The material of the printed wiring board 10 and the process are improved. Step S5: As an environmental condition given to the printed wiring board 10, the printed wiring board 10 is reflowed in a humidified state. The reflow conditions here are, for example, JPCA standard J
Based on PCA-BU01, after leaving for 192 hours under conditions of a temperature of 30 ° C. and a humidity of 60%, heating is performed twice in a reflow furnace having a peak temperature of 220 ° C.

Step S6: The test conductor pattern 11 of the printed wiring board 10 is used as a measured value after reflow.
A voltage is applied to the polygonal conductor patterns a to 11h, and the insulation resistance between the test conductor patterns 11a to 11h, between layers, between through holes, and the like is measured. Thereby, it is possible to confirm the influence of a defect such as chipping caused by die punching on insulation reliability after reflow.

Step S7: Similarly, as a measurement value after reflow, a voltage is applied to the polygonal conductor patterns of the test conductor patterns 11a to 11h of the printed wiring board 10, and the patterns of the test conductor patterns 11a to 11h are Measure the conduction resistance of through holes and the like. Thus, it is possible to confirm the influence of a defect such as chipping caused by die punching on the connection reliability after reflow.

Step S8: Based on the measurement results of steps S6 and S7, it is determined whether the insulation reliability and the connection reliability of the printed wiring board 10 have reached the acceptable line. Here, when it is determined that the insulation reliability and the connection reliability have reached the acceptable line, the process proceeds to step S9. If it is determined that the insulation reliability or the connection reliability has not reached the acceptable line, the process returns to step S4.

Step S9: As an environmental condition given to the printed wiring board 10, a high-temperature and high-humidity voltage application test is performed by applying a voltage to the polygonal conductor pattern for a certain period of time in a high-temperature and high-humidity state. Here, the high-temperature and high-humidity voltage application test is performed at a temperature of 85 ° C. and a humidity of 85 based on JPCA-standard JPCA-ML01 evaluation of migration resistance.
%, DC50V is applied for 250 hours.

Step S10: As a measurement value after the high-temperature and high-humidity voltage application test, a voltage is applied to the polygonal conductor patterns of the test conductor patterns 11a to 11h of the printed wiring board 10, and the respective test conductor patterns 11a to 11h are measured. The insulation resistance between patterns, between layers, between through holes, etc. is measured. Thereby, it is possible to confirm the influence of defects such as chipping caused by die punching on long-term insulation reliability.

Step S11: As environmental conditions given to the printed wiring board 10, the printed wiring board 10
A thermal shock test for giving a temperature change in a predetermined cycle is performed.
The thermal shock test here is performed, for example, according to JIS C5012.
9.2 Based on thermal shock test condition 2, 30 at -65 ° C
100 minutes at + 125 ° C for 30 cycles.
A cycle is performed.

Step S12: The test conductor pattern 1 of the printed wiring board 10 is measured as a measured value after the thermal shock test.
A voltage is applied to the polygonal conductor patterns 1a to 11h, and the conduction resistance of the test conductor patterns 11a to 11h and the through-holes are measured. As a result, it is possible to confirm the effect of defects such as chipping caused by die punching on long-term connection reliability.

Step S13: Based on the measurement results of steps S10 and S12, it is determined whether or not the insulation reliability and connection reliability of the printed wiring board 10 have reached the acceptable line. As an acceptable line of insulation reliability, for example, an insulation resistance value of 1 × 10 ⁸ Ω or more is accepted, and as an acceptable line of connection reliability, for example, a conduction change rate of 10% or less is accepted. Here, if it is determined that the insulation reliability and the connection reliability have reached the acceptable line, the processing is terminated. If it is determined that the insulation reliability or the connection reliability has not reached the acceptable line, the process returns to step S4.

Next, a case in which the reliability is evaluated after dividing the printed wiring board 10 will be described. FIG.
9 is a flowchart for explaining a reliability evaluation procedure performed after substrate division.

Step S20: Electronic components such as semiconductors are mounted on the punched plate portions 12a and 12b of the printed wiring board 10 by reflow or the like.

Step S21: The discard plate portion 14 and the blank plate portions 12a and 12b are divided into substrates. Step S22: It is determined whether or not the portion divided into the substrates in step S21 is the discard plate portion 14. If it is the discard plate 14, the process proceeds to step S24. If the punched plate portions 12a and 12b are used instead of the discarded plate portion 14, step S23
Proceed to.

Step S23: punched plate portions 12a, 12b
Is assembled in an electronic device or the like to assemble the product. Step S24: The test conductor pattern 1 of the divided printed wiring board 10 is used as an initial value after the board division.
A voltage is applied to the polygonal conductor patterns 1a to 11h, and the insulation resistance between the test conductor patterns 11a to 11h, between layers, between through holes, and the like is measured. Thereby, it is possible to confirm the initial state in which the defect such as the chipping caused by the die punching process and the division of the substrate gives the insulation reliability through the measurement results of the test conductor patterns 11a to 11h.

Step S25: Similarly, as an initial value after the substrate division, a voltage is applied to the polygonal conductor patterns of the test conductor patterns 11a to 11h of the printed circuit board 10 divided into the substrates, and the respective test conductor patterns 11a ~ 1
The conduction resistance of a 1-h pattern, a through hole, etc. is measured. Thereby, it is possible to confirm the initial state in which the defect such as the chipping caused by the die punching and the substrate division gives the connection reliability through the measurement results of the test conductor patterns 11a to 11h.

Step S26: Based on the measurement results of steps S24 and S25, it is determined whether or not the insulation reliability and the connection reliability of the printed wiring board 10 have reached the acceptable line. Here, if it is determined that the insulation reliability and the connection reliability have reached the acceptable line, the process proceeds to step S2.
Proceed to 8. When it is determined that the insulation reliability or the connection reliability has not reached the acceptable line, the process proceeds to step S27.

Step S27: The material of the printed wiring board 10 and the process are improved. Step S28: As an environmental condition given to the printed wiring board 10, a high-temperature and high-humidity voltage application test is performed by applying a voltage to the polygonal conductor pattern for a certain period of time in a high-temperature and high-humidity state. The high-temperature high-humidity voltage application test here is based on, for example, JPCA-standard JPCA-ML01 migration resistance evaluation, and applies DC 50 V for 250 hours in an environment of a temperature of 85 ° C. and a humidity of 85%.

Step S29: As a measurement value after the high-temperature and high-humidity voltage application test, a voltage is applied to the polygonal conductor patterns of the test conductor patterns 11a to 11h of the printed wiring board 10, and the respective test conductor patterns 11a to 11h are measured. The insulation resistance between patterns, between layers, between through holes, etc. is measured. Thereby, it is possible to confirm the influence of defects such as chipping caused by die punching and substrate division on long-term insulation reliability.

Step S30: The environmental conditions given to the printed wiring board 10 are as follows.
A thermal shock test for giving a temperature change in a predetermined cycle is performed.
The thermal shock test here is performed, for example, according to JIS C5012.
9.2 Based on thermal shock test condition 2, 30 at -65 ° C
100 minutes at + 125 ° C for 30 cycles.
A cycle is performed.

Step S31: The test conductor pattern 1 of the printed wiring board 10 is measured as a measured value after the thermal shock test.
A voltage is applied to the polygonal conductor patterns 1a to 11h, and the conduction resistance of the test conductor patterns 11a to 11h and the through-holes are measured. As a result, it is possible to confirm the effect of defects such as chipping caused by die punching and substrate division on long-term connection reliability.

Step S32: Based on the measurement results of steps S29 and S31, it is determined whether or not the insulation reliability and connection reliability of the printed wiring board 10 have reached the acceptable line. As an acceptable line of insulation reliability, for example, an insulation resistance value of 1 × 10 ⁸ Ω or more is accepted, and as an acceptable line of connection reliability, for example, a conduction change rate of 10% or less is accepted. Here, if it is determined that the insulation reliability and the connection reliability have reached the acceptable line, the processing is terminated. If it is determined that the insulation reliability or the connection reliability has not reached the acceptable line, the process returns to step S27.

As described above, in this embodiment, since the test conductor pattern used for the reliability test of the printed wiring board is formed in the vicinity of the die-punched portion of the printed wiring board, during the mounting process of the printed wiring board. In addition, it is possible to detect a failure in which long-term connection reliability and long-term insulation reliability during long-term use and the like are predicted.

Further, in the printed wiring board of the present invention, the test conductor pattern has a polygonal conductor pattern whose at least one side is parallel to the die-punched portion, so that the reliability in the printed wiring board is minimized. The condition can be formed in the test conductor pattern, and the reliability of the entire test printed circuit board can be simulated by checking the reliability of the test conductor pattern.

Further, in the printed wiring board of the present invention, by using a polygonal conductor pattern as an electrode pattern in a reliability test, the space for the test conductor pattern can be reduced.

Further, in the printed wiring board of the present invention, the test conductor pattern is a comb-shaped conductor pattern formed in parallel with the die-punched portion, so that the printed wiring board has migration resistance against defects such as chipping. Can be evaluated.

In the printed wiring board of the present invention, the test conductor pattern is disposed adjacent to the first through hole penetrating the upper and lower surfaces of the printed wiring board and the first through hole. By having the holes and the second through holes that are not connected to the conductor, it becomes possible to evaluate the migration resistance between the through holes of the printed wiring board for defects such as chipping.

Further, in the printed wiring board of the present invention, the test conductor pattern is formed by connecting a plurality of conductor patterns perpendicular to the die-punched portion in a continuous manner, thereby forming a chip. It is possible to evaluate the connection reliability of the conductor pattern of the printed wiring board with respect to defects such as.

Further, in the printed wiring board of the present invention, the test conductor pattern is formed by a plurality of through holes.
By using a pattern formed by connecting in succession, it is possible to evaluate the connection reliability of the through hole of the printed wiring board with respect to defects such as chipping.

Further, in the printed wiring board of the present invention, by forming the test conductor pattern on the discarded plate portion of the printed wiring board, it is possible to save space on the mounting board.

A test conductor pattern used for a reliability test of the printed wiring board is provided in the vicinity of the die punched portion of the printed wiring board, and a voltage is applied to the test conductor pattern to thereby improve the reliability of the printed wiring board. Since the performance test is performed, it is possible to detect a defect that also predicts long-term connection reliability and long-term insulation reliability during the mounting process of the printed wiring board, long-term use, and the like.

In the method for testing the reliability of a printed wiring board of the present invention, the application of a voltage to the test conductor pattern is performed after a predetermined environmental condition is applied to the printed wiring board, so that the long-term connection reliability is improved. It is possible to detect a failure that also predicts the reliability and long-term insulation reliability.

Further, in the method for testing the reliability of a printed wiring board of the present invention, the predetermined environmental conditions include the reflow environmental conditions in a humidified state, so that the components on the printed wiring board by reflow can be formed. It is possible to detect a failure in which connection reliability and insulation reliability after mounting are predicted.

In the method for testing the reliability of a printed wiring board according to the present invention, the predetermined environmental condition includes a voltage application environmental condition in a high temperature and high humidity state.
It is possible to detect a defect that predicts long-term insulation reliability against ion migration.

Further, in the method for testing the reliability of a printed wiring board of the present invention, since the predetermined environmental condition has a thermal shock environment condition, a long-term connection reliability and a long-term insulation reliability are also predicted. Can be detected.

In the method for testing the reliability of a printed wiring board according to the present invention, the reliability test includes a test for measuring the insulation resistance of the printed wiring board. Can be performed.

In the method for testing the reliability of a printed wiring board according to the present invention, the reliability test includes a test for measuring the conduction resistance of the printed wiring board. Can be performed.

In the method for testing the reliability of a printed wiring board according to the present invention, the reliability test is performed before the division of the printed wiring board into boards, thereby causing defects such as chipping caused only by die punching. This makes it possible to evaluate a decrease in reliability.

In the method for testing the reliability of a printed wiring board according to the present invention, the reliability test is performed after the printed wiring board is divided, so that not only the die punching but also the chipping generated at the time of dividing the board is performed. It is possible to evaluate a decrease in reliability due to such a defect.

The present invention is not restricted to the above embodiment. For example, in the present embodiment, the test conductor pattern is configured on the discarded plate portion near the die punched portion, but the test conductor pattern is configured on the punched plate portion near the die punched portion. Is also good.

In this embodiment, the conditions of the high-temperature / high-humidity voltage application test and the thermal shock test are set, and after those tests, it is determined whether or not the insulation reliability and the connection reliability have reached the acceptable line. However, the high-temperature and high-humidity voltage application test and the thermal shock test may be continued until the insulation reliability or the connection reliability falls below the acceptable line, and the reliability of the printed wiring board 10 may be evaluated by the duration and the number of times. Good. Further, the data of the duration and the number of times of the high-temperature / high-humidity voltage application test and the thermal shock test thus obtained may be stored and used as data when examining the material of the printed wiring board and the manufacturing conditions.

Further, in this embodiment, the test conductor pattern 1 is provided on the printed circuit board 10 which has been die-cut.
1a to 11h were formed, and the reliability of the printed wiring board 10 was evaluated using the test conductor patterns 11a to 11h. A conductor pattern may be formed, and the reliability of the printed wiring board may be evaluated.

Further, the test conductor pattern of the present invention comprises:
It may be formed on all manufactured printed wiring boards, or may be formed on a part of the manufactured printed wiring boards (for example, for each manufacturing lot).

Further, the reliability evaluation using the test conductor pattern in the present invention may be performed on all the manufactured printed wiring boards.
The process may be performed only on a part of the printed wiring boards extracted for each lot.

[0108]

As described above, according to the present invention, a test conductor pattern used for a reliability test of a printed wiring board is formed in the vicinity of a die punched portion of the printed wiring board. During the mounting process,
It is possible to detect a defect that also predicts long-term connection reliability and long-term insulation reliability during long-term use.

[Brief description of the drawings]

FIG. 1 is a plan view showing a configuration of a printed wiring board.

FIG. 2 is a plan view illustrating a test conductor pattern used for long-term insulation reliability evaluation of a printed wiring board.

FIG. 3 is a plan view illustrating a test conductor pattern used for long-term insulation reliability evaluation of a printed wiring board.

FIG. 4 is a perspective view illustrating a test conductor pattern used for long-term insulation reliability evaluation of a printed wiring board.

FIG. 5 is a plan view illustrating a test conductor pattern used for long-term insulation reliability evaluation of a printed wiring board.

FIG. 6 is a perspective view illustrating a test conductor pattern used for long-term insulation reliability evaluation of a printed wiring board.

FIG. 7 is a plan view illustrating a test conductor pattern used for long-term insulation reliability evaluation of a printed wiring board.

FIG. 8 is a plan view illustrating a test conductor pattern used for long-term connection reliability evaluation of a printed wiring board.

FIG. 9 is a plan view illustrating a test conductor pattern used for long-term connection reliability evaluation of a printed wiring board.

FIG. 10 is a plan view illustrating a test conductor pattern used for evaluating long-term connection reliability of a printed wiring board;

FIG. 11 is a perspective view illustrating a test conductor pattern used for long-term connection reliability evaluation of a printed wiring board.

FIG. 12 is a plan view illustrating a test conductor pattern used for evaluating long-term connection reliability of a printed wiring board;

FIG. 13 is a plan view illustrating a printed wiring board on which test conductor patterns are arranged.

FIG. 14 is a plan view illustrating a printed wiring board on which test conductor patterns are arranged.

FIG. 15 is a flowchart for explaining a reliability evaluation procedure performed before substrate division.

FIG. 16 is a flowchart illustrating a reliability evaluation procedure performed after substrate division.

[Explanation of symbols]

10, 110, 120: printed wiring board, 11a to 1
1h, 20 to 100 ... conductor pattern for test, 12a,
12b, 112a, 112b, 122a, 122b ... punched plate portions, 13a, 13b, 113a, 113b, 123
a, 123b: die-punched portion, 14, 114, 1
24: Discard plate portion, 21, 31, 41, 45 ... Comb-shaped conductor pattern, 51a to 51i, 61a to 61i, 91a to 9
1h, 101a to 101h: through holes, 71, 81
... meandering pattern, 22a, 22b, 32a, 32b, 4
2a, 42b, 46a, 46b, 52a, 52b, 62
a, 62b, 72a, 72b, 82a, 82b, 92
a, 92b, 102a, 102b: Polygonal conductor pattern, 33, 43, 47, 63, 83, 103: Solder resist, 33a, 33b, 43a, 43b, 47a, 4
7b, 63a, 63b, 83a, 83b, 103a, 1
03b: Solder resist removal part

Claims (17)

[Claims] 1. A printed circuit board which has been subjected to die punching, wherein a test conductor pattern used for a reliability test of the printed wiring board is provided near the die punched portion of the printed wiring board. Printed wiring board. 2. The printed wiring board according to claim 1, wherein the test conductor pattern has a polygonal conductor pattern having at least one side parallel to the die-cut portion. 3. The printed wiring board according to claim 2, wherein the polygonal conductor pattern is used as an electrode pattern in the reliability test. 4. The printed wiring board according to claim 1, wherein the test conductor pattern is a comb-shaped conductor pattern formed in parallel with the die-punched portion. 5. The test conductor pattern is arranged adjacent to the first through hole penetrating the upper and lower surfaces of the printed wiring board, and is connected to the first through hole. The printed wiring board according to claim 1, further comprising: a second through-hole that is not formed. 6. The test conductor pattern according to claim 1, wherein the test conductor pattern is a pattern formed by connecting a plurality of conductor patterns perpendicular to the die-punched portion in a continuous manner. Printed wiring board. 7. The test conductor pattern according to claim 1, wherein the test conductor pattern is a pattern formed by connecting a plurality of through holes in a series.
The printed wiring board as described. 8. The printed circuit board according to claim 1, wherein the test conductor pattern is formed on a discard plate portion of the printed circuit board. 9. A reliability test method for a printed wiring board on which a die has been punched, wherein a test conductor pattern used for a reliability test of the printed wiring board is provided near the die punched portion of the printed wiring board. Providing a reliability test of the printed wiring board by applying a voltage to the test conductor pattern. 10. The reliability of a printed wiring board according to claim 9, wherein the application of the voltage to the test conductor pattern is performed after a predetermined environmental condition is given to the printed wiring board. Sex test method. 11. The method according to claim 10, wherein the predetermined environmental condition includes a reflow environmental condition in a humidified state. 12. The method for testing reliability of a printed circuit board according to claim 10, wherein said predetermined environmental condition includes a voltage application environment condition in a high temperature and high humidity state. 13. The method according to claim 10, wherein the predetermined environmental condition includes a thermal shock environmental condition. 14. The printed circuit board reliability test method according to claim 9, wherein the reliability test includes an insulation resistance measurement test of the printed circuit board. 15. The method according to claim 9, wherein the reliability test includes a test for measuring a conduction resistance of the printed wiring board. 16. The method according to claim 9, wherein the reliability test is performed before dividing the printed wiring board into boards. 17. The method according to claim 9, wherein the reliability test is performed after dividing the printed wiring board.