JP2002151618A - Build-up printed wring board and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To offer a build-up printed wiring board having a good connecting reliability. SOLUTION: This build-up printed wiring board in which a semiconductor element such as an LSI is mounted with flip-chip mounting by pressure welding includes the following steps: (a) a step of laminating the necessary number of layers while forming a circuit pattern except the outermost layer, (b) a step of subjecting the substrate to a copper plating resist treatment except an electrode pad of the semiconductor element of the outermost layer, (c) a step of subjecting the electrode pad of the semiconductor element, (d) a step of removing the copper plating resist applied during the step (b).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board, and more particularly to a build-up printed wiring board suitable for flip-chip mounting of a semiconductor device such as an LSI.

[0002]

2. Description of the Related Art As a method for mounting a bare chip, a pressure welding method has been proposed. In the pressure welding method, there is no need to supply a bonding material such as a solder or a conductive resin, and only mechanical contact is performed by the contraction force of a sealing resin, which is an underfill material filled between the LSI and a circuit board, and the LSI is formed. The electrodes are electrically connected to the pads on the circuit board.

The steps of the pressure welding method are as follows. First,
A sealing resin as an underfill material is supplied to a portion on a circuit board on which the LSI is mounted. Next, put LS on this part
I is mounted and pressurized. Subsequently, in this state, heat or light is applied to cure the sealing resin, and the electrodes of the LSI and the pads on the circuit board are connected.

[0004] Build-up printed wiring boards are also used as circuit boards on which LSIs are mounted by this pressure welding method. Here, a method of manufacturing the build-up printed wiring board will be briefly described. A copper-clad laminate is prepared as an inner core material, and the copper foil is etched to form a circuit pattern. Next, a thermosetting resin is applied to the surface on which the circuit pattern is formed and heated to form a thermosetting resin layer. A copper foil is laminated on the surface of the thermosetting resin layer.

A small opening for a via hole and a circuit pattern are formed in the copper foil by a known photoetching method. The laser is sequentially irradiated to each of the small openings of the laminate thus manufactured. Since the laser does not transmit through the copper foil on the surface, the thermosetting resin layer is heated and disappears through the small opening having no copper foil. As a result, a small hole for a laser via hole is formed below the small opening. Since the laser cannot reach under the underlying copper foil, the underlying copper foil appears at the bottom of the stoma.

[0006] The laminate is then plated with copper. That is, after electroconductivity is imparted to the surface including the inner surface of the small hole by electroless copper plating, electrolytic plating is performed, and a copper plating layer having a predetermined thickness is formed. The copper plating layer formed on the inner surface of the small hole becomes a via hole connecting the circuit pattern of the lower copper foil and the circuit pattern of the upper copper foil. A circuit pattern is formed on the surface of the copper foil by a photoetching method or the like as necessary.

Further, by laminating another thermosetting resin layer or a copper foil thereon by the same procedure as above and forming a laser via hole, the number of laminations can be increased. An electrode pad forming portion for mounting a semiconductor element such as an LSI on the circuit pattern on the surface thus laminated is plated with nickel having a thickness of about 5 μm and further having a thickness of 0.05 to 0.3 μm. Plating is applied. This is to prevent corrosion.

The LS is formed on the electrode pads of the completed build-up printed wiring board by using an underfill material.
A semiconductor element such as I is flip-chip mounted by a pressure welding method. At this time, voids (hereinafter, referred to as “voids”) may be generated inside the underfill material that bonds the build-up printed wiring board and the semiconductor element. This void is caused by the underfill material being pushed and flown by the semiconductor element when the semiconductor element is flip-chip mounted and flowing, and the paste being trapped and staying before the air escapes near the convex portion of the build-up substrate at that time. is there. In addition, the moisture inside the build-up printed wiring board flows out to the underfill material side by heating during flip chip mounting,
This is caused by bubbles in the underfill material.

[0009]

The voids accumulate moisture, and the moisture expands due to the heat load caused by the reflow heating, causing a problem that the connection reliability is reduced, for example, a crack is induced from the void as a starting point. . SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides an electrode pad for mounting a semiconductor element such as an LSI, which is appropriately higher than an electrode pad for mounting another surface-mounted component, thereby achieving a build-up printed wiring board and
The present invention provides a build-up printed wiring board with high connection reliability, in which a gap between semiconductor elements such as SIs is widened to reduce the ratio of voids occupying the gap to prevent cracks from occurring.

[0010]

According to the present invention, there is provided a build-up printed wiring board in which a semiconductor element such as an LSI is flip-chip mounted by a pressure welding method. The height is made higher than the height of the electrode pads of the other surface mount components.

Further, the method for manufacturing a build-up printed wiring board is characterized in that the build-up printed wiring board on which a semiconductor element such as an LSI is flip-chip mounted by a pressure welding method includes the following steps. a) a step of alternately laminating insulating layers and copper layers by a required number of layers while forming a circuit pattern except for the outermost layer b) excluding an electrode pad forming portion of a semiconductor element of the outermost layer
Step of applying a copper plating resist process c) Step of applying copper plating to the electrode pad formation portion of the semiconductor element d) Step of removing the copper plating resist applied in Step b

In the build-up printed wiring board according to the present invention, the difference between the height of an electrode pad for mounting a semiconductor element such as an LSI and the height of an electrode pad for mounting other surface mounting components is 15 μm to 25 μm. It is characterized by having.

According to the present invention, an electrode pad for mounting a semiconductor device such as an LSI is higher than an electrode pad for mounting other surface mount components. Since the gap can be widened, the ratio of voids in the gap is reduced, so that cracks can be hardly formed.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the drawings. FIG. 1 is a manufacturing process diagram of a build-up printed wiring board showing one embodiment of the present invention. The process up to the lamination of the outermost copper foil is the same as that of the conventional method of manufacturing a build-up printed wiring board, and therefore the description thereof will be omitted, and the production method after lamination of the outermost copper foil will be described.

FIG. 1 (a) shows the outermost layer of the laminate thus manufactured. Here, 1 is a thermosetting resin layer, and 2 is a copper foil laminated on its surface. Next, as shown in FIG. 1B, a copper plating resist process is performed on the surface of the copper foil 2 except for a portion where an electrode pad for mounting a semiconductor element such as an LSI is formed. Reference numeral 3 denotes the copper plating resist layer thus formed.

Next, as shown in FIG. 1C, the copper foil 2 is plated with copper. 4a is the copper plating layer thus formed, and about 20 μm is appropriate. Next, the copper plating resist layer 3 is peeled off as shown in FIG.

Thereafter, in the same manner as in the conventional manufacturing process of a build-up printed wiring board, a circuit pattern and an electrode pad forming portion are subjected to an etching resist process and etched to form a desired circuit pattern and an electrode pad. The resist is peeled off, and a solder resist process is performed on a required portion, and nickel plating and then gold plating are performed on the electrode pad portion for mounting surface components. The build-up printed wiring board thus obtained is shown in FIG. 1 (e) (solder resist is not shown). Where 4 is the LSI
Reference numeral 5 denotes an electrode pad for another surface mount component, and 6 denotes a circuit pattern.

[0018]

According to the present invention, as described above,
A portion corresponding to an electrode pad for mounting a semiconductor element such as an LSI of a build-up printed wiring board is plated with copper, so that the height is higher than a conventional electrode pad for mounting a semiconductor element such as an LSI of a build-up printed wiring board. Therefore, even if voids occur when the semiconductor element is flip-chip mounted by the pressure welding method, the gap between the semiconductor element and the build-up printed wiring board is widened, and the proportion of voids in the gap decreases, so that cracks are formed. Since it is difficult to enter, a build-up printed wiring board having excellent connection reliability can be provided (claims 1 and 3). Further, according to the method of manufacturing a build-up printed wiring board according to the present invention, the above-mentioned build-up printed wiring board can be provided (claims 2 and 4).

[Brief description of the drawings]

FIG. 1 is a manufacturing process diagram showing one embodiment of a build-up printed wiring board of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Thermosetting resin layer 2 Copper foil 3 Copper plating resist 4a Copper plating 4 Electrode pad for mounting semiconductor elements 5 Electrode pad for mounting other surface mounting parts 6 Circuit pattern

Claims (4)

[Claims] 1. A build-up printed wiring board on which a semiconductor element such as an LSI is flip-chip mounted by a pressure welding method, wherein the height of an electrode pad on which the semiconductor element is mounted is greater than the height of an electrode pad of another surface mount component. A build-up printed wiring board, characterized in that: 2. A method for manufacturing a build-up printed wiring board according to claim 1, wherein the build-up printed wiring board on which a semiconductor element such as an LSI is flip-chip mounted by a pressure welding method includes the following steps. A step of alternately laminating insulating layers and copper layers by a required number of layers while forming a circuit pattern excluding the outermost layer. B) Excluding an electrode pad forming portion of the outermost semiconductor element,
Step of applying a copper plating resist process c) Step of applying copper plating to the electrode pad formation portion of the semiconductor element d) Step of removing the copper plating resist applied in Step b 3. The semiconductor device according to claim 1, wherein the difference between the height of the electrode pad for mounting a semiconductor element such as an LSI and the height of the electrode pad for mounting another surface mounting component is 15 μm to 25 μm. Build-up printed wiring board. 4. A copper plating thickness applied to an electrode pad formation portion for mounting a semiconductor element such as an LSI is 15 μm to 25 μm.
3. The method for manufacturing a build-up printed wiring board according to claim 2, wherein