JP2002124616A - Chip-component mounting structure on lead frame - Google Patents
Chip-component mounting structure on lead frameInfo
- Publication number
- JP2002124616A JP2002124616A JP2000351958A JP2000351958A JP2002124616A JP 2002124616 A JP2002124616 A JP 2002124616A JP 2000351958 A JP2000351958 A JP 2000351958A JP 2000351958 A JP2000351958 A JP 2000351958A JP 2002124616 A JP2002124616 A JP 2002124616A
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- soldered
- chip
- chip component
- mounting structure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
- H01L2224/26152—Auxiliary members for layer connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
- H01L2224/26175—Flow barriers
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は電子回路を構成する
リードフレームのチップ部品実装構造に関し、詳しく
は、リードフレームの形状を一部変更することにより、
リードフレームの製造工程を一部省略して、製造コスト
を低減することができるリードフレームのチップ部品実
装構造に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip component mounting structure of a lead frame constituting an electronic circuit, and more particularly, to a structure of a lead frame by partially changing the shape of the lead frame.
The present invention relates to a chip component mounting structure of a lead frame capable of reducing a manufacturing cost by partially omitting a manufacturing process of a lead frame.
【０００２】[0002]
【従来の技術】従来、電子回路を構成する金属リードフ
レーム上に、電気部品であるチップ抵抗、チップコンデ
ンサ、チップトランジスタ等の、いわゆるチップ部品を
半田付けする場合、図２に示すように、リードフレーム
１１の半田付け部１１ａ以外に溶けた半田１３が流れて
付かないようにするため、半田付け部１１ａ以外のリー
ドフレーム１１上に予めレジスト１２を塗布する、いわ
ゆるマスク処理を施した後、リードフレーム１１にチッ
プ部品２を搭載し半田付けする方法が一般的に行なわれ
ている。2. Description of the Related Art Conventionally, when a so-called chip component such as a chip resistor, a chip capacitor, a chip transistor or the like, which is an electric component, is soldered on a metal lead frame constituting an electronic circuit, as shown in FIG. In order to prevent the melted solder 13 from flowing to the portions other than the soldering portion 11a of the frame 11, a resist 12 is applied in advance on the lead frame 11 other than the soldering portion 11a, that is, after performing a so-called masking process, A method of mounting the chip component 2 on the frame 11 and soldering is generally performed.
【０００３】[0003]
【発明が解決しようとする課題】しかしながら、上述の
マスク処理は被覆のためのレジスト材料費、製造工数増
にともなう製造費等が嵩みコスト高となるため、マスク
処理工程を省いた安価なチップ部品の実装構造が模索さ
れている。そこで本発明は、リードフレームにチップ部
品を半田付けする際、半田付け部以外に半田が付着しな
いリードフレーム形状とすることにより、マスク処理を
廃止することができるチップ部品の実装構造を提案する
ことを課題とするものである。However, in the above mask processing, the cost of the resist material for coating and the manufacturing cost associated with an increase in the number of manufacturing steps are increased and the cost is increased. The mounting structure of components is being sought. Therefore, the present invention proposes a chip component mounting structure that can eliminate mask processing by adopting a lead frame shape in which solder does not adhere to portions other than the soldering portion when soldering the chip component to the lead frame. Is the subject.
【０００４】[0004]
【課題を解決するための手段】前記課題の解決を目的と
してなされた請求項１の発明は、チップ部品を実装する
リードフレームの半田付け部に段差部を設け、加熱溶着
して半田付けの際、段差壁により半田がリードフレーム
の半田付け部以外に流れ出て付着するのを防止すること
により、リードフレームにレジストを塗布して被覆する
マスク処理を廃止したことを特徴とする。According to a first aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of: providing a stepped portion in a soldering portion of a lead frame for mounting a chip component; The step of preventing solder from flowing out and attaching to portions other than the soldered portion of the lead frame by the stepped wall eliminates a mask process of applying and covering a resist on the lead frame.
【０００５】[0005]
【作用】上述のように、請求項１の発明においては、リ
ードフレームにチップ部品を搭載するための半田付け部
に設けられた段差部の段差壁によって半田の流れが遮ら
れ、リードフレームの半田付け部以外に流れ出て付着す
るのが防止される。そのため、半田付け部以外にレジス
トを塗布して被覆するマスク処理を廃止することができ
る。As described above, according to the first aspect of the present invention, the flow of the solder is interrupted by the step wall of the step portion provided at the soldering portion for mounting the chip component on the lead frame, and the solder of the lead frame is removed. It is prevented from flowing out and attaching to portions other than the attachment portion. Therefore, it is possible to omit the mask process for applying and covering the resist on the portion other than the soldered portion.
【０００６】[0006]
【発明の実施の形態】本発明の望ましい実施形態につい
て図面を参照して説明する。図１は本発明の一実施形態
に係るリードフレームの部品実装構造の上面図および縦
断面図である。図１において、電子回路を構成するリー
ドフレーム１の半田付け部１Ａに段差部１ａが設けら
れ、段差壁１ｂを形成している。段差部１ａはリードフ
レーム１を所定の形状にプレスで打ち抜く際、リードフ
レーム１の先端部を金型の上型で押しつぶして形成され
る。すなわち、プレスの１工程で段差部が形成されるよ
うにすることで、加工工数を増加させずに形成可能とな
る。段差部１ａ上にチップ部品２が載置され、加熱溶融
して半田付けされている。半田３は段差壁１ｂにより遮
られてリードフレーム１の半田付け部以外１ｃへ流れ出
ることがない。そのため、予め半田付け部以外１ｃにレ
ジスト１２（図２参照）を被覆するマスク処理を廃止す
ることができる。なお、本実施形態はチップ部品の半田
付けだけでなく、Ａｇペースト等の導電性ペーストによ
る溶着においても同様の効果が得られることは言うまで
もない。チップ部品を搭載したリードフレームは、エポ
キシ樹脂等でモールドしてセンサ回路、駆動回路として
利用する。DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a top view and a longitudinal sectional view of a component mounting structure of a lead frame according to an embodiment of the present invention. In FIG. 1, a step portion 1a is provided in a soldering portion 1A of a lead frame 1 constituting an electronic circuit, and a step wall 1b is formed. When the lead frame 1 is punched into a predetermined shape by a press, the stepped portion 1a is formed by crushing the tip of the lead frame 1 with an upper mold. That is, by forming the stepped portion in one step of pressing, the step can be formed without increasing the number of processing steps. The chip component 2 is placed on the step portion 1a, and is heated and melted and soldered. The solder 3 is not interrupted by the step wall 1b and does not flow out to the portion 1c other than the soldered portion of the lead frame 1. Therefore, it is possible to omit the mask process for covering the resist 12 (see FIG. 2) on the portion 1c other than the soldered portion in advance. In this embodiment, it goes without saying that the same effect can be obtained not only by soldering the chip components but also by welding with a conductive paste such as an Ag paste. A lead frame on which chip components are mounted is molded with an epoxy resin or the like and used as a sensor circuit and a drive circuit.
【０００７】[0007]
【発明の効果】本発明は上述のように構成されているの
で以下の効果を奏する。すなわち、リードフレームの半
田付け部に設けられた段差部の段差壁により加熱溶融し
た半田の流れが遮られ、リードフレームの半田付け部以
外に流れ出て付着するのが防止される。そのため、半田
付け部以外にレジストを塗布して被覆するマスク処理を
廃止することができるので、リードフレームのコスト低
減が可能となる。The present invention has the following effects because it is configured as described above. That is, the flow of the heated and melted solder is blocked by the step wall of the step portion provided in the soldering portion of the lead frame, and is prevented from flowing out and attaching to portions other than the soldering portion of the lead frame. This eliminates the need for a masking process for applying and coating a resist on portions other than the soldered portion, thereby reducing the cost of the lead frame.
【図１】本発明の一実施形態に係るリードフレームのチ
ップ部品実装構造を示す、上面図および正面縦断面図で
ある。FIG. 1 is a top view and a front vertical sectional view showing a chip component mounting structure of a lead frame according to an embodiment of the present invention.
【図２】従来のリードフレームのチップ部品実装構造を
示す、上面図および正面縦断面図である。FIG. 2 is a top view and a front vertical sectional view showing a chip component mounting structure of a conventional lead frame.
１ リードフレーム １Ａ 半田付け部 １ａ 段差部 １ｂ 段差壁 １ｃ 半田付け部以外 ２ チップ部品 ３ 半田 DESCRIPTION OF SYMBOLS 1 Lead frame 1A Solder part 1a Step part 1b Step wall 1c Other than a solder part 2 Chip component 3 Solder
Claims (1)
チップ部品実装構造において、リードフレームの半田付
け部分に段差部を設け、チップ部品を半田付けするよう
にしたことを特徴とするリードフレームのチップ部品実
装構造。In a chip component mounting structure of a lead frame for mounting a chip component, a step portion is provided in a soldering portion of the lead frame, and the chip component is soldered. Mounting structure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000351958A JP2002124616A (en) | 2000-10-13 | 2000-10-13 | Chip-component mounting structure on lead frame |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000351958A JP2002124616A (en) | 2000-10-13 | 2000-10-13 | Chip-component mounting structure on lead frame |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2002124616A true JP2002124616A (en) | 2002-04-26 |
Family
ID=18824920
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000351958A Pending JP2002124616A (en) | 2000-10-13 | 2000-10-13 | Chip-component mounting structure on lead frame |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2002124616A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008151792A (en) * | 2007-12-17 | 2008-07-03 | Hitachi Ltd | Pressure detector |
| US7732919B2 (en) | 2008-01-29 | 2010-06-08 | Renesas Technology Corp. | Semiconductor device |
| EP3109897A1 (en) * | 2015-06-23 | 2016-12-28 | Nxp B.V. | A lead frame assembly |
| US9922912B1 (en) | 2016-09-07 | 2018-03-20 | Infineon Technologies Americas Corp. | Package for die-bridge capacitor |
-
2000
- 2000-10-13 JP JP2000351958A patent/JP2002124616A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008151792A (en) * | 2007-12-17 | 2008-07-03 | Hitachi Ltd | Pressure detector |
| US7732919B2 (en) | 2008-01-29 | 2010-06-08 | Renesas Technology Corp. | Semiconductor device |
| EP3109897A1 (en) * | 2015-06-23 | 2016-12-28 | Nxp B.V. | A lead frame assembly |
| US9922912B1 (en) | 2016-09-07 | 2018-03-20 | Infineon Technologies Americas Corp. | Package for die-bridge capacitor |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20040616 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20040713 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20041130 |