JP2002111472A5 - - Google Patents

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Publication number
JP2002111472A5
JP2002111472A5 JP2001247518A JP2001247518A JP2002111472A5 JP 2002111472 A5 JP2002111472 A5 JP 2002111472A5 JP 2001247518 A JP2001247518 A JP 2001247518A JP 2001247518 A JP2001247518 A JP 2001247518A JP 2002111472 A5 JP2002111472 A5 JP 2002111472A5
Authority
JP
Japan
Prior art keywords
buffer
signal
control signal
electronic circuit
generating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2001247518A
Other languages
English (en)
Japanese (ja)
Other versions
JP3818433B2 (ja
JP2002111472A (ja
Filing date
Publication date
Priority claimed from US09/641,085 external-priority patent/US6259282B1/en
Application filed filed Critical
Publication of JP2002111472A publication Critical patent/JP2002111472A/ja
Publication of JP2002111472A5 publication Critical patent/JP2002111472A5/ja
Application granted granted Critical
Publication of JP3818433B2 publication Critical patent/JP3818433B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

JP2001247518A 2000-08-17 2001-08-17 外部プルアップ抵抗器検出および出力バッファの補償 Expired - Fee Related JP3818433B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/641085 2000-08-17
US09/641,085 US6259282B1 (en) 2000-08-17 2000-08-17 External pull-up resistor detection and compensation of output buffer

Publications (3)

Publication Number Publication Date
JP2002111472A JP2002111472A (ja) 2002-04-12
JP2002111472A5 true JP2002111472A5 (enExample) 2004-09-09
JP3818433B2 JP3818433B2 (ja) 2006-09-06

Family

ID=24570871

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001247518A Expired - Fee Related JP3818433B2 (ja) 2000-08-17 2001-08-17 外部プルアップ抵抗器検出および出力バッファの補償

Country Status (2)

Country Link
US (1) US6259282B1 (enExample)
JP (1) JP3818433B2 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7158121B2 (en) * 2001-10-19 2007-01-02 American Standard International Inc. Enhanced touch-screen display system
US7285976B2 (en) * 2005-01-31 2007-10-23 Freescale Semiconductor, Inc. Integrated circuit with programmable-impedance output buffer and method therefor
JP4937898B2 (ja) * 2005-02-04 2012-05-23 富士通株式会社 クロックバッファ
CN102571060B (zh) * 2010-12-31 2015-08-12 意法半导体研发(上海)有限公司 高频智能缓冲器

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5864244A (en) * 1997-05-09 1999-01-26 Kaplinsky; Cecil H. Tristate buffer circuit with transparent latching capability
US5905389A (en) * 1997-09-22 1999-05-18 Cypress Semiconductor Corp. Methods, circuits and devices for improving crossover performance and/or monotonicity, and applications of the same in a universal serial bus (USB) low speed output driver

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